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Section3 3modeling The Diode Foward Characteristic Package
Section3 3modeling The Diode Foward Characteristic Package
Section3 3modeling The Diode Foward Characteristic Package
2 ways:
A. Exact Solutions
B. Approximate Solutions
3 kinds of models:
1.
2.
3.
C. Small-Signal Analysis
Transcendental Solutions
of Junction Diode Circuits
In a previous example, we were able to use the junction diode
equation to algebraically analyze a circuit and find numeric
solutions for all circuit currents and voltages.
⎛ vD nVT ⎞
iD = Is ⎜ e − 1⎟
⎝ ⎠
Vs − vD ⎛ vD nVT ⎞
= Is ⎜ e − 1 ⎟
R ⎝ ⎠
????
x = cos [x ] , y 2 = ln [ y ] , or 4 - x = 2x
+ +
Replace: iD vD with: iD = i
D
i
vD = vDi
− −
For example, if using the ideal diode model we find that current
iD = iDi > 0 , then the diode voltage determined will be
vD = vDi = 0 . Of course, the exact solution will be some value
closer to vD = 0. 7 , so our answer has some error.
iD
ideal diode
model
junction
diode
vD
+ +
Replace: with:
iDi vDi
iD vD −
+
0. 7 V
−
−
iD
junction
CVD diode
model
vD
0.7 V
Step 2 - Analyze the IDEAL diode circuit. Determine iDi and vDi
for each ideal diode.
+
+
iD ≈ iDi iDi vDi
iD vD −
+
vD ≈ v D
i
+ 0.7
0. 7 V
− −
vD = vDi + 0.7
= 0.0 + 0.7
= 0.7 V
vD = vDi + 0.7
< 0.7 V
The Piece-Wise
Linear Model
Q: The CVD model approximates the forward biased junction
diode voltage as vD = 0. 7 V regardless of the junction diode
current. This of course is a good approximation, but in reality,
the junction diode voltage increases (logarithmically) with
increasing diode current. Isn’t there a more accurate model?
+
+ iDi
v i
Replace: with: D
+
−
iD vD VD 0
−
rd
−
iD
PWL 1
model rd
junction
diode
vD
VD0
Step 2 - Analyze the IDEAL diode circuit. Determine iDi and vDi
for each IDEAL diode.
+
+ iDi
v i
iD ≈ iDi −
D
+
iD VD 0
vD
vD ≈ v Di + VD 0 + iDi rd −
rd
−
vD = vDi + VD 0 + iDi rd
= 0.0 + VD 0 + iDi rd
= VD 0 + iDi rd
vD = vDi + VD 0 + iDi rd
= vDi +VD 0 + 0
vD < VD 0
⎧
⎪ 0 for vD < VD 0
⎪
iD = ⎨ 1
⎪⎛ 1 ⎞ ⎛VD 0 ⎞ rd
⎪⎜ r ⎟ D ⎜ r ⎟ for vD > VD 0
v −
⎩⎝ d ⎠ ⎝ d ⎠
vD
VD0
Note that when the ideal diode in the PWL model is forward
biased, the current-voltage relationship is simply the equation
of a line!
⎛1 ⎞ ⎛V ⎞
iD = ⎜ ⎟ vD − ⎜ D 0 ⎟
⎝ rd ⎠ ⎝ rd ⎠
y = m x + b
An exponential equation!
iD
1
rd
junction
diode PWL
model
Q: Limited match!?
Then why even bother
with this PWL model? region of
greatest model
accuracy
vD
VD0
At the very least, the PWL model (unlike the two alternatives)
shows an increasing voltage vD with increasing iD. Moreover,
if we select the values of VD0 and rd properly, the PWL can
very accurately “match” the actual (exponential) junction
diode curve over a decade or more of current (e.g., accurate
from iD = 1 mA to 10 mA, or from iD = 20mA to 200mA).
We will find that the first two methods are the most useful.
Let’s address them one at a time.
⎡i ⎤
vD 1 = nVT ln ⎢ D 1 ⎥
⎣ Is ⎦
⎡i ⎤
vD 2 = nVT ln ⎢ D 2 ⎥
⎣ Is ⎦
iD
1
⎛ 1 ⎞ ⎛VD 0 ⎞ rd
iD 1 =⎜ v −
⎟ D1 ⎜ ⎟
⎝ rd ⎠ ⎝ rd ⎠
⎛ 1 ⎞ ⎛VD 0 ⎞
iD 2 =⎜ v −
⎟ D2 ⎜ ⎟ iD2
⎝ rd ⎠ ⎝ rd ⎠
iD1
vD
VD0 vD1 vD2
1 iD 2 − iD 1 vD 2 − vD 1
m= = ∴ rd =
rd vD 2 − v D 1 iD 2 − iD 1
VD 0 = vD 1 − iD 1 rd or VD 0 = vD 2 − iD 2 rd
VD
⎡I ⎤
ID = Is e nVT
or equivalently VD = nVT ln ⎢ D ⎥
⎣ Is ⎦
This one!
ID
Not this one!
vD
VD
Q: What! Just how is it possible to
determine the slope of the junction
diode curve at the bias point?!?
d iD d ⎛ vD
nVT ⎞
= I
⎜ s e ⎟
d vD d vD ⎝ ⎠
vD
Is e nVT
=
nVT
Q: Of course! This
equation is the slope of
the junction diode
curve at the bias point!
d ⎛ vD
nVT ⎞
m= ⎜ I s e ⎟
d vD ⎝ ⎠ vD =VD
vD
Is e nVT
=
nVT
vD =VD
VD
Is e nVT
=
nVT
VD
ID = Is e nVT
VD
Is e nVT I
m= = D
nVT nVT
VD 0 =VD − ID rd (KVL !)
VD 0 =VD − ID rd
⎛ nV ⎞
= VD − ID ⎜ T ⎟
⎝ ID ⎠
= VD − nVT
VD
ID = Is e nVT
nVT
rd =
ID
VD 0 =VD − nVT
Example: Constructing
a PWL Model
For a certain junction diode, we know that:
iD = 10 mA when vD = 0.7 V
and
iD = 1 mA when vD = 0.6 V
⎛1 ⎞ ⎛VD 0 ⎞
iD = ⎜ ⎟ vD − ⎜ ⎟
r
⎝ d ⎠ r
⎝ d ⎠
iD 2 − iD 1 10 − 1 9
m= = = = 90 K mhos
vD 2 − vD 1 0.7 − 0.6 0.1
1 0.1
rd = = = 0.0111 KΩ
m 9
⎛ 1 ⎞ ⎛VD 0 ⎞ ⎛ 1 ⎞ ⎛VD 0 ⎞
iD 1 = ⎜ v −
⎟ D1 ⎜ ⎟ or iD 2 = ⎜ v −
⎟ D2 ⎜ ⎟
r
⎝ d ⎠ r
⎝ d ⎠ r
⎝ d ⎠ r
⎝ d ⎠
become either:
VD 0 = vD 1 − iD 1 rd
= 0.6 − 1(0.0111)
= 0.589 V
or
VD 0 = vD 2 − iD 2 rd
= 0.7 − 10(0.0111)
= 0.589 V
+
⎧ 0 for vD < 0.589 V vD 0 .5 8 9 V
⎪⎪
iD = ⎨ −
⎪ vD − 0.589 mA for vD > 0.589 V
⎪⎩ 0.0111 0.0111 11.1 Ω
−
iD iD
+ +
+
vD 0 .5 8 9 V
vD +
0 .7 0 V
− −
11.1 Ω
− −
PWL CVD
Note that the CVD model can be viewed as a PWL model with
VD0 = 0.7 V and rd = 0.0. Compare those values with our model
(VD0 = 0.589 V and rd = 11.1Ω)—not much difference!
Thus, the PWL model is not a radical departure from the CVD
model (typically VDO is close to 0.7 V and rd is very small).
Instead, the PWL can be view as slight improvement of the
CVD model.
Example: Constructing a
Diode Small-Signal Model
Recall that one method for constructing a diode PWL model is
to specify a single point (i.e., the bias point) on the junction
diode curve, and then determine the slope of the junction
diode curve at that point.
OK, now back to our example. Say that somehow we know that
the actual junction diode current in our circuit is in the
vicinity of 10 mA. Let’s therefore use as our bias point the
values that we were initially given—values that describe a
point lying on the junction diode curve:
ID = 10 mA VD = 0.6 V
Note that this was the hardest part of the whole process!
Determining the model parameters is now straightforward.
nVT 1(0.025)
rd = = = 0.0025 K = 2.5 Ω
ID 10
and iD
VD 0 =VD − nVT +
= 0.6 − 0.025
= 0.575 V +
vD 0 .5 7 5 V
−
We’re done!
2.5 Ω
−
Example: Junction
Diode Models
Consider the junction diode circuit, where the junction diode
has device parameters IS = 10-12 A, and n =1:
+5 V
I numerically solved the resulting
+ transcendental equation, and
iD vD determined the exact solution:
−
iD = 87.40 mA
50 Ω vD = 0.630 V
+ +
iD vD iDi vDi
− −
50 Ω 50 Ω
Check result:
iDi = 100 mA > 0
iD ≈ iDi = 100 mA
vD ≈ vDi = 0
+5 V +5 V
+ +
iD vD iDi vDi
− −
+
0. 7 V
50 Ω −
50 Ω
+5 V
Assume IDEAL diode is “on”.
+
Enforce vDi = 0 .
i
D
i
v =0
i
D
−
+ Analyze the IDEAL diode circuit.
0. 7 V From KVL:
−
5.0 − vDi − 0.7 − 0.05 iDi = 0
50 Ω 5.0 − 0.7
∴ iDi = = 86.0 mA
0.05
iD ≈ iDi = 86.0 mA
Much better than before, but we can do even better! Let’s use
the PWL model.
+5 V
+5 V +
iDi
+ v i
D
+
iD vD −
VD 0
− −
rd
50 Ω
50 Ω
vD = nVT ln(iD IS )
= 0.616 V for 50 mA
= 0.639 V for 125 mA
We now know two points lying on the junction diode curve! Let’s
construct a PWL model whose “line” intersects these two points.
Recall that when the ideal diode is forward biased, applying KVL
to the PWL model results in:
vD = VD 0 + iD rd
or equivalently:
vD VD0
iD = −
rd rd
Inserting the junction diode values into this PWL model equation
provides:
0.616 = VD 0 + (0.05)rd
0.639 = VD 0 + (0.125)rd
+5 V
Assume the IDEAL diode is “on”.
+
iDi Enforce vDi = 0 .
v i
D
− +
0 .6 V
Analyze the IDEAL diode circuit.
−
From KVL:
0.31 Ω
5.0 − vDi − 0.6 − (0.05 + 0.00031) iDi = 0
50 Ω 5.0 − 0.6
∴ iDi = = 87.5 mA
0.05031
iD ≈ iDi = 87.5 mA
vD = vDi + VD 0 + iDi rD
= 0 + 0.600 + (0.087 )0.31
= 0.627 V
The error of the PWL model estimates is just 0.003 Volts and
0.1 mA !
R1=1K R3=1K
0.5 mA R2=1K iD vD
−
Using the CVD model, let’s estimate the voltage across, and
current through, the junction diode.
R1=1K R3=1K
+
iDi vDi
−
0.5 mA R2=1K +
0. 7 V
−
Where Æ i1 = 0.5 mA
vR vR
i2 = = = vR
R2 1
vR − 0.7 vR − 0.7
iDi = = = vR − 0.7
R3 1
0.5 + 0.7
And thus: vR = = 0.6 V
2
Where Æ i1 = 0.5 mA
vR vR
i2 = = = vR
R2 1
iDi = 0
Therefore Æ 0.5 = vR + 0 = vR
Note that we must find the numeric value of vDi , the voltage
across the reverse biased IDEAL diode.
Then, you must use the model results to carefully, patiently and
precisely determine approximate values for the junction diode.
DC and Small-Signal
Components
Note that we have used DC sources in all of our example circuits
thus far. We have done this just to simplify the analysis—
generally speaking, realistic (i.e., useful) junction diode circuits
will have sources that are time-varying!
The result will be voltages and currents in the circuit that will
likewise vary with time (e.g., i (t ) and v (t ) ). For example, we
can express the forward bias junction diode equation as:
vD (t )
iD (t ) = Is e nVT
vS (t ) =VS +vs (t )
T
1
T ∫ vs (t )dt = 0
0
Also,
For example, the junction diode voltage might have the form:
vD (t ) = 0.66 + 0.001cosωt
VD = 0.66V
vd (t ) = 0.001 cosωt
vD
0.66
t
0.0
DC and AC Impedance of
Reactive Elements
Now that we are considering time-varying signals, we need to
consider circuits that include reactive elements—specifically,
inductors and capacitors.
ZR = R
1
ZC =
jωC
Z L = jωL
ZR = R
1
ZC = lim =∞
ω →0 jωC
Z L = j (0)L = 0
1
ZC = lim =0
C →∞ jωC
Zero impedance!
+ vc (t ) = 0 −
IC = 0 C = lim C
C →∞
ZC < 10
10 > ZC
1
10 >
ωC
1
ω >
10C
Z L = lim jωL = ∞
L →∞
+ VC = 0 −
iA (t ) = 0 L = lim L
L →∞
Z L > 105
ωL > 105
105
ω >
L
Small-Signal Analysis
Consider this simple junction diode circuit:
R
+
+
VDD ID VD
- −
ID + id (t )
vs(t)
+
VD +vd (t )
+
−
VDD
-
+
vs(t) ideal
VD0 vD =VD + vd (t )
VDD
rd
−
R iD = ID + id (t )
+
vs(t)
VD0 vD = VD + vd (t )
VDD
rd
−
VDD = ID ( R + rd ) + VD 0
We call this the DC circuit equation.
VDD + v s = ( ID + id ) R + VD 0 + ( ID + id ) rd
= (R + rd )ID + VD 0 + (R + rd )id
Now, just for fun, let’s subtract the DC equation from this
KVL:
v s = (R + rd )id
v s (t ) = (R + rd ) id (t )
Thus, the total KVL can be divided into two parts, the DC
equation and the small-signal equation, i.e.:
v s = (R + rd )id
vs(t)
v s (t ) = (R + rd ) id (t )
rd
R id (t )
2. We then turned off the DC
sources and determined the
small-signal solution (i.e., the
small-signal equation): vs(t)
v s (t ) = (R + rd ) id (t ) VD 0 = 0
VDD = 0
rd
Q: Hold on dude! Earlier in
the course you said that
diodes are non-linear devices,
meaning that superposition
cannot be applied!?!
+
vs(t)
VD0 vD =VD + vd (t )
VDD
rd
−
Consider the total diode current and total diode voltage when
both DC and small-signal components are present:
iD (t ) = ID + id (t )
vD (t ) =VD + vd (t )
1. Replace 3. Perform DC
2. Turn “off”
junction diodes analysis to find
ss sources.
with CVD model. DC bias.
6. Turn off DC
sources (including VD0)! 7. Perform ss analysis.
Small-Signal
Analysis Steps
Complete each of these steps if you choose to correctly
complete a diode small-signal analysis.
Good news! The CVD model is accurate enough for this step
(but make sure you complete every step of the ideal circuit
analysis).
n VT
rD =
ID
The ideal diode in the PWL model will be in the same bias state
as the ideal diode in the CVD model in step 1.
Remember:
vd (t ) = id (t ) rD
vd (t ) = id (t ) rD + 0.7
or:
vd (t ) = id (t ) rD +VD 0
1K
vs (t) n=1
2K iD(t) = ID + id (t)
VS = 5V n=1
Turn off the small-signal source and replace the junction diodes
with the CVD model.
1K
IDi
2K 0.7 V
VS = 5V
0.7 V
Assume the ideal diodes are “on”, enforce with short circuits.
I1 1K
+ VR1 -
IDi
+
2K VR2 0.7 V
-
VS = 5V
I2
0.7 V
VR 2
∴ I2 = = 0.7mA
2
VR 1
Thus from Ohm’s Law: I1 = = 3.6 mA
1
IDi = I1 − I2
And finally from KCL: = 3.6 − 0.7
= 2.9 mA
ID = IDi = 2. 9 mA
nVT 0.025
rD = = = 8 .6 Ω
ID 0.0029
Note since the junction diodes are identical, and since each has
the same current ID =2.9 mA flowing through it, the small-signal
resistance of each junction diode is the same (rD=8.6Ω).
+ VR1 -
vs (t) +
VD0
2K VR2
- 8.6Ω
VS = 5V VD0
8.6Ω
This means turn off the 5 V source and the VD0 sources in the
PWL model !
After turning off all DC sources, we are left with our small-
signal circuit: id
is 1K
+
8.6Ω vd
2K
vs (t) _
+
8.6Ω vd
_
is 1K
Therefore is is:
v s (t )
is (t ) =
1.0 + 0.0169
= 9.83 sin ωt μA
id
is 1K
+
8.6Ω vd
2K
vs (t) _
+
8.6Ω vd
_
⎛ 2 ⎞
id (t ) = is (t ) ⎜ ⎟
⎝ 2 + 0.0169 ⎠
= 9.75 sin ωt μA
vd (t ) = id (t ) rd
= 9.75(8.6) sin ωt μV
= 83.85 sin ωt μV
Example: Small-Signal
Diode Switches and
Attenuators
Consider now this junction diode circuit, which includes a very
large capacitor and a very large inductor:
VC
n =1
+
1K VO +vo(t)
vs(t)
-
+
1K VO
-
Replacing the junction diode with the CVD model, we find (I’m
skipping the IDEAL diode analysis steps—but that doesn’t
mean that you can!):
VC − 0.7
ID = = VC − 0.7 [mA ]
1
nVT 0.025
rD = = ⎡⎣K Ω ⎤⎦
ID VC − 0.7
0.025
rD =
VC − 0.7
+
1K vo(t)
vs(t)
-
⎛ 1 ⎞
vo (t ) = v s (t ) ⎜ ⎟
⎝ 1 + rD ⎠
vs (t )
=
⎛ 0.025 ⎞
1+⎜ ⎟
⎝VC − 0 . 7 ⎠
+
1K vo(t) VC = 0.7 V
vs(t)
-
+
1K vo(t) VC 0.7 V
vs(t)
-
+
⎛ 1 ⎞
1K vo (t ) = v s (t ) ⎜ ⎟
vs(t) ⎝ 1 + rD ⎠
-