Field Oxide, P-Well Lithography,

and Boron Doping

CyMOS Process Lab Report #1
Iowa State University
EE 432/532

Submitted By:
Cody Juracek

Lab instructor – Le Wei

Submission Date:
October 29, 2019
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Abstract: This lab report will go

into detail about how
integrated circuits
are fabricated from
silicon-based disks
which are used in
photovoltaic circuitry
for example.

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Overview
The purpose of the lab is to develop hands-on experience of manufacturing modern
integrated silicon-based circuits through oxidation, diffusion, deposition, photolithography,
and etching; these talking points relate to theoretical topics discussed in class. As this
report progresses, the wafers will undergo radical changes in terms of thickness and doped
impurities. Keep a watchful eye for pictorials indicating the four test wafers and our CMOS
wafers as they provide a visual of the process. This report will also touch base on some of
the chemistry and mathematics that take place throughout these processes.

Field Oxide
Starting Wafers
In my lab section there are 5 students each with a designated wafer, 2 spare wafers in case
someone’s wafer gets damaged, and 4 test wafers for us to use on the lab equipment first
before using our own. All wafers are 3 inches in diameter, contain a crystalline structure of
<100>, a resistivity of 140 Ohms-cm, and are made out of negative-type (n-type) silicon
(Si), wafers doped with a concentration of 9.154E13 cm -3 of Phosphorus (P) molecules.

Standard Clean (RCA Clean)

The first step in the field oxidation process is cleaning the wafers of any impurities before
being doped in a high-temperature furnace(s) with Oxide particles otherwise they will
need to be cleaned again since the wafer will become contaminated after a few hours of
being cleaned. The importance of cleaning the wafers of impurities is to reduce fluctuation
in electrical performance. The cleaning procedure are as follows:
● The correct lab protective gear at all times are as follows:
○ Lab coat
○ Vinyl cleanroom gloves
○ Closed-toe shoes
● First, we measured our test wafers’ thickness by taking 9 separate readings on each
wafer and calculated the average.
○ The measuring device used is a filmetric.
○ These thickness measurements will be our guide to see how thick our wafers
will get after each oxidation and particle doping.
○ The average thickness for all four test wafers averaged from 350-400um
○ The following depicts our measuring patterns in a 3x3 grid:

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○ The following picture is the filmetric device used in measuring our wafers:

○ Here is a pictorial of the wafers’ starting thickness:

● All wafers are placed in a plastic boat, a safe holding device that grants smooth
transportation into chemical solutions.
● The chemical solutions are located in a hood; the following depicts where each
solution is located:

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○ The proper lab protective gear are as follows:

■ Lab coat
■ Vinyl cleanroom gloves
■ Closed-toe shoes
■ Protective eyewear (goggles)
■ A heavy rubberized lab apron
■ Yellow chemically resistant gloves
● All wafers are placed in a SC-1 bath for 15 minutes at 80 degrees Celsius.
○ This removes any organic material on the wafers.
○ SC-1 chemical compound:
■ 2500mL of DI H2O (distilled water)
■ 500mL of NH4OH (ammonium hydroxide)
■ 500mL of H2O2 (hydrogen peroxide)
● All wafers are then rinsed in an H 2O cascading bath, a pool of water with Nitrogen
bubbling the pool, for 3 minutes. This removes the SC-1 solution from the wafers in
preparation for the next bath.
○ This picture shows our wafers in the cascading bath:

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● After the cascading bath, all wafers are dipped into an HF (hydrogen fluoride) pool
for 15 seconds. HF removes any remaining organic molecules and silicon dioxide if
present.
● All wafers are placed in a SC-2 bath for 15 minutes at 80 degrees Celsius.
○ This removes any inorganic and metal ions on the wafers.
○ SC-2 chemical compound:
■ 3000mL of DI H2O (distilled water)
■ 500mL of HCl (hydrochloride)
■ 500mL of H2O2 (hydrogen peroxide)
● All wafers are then rinsed in the cascading bath for 3 minutes.
● After the second cascading bath the wafers are placed in a machine that spin rinses
all chemical residue from the wafer then spin dry the wafers in preparation for their
oxidation baking.
○ One spin rinse/dry cycle is about 5 minutes long.
○ The wafers are dried with N2 (nitrogen) gas.
○ Before using the spin rinse/dry machine on the wafers, we needed to clean
the machine, make sure there are no unwanted residue particles.

Wet Oxidation
Once the wafers are clean, they are ready to enter the furnace and be flooded with O2
(oxide) to form a layer of SiO 2 (silicon oxide) on top of the silicon wafer. As the O 2 particles
bombard the silicon, it increases the wafers’ thickness overall but decreases the silicon
thickness.
The following is the wet oxidation:
● First, the oxide furnace needs to heat up to a temperature of 800 degrees Celsius.
○ As the furnace preheats, the freshly cleaned wafers are transferred to a glass
boat, otherwise, a plastic boat would incinerate.
■ When transferring wafers make sure to handle them with plastic
tweezers.
○ Make sure each wafer is completely after the spin rinse/dry cycle.
● Once at 800 degrees Celsius, the wafers are ready to be placed in the entrance of the
furnace and are pushed inside until they are at the center.
○ We used a glass to push the wafers further into the furnace.
○ We slid the wafers in 1 inch every 12 seconds with a total time of around 5
minutes.
○ When the wafers are fully in the furnace we put away the glass rod and cover
the furnace’s entrance with a lid.
■ The venting chamber on the lid must be pointing up for a smooth
pressure release.
○ Furnace gloves must be worn at all times when handling things in and out of
the furnace.
● With the wafers inside the furnace, we ramped up the temperature to 1050 degrees
Celsius.
○ At this temperature, the oxidation may finally begin.

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● As the furnace heated up, we flooded the chamber with dry N 2 (nitrogen) particles at
a steady rate of 1 SLPM (standard liter per minute).
○ The time-lapse from 800 to 1050 degrees Celsius was around 20 minutes.
○ At around 1000 degrees in the furnace, we turned on the bubbler to a
temperature of 98 degrees Celsius.
■ N2 (nitrogen) gas at a rate of 200 SCCM (standard cubic centimeters
per minute) was used to fill up in the bubbler however with not no N 2
or steam particles flooding the chamber.
● The N2 gas allows us to control the pressure in the bubble and
chamber.
● Once the furnace is at 1050 degrees Celsius and the bubbler at 98 degrees Celsius
we ceased the dry N2 particles from flooding the chamber and switched to the
mixture of N2 and steam particles.
○ This is where wet oxidation takes place.
○ As the steam (H2O) particles interact with the silicon wafer (Si), the oxygen
particles separate from hydrogen (H2) and cling to the wafers.
■ The chemical equation is as follows:

○ Here is a pictorial of when the SiO2 has finished growing:

○ The following graph gives a visual of what thickness to expect when

performing a certain oxidation method at a temperature during an allotted
time:

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■ According to the graph, the wafers gained an SiO 2 thickness of just

over 0.1 um.
○ The wet oxidation took 20 minutes to complete.
● With the wet oxidation finished we ceased the N 2 and steam particles from flooding
the chamber and reactivated the dry N2 gas to resume pressure control.
○ The bubbler was turned off and cooled to room temperature.
● We reduced the furnace to a temperature of 800 degrees Celsius in preparation to
remove the wafers.
○ We allowed the wafers to cool and remain at 800 degrees Celsius overnight
and our lab instructor graciously offered to pull our wafers out of the furnace
the next morning.
■ Much like pushing the wafers in, pulling the wafers out must be done
at the rate of 1 inch per 12 seconds to reduce the risk of the wafers
from fracturing.
● Once the wafers were successfully removed from the furnace, we measured the
wafers in the same 3x3 grid pattern:
○ Test Wafer 1 (TW1) = 340.67 nm
○ TW2 = 324.19 nm
○ TW3 = 326.38 nm
○ TW4 = 322.51 nm
○ The following pictorial shows what the SiO2 looks like on all our wafers:

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● This concludes the field oxidation procedure.

Photolithography for P-Well

After the field oxidation of the wafers come ultraviolet light exposure and wet etching to
create the desired pattern known as photolithography. For this procedure, we are creating
the pattern for the p-well of the CMOS, specifically the NMOS. This process starts with the
wafers being coated and baked with a certain material and, depending on the material, will
either add onto or engrave into the SiO 2 (silicon dioxide) layer developed in the field
oxidation procedure. With the material applied, the wafers (excluding the test wafers) are
placed in a machine designed for ultraviolet light to shine on certain parts of the wafer for
those parts to eat through the SiO 2 layer. Then afterward, the material is rinsed off.
However, let us dive deeper into the lithography process.
● All the wafers are placed on the active hood.
○ This depicts the lab station:

○ Note the central circular object is named the photoresist spinner.

○ Note there are two hot plates.
■ Hot plate 1 is set at 100 degrees Celsius.
■ Hot plate 2 is set at 120 degrees Celsius.
○ The correct safety gear to use are as follows:
■ Lab coat
■ Latex gloves
■ Closed-toe shoes
■ Protective eyewear (goggles)
● Each wafer gets placed on the photoresist spinner.
○ The spinner can suction the wafer(s) so they do not fly off when spinning.
■ Use metal tweezers when handling the wafer.
● When the wafer is securely on the spinner begins the spinning cycle.
○ Each spinning cycle spins at a rate of 4000 rpm (revolutions per minute) for
40 seconds.

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● During the first spin cycle, a solution named HMDS (hexamethyldisilazane) is

dropped on the wafer six times.
○ HDMS assists the material photoresist to better sick firmly on the wafer’s
surface.
● Once done spinning, a material called a photoresist is placed on the wafer’s surface.
○ The amount of photoresist used is enough to fill a whole pipet (or two halves
of a pipet).
○ The photoresist solution used:
■ AZ5214E-IR
■ P-type photoresist
● A material that once is shined by ultraviolet light and etched,
the areas exposed will dissolve away whereas the unexposed
areas remain.
● Other facts:
○ Polymer (Molecular Weight (MW)~5000)
○ Photoactive Inhibitor (20%)
○ Volatile Solvents
○ Inhibitor Loses N2 => Alkali Soluble Acid
○ Develops by “etching” - No Swelling.
● The following pictorial shows what a P-type does when
exposed:

○ Note: the polymer plus photosensitizer is the ultraviolet

light-exposed area.
○ Other photoresists which exist (not used during this lab):
■ N-type photoresist
● A material that once is shined by ultraviolet light and etched,
the areas exposed will remain whereas the unexposed areas
will dissolve away.
● Other facts:
○ Polymer (MW ~65000)

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○ Light Sensitive Additive Promotes Crosslinking

○ Volatile Solvents
○ Light breaks N-N => Crosslink Chains
○ Sensitive, hard, Swelling during Develop
● The following pictorial shows what a P-type does when
exposed:

○ Note: the exposed areas form a bit of a slope in the SiO 2

layer.
○ The following pictorials accurately show what each photoresist does:

● With the photoresist on the wafer, it undergoes another spinning cycle.

○ 1 spinning cycle = 4000 rpm (rotations per minute) for 40 seconds.

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○ One spin cycle allows for an even distribution across the wafer’s entire
surface area.
■ The following depicts how the photoresist spinner works:

● Once the photoresist is evenly spread on the wafer, the photoresist needs to harden
before being exposed to ultraviolet light.
○ We placed the wafer on Hot Plate 1 at 100 degrees Celsius for 1 minute.
● If the photoresist does not evenly spread then we removed it by following these
steps:
○ Spray C3H6O (acetone) onto the wafer.
○ Spray with CH3OH (methanol) onto the wafer.
○ Rinse with DI water.
○ Dry wafer with N2 gas.
○ Bake the wafer at 100 degrees Celsius for 5 minutes.
○ Then repeat the steps for applying HMDS and photoresist.
● With the photoresist evenly distributed and harden, the wafer is ready to be
exposed to ultraviolet light, known as photolithography
○ Definition: photo - meaning light; litho - meaning stone or material; graphy -
meaning writing.
■ It is the process of shining a high wavelength light (ultraviolet light)
onto the wafer with a photoresist.
■ However, the light passes through nano or micrometer small
holes/openings on a metal plate, known as a photomask plate.
■ The exposed spots on the photoresist will dissolve or harden when
the wafer is developed, depending on what type of photoresist is used.
○ There are three types of photolithography:
■ Contact Printing
● The mask lays directly on top of the wafer when it is ready to
be exposed to ultraviolet light.

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● This method is high in accuracy however the mask gets easily

damaged.
● We used this method in the lab.
■ Proximity Printing
● The mask is placed above the wafer by 10-50 micrometers.
○ whichever parts are exposed are removed or hardened,
again depends on the type of photoresist.
○ A constant N2 gas flow keeps the mask separated from
the wafer.
● This method is known to have a severe reduction in resolution
due to diffraction spreading.
○ The resolution can be calculated by the following
equation:

■ R = resolution (standardly in um)

■ k = the machine constant
■ 𝝀 = light wavelength (um)
■ g = mask to wafer distance (um)
○ Resolution can be enhanced by either decreasing the
gap at the risk of contact and producing mask defects or
by reducing the wavelength.
■ Projection Printing
● The mask is placed above the wafer with a focusing lens in
between.
● Allows for high accuracy with higher wavelengths however
these machines are highly expensive and complicated in
design.
● This is used in industry today.
○ This image depicts the three types of exposures:

● Once the wafer is ready to be exposed to ultraviolet light, it is placed inside the
machine with the mask laying on top of it.
● The trick is aligning the mask to the wafer or risk a misalignment and overlay onto
the wafer.

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○ The pictorial shows several misalignments:

■ Notice how the SiO2 overlay or have a gap between n/p-well to

source/drain.
■ There also runs the issue of the resolution being too small or large
when it doesn’t fully penetrate the wanted depth.
○ The next picture shows what aligning looks like on the machine we used:

■ The objective is to move the crosses within boxes.

■ If one cross is too far outside a box then misalignment will occur.
■ Once the machine is aligned the ultraviolet light is exposed to the
wafer.
● Following exposure, the wafer is transferred back to the hood to be developed.
○ Developing allows the etching to occur and depending on developing
duration speeds up the etching rate.
● The wafer is submerged in a MIF (metal ion-free) solution to remove the
photoresist.
○ Then the wafer is swirled around slowly for about 60 seconds or until you
see the photoresist being mixed into the solution.
○ If p-type photoresist the exposed areas are removed.
○ If n-type the unexposed areas are removed.

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● After, the wafer(s) are rinsed in a cascading bath for 3 minutes.

● After rinsing, each wafer is dried with N2 gas.
● Each wafer gets inspected under a high-powered microscope.
○ The microscope allowed us to see how accurate we were with our
photolithography by observing the crosses and boxes imprinted.
○ The following are pictures of our wafers after photolithography:

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■ As seen, the first photolithography came out aligned.

● Then each wafer bakes at 120 degrees Celsius for 1 minute.
○ This post bake solidifies the development and will be ready for the etching
process.

Oxide Etching
Once all the wafers have completed the photolithography process, the etching of SiO 2 is
next. Etching removes the desired area on a wafer; in this lab, we used the wet etching
process, however, there is a dry etching process as well.
● All developed waters, including TW1, are placed in a BOE (buffer oxide etching)
solution.
○ Chemicals used in the BOE solution:
■ HF (hydrogen fluoride)
■ NH4F (ammonium fluoride)
○ This chemical equation represents the etching reactions:

○ First, by using TW1, we determined about 4 minutes and 30 seconds in the

BOE solution was enough for how wafers to be fully etched.
○ The way for us to determine this was by leaving TW1 in the BOE, dip it in DI
water, and see if the wafer is hydrophobic (non-wetting).
■ If the wafer was hydrophilic (water sticking) then it has not been fully
etched and needed to soak in BOE a few more seconds.
■ Once TW1 passed, we proceeded soaking our wafers, plus spare
wafers, in the BOE solution for the same time it took TW1.
○ This is what “eats” into the SiO2 layer and creates space for our p-well.
● All wafers are then placed in a cascading bath for 2 minutes to remove the BOE
solution.

Photoresist Strip
After cascade bathing, the remainder photoresist needs to be removed from the wafer by
bathing in several chemical baths.
● All wafers bathe in (CH3)2CO (Acetone #1) for 3 minutes.
● All wafers bathe in Acetone #2 for 1 minute.
● All wafers bathe in CH3OH (Methanol) for 1 minute.
● All wafers bathe in a cascade rinse for 2 minutes.
● All wafers undergo a spin rinse/dry cycle for about 5 minutes.
● Afterward, this is what the wafers look like from the p-well lithography and etching:

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Boron Deposition and Drive

Boron Deposition
For this process, also known as ion implantation, particles (boron) will be flooded into the
wafers to alter their chemical and physical properties, and consequently increasing or
decreasing the current flow through the CMOS.
● All wafers that went through the photolithography process are cleaned in
preparation to be placed in the B (boron) furnace.
○ Follow the Standard Clean process detailed above.
● As the wafers are being cleaned we turned on the Boron furnace to 850 degrees
Celsius with an ambient of 2 SLPM of dry N2.
● Once cleaned the wafers are transported to a glass boat.
○ Each wafer is placed in between two boronized wafers to maximize doping.
■ These are known as solid-source wafers.
■ These wafers are made out of BN (boron nitride).
○ The following is a pictorial of the boronized wafers (AKA white wafers):

● With the wafers cleaned and the furnace at the desired temperature, all wafers are
placed inside the Boron furnace.
○ The wafers are pushed in at a rate of 1 inch per 12 seconds.
● Once in, we switched the ambient to 1 SLMP of N2 and 1 SLMP of O2.
○ This process creates the compound B2O3 that fills the chamber.
○ This process lasted for 20 minutes.
● Then 40 SCCM (standard cubic centimeters per minute) of H 2 gas is added to the
ambient.

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○ This produces and fills the chamber with HBO2 particles.

○ This process lasted for 2 minutes.
● Then the ambient reverts back to 2 SLMP of N2.
○ This allows for the wafers to bake in the mixture of gases as well as from the
boron source wafers.
○ This process lasted for 1 hour.
● After the 1 hour of the B particles soaking into the wafers, we then pulled our wafers
out of the furnace, 1 inch per 12 seconds at a time.
● We allowed the wafers to cool to room temperature.
● All wafers bathed in a cascading bath for 3 minutes.
○ This removes any excess B2O3 particles.
● All wafers are spin rinsed/dried for about 5 minutes.

Boron Drive
The boron drive portion of the lab is like oxidation where all wafers (CMOS, spare, and test)
are placed in the furnace and are doped at high temperatures. First, all wafers are pushed
in the oxygen furnace at a low steady temperature of 800 degrees Celsius with dry N 2 gas
filling the chamber. Once in, the ambient changes from dry to wet N 2 of 200 SCCM via the
bubbler at a temperature of 98 degrees Celsius for 30 minutes then back to dry N 2. This
process removes the boron skin formed during the born deposition and grows a new SiO 2
layer over the exposed areas. The wafers are pulled out, dipped in BOE to remove any
excess particles for 30 seconds, cascade rinsed for 3 minutes, and spin rinsed/dried for 5
minutes. By this time, the oxygen furnace is on at a temperature of 800 degrees Celsius
with an ambient of dry N2. The wafers are pushed into the furnace slowly, then once in the
center, the temperature increased to 1125 degrees Celsius. Once at the center, the ambient
switches to a mixture of N2 and steam via the bubbler for 10 minutes. Then the ambient is
back to a dry N2 and is left to bake for 18 hours; this is the drive step. After the allotted
time, the furnace is turned down to 800 (or 600, depending on if they will be left overnight)
degrees Celsius.

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Results/Comments
The ending oxide thickness of each test wafer after the boron drive are as follows:
● TW1 = 465.73 nm
● TW2 = 559.1414 nm
● TW3 = 559.11 nm
● TW4 = 556.5 nm

To give some insight into the above picture, the white areas are the silicon, doped with
phosphorus, the substrate of the wafer. On TW1 and CMOS, the green areas are the B 2O3
that provide a negative well of particles. On all the wafers, the blue areas are layers of SiO 2.

Our lab ran into some errors during the photoresist application and photolithography.
Between the HDMS and photoresist, we were using near expired solutions which were not
giving us a smooth coat of photoresist. We had to add, remove, and reapply the photoresist
a few times. Then there was the issue with the photolithography machine itself due to it
being broken and disassembled. Yet, this granted my lab the opportunity to use a brand
new automated photolithography machinery, however, this machine seemed to use more
of a proximity photolithography method and mix that with our uneven photoresist spread
it gave us significant misalignment issues. Thanks to the lab instructor, he cleaned our
wafers back to their silicon base and redid the oxidation and photolithography process for
us.

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Appendix

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