5190 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO.

5, SEPTEMBER/OCTOBER 2019

A Power Quality Improved EV Charger With

Bridgeless Cuk Converter
Radha Kushwaha , Member, IEEE, and Bhim Singh , Fellow, IEEE

Abstract—An improved bridgeless (BL) Cuk converter-based

electric vehicle (EV) battery charger with high power factor and
increased efficiency is designed and developed in this paper. It pro-
vides low cost and high-power-density-based charging solution for
the EV. This charger incorporates less number of devices operating
over one switching cycle, which reduces the additional conduction
loss incurred by a diode bridge rectifier of the conventional charger.
Hence, it improves the charger’s efficiency. The added advantage
of the proposed topology is that the unwanted capacitive coupling
loop is removed, as well as the unwanted conduction through the Fig. 1. Assessment of the PQ performance of the conventional EV charger.
body diode of the inactive switch in the previously developed BL
Cuk converter is avoided. This significantly improves the charger’s TABLE I
efficiency. For the constant current and constant voltage charg- SPECIFICATION OF THE EV UNDER TEST
ing, the commands are synchronized by a flyback converter. The
proposed charger draws a sinusoidal current from ac mains and
the total harmonic distortion in the supply current is reduced to
the limits specified by the IEC 61000-3-2 guidelines. The improved
efficiency and power quality indices of the proposed charger are
investigated to demonstrate its satisfactory charging operation at
all operating conditions.
Index Terms—Battery charger, bridgeless (BL) Cuk converter,
discontinuous conduction mode (DCM), flyback converter, power
factor correction (PFC), power quality (PQ).

I. INTRODUCTION charger must have improved power quality (PQ) characteris-

OWADAYS, for sustainable development of the modern
N transportation sector, battery-powered electric vehicles
(BEVs) are dominating over the conventional gasoline powered
vehicles [1]. To facilitate the battery charging in BEVs, an ac–dc
converter-based the on-board or off-board charger is the signifi-
cant supporting equipment of the electric vehicle (EV). Various
off-board and on-board topologies of EV battery chargers are
discussed in the literature with unidirectional or bidirectional
configuration under level 1, level 2, or level 3 categories. Along
with high power density and small form factor, an off-board
Manuscript received January 15, 2019; revised April 11, 2019; accepted
May 18, 2019. Date of publication May 23, 2019; date of current version Au-
gust 14, 2019. Paper 2019-TSC-0001.R1, presented at the 2018 IEEE Interna-
tional Conference on Power Electronics, Drives and Energy Systems (PEDES),
Chennai, India, Dec. 18–21, and approved for publication in the IEEE TRANSAC-
TIONS ON INDUSTRY APPLICATIONS by the Transportation Systems Committee
of the IEEE Industry Applications Society. This work was supported in part
by the J. C. Bose Fellowship under Grant RP03128 and in part by ReNew
Power Limited project under Grant RP03461N. (Corresponding author: Radha
Kushwaha.)
The authors are with the Department of Electrical Engineering, Indian Institute
of Technology, New Delhi 110016, India (e-mail: radhakushawaha@gmail.com;
bhimsinghiitd62@gmail.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIA.2019.2918482
0093-9994 © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
tics to maximize the energy utilization during charging [2]–[4].
However, the conventional EV charger with a diode bridge recti-
fier (DBR) draws a peaky current from the mains, worsening the
input power factor (PF), with total harmonic distortion (THD)
as high as 55.3%, as shown in Fig. 1. The battery rating and
specifications of the EV under test are given in Table I. It is
obvious from these recorded waveforms that the performance
of the DBR fed charger does not comply with the international
regulations such as the IEC 6100-3-2 standard [5].
To cope up with these problems, improved PQ-based EV
chargers, are extensively being studied in the literature, which
draws a sinusoidal input current with a high PF, and the output
voltage is regulated stiffly at constant value. Several topologies
of front-end power-factor-correction (PFC) converters depend-
ing upon the off-board or on-board configuration, are discussed
in the literature for EV chargers. Various on-board EV chargers
are reported in [6], which have significant advantage of high
power density and efficiency. However, an off-board config-
uration offers more practical solution due to reduced vehicle
weight and suitability to charge at high power range. Different
PFC converter topologies with interleaved input at the front-end
[7] and zero-voltage-switching technique are reported in [8] and
[9]. The interleaving of two phase inputs comes with the benefits
of reduced output ripple current and reduced size of the inductor.

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KUSHWAHA AND SINGH: POWER QUALITY IMPROVED EV CHARGER WITH BRIDGELESS CUK CONVERTER 5191

Moreover, the semiconductor devices are operated in parallel,

which results in reduced conduction losses, comparatively.
However, the interleaved PFC converters do not provide the so-
lution for poor thermal utilization of PFC switches, similar to the
conventional boost PFC converter. An LLC resonant converter
fed EV charger is discussed in [10], which offers the additional
advantage of low electromagnetic Interference (EMI) noise and
low switching loss. However, the complex mathematical anal-
ysis of the resonant converter makes the converter unsuitable
for EV charging over wide input voltage range. A full-bridge
PFC converter comes out to be most promising solution for
EV chargers [11], but designing the individual gate driver for
four semiconductor switches comes with the disadvantage of
the increased size and complexity. Therefore, to provide the
easy implementation along with retaining the advantage of the
high power density and efficiency, various unidirectional PFC
off-board EV chargers are discussed in [12] and [13].
Employing various single-stage and two-stage converters with
PFC results into perceivable PQ indices at the input of these
chargers [14], [15]. Many single-stage PFC-converter-based EV
charger topologies have been reported in the literature. The
single-stage charger is found quite reliable due to low part count.
However, the presence of 100-Hz ripple content in the output cur-
rent requires very high dc-link capacitance. For medium power
ratings up to 1 kW, a two-stage charger, with PFC converter, is
an extensively viable solution in the EV market. The DBR-fed
PFC converter affects the charger’s efficiency due to significant
conduction loss incurred by four input diodes. Therefore, with
fewer numbers of components conducting over one switching
cycle and reduced conduction loss, a bridgeless (BL) PFC con-
verter offers the most viable solution for the PQ improvement
in the EV charger. In this context, various single-phase uni-
directional improved PQ-based converters have been analyzed Fig. 2. Different BL Cuk converters. (a) Conventional Cuk converter.
in [16]. (b) Topology-1 [20]. (c) Circuating current due to interconnection of C1 and
The BL buck–boost converter [17], [18] offers the most at- C2 in topology-1[20]. (d) Topology-2 [20]. (e) Topology-3 with return current
[20] through the body diode. (f) Topology in [21]. (g) Topology in [23].
tractive solution for the PFC in EV chargers as they can both
buck and boost the input voltage. The different buck–boost
configurations-based converters such as Cuk and SEPIC con-
verters are described and analyzed in [19]–[25]. Nevertheless 2) Topology-2 uses large number of devices such as two out-
Zeta, Cuk, and SEPIC PFC converters have low input current put capacitors, which is also having the drawback of the
ripple and wide duty cycle variation range, still the SEPIC con- floating terminal for load between two capacitors at out-
verter has the limitation of the discontinuous output current un- put. Moreover, it has the disadvantage of floating neutral
like the Cuk converter. Therefore, the Cuk converter provides due to the arrangement of switches for the independent
more feasible charging characteristics to the battery due to low half of the supply voltage, as shown in Fig. 2(d).
ripple in the battery current. Many topologies of the BL-Cuk- 3) Topology-3 in [20], is found to be lossy as the body diode
converter-based upon the conventional PFC Cuk converter, as of the inactive switch S2 is always conducting the current
shown in Fig. 2(a), are discussed in the literature [20]–[23]. All during the positive half cycle of the input voltage, via Li2 ,
these topologies have certain limitations in terms of number of as shown in Fig. 2(e). Therefore, the circuit always incurs
components, losses, efficiency, and coupling requirement, which some losses across the body diode of the inactive switch
are discussed as follows. due to partly return current flow through it during other
1) Topology-1 in [20], as shown in Fig. 2(b), offers the ad- half-cycle operation.
vantages such as lower input current, less EMI, and easy 4) The other BL Cuk converters in [21] and [23], respectively,
implementation. However, it suffers from the problem of are reshown in Fig. 2(f) and (g) with the retained advantage
the circulating current [as per Fig. 2(c)], which causes the of low part count and reduced semiconductor device stress
additional losses in two halves of the supply voltage due same as in the conventional Cuk converter. However, for
to the interconnection of two intermediate capacitors, C1 both these converters, coupling in both input and output
and C2 . inductors, is not possible. This, in turn, may result into the

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5192 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO. 5, SEPTEMBER/OCTOBER 2019
Fig. 3. Proposed BL-Cuk-coverter-based EV charger configuration.
increased output and input ripple, which is not preferable
for battery service life.
Therefore, a new PQ improved, BL Cuk converter, with no
such limitations, is proposed in this paper for charging of the
EV, which follows the recommended SAE standard J1772 [26].
The significant features of the proposed charger to mitigate the
aforementioned issues are summarized as follows.
1) The intermediate capacitors are acting independently, in
both halves; therefore, circulating losses are eliminated,
which results in the improved efficiency of the charger.
2) There is no return current through the body diode of inac-
tive switches in the other half cycle due to applied control.
Therefore, losses in the switch are reduced.
3) The control of the PFC converter is simple owing to use of
same gate drive and control circuitry for each half cycles.
The output inductors of the proposed Cuk converter, are
designed small enough to ensure converter operation in
the discontinuous conduction mode (DCM), therefore, the
cost and size of the converter, are reduced.
4) Unlike Fig. 2(d), the line voltage always has a ground
return path through the line diodes Dp and Dn during the
BL operation. Therefore, there is no floating neutral issue
seen as well as EMI noise is reduced.
5) The conduction loss in the proposed converter is reduced
due to the BL structure, which in turn, improves the
charger’s efficiency. The number of components is re-
duced over one switching cycle; therefore, the efficiency
of the charger is improved with the proposed converter,
comparatively.
The converter regulates the input voltage of the flyback con-
verter, at next stage, which is used to maintain the required charg-
ing current through the battery during the constant current (CC)
and constant voltage (CV) charging regions. A prototype is de-
veloped and the improved PQ performance of the proposed EV
charger, as per the IEC 61000-3-2 standard, is demonstrated
during the steady state and for wide fluctuations in ac voltages.
II. CONFIGURATION AND OPERATION
The configuration and operation of the proposed PQ improved
EV charger are shown in Figs. 3 and 4. During the positive half
cycle, the Cuk converter cell consisting Li1 –S1 –Do1 –Lo1 –Dp
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Fig. 4. Principle of PFC Operation.
is in operation. However, during the negative half line, the other
Cuk converter cell Li2 –S2 –Do2 –Lo2 –Dn is active. The input in-
ductors Li1 and Li2 are selected to operate in the continuous con-
duction mode (CCM) for both the Cuk converter cells. However,
the design of output inductors Lo1 and Lo2 is ensured such as the
output diode current, iD , becomes zero and the converter enters
the DCM over one switching cycle. The intermediate capacitors
C1 and C2 are selected such as the voltage across capacitors, re-
mains continuous throughout the switching duration. It is worth
to mention that both switches, S1 and S2 , are driven using the
same pulsewidth modulation (PWM) signal, which reduces the
system cost and circuit complexity.
The output voltage of the PFC Cuk converter is main-
tained constant using the single-loop voltage feedback control
[27], [28], which reduces the charger cost as a single voltage
sensor is used. The flyback converter is designed to operate in
the DCM [29] with a cascaded proportional-Integral (PI) con-
troller, which controls the battery charging commands during
the CC and CV charging regions. Fig. 4 represents the behavior
of the output inductor current in the Cuk converter during PFC
in the DCM.
A. Operation of the BL Cuk PFC Converter
Due to symmetry in waveforms, only the positive half cy-
cle of the BL converter is taken into consideration, as depicted
in Fig. 5(a)–(c). To explain the working of the proposed EV
charger, the operating modes of the Cuk converter, are illus-
trated in this section.
1) Mode P-I [Switch-ON Period, 0 ≤ t ≤ DCuk Ts ]:
As shown in Fig. 5(a), the first mode of the positive half cy-
cle operation (P-I) begins at t1 , when gate pulse to switch S1
is applied. The current through the input inductor Li1 rises lin-
early with the slope of Vspk (t)/Li1 . The current follows the
path vs –Li1 –S1 –Dp –vs , as the positive line diode Dp is in the
conducting state. The key switching waveforms associated with
all three modes, are depicted in Fig. 6. The voltage across the
intermediate capacitor C1 starts decreasing through the switch
S1 and the output inductor, Lo1 , providing the required load cur-
rent to the flyback converter. The output diode Do1 remains in
the reverse bias during this interval, due to the polarity of the
intermediate capacitor voltage, C1 .
The peak current stress through switch S1 during this mode
is given as
Vspk DCuk Ts
Is1pk = (1)
Leq
KUSHWAHA AND SINGH: POWER QUALITY IMPROVED EV CHARGER WITH BRIDGELESS CUK CONVERTER
Fig. 5. Circuit operation of the EV charger with BL PFC Cuk converter during
the positive half cycle. (a) Mode P-I. (b) Mode P-II. (c) Mode P-III.
Fig. 6. Associated switching behavior of the different components over the
complete switching cycle.
where Leq represents an equivalent circuit inductance of the pro-
posed converter, i.e., the input inductor Li1 , and the output in-
ductor Lo1 . Vspk is the maximum value of the input ac voltage,
DCuk is the ON period for switch S1 , and Ts is the total switching
period.
2) Mode P-II [Switch OFF Period, DCuk Ts ≤ t ≤ D1 Ts ]:
This mode starts at instant t2 , when switch S1 is turned OFF.
The output diode Do1 comes into conduction and the voltage
across the intermediate capacitor starts increasing as the input
inductor Li1 starts releasing the stored energy via C1 and Do1 ,
as shown in Fig. 5(b). The output inductor Lo1 provides the
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5193
required load current as it releases the stored energy through the
output diode Do1 and dc-link capacitor CCuk .
The current iLo1 through the output inductor is written as
diLo1 VCuk
= (2)
dt Lo1
where VCuk is the output voltage of the BL Cuk converter.
This switching period ends when the current through the out-
put diode becomes zero at instant t3 . The normalized value of the
duty cycle in this switching mode is obtained using the following
relation:
DCuk Ts + D1 Ts ≤ Ts , which gives, DCuk + D1 ≤ 1. (3)
During mode-II operation of the proposed Cuk converter
VCuk Toff = nTon Vs
nTon Vs
Toff = (4)
VCuk
where n is the transformation ratio of the converter with isola-
tion, Ts is the switching period, Ton and Toff are the switch-ON
and -OFF periods. For the proposed non-isolated Cuk converter
n = 1. Now putting Vs = Vspk sin ωt and dc gain of the converter
as M = VCuk /Vspk .
The relation in (4) is modified as
nDCuk Ts
D1 Ts = (Vspk sinωt)
VCuk
 
nDCuk
D1 = sinωt (5)
M
where ω denotes the angular frequency given as 2π/Ts .
3) Mode P-III [DCM Mode, D1 Ts ≤ t ≤ Ts ]:
This mode is known as the DCM mode during which the
current through the output diode Do1 becomes zero, as the sum
of input inductor current and output inductor current becomes
zero. For this, the current through one of the inductor (output
inductor here) needs to be reversed as obvious in Fig. 5(c) or
it becomes zero before the end of mode-II (instant t3 in Fig. 6).
During this instant, a constant current i flows through the circuit,
as shown in Fig. 6. The inductor currents becomes a new switch-
ing cycle from their initial values: +i for iLi1 and –i for iLo1 .
The intermediate capacitor, C1 , continues to charge through the
input inductor Li1 and output diode Do1 . The flyback converter
at the output of the PFC Cuk converter gets the required power
from the dc-link capacitor CCuk . The value of the output
inductor, Lo1 decides the time period of the DCM operation.
The lower the output inductance, higher is the peak inductor
current, this results into the increased DCM period. The time
period for DCM, is given as
t3 − t4 = Ts − {(t2 − t1 ) + (t3 − t2 )}. (6)
The same switching sequence is followed in the negative half
line and at the end of this switching cycle, S2 starts conducting,
initiating the next operation cycle.
5194 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO. 5, SEPTEMBER/OCTOBER 2019
Fig. 7. Operating modes of topology-3 with the conventional control during
the positive half line. (a) Switch-ON period. (b) Switch-OFF period.
B. Differential Aspect of the Proposed PFC Converter
The differential aspects of the proposed PFC converter as
compared to the BL Cuk topology-1 and topology-3 [20], are
discussed as follows.
1) The intermediate capacitors are acting independently in
both the halves; as there is no interconnection between
C1 and C2 , unlike Fig. 2(b) and (c), therefore, circulat-
ing losses are eliminated which results in the improved
efficiency of the charger.
2) Topology-3 in [20], is found to be lossy as the body diode
of the inactive switch S2 is always conducting the current
during the positive half cycle of the input voltage, via Li2 ,
as shown in Fig. 2(e) due to the conventional control. This
implies that during the positive half cycle operation, when
switch S1 is on, the current flows not only through Dp but
also part of this current returns through the body diode
of switch S2 and inductor Li2 . Similarly, when switch S1
is turned OFF, the current not only flows through the line
diode Dp via the output diode Do1 , but some current also
goes through the inductor Li2 via the body diode, Dp .
Similar case happens for the negative half cycle operation
with the switch S2 . This happens due to the single PWM
signal being applied to only one of the switch during one
half, i.e., S1 or S2 and other switch is kept OFF for other
half thoroughly. Therefore, the circuit always incurs some
losses across the body diode of the inactive switch (S1 or
S2 ) due to the partly return current flow through it during
the respective half cycle operation, which is obvious in
Fig. 7(a) and (b).
3) There is no return current through the body diode of in-
active switches in the respective half cycle, due to applied
control, unlike Fig. 2(e). The control of the PFC converter
is simple owing to use of same gate drive and control cir-
cuitry for each half cycles, i.e., both the switches S1 and S2
operate with same driver signal, in synchronism. In other
words, in order to reduce the conduction loss through the
body diode of the inactive switches, the same driver sig-
nal and interleaved driver signal can be used to control the
switches S1 and S2 . Therefore, losses in the body diode are
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Fig. 8. Operating modes of the proposed converter with same driver signal
during the positive half line during (a) switch ON and (b) switch OFF.
reduced. The actual operating modes are slightly different
from Fig. 5(a)–(c) with the same driver signal. The afore-
mentioned fact is supported using Fig. 8(a) and (b), which
shows the operation of the proposed converter with same
control signal during the switch-ON and switch-OFF period
over the positive half of the supply cycle, as follows.
C. Operation of the Flyback Converter
The operation of the flyback converter is analyzed based on
the DCM of the magnetizing inductance of the high frequency
transformer (HFT). During mode-I, the current through the mag-
netizing inductance Lmf rises linearly and it stores the energy
when the flyback switch Sf is made ON. The output diode, Df
is reverse biased due to the dot convention of the HFT, during
this instant. The current through the switch Sf is expressed as
 t2
VCuk
iSf = iLf = VCuk dt + iLf (0) = (t1 − t2 ) + iLf (0)
t1 Lf
(7)
where iLf (0) is the current through the magnetizing inductance
at the instant t1 . The peak current through the switch is obtained
as
VCuk Dfb
iSf (Dfb Tsf ) = + iLf (0) (8)
Lf fsf
where Dfb is the required duty cycle and Tsf (1/fsf ) is the
switching period of the flyback converter, selected as 1/50 kHz
in this paper. Considering the transformation ratio of the fly-
back transformer as N, the peak voltage across the diode Df is
obtained as
VCuk Vbatt
VDf m = − + Vbatt = − (9)
N Dfb
where Vbatt is the output voltage of the charger required to main-
tain the charging current through the battery.
Mode-II begins when switch Sf is turned OFF at instant t2 .
The output power is delivered to the battery as the polarity of the
HFT, is reversed during switch OFF instant and the output diode
Df becomes forward biased. The switch current isf and the
diode voltage VDf are zero. The current through the magnetizing
KUSHWAHA AND SINGH: POWER QUALITY IMPROVED EV CHARGER WITH BRIDGELESS CUK CONVERTER 5195

 
inductance at this instant is expressed as Vs DCuk Ts (DCuk + D1 ) 1 1
iDo1 = iLi1 + iLo1 = +
 t3 2 Li1 Lo1
1
iLf = (−N Vbatt )dt + iLf (Dfb Tsf ) Vs DCuk Ts (DCuk + D1 )
L f t2 = (16)
2Leq
(−N Vbatt ) VCuk Dfb
= (t3 − t2 ) + + iLf (0) (10) where Leq is the parallel combination of Li1 and Lo1 as
Lf Lf fsf  
Li1 Lo1
where iLf (DfbT sf ) is the initial current through the magnetizing Leq = . (17)
Li1 + Lo1
inductance at the instant t2 . Therefore, the diode current iDf is
obtained as Substituting the value of iLo1 from the power balance equation
Vspk iLi1 = VCuk iLo1 as
iDf = N iLf . (11) D1
iLo1 = iLi1 (18)
DCuk
The peak voltage across the switch is derived as
(16) becomes
N Vbatt 2
VSf m = VCuk + N Vbatt = . (12) Vs DCuk Ts
Dfb iLi1 = . (19)
2Leq
This mode ends at the instant t3 . Mode-III, which is also Therefore, substituting Vs = Vspk sinωt, the expression of the
known as DCM, starts when both the switch and diode are turned current through the input inductor is rewritten as
OFF. The stored energy in the magnetizing inductance is trans-
2
ferred completely to the output, at the end of the switching cycle. Vs DCuk Ts
iLi1 = sinωt = KVspk sinωt (20)
At this instant, the output capacitor Cbatt provides the required 2Leq
battery charging current in the CC mode. where K is a constant represented as
2
iDf = iSf = 0. (13) DCuk Ts
K= . (21)
2Leq
III. DESIGN OF THE PROPOSED PFC CONVERTER-BASED It is obvious from (21) that all the variables in (20) represent
CHARGER the constant quantities except the peak input voltage Vspk . This is
also to be noted that the input current (iLi1 = is ) follows exactly
The cost of the EV charger is directly related to the sens-
the input voltage envelope of Vspk sin(ωt), i.e., an intrinsic unity
ing requirement of the PFC converter [30]–[32]. The control
PF operation is verified for the proposed converter designed in
scheme in the CCM uses the current multiplier approach to pro-
the DCM.
vide an intrinsic wave-shaping feature and dc-link regulation.
The design procedure of the proposed PQ improved EV
The required number of sensors is higher in the CCM owing
charger, for charging a 48-V/100-Ah battery, is given as fol-
to the sensing requirement of the output voltage as well as the
lows. The output voltage of the BL Cuk converter is maintained
input voltage and current. The prime advantage of the CCM op-
constant at 300 V. Using the output voltage, VCuk and the peak
eration is the lower current stress on PFC converter switches
input voltage, Vspk of the PFC Cuk converter, the voltage gain
and components. However, in the DCM operation, the required
of the converter is obtained as
sensors are reduced as the control scheme is based on the volt-
age follower approach and the only quantity to be sensed is VCuk 300
M= = √ = 0.964. (22)
the output voltage of the converter. Therefore, to reduce the Vspk 220 2
cost and complexity, the DCM-based design approach is found The value of the conduction parameter depends on the induc-
suitable in the proposed work. The inherent PFC for the pro- tance Leq , the switching period Ts , and the load resistance RCuk ,
posed BL Cuk converter in the DCM mode is illustrated as which is given as follows.
follows.
2Leq
The expression of the average input and output inductor cur- Ke = (23)
rents over the switching period Ts is given as RCuk Ts
where the converter switching frequency (1/Ts ) is selected as
Vs DCuk Ts (DCuk + D1 ) 20 kHz. The dimensionless parameter Ke is a measure of the
iLi1 = −i (14)
2Li1 tendency of a converter to operate in the DCM. Large values of
Vs DCuk Ts (DCuk + D1 ) Ke lead to the continuous mode operation, while small values
iLo1 = +i (15) lead to the discontinuous mode for some values of the duty cycle.
2Lo1
Therefore, for the DCM operation
where “I” represents the current in both input and output induc-
Ke < Kecrit (24)
tors during the DCM operation, as shown in Fig. 6. The addition
of the inductor currents given by (14) and (15) results in diode such that Kecrit depends on the type of the converter and the
current as duty cycle Dcuk . Therefore, to obtain the boundary between the

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5196 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO. 5, SEPTEMBER/OCTOBER 2019

conduction and the DCM, the value of the critical conduction between C1,2 and Leq during every half cycle, energy transfer
parameter Kecrit is derived as follows: capacitor, C1,2 is calculated as
1 1 1
Kecrit = = = 0.1296. (25) C1,2 =
2(M + n) 2
2(0.964 + 1) 2 ωr2 (Li1,2 + Lo1,2 )

The value of Ke is selected as less than the calculated value for 1

= = 2.71 μF (31)
the DCM operation, i.e., Ke = 0.08 is chosen for this application (2 × π × 1500)2 (4 + 0.15) mH
to estimate the different components. The duty cycle for the where ωr is taken as 2πfr and the value of the energy transfer
required output voltage of the Cuk converter, is obtained as capacitor is selected as 3 μF to ensure the CCM operation.
√  The power drawn from mains consisting the double frequency
DCuk = 2M Ke = 0.384. (26)
ripple power (2ω) term is expressed as
The equivalent inductance Leq of the converter, is estimated Pi = Vspk sinωt × Ispk sinωt = Vs Is (1 − cos2ωt) . (32)
using (23) as
The expression for the ripple in the battery current (ibatt_r ),
Ke RCuk Ke (VCuk
2
/P ) .08 × (3002 /850) and the output ripple voltage (ΔVCuk ) due to this second har-
Leq = =
2fs 2fs 2 × 20000 monic current is given as
= 211.76 μH. (27) ibatt_r (t) = −Is cos2ωt (33)

Therefore, to ensure the DCM over wide voltage range, an 1 ICuk
equivalent inductance of 200 μH is chosen for this application. ΔVCuk = iCuk (t)dt = − sin2ωt. (34)
CCuk 2ωCCuk
To provide a continuous inductor current over the entire The worst-case ripple voltage is considered at the maximum
switching cycle, the ripple current in the input inductor is consid- value of sin(2ωt), which is considered at ωt = 90˚. Therefore,
ered as 40%. Therefore, the calculation for the input inductance to suppress the second harmonic current ripple, the required dc-
Li1,2 is made as link capacitor CCuk is estimated as
Vs × DCuk ICuk 2.833
Li1,2 = CCuk = = = 1.5 mF. (35)
ΔiLi1,2 × fs 2ωΔVCuk 2 × 314 × .01 × 300
220 × 0.384 Therefore, the output capacitor CCuk is chosen as 2 mF in the
= = 3.86 mH (28)
0.4 × (850/311) × 20000 hardware, which eliminates the second harmonic current ripple
at the rated power to maintain the battery service life.
where the peak current ripple is considered as 40% of the input
The design of the proposed flyback converter is achieved in the
current, i.e., ΔiLi1 = 0.4 ∗ Is . Therefore, the value of the input
DCM mode to control the battery current over wide input voltage
inductance is selected as 4 mH to ensure CCM operation.
variations, during the two charging modes, such as the current
Now using (17) and (27) to provide the DCM-based opera-
through the magnetizing inductance becomes discontinuous at
tion, the calculation for the minimum output inductance Lo1,2 is
the end of the switching period.
made as
  To control the output voltage at 65 V, the required transfor-
Leq Li1,2 4 × 0.2 mation ratio (np /ns = N ), is chosen as 3, which provides the
Lo1,2 ≤ = mH = 0.222 mH. (29)
Leq − Li1,2 4 − 0.2 required step-down conversion ratio from 300 V. The calculation
for the required duty cycle Dfb to sustain the wide input voltage
Therefore, the value of the output inductance is chosen lower
perturbation range is made as
than the estimated value, i.e., 0.15 mH to ensure the UPF oper-
ation of the charger over wide input voltage range. Vbatt 65
Dfb = = = 0.394
The selection of the energy transfer capacitor, C1 , directly (ns /np )VCuk + Vbatt (1/3) × 300 + 65
affects the input current wave-shaping feature of the proposed (36)
converter. Therefore, the design of this capacitor depends upon where Vbatt and Ibatt are the rated output voltage and current at
the following constraints: the resonant frequency fr of Li1 , Lo1 , the rated charger power. To ensure the DCM operation over one
and C1 must be higher than the line frequency f during the op- switching cycle, the primary magnetizing inductance is selected
eration of the proposed converter in respective halves and less lower than the estimated value of the critical inductance, i.e.,
than the converter switching frequency, fs , which ensures the L f ≤ Lf c (37)
CV over one switching cycle, i.e., f < fr < fs such as
The critical value of the primary magnetizing inductance Lf c ,
1
fr =  . (30) below which the converter operates in DCM at all operating
2π Li1,2 + Lo1,2 C1,2 conditions, is estimated as
The resonant frequency fr in the proposed study is considered (VCuk Dfb )2 (300 × 0.394)2
Lf ≤ =
as 1.5 kHz. The voltage rating for this energy transfer capacitor 2Vbatt Ibatt fsf 2 × 65 × (850/65) × 50000
depends upon the voltage sum of the peak input voltage and the
output voltage of the charger. Therefore, to avoid any resonance = 169.41 μH. (38)

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KUSHWAHA AND SINGH: POWER QUALITY IMPROVED EV CHARGER WITH BRIDGELESS CUK CONVERTER
TABLE II
DESIGN RESULTS OF THE PROPOSED CHARGER
Therefore, a value of 130 μH is selected as the magnetizing
inductance for this application.
The calculation for the output capacitor (Cbatt ) to provide a
reduced output voltage and current ripple is made as
Dfb Vbatt
Cbatt =
fsf (Vbatt
2 /P )γV
batt
0.394 × 65
= = 1.585 mF (39)
50000 × (652 /850) × .001 × 65
where ϒ represents the permissible output capacitor voltage rip-
ple considered as 0.1% of the charger output voltage. Therefore,
a 2-mF capacitor is selected as the output capacitance, Cbatt , for
this application. All the design results obtained for the proposed
charger are resumed in Table II.
IV. CONTROL OF THE PROPOSED EV CHARGER
The control strategy for the proposed charger is discussed
under the following subparts.
A. Control of the BL PFC Converter
The proposed BL PFC converter is designed to operate in
the DCM, which uses the voltage-follower mode control. The
voltage-follower control is implemented using a PI controller,
which enshapes the mains current similar to the input voltage
and the output of the BL converter remains constant irrespective
of the wide variation in the input voltage. For this, any vari-
ation in the voltage (VCuk ), which occurs due to the sudden
change in the mains voltage, is sensed using a voltage sensor.
The sensed voltage is compared to the required reference volt-
age (VCukref ). The obtained error VCuke is given to the voltage
feedback controller. During the kth sampling instant, the gener-
ated error signal and control signal, respectively, are expressed
as
VCuke (n) = VCuk ref (n) − VCuk (n)
CvCuk (n) = CvCuk (n − 1) + KpCuk {VCuke (n)
− VCuke (n − 1)} + KiCuk VCuke (n)
where KpCuk and KiCuk , respectively, are the tuned propor-
tional and integral gain constants for the PI controller. After
processing through the PI controller, a control signal CvCuk is
initiated, which varies the duty cycle to provide the required
output voltage using a PWM comparator. In the PWM compara-
tor, the control signal, CvCuk , is compared to a high frequency
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5197
wave, Sc , which is generated internally at the converter switch-
ing frequency, fs , such that pulses are produced for the BL PFC
converter as
for vs > 0; or vs < 0; If Sc < CvCuk , then S1,2 = 1
If Sc ≥ CvCuk , then S1,2 = 0 (42)
where S1,2 denotes the synchronized switching pulses for two
switches S1 and S2 of the proposed BL Cuk converter. A well-
regulated dc-link voltage is obtained through the appropriate
duty cycle limit for the converter such as a built-in PFC operation
is achieved over wide mains voltage range. Therefore, the control
strategy is found to be quite simple with a single voltage sensor,
when compared to other CCM-based converters.
The novelty of the proposed control is observed as the con-
trol of the PFC converter is simple owing to use of same gate
drive and control circuitry for each half cycles. Both switches,
S1 and S2 , operate with same driver signal, in synchronism. In
other words, in order to reduce the conduction loss through the
body diode of the inactive switches, the same driver signal is ap-
plied, which reduces the losses in the body diode of the inactive
switch during the respective halves, as discussed earlier in Figs. 7
and 8.
B. Control of the Flyback Converter
The flyback converter is controlled using a cascaded dual PI
controller at the output to provide the CC charging to the bat-
tery at all operating conditions. For this purpose, battery voltage,
Vbatt , is sensed and it is compared to a constant reference volt-
age, Vbatt ∗. The voltage error, Vbatte is given to a voltage PI
controller. The output obtained from the PI controller, is made
to saturate at the maximum charging current limit such that the
output of the outer PI controller loop, sets the reference Ibatt ∗
for the current for the inner current loop. The necessary equa-
tions for error Vbatte and the PI controller output CVbatt for the
kth sampling instance are given as
Vbatte (n) = Vbatt ∗ (n) − Vbatt (n) (43)
CV batt (n) = CV batt (n − 1) + KpV batt {Vbatte (n)
− Vbatte (n − 1)} + KiV batt Vbatte (n). (44)
Here, KpV batt and KiV batt represent the voltage PI controller
parameters. However, sensed charging current, Ibatt , of the EV
battery is compared to this reference value and the error is fed
to the inner current PI controller. When the output of voltage
controller is saturated at the reference charging current value
(40) and the voltage PI controller loop is inactive. The required pulses
are achieved using the PWM generator block by comparing the
current PI controller output to a sawtooth wave to charge the
(41) battery in the CC mode. The governing error signal Ibatte and
the control signal CIbatt during the constant current regime of
charging are defined as
∗
Ibatte (n) = Ibatt (n) − Ibatt (n) (45)
CIbatt (n) = CIbatt (n − 1) + KpIbatt {Ibatte (n)
− Ibatte (n − 1)} + KiIbatt Ibatte (n) (46)
5198
Fig. 9. Photograph of the experimental setup of the proposed charger.
such that k being the instant of sampling for the comparison
of the sensed and reference quantities and KpIbatt and KiIbatt
are the current controller parameters. The required PWM pulses
are obtained using the control signal in (46) after processing
through a PWM comparator. A PWM comparator generates the
same pulses for the two switches after the comparison of a high-
frequency carrier wave (md ), following the sequence, given as
follows.
 
if md < CIbatt , Sf is “ON”
. (47)
otherwise, Sf is “OFF”
As soon as, the battery gets the sufficient SOC limit (near
80%), the charger control is switched to the CV mode since
the current PI controller loses its control. During this mode, the
voltage PI controller follows the constant reference value and
the battery charges to the full voltage limit corresponding to
the 100% SOC. This mode is known as the CV mode since the
battery is charged completely at the finish point of each cycle
and the current drawn from the source is reduced to a low value
depicting the battery fully charged condition.
V. RESULTS AND DISCUSSION
A prototype of the proposed charger is developed as per Fig.
9, to validate the improved PQ-based performance in terms of
efficiency and PQ. The analysis and design of the proposed PFC
converter are validated by developing a control interface using
a digital signal processor (DSP TMS320F28377S). To sense
the output voltage of the PFC converter, the required voltage
sensors are used. The sensed voltage is fed to the DSP con-
troller through an analog-to-digital converter. An optocoupler
(IC 6N136)-based isolation is developed to provide the protec-
tion to the converter switches S1 and S2 and the DSP control
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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO. 5, SEPTEMBER/OCTOBER 2019
unit. The performance of the proposed charger with the BL Cuk
PFC converter is validated with a 48-V and 100-Ah EV battery
and the discussion for the same is given as follows.
A. Performance of the Charger at a Steady State
The performance of the improved EV charger with a BL Cuk
converter is demonstrated under steady state, as depicted in Fig.
10(a) and (b) and various quantities such as mains voltage,
mains current, battery voltage Vbatt , and battery current Ibatt
are recorded during the CC mode of charging. It is to be noted
from Fig. 10(a) that a unity PF-based current is drawn from
mains, which exhibits an in-phase nature with a supply voltage.
This verifies the improved PQ performance of the charger, as
per the recommended PQ regulations. It is evident in Fig. 10(b)
that the output voltage of the proposed Cuk converter is con-
trolled at constant 300 V, which is required to power the flyback
converter at the output. The output of the flyback converter is
well regulated at 65 V, which is slightly higher than the battery
voltage. This ensures that the battery draws a constant current
of 0.1 C from mains over the entire duration of the CC charging,
as seen in the battery current.
B. Improved Performance of the Cuk Converter
Fig. 10(c) shows the voltage and current stress through the
PFC switches S1 and S2 during the respective half cycle, with the
proposed BL Cuk converter and with the BL converter topology-
1 [20]. It is clear from the recorded switch current waveforms
that switch current is1 and is2 has no effect of the circulating
current flow during the positive and negative half cycle opera-
tion. Therefore, it is evident that the proposed BL Cuk converter
has no circulating current flowing through the input inductors
Li1 and Li2 as there is no interconnection of intermediate ca-
pacitors to form circulating current loop, as mentioned earlier in
the topological discussion. This, in turn, reduces the circulating
power loss in the charger, and further, improves the converter
efficiency. However, for the BL converter topology-1 case, sig-
nificant circulating current flow is seen during the two half cycle
due to the loop formed by Li1 , Lo1 , C1, and C2 during the re-
spective halves, which is well shown by the switch currents is1
and is2 , as shown in Fig. 2(c), in introduction.
However, the semiconductor switch voltage and currents for
the proposed converter are found within safe operating zone with
a peak voltage of 580 V and a peak current of 28 A. The selected
value of the output inductor is optimum to ensure the converter
operation in the DCM with a peak current stress of 28 A, as
obvious in Fig. 10(d).
The performance of the proposed BL Cuk converter with the
conventional as well as with the proposed control is recorded
and shown in Fig. 10(e). The voltage across the intermediate
capacitor, C1,2 , is seen to be continuous throughout the switch-
ing cycle, with the respective continuous input inductor currents
iLi1 and iLi2 , which verifies the proposed design of the PFC
converter. The novelty of the proposed PFC converter control
is observed as the control of the PFC converter uses the same
driver signal for each half cycles, i.e., both the switches S1 and
S2 operate with same driver signal, in synchronism. Referring to
KUSHWAHA AND SINGH: POWER QUALITY IMPROVED EV CHARGER WITH BRIDGELESS CUK CONVERTER
Fig. 10. Test results under the steady state for the proposed EV charger.
(a) Source and battery side quantities. (b) DC-link voltage of the PFC con-
verter. (c) Switch voltage and no-circulating-current effect on the PFC current.
(d) Output inductor current. (e) Capacitor voltages in the CCM (no return current
through Li1 and Li2 in negative and positive half, respectively.
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5199
Fig. 10(e), with synchronous turn ON of both switches, the flow
of the return current via Li2 through the body diode of the inac-
tive switch S2 in the positive half line is avoided. This confirms
that the body diode of the inactive switch in respective half is no
longer in conduction, which eliminates the corresponding loss in
the converter, and improves the converter efficiency. Similarly,
there is no return current seen through Li1 during the negative
half cycle, unlike the previous BL Cuk converter topology-3 [20]
with the conventional control, as shown in Fig. 2(e). It is worth
to note that the BL Cuk converter with the conventional control
[20] has small amount of the current flowing through Li2 during
positive half line, which is obtained due to the path provided by
the body diode of the inactive switch S2 during the positive half.
Similarly, Li1 also shows a small amount of the current flowing
through it during the negative half line as body the diode of the
inactive switch S1 is conducting during this instant. Therefore,
the converter efficiency is seen to be low due to losses incurred
by the body diode of the inactive switch.
C. Performance of the Charger at Wide Fluctuations in the
Input Voltage
To examine the robustness of the proposed charger, sudden
changeover in mains voltage is introduced, with the perturba-
tion in mains voltage from 220 to 110 V and from 110 to 220
V. Test results are recorded and shown in Fig. 11(a) and (b),
respectively. The PI controllers of the PFC converter and the
isolated converter are tuned properly to track the corresponding
reference voltages. Therefore, the converter rejects any tran-
sients in the mains voltage to maintain the dc-link voltage of the
PFC converter constant, to provide an uninterrupted charging to
the battery. To maintain the power flow of the charger during
the perturbation period, sudden corresponding dip or rise in the
source current, is seen for 50% rise and dip in the grid voltage,
respectively. The mains current is seen to be sinusoidal with the
low current THD and a stable charging operation is observed
throughout the mains voltage variation range.
D. Improved PQ Parameters at AC Mains
Different improved PQ indices such as apparent power S,
charger active power P, charger reactive charging power Q, in-
put PF, DPF, CF, and current THD, are shown corresponding
to the mains voltage and mains current under rated as well as
for varying the input voltages. The input current is observed as
sinusoidal and in phase with the input voltage, as shown in Figs.
12(a), 13(a), and 14(a), which shows the effective utilization of
the charger active power. It is noticed from Figs. 12(b), 13(b),
and 14(b) that the input DPF and PF are maintained at unity
for all the input voltage cases. The requirement of the reactive
power to charge the battery is reduced to 70, 80, and 82 VAR, for
three different supply voltages, respectively. As per Figs. 12(c),
13(c), and 14(c), under rated load, the mains current THDs cor-
responding to the ac mains voltage of 214.7, 174.5, and 263.7 V
are observed to be 3.3%, 4.2%, and 2.8%, respectively. There-
fore, a better PQ performance is seen for the proposed charger
case, which follows the PQ norms specified by the IEC 61000–
3–2 standard, under rated as well as varying supply voltages.
5200 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO. 5, SEPTEMBER/OCTOBER 2019

Fig. 11. Charger performance during 50% fluctuation in mains voltage. (a) Charger performance from 220 to 110 V. (b) Charger performance from 110 to 220 V.

converter than the conventional DBR + Cuk PFC fed charger

and the previously developed BL Cuk converter (topology-3)
[20] fed charger. To control the battery current, the flyback con-
verter is considered common at the output stage for each case.
This analysis confirms that the proposed charger shows signif-
icant improvement in efficiency (around 4–5%) due to reduced
conduction losses in each cycle, as compared to the conventional
DBR+Cuk PFC fed charger. The current conduction in the pro-
posed converter is observed through fewer numbers of compo-
Fig. 12. (a)–(c) Improved PQ at the nominal source voltage.
nents as the input diodes are reduced to half as compared to the
conventional Cuk converter. This, results in improved efficiency.
However, the improvement in efficiency over the previous BL
Cuk converter (Topology-3) [20] is seen 2–3% because of no
conduction through the body diodes of the inactive switch. It is
obvious from test results that the circulating current and body
diode losses are no longer present in the proposed converter,
which enhances the charger’s efficiency over the entire power
range. However, this improvement is seen to be more significant,
if the parasitic effects and the EMI noise of magnetic compo-
nents are further reduced for the proposed converter.
Fig. 13. (a)–(c) Improved PQ for the sudden dip in the source voltage.
Moreover, Fig. 16(a) gives the efficiency comparison for the
different other single-phase PFC converters, such as, buck–
boost, SEPIC, zeta, and BL Cuk converter T-1 and T-2 [20].
This comparison shows that the conventional DBR+ Cuk and
BL buck–boost converter have the lowest efficiency due to high
stress across the components. The BL Cuk topology-3 has the
significant advantage of comparable efficiency with the pro-
posed converter still the losses in the body diode are present,
which can be reduced with the proposed converter and con-
trol. Therefore, the proposed BL converter shows increased ef-
Fig. 14. (a)–(c) Improved PQ for the sudden rise in the source voltage.
ficiency, comparatively.

F. Comparison Analysis With Previous BL Converters

E. Comparison of Efficiency With Conventional and Previous
BL Cuk Converters
It is evident from the comparison analysis in Fig. 15(a) that
the EV charger shows better efficiency with the proposed BL
The harmonics spectrum of the input current assesses reduced
THD at rated load, as per the IEC 61000-3-2 standard [5]. The
current THD in the proposed BL PFC-based and the conven-
tional DBR+ Cuk PFC-based charger, is much lower than 55.3%

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KUSHWAHA AND SINGH: POWER QUALITY IMPROVED EV CHARGER WITH BRIDGELESS CUK CONVERTER 5201

Fig. 16. Comparison with other topologies on the basis of (a) efficiency,
(b) switch voltage stress, and (c) switch current stress.

Therefore, the performance of the proposed EV charger is

Fig. 15. Comparison with the previous EV chargers. (a) Improved efficiency.
(b) and (c) Improved input PQ indices of the proposed PFC-based charger.
THD in the conventional EV charger with no PFC, as shown in
Fig. 15(b). The input power factor is observed close to the unity
for both the PFC-based charger, unlike the conventional battery
charger with no PFC, as depicted in Fig. 15(c). PF and THD
comparison with other BL Cuk converter [20] shows that due to
the presence of the circulating current effect, significant noise
is seen in the switch current during the respective halves, which
increases the THD at increased input voltages.
found better than the DBR+Cuk and other BL Cuk PFC con-
verter [20] based charger, which conforms the recommended
regulations for PQ.
Moreover, a performance comparison of different BL PFC
converters, is given in Table III, which is based on the total
number of components, conducting components over half line
cycle, and the complexity of the gate drivers. It is obvious from
Table III that the BL buck–boost converter is having increased
conduction loss due to the increased current stress in the switch.
The high input and output current ripple make it unattractive
for the battery chargers. The SEPIC converter is avoided for the
PFC-based EV battery charger due to the discontinuity in the
output current, which is not desirable for the battery lifetime.

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5202 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 55, NO. 5, SEPTEMBER/OCTOBER 2019
TABLE III
PERFORMANCE COMPARISON OF DIFFERENT BL CONVERTER CONFIGURATIONS
The Zeta converter has the advantage of low output ripple current
but the semiconductor switches face little higher stress, there-
fore, this is also seldom used in battery chargers. However, the
Cuk converter is a preferable candidate for battery charging with
their life cycle maintained as it contains low current ripple both
at input and output.
An isolated gate driver circuit is required for the BL-Buck
[14], BL-Cuk T-2 [20], and BL-Cuk in Fig. 2(f) [21], BL-Cuk in
Fig. 2(g) [23], and BL-Sepic [20] need to be implemented using
the high- and low-side gate driver circuit. The gate drivers with
isolation need pulse transformers to provide the required isola-
tion to the semiconductor PFC switches. However, the high- and
low-side drivers consists of bootstrap circuit to provide pulses to
the PFC switches, which adds to the design complexity and cost
of the driver is increased. The proposed BL PFC Cuk converter
requires low-side driver circuit, which is easy to implement and
similar gate pulses at the same instant are used to turn ON both the
semiconductor devices for PFC operation. Moreover, as shown
in Fig. 16(b) and (c), the switch voltage and current stress are
seen to be comparatively low with synchronously turn ON of
two switches in the proposed BL Cuk converter. On the other
hand, the BL buck–boost, BL SEPIC, BL zeta, and BL Cuk
topology-2 [20] exhibit higher peak switch voltage and current
due to isolated and high-side gate drive circuit. The BL Cuk
topology-3 and the conventional DBR+Cuk PFC converter have
similar switch voltage and current rating but somewhat higher
than the proposed converter. Therefore, the performance of the
proposed EV charger is remarkably improved over the conven-
tional charger during the entire range of operating conditions.
An increased efficiency and improved input PQ indices with low
mains current harmonics over the wide input voltage range are
obtained.
VI. CONCLUSION
An improved PQ-based EV charger is proposed with the BL
Cuk converter consisting fewer number of conducting compo-
nents over a single switching cycle. The proposed PFC Cuk
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converter offers excellent PFC characteristics in the DCM mode
using a single-voltage feedback control. Therefore, the size of
the charger is reduced. The added advantage of the proposed
topology is that the unwanted capacitive coupling loop is re-
moved, as well as the unwanted conduction through the body
diode of the inactive switch in the previously developed BL Cuk
converter is avoided. This significantly improves the charger’s
efficiency. The proposed charger has shown satisfactory charg-
ing characteristics during the steady state and over 50% variation
in the grid voltage. However, the PQ assessment of the proposed
charger is obtained as per the IEC 61000-3-2 guidelines over
wide input voltage range. Therefore, the proposed charger of-
fers the feasible EV charging alternative for the improved PQ
and efficiency.
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5203
Radha Kushwaha (M’16) received the B.Tech. de-
gree in electrical engineering from Gautam Buddha
Technical University, Lucknow, India, in 2012, and
the M.Tech. degree in electrical engineering from the
National Institute of Technology, Durgapur, India, in
2014. She is currently working toward the Ph.D. de-
gree in power electronics with the Department of
Electrical Engineering, Indian Institute of Technol-
ogy Delhi, New Delhi, India.
Her research interests include power electron-
ics, battery charger systems, power factor correction,
and ac–dc and dc–dc power converters.
Bhim Singh (SM’99–F’10) was born in Bijnor, India,
in 1956. He received the B.E. degree in electrical en-
gineering from the University of Roorkee, Roorkee,
India, in 1977, and the M.Tech. degree in power ap-
paratus and systems and the Ph.D. degree from the In-
dian Institute of Technology (IIT) Delhi, New Delhi,
India, in 1979 and 1983, respectively.
In 1983, he joined the Department of Electrical En-
gineering, University of Roorkee (Now IIT Roorkee),
as a Lecturer, and became a Reader in 1988. In De-
cember 1990, he joined the Department of Electrical
Engineering, IIT Delhi, as an Assistant Professor, where he became an Asso-
ciate Professor in 1994 and a Professor in 1997. He was an ABB Chair Professor
from September 2007 to September 2012. He was also the CEA Chair Professor
from October 2012 to September 2017. He was the Head with the Department
of Electrical Engineering, IIT Delhi, from July 2014 to August 2016. Since Au-
gust 2016, he has been the Dean, Academics, with the IIT Delhi. He has guided
74 Ph.D. dissertations and 166 M.E./M.Tech./M.S.(R) theses. He has filed 37
patents. He has executed more than 80 sponsored and consultancy projects. He
has coauthored a text book on power quality: Power Quality Problems and Mit-
igation Techniques (John Wiley & Sons, 2015). His research interests include
solar photovoltaic (PV) grid interface systems, microgrids, power quality moni-
toring and mitigation, solar PV water pumping systems, improved power quality
ac–dc converters, power electronics, electrical machines, drives, flexible alter-
nating transmission systems, and high-voltage direct current systems.
Prof. Singh has been a JC Bose Fellow of the Department of Science and
Technology, Government of India, since December 2015. He is a Fellow of the
Indian National Academy of Engineering, the Indian National Science Academy,
the National Academy of Science, India, the Indian Academy of Sciences, India,
the World Academy of Sciences, the Institute of Electrical and Electronics Engi-
neers, the Institute of Engineering and Technology, the Institution of Engineers
(India), and the Institution of Electronics and Telecommunication Engineers, and
a Life Member of the Indian Society for Technical Education, the System Soci-
ety of India, and the National Institution of Quality and Reliability. He was the
recipient of the Khosla Research Prize of the University of Roorkee in 1991, the
PES Delhi Chapter Outstanding Engineer Award for the year 2006, the Khosla
National Research Award of the IIT Roorkee in 2013, the Shri Om Prakash
Bhasin Award 2014 in the field of engineering including energy and aerospace,
the IEEE Power and Energy Society Nari Hingorani Custom Power Award 2017,
and the “Faculty Research Award as a Most Outstanding Researcher” in the field
of Engineering-2018 of Careers-360, India. He was also the recipient of the JC
Bose and Bimal K Bose awards of The Institution of Electronics and Telecom-
munication Engineers for his contribution in the field of power electronics and
the Maharashtra State National Award of the Indian Society for Technical Ed-
ucation in recognition of his outstanding research work in the area of power
quality. He has been the General Chair of the 2006 IEEE International Confer-
ence on Power Electronics, Drives and Energy Systems, a General Co-Chair of
the 2010 IEEE International Conference on Power Electronics, Drives and En-
ergy Systems, a General Co-Chair of the 2015 IEEE International Conference,
a General Co-Chair of the 2016 IEEE International Conference, New Delhi, and
a General Co-Chair of the 2017 National Power Electronics Conference held in
Pune. He has been a Chair of the PES-IAS Delhi Chapter for 2005–2010, (PES-
IAS Delhi Chapter won the Outstanding Chapter Award-2005 Large and the
High Performance Chapter Award Every Year and the PELS-IES Delhi Chapter
2007–2010, and the Founder Chair of the PELS-IES Delhi Chapter. He has also
been the Chair of the IEEE Delhi Section for 2012–2014.