ARITHMETIC AND LOGIC INSTRUCTIONS

Lecture 6

Prepared by: Beimnet G

INTRODUCTION
The arithmetic instructions include addition, subtraction,
multiplication, division, comparison, negation, increment, and
decrement.
The logic instructions include AND, OR, Exclusive-OR, NOT, shifts,
rotates, and the logical compare (TEST).
ADDITION
Has many variations: ADD, ADC, INC
ADD has over 32,000 variations.
Uses almost all of the addressing modes discussed in Chapter 2.
Memory-to-memory and segment register addition is not allowed.
ADD op1, op2 op1=op1+op2
ADDITION (ADD)
Register Addition: ADD AL,AH AL=AL+AH
ADD CX, BP CX=CX+BP
Immediate Addition: ADD AL, 33H AL= AL+33H
Memory-to- register Addition:
ADD AL,[DI] adds contents of memory location [DI] to AL
ADD [BX], AL adds AL to the contents of memory location [BX]
More examples: ADD AL, Array[SI]
ADD AL, Array[SI+2]
INCREMENT (INC)
Adds 1 to a register or a memory location.
Can’t be used on segment registers.
When using INC with indirect memory addressing modes, the size
of the data must be defined using one of the directives: BYTE PTR,
WORD PTR, DWORD PTR or QWORD PTR.
Examples: INC DI
INC BYTE PTR [DI]
INC WORD PTR[BX]
ADD WITH CARRY (ADC)
Adds the bit in the carry flag (C) to the operand data.
Mainly used in addition of numbers that are wider than 16 bits in the
8086 microprocessor or wider than 32 bits in the 80386- core 2.
Examples: ADC AL,AH AL = AL + AH + carry
ADC CX,BX CX = CX + BX + carry
Suppose you need to add two 32 bit numbers in the 8086
microprocessor. Since you don’t have accesses to the extended 32 bit
registers, the numbers can be stored in 4 16 bit registers. Num1=>
BX, AX and Num2 => DX, CX
The ADC instruction can be used to add these 2 numbers contained in
4 registers.
ADC
E.g: ADD AX, CX
ADC BX, DX

Result= a 32 bit number with it’s higher most 2 bytes stored in BX

and lower most 2 bytes stored in AX
SUBTRACTION
Has many forms: SUB, DEC, SBB
Over 1000 possible instructions of SUB
Memory-to-memory and segment register subtractions aren’t
allowed.
SUB op1, op2 op1=op1-op2
SUBTRACTION (SUB)
Register Subtraction: SUB BX, CX BX=BX-CX
Immediate Subtraction: SUB CL,30H CL=CL-30H
Memory to Register: SUB [DI], CL subtracts CL from the value
stored at memory location [DI]
DECREMENT (DEC)
Subtracts 1 from the contents of a register or a memory location.
With indirect memory addressing, the DEC requires the use of one of the following
directives: BYTE PTR, WORD PTR, DWORD PTR, QWORD PTR
Examples: DEC AX
DEC BL
DEC BYTE PTR[DI]
DEC WORD PTR[DI]
DEC [DI] wrong instruction because the size of the data is ambiguous
SUBTRACTION WITH BORROW (SBB)
the carry flag (C), which holds the borrow, also subtracts from the
difference.
Used for subtractions that are wider than 16 bits in the 8086–80286
microprocessors or wider than 32 bits in the 80386–Core2.
Examples: SBB AH,AL AH=AH-AL- carry
SBB [DI], AL subtract AL and the carry from the memory
location [DI]
SBB BYTE PTR[DI],3 why?
Suppose you want to subtract a 32 bit number stored in SI and DI from a
32 bit number stored in BX and AX.
The SBB instruction can be used to perform this wide subtraction
SBB
E.g: SUB AX,DI
SBB BX,SI
COMPARISON (CMP)
Is a subtraction instruction is that only changes the state of the flag bits; the
destination operand doesn’t change.
Useful for checking the contents of a register or a memory location against another
value.
A CMP is normally followed by a conditional jump instruction, which tests the condition
of the flag bits.
Examples: CMP CL, BL CL-BL
CMP AX, 2000H AX-2000H
MULTIPLICATION (MUL)
Multiplication can be performed on bytes or words.
Can be a signed integer multiplication (MUL) or an unsigned integer multiplication
(IMUL)
The product of a multiplication is always double-width the size of the operand.
I.e. if two 8-bit numbers are multiplied, they generate a 16-bit product and if two
16-bit numbers are multiplied, they generate a 32-bit product.
Some flag bits (overflow and carry) change when the multiply instruction executes
and produce predictable outcomes. The other flags also change, but their results are
unpredictable and therefore are unused.
8-BIT MULTIPLICATION
With 8-bit multiplication, the multiplicand is always in the AL register, signed
or unsigned and the multiplier can be any 8-bit register or memory location.
Immediate multiplication is not allowed unless the special signed immediate
multiplication instruction is used (not available on the 8086 microprocessor).
The MUL instruction only takes one operand because it always multiplies the
operand specified by the contents of AL.
The product of the MUL operation is stored in AX.
Example: MUL CL multiplies CL by AL and stores the product in AX
IMUL DL multiplies AL by DL and stores the signed
product in AX
MUL BYTE PTR[BX]
16-BIT MULTIPLICATION
Multiplies 16 bit numbers that results in a 32 bit product
The multiplicand is stored in AX and the result is stored in the DX-AX registers. DX
contains the most significant bits and AX contains the least significant bits.
Examples: MUL CX multiplies CX with AX with the product stored at DX-AX
IMUL DI multiplies DI with AX with the signed product stored at DX-AX
MUL WORD PTR[BP]
MUL
DIVISION
Can be performed on 16 bit and 8 bit numbers. The numbers could be unsigned
(DIV) or signed (IDIV) integers.
The dividend is always a double-width dividend that is divided by the operand.
This means that an 8-bit division divides a 16-bit number by an 8-bit number
and a 16-bit division divides a 32-bit number by a 16-bit number.
No immediate operand division instruction available.
None of the flag bits change predictably for a division.
A division can result in two different types of errors; one is an attempt to divide
by zero and the other is a divide overflow. A divide overflow occurs when a
small number divides into a large number. For example, AX=3000 and it’s
divided by 2. Because the quotient for an 8-bit division appears in AL, the result
of 1500 causes a divide overflow because the 1500 does not fit into AL.
8-BIT DIVISION
uses the AX register to store the dividend that is divided by the contents of any 8-bit
register or memory location.
The quotient moves into AL after the division with AH containing a whole number
remainder. For a signed division, the quotient is positive or negative; the remainder
always assumes the sign of the dividend and is always an integer.
Example: DIV BL AX is divided by BL and the quotient is stored in AL and the
remainder in AH
DIV BYTE PTR[DI] AX is divided by a byte stored at [DI] and the 8 bit
quotient is stored in AL and the remainder in AH
16-BIT DIVISION
Divides a 32 bit dividend stored in DX-AX by the divider specified. The resulting
quotient is stored in AX with the remainder stored in DX.
Example: DIV CX divides DX-AX by CX and stores the quotient in AX and the
remainder in DX
DIV WORD PTR[DI] divides DX-AX by the word stored at [DI] and stores
the quotient in AX and the remainder in DX
DIV
BCD AND ASCII ARITHMETIC
The microprocessor allows arithmetic manipulation of both BCD
(binary-coded decimal) and ASCII (American Standard Code for
Information Interchange) data.
BCD ARITHMETIC
2 arithmetic operations available on BCD: addition and subtraction
The instruction set provides two instructions that correct the result of
a BCD addition and a BCD subtraction.
The DAA (decimal adjust after addition) instruction follows BCD
addition, and the DAS (decimal adjust after subtraction) follows
BCD subtraction. Both instructions correct the result of the addition
or subtraction so that it is a BCD number.
These instruction target the AL register.
 DAA
Example:
Add 2 BCD numbers1234 and 3099

Note: Since DAA only targets AL, the

addition must be done 1 byte at a
time
ASCII ARITHMETIC
The ASCII arithmetic instructions function with ASCII-coded numbers.
These numbers range in value from 30H to 39H for the numbers 0–
9.
There are four instructions used with ASCII arithmetic operations:
AAA (ASCII adjust after addition), AAD (ASCII adjust before
division), AAM (ASCII adjust after multiplication), and AAS (ASCII
adjust after subtraction).
These instructions use register AX as the source and as the
destination.
 AAA
The addition of two one-digit ASCII-coded numbers will not result in any
useful data. For example, if 31H and 39H are added, the result is 6AH.
 This ASCII addition of 1+9 should produce a two-digit ASCII result
equivalent to a 10 decimal, which is a 31H and a 30H in ASCII code.
If the AAA instruction is executed after this addition, the AX register will
contain a 0100H. Although this is not ASCII code, it can be converted to
ASCII code by adding 3030H to AX which generates 3130H.
AAA
Example: Add ASCII 1 and 9
AAD
Unlike all other adjustment instructions, the AAD instruction appears
before a division.
The division instruction requires that the AX register contain a two-
digit unpacked BCD number (not ASCII) before executing. After
adjusting the AX register with AAD, it is divided by an unpacked BCD
number to generate a single-digit result in AL with any remainder in
AH.
AAM
Follows multiplication instruction after multiplying two one-digit
unpacked BCD numbers.
AAM converts from binary to unpacked BCD.
If a binary number between 0000H and 0063H appears in AX, AAM
converts it to BCD.

AAS
AAS adjusts the AX register after an ASCII subtraction.
BASIC LOGIC INSTRUCTIONS
AND, OR, XOR, NOT, TEST, NEG
Provide binary bit control in low-level software.
Bits can be set, cleared, or complemented.
All logic instructions affect the flag bits. The carry and overflow
flags are always cleared.
AND
Logical multiplication.
Can be used in place of a physical AND circuit (gate).
Uses any addressing mode except memory-to-memory and
segment register addressing.
Truth table
AND op1,op2 ; op1=op1 AND op2
AND
0 AND anything is always 0
Because of this property, the AND instruction is used to clear bits
of a binary number. This is called masking.
AND
AND can be used to convert ASCII coded number to binary coded
decimal by masking the left most four bits. This can convert
ASCII30H to 39H to 0-9.
Example: MOV BL, 35H ; ASCII code for 5
AND BL, 0FH ;masking BL BL=05
OR
Performs logical addition.
AKA inclusive-or function.
uses any addressing mode except segment register addressing.
Truth Table
OR op1,op2 ; op1= op1 OR op2
OR
Can be used to replace discrete OR gates.
1 OR anything is 1. This property can be used to be used to set
any bit.
 With the OR instruction, an unknown number can be masked and
it’s bits explicitly set to 1.
OR
Can be used to convert BCD to ASCII coded numbers
Example:

Result AX= 3335

XOR
Exclusive-OR
The output is 1 only if the two inputs are different. Therefore, it is
sometimes called a comparator.
The XOR instruction uses any addressing mode except segment
register addressing. Truth Table
XOR op1, op2 ; op1= op1 XOR op2
XOR
Can be used if some bits of a register or memory location must be
inverted or complemented.
0 XOR unknown X is X itself
1 XOR unknown X is X’
Some bits can be inverted without affecting the others.
A common use for the Exclusive-OR instruction is to clear a register
to zero
 TEST
TEST performs the AND command but only affects the flag register bits.
(the operand remains unchanged).
Uses the same addressing modes as the AND instruction.
The test instruction is usually followed by a conditional jump (JZ orJNZ)
The destination operand is normally tested against immediate data. The
value of immediate data is 1 to test the rightmost bit position, 2 to test
the next bit, 4 for the next, and so on.
Example:
NOT AND NEG
NOT and NEG can use any addressing mode except segment
register addressing.
The NOT instruction inverts all bits of a byte or word.
NEG two’s complements a number.
The NOT function is considered logical, NEG function is considered
an arithmetic operation.
NOT CH CH is 1’s complemented
NEG CH CH is 2’s complemented
NOT BYTE PTR[DI]
SHIFT
Position or move numbers to the left or right within a register or
memory location.
perform simple arithmetic as multiplication by powers of 2+n (left
shift) and division by powers of 2-n (right shift).
The microprocessor’s instruction set contains four different shift
instructions: two are logical and two are arithmetic shifts.
The logical shifts move a 0 into the rightmost bit position for a
logical left shift and a 0 into the leftmost bit position for a logical
right shift.
Arithmetic right shift copies the sign-bit through the number
Arithmetic left shift moves a 0 to the leftmost bit position.
 SHIFT
Eg: SHL AL, 1 is logically shifted left 1place
SHR BX, 2 is logically shifted right 10 places
SAR CX, 2 CX is arithmetically shifted right 2 places
ROTATE
Positions binary data by rotating information in a register or memory
location, either from one end to another or through the carry flag.
Four available rotate instructions.
ROL SI, 2 SI rotates left 2 places
RCL BL, 6 BL rotates left through the carry bit 6 places
RCR AX,CL AH rotates right through the carry but by the number
specified in CL
ROR WORD PTR [BP],2
ROTATE
STRING COMPARISON
Recall previous string instructions: MOVS, LODS, STOS…
String instructions are powerful because they allow the programmer
to manipulate large blocks of data with relative ease.
Additional string instructions allow a section of memory to be tested
against a constant or against another section of memory
SCAS
String scan
Compares the AL register with a byte block of memory or AX with
a word block.
The SCAS instruction subtracts memory from AL, AX, or EAX without
affecting either the register or the memory location.
The opcode used for byte comparison is SCASB, the opcode used
for the word comparison is SCASW
the contents of the extra segment memory location addressed by
DI is compared with AL or AX. DI is auto incremented or
decremented based on the D flag.
 SCANSB, SCANSW
CMPS
The CMPS (compare strings instruction) always compares two
sections of memory data as bytes (CMPSB) or words (CMPSW).
Contents of the data segment memory location addressed by SI
are compared with contents of extra segment memory addressed
by DI
Normally used with REPE or REPNE prefix.
CMPSB
CMPSW