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ISSN 2319-8885

Vol.03,Issue.01,
January-2014,
Pages:0073-0080
www.semargroup.org,
www.ijsetr.com

Bit Serial Iterative Cordic Implementation for the Calculation of


Trigonometric Functions
CHINTADA RAMANAMMA1, SOLOMON J V GOTHAM2
1
PG Scholar, Dept of ECE, Kaushik College of Engineering, Visakhapatnam, Andhrapradesh, India,
E-mail: ramanichintada@gmail.com.
2
Prof, Dept of ECE, Kaushik College of Engineering, Visakhapatnam, Andhrapradesh, India.
E-mail:s_gotham@yahoo.com.

Abstract: A detailed description of the bit-serial implementation and its Control Unit is presented. It is shown that the
improvement is due to a reduction of registers in the implementation and is made possible by ensuring that the angular path is
calculated prior to the corresponding vector paths. In addition, the improved architecture is implemented in Verilog. Rotation of
vectors through fixed and known angles has wide applications in robotics, digital signal processing, graphics, games, and
animation. Therefore, in this paper, we be present Bit Serial Iterative CORDIC Implementation for The Calculation of
Trigonometric Functions. We have synthesized the proposed CORDIC Circuit by xilinx and shown that the proposed design
offer higher throughput, less latency for fixed angles of rotation. CORDIC stands for coordinate rotation digital computer. The
key concept of CORDIC arithmetic is based on the simple and ancient principles of 2-D geometry. This iterative formulation of
a computational algorithm for its implementation is developed for the computation of trigonometric functions and
multiplication. Not only a wide variety of applications of CORDIC have been suggested over the time, but also a lot of progress
has taken place in the area of algorithm design and development of architectures for high-performance and low-cost solutions .

Keywords: Cordic, Trigonometric Functions, Verilog, Iterative.

I. INTRODUCTION
The CORDIC algorithm was first introduced by Jack E. algorithm is multiplication-free and thus well suited for
Volder in the year 1959 for the computation of hardware Implementation. The CORDIC algorithm does
Trigonometric functions, Multiplication, Division, Data not use Calculus based methods such as polynomial or
type conversion, Square Root and Logarithms. It is a highly rational function approximation. Today cordic algorithm is
efficient, low-complexity, and robust technique to compute used in Neural Network VLSI design, high performance
the elementary functions. The basic Algorithm structure is vector rotation DSP applications, advanced circuit design,
described in other information about CORDIC Algorithm optimized low power design. CORDIC algorithm revolves
and different Issues are in the CORDIC algorithm has around the idea of "rotating" the phase of a complex
found its way in various applications such as pocket number, by multiplying it by a succession of constant
calculators, numerical co-processors, to high performance values.
radar signal processing, supersonic bomber aircraft with
a digital counterpart. CORDIC stands for Coordinate However, the "multiplies" can all be powers of 2, so in
Rotation Digital Computer. It calculates the value of binary arithmetic they can be done using just shifts and
trigonometric functions like sine, cosine, magnitude and adds; no actual "multiplier" is needed thus it simpler and
phase (arctangent) to any desired precision. It can also do not require complex hardware structure as in the case of
calculate hyperbolic functions (such as sinh, cosh, and multiplier. Earlier methods used are Table look up method,
tanh). Polynomial approximation method etc. for evaluation of
trigonometric functions. It is hardware efficient algorithm.
The CORDIC works in two different modes, they are No multiplier requirement as in the case of
Rotation Mode and Vector Mode. In Rotation Mode the microcontroller.
algorithm rotates a vector with a given angle, and in
Vector Mode the angle between a given vector and the x- II. CORDIC ALGORITHM
axis is calculated. In this project to find trigonometric The CORDIC algorithm is used in different situations
functions CORDIC works in rotation mode only. The and for different purposes. The common, basic idea

Copyright @ 2014 SEMAR GROUPS TECHNICAL SOCIETY. All rights reserved.


CHINTADA RAMANAMMA, SOLOMON J V GOTHAM

between the different usages is that through a series of Let’s find how equation 3 and 4 came into picture. As
additions and subtractions, it is possible to approximate shown in the figure1, a vector V (x, y) can be resolved in
vector rotations in the complex plane. This can be used in two parts along the x - axis and y –axis as r cosФ and r
e.g. the calculation of trigonometric or hyperbolic values. sinФ respectively. Figure2 illustrates the rotation of a
The CORDIC works in two different modes rotation mode vector.
and vector mode. In Rotation Mode the algorithm rotates
a vector with a given angle, and in Vector Mode the angle
between a given vector and the x-axis is calculated. The (5)
algorithm is multiplication-free and thus well suited for
hardware implementation. In this paper, the CORDIC is
used for the calculation of the trigonometric functions sine
and cosine of an input angle. For that purpose, the
CORDIC is working in Rotation Mode, with the input
=1
vector being known in advanced, and found to be X0 /R
=0
and Y0 , where R is a radius correction factor, that will
depend on the number of stages of the CORDIC. The
vector of each new stage is then found as

Xn+1= Xn ± Yn /2n (1)

The constant angles, α0 to αN−2, with N being the


number of stages, are hard coded in the design. They are
stored as negative values and fed to the A/S units of the Figure2. Vector V with magnitude r and phase Ф
angular path, bit by bit, through the MUXes. It is noted
that the final stage in the CORDIC require no calculation X= r cos Ф
in the angular path. Y= r sin Ф (6)
Similarly from figure1 it can be seen that vector V and
Yn +1= Yn∓ Xn/2n (2) V ' can be resolved in two parts. Let V has its magnitude
and phase as r and Ф respectively and V ' has its
With S being the stage number, and the sign of the magnitude and phase as r and Ф' where V ' came into
operation depending of the sign of the angle picture after anticlockwise rotation of vector V by an angle
addition/subtraction. Further, the input angle is limited to Ф. From figure1 it can be observed
values between 0 and π/2 (90◦). This is not a problem
when calculating trigonometric functions, since all angles Ф’- Ф= Ф (7)
can easily be moved or mirrored into the first quadrant.
Ф’= Ф+ Ф (8)
A. Basic Equation of Cordic Algorithm
Volder's algorithm is derived from the general equations OX’= X’= r cos Ф’
for a vector rotation. If a vector V with coordinates (x, y) = r cos (Ф+Ф)
is rotated through an angle Ф then a new vector V ' can be = r (cos Ф.cos Ф – sin Ф.sin Ф)
obtained with coordinates (x’, y’) where x' and y' can be = (r.cos Ф) cos Ф-(r.sin Ф)sin Ф (8)
obtained using x, y and Ф by the following method.
Using figure2 and equation6 OX ' can be represented as
(3)
OX’= X’= x cosФ– y sin Ф (9)
Similarly, OY’

(4) OY’ = Y’= y cos ϕ + x sin ϕ (10)

Similarly, value for the vector V ' in the clockwise


direction rotating the vector V by the angle ϕ and the
equations obtain in this case be

X’= x cos ϕ + y sin ϕ (11)


Y’= x sin ϕ – y cos ϕ (12)

The equations (9), (10), (11), (12) can be represented in


the matrix form as
Figure1. Rotation of a vector V by the angle Ф
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.01, January-2014, Pages:0073-0080
Bit Serial Iterative Cordic Implementation for the Calculation of Trigonometric Functions

the different ϕ can be understood by the following


example of a balance.

(13) III. COMPUTATION OF SINE AND COSINE


The individual equations for x. and y' can be rewritten Elementary functions, especially trigonometric
as functions, play important roles in various digital systems,
X’= x. cos (ϕ) ± y.sin (ϕ) (14) such as graphic systems, automatic control systems, and so
on. The CORDIC (Coordinate Rotation Digital Computer)
Y’= y. cos (ϕ) ± x.sin (ϕ) (15) is known as an efficient method for the computation of
Volder observed that by factoring out a cosϕ from both these elementary functions. Recent advances in VLSI
sides, resulting equation be in terms of the tangent of the technologies make it attractive to develop special purpose
angle ϕ, the angle of which we want to find the sin and hardware such as elementary function generators. Several
cos. Next if it is assumed that the angle ϴ is being an function generators based on the CORDIC have been
aggregate of small angles, and opposite angles is chosen developed. The CORDIC can also be applied to matrix
such that their tangents are all inverse powers of two, then triangularization, singular value decomposition, and so on.
this equation can be rewritten as an iterative formula. In this chapter, different hardware is dealt for sine and
cosine computation using CORDIC. In sine and cosine
X’= cos (ϕ) (x ± y.tan (ϕ)) (16) computation by the CORDIC, iterative rotations of a point
around the origin on the X-Y plane are considered. When
Y’= cos (ϕ) (y ± x.tan (ϕ)) (17) implementing a sine and cosine calculator in digital
hardware, the expense of the multiplication needed for
Z'=Z ± ϕ, here ϕ is the angle of rotation (± sign is showing many algebraically methods, should be kept in mind.
the direction of rotation) and Z is the argument. For the Alternative techniques are based on polynomial
ease of calculation here only rotation in anticlockwise approximation, table-lookup etc. as well as shift and add
direction is observed first. By rearranging the equations algorithms.
(8) and (9)
Among the various properties that are desirable, we
X’= cos (ϕ) (x - y.tan (ϕ)) (18) can cite speed, accuracy or the reasonable amount of
resource. The architecture of FPGAs specifies suitable
Y’= cos (ϕ) (y + x.tan (ϕ)) (19) techniques or might even change desirable properties.
Because the number of sequential cells and amount of
The multiplication by the tangent term can be avoided if storage area, needed for table-lookup algorithms, are
the rotation angles and therefore tan (ϕ) are restricted so limited but combinational logic in terms of LUT (Look Up
that tan (ϕ) = 2-i .In digital hardware this denotes a simple Table) in the FPGA's (Field Programmable Gate Array)
shift operation. Furthermore, if those rotations are CLBs (Configurable Logic Blocks) is sufficiently
performed iteratively and in both directions every value of available, shift and add algorithms fit perfectly into an
tan (ϕ) is represent able with ϕ = arc tan (2-i) the cosine FPGA.
term could also be simplified and since cos (ϕ) = cos (-ϕ) it
is a constant for a fixed number of iterations. A. Cordic Hardware
A straight forward hardware implementation for
This iterative rotation can now be expressed as: CORDIC arithmetic is shown below in figure3. It requires

Xi+1 = ki [xi - yi di 2-i] (20)


Yi+1 = ki [yi + xi di 2-i] (21)

Where, i denotes the number of rotation required to reach


the required angle of the required vector, cos (arc tan (2 -i))
and di = ±1. The product of the Ki’s represents the so-
called K factor.

(22)
Where

(ϕ is the angle of rotation here for n time’s rotation). The


above rotations requirement and adding and subtracting of Figure3. Hardware elements needed for the CORDIC
method
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.01, January-2014, Pages:0073-0080
CHINTADA RAMANAMMA, SOLOMON J V GOTHAM

following equations characterized the results of linear


three registers for x, y and z, a look up table to store the CORDIC rotations:
values of αi = tan-1 2-i, and two shifter to supply the terms Xm = x
2-ix and 2-iy to the adder/ subs tractor units. The di factor (- Ym = y+xz
1 and 1) is accommodated by selecting the (shift) operand Zm = 0 (26)
or its complement.
C. The Cordic Algorithm for Computing a Sine and
B. Generalized Cordic Cosine

The basic CORDIC method can be generalized to Jack E. Volder described the Coordinate Rotation
provide the more powerful tool for function evaluation. Digital Computer or CORDIC for the calculation of
Generalized CORDIC is defined as follows: trigonometric functions, multiplication, division and
conversion between binary and mixed radix number
Xi+1 = xi – μ di yi 2-i systems. The CORDIC-algorithm provides an iterative
Yi+1 = yi + μ di xi 2-i method of performing vector rotations by arbitrary angles
Zi+1 = zi - αi di (23) using only shifts and adds. Volder's algorithm is derived
from the general equations for vector rotation. If a vector v
[Generalized CORDIC iteration] with components (x, y) is to be rotated through an angle ϕ
a new vector v' with components (x', y') is formed by (as
Noting that the only difference with basic CORDIC is the in equation 3 and 4):
introduction of the parameter μ in the equation for x and
redefinition of αi. The parameter μ can assume one of the X = r cos ϴ
three values: Y = r sin ϴ (27)

μ = 1 Circular Rotations (Basic CORDIC) αi= tan-1 2-i


μ = 0 Linear Rotation αi= tan-1 2-i
μ = -1 Hyperbolic Rotation αi= tanh-1 2-i (28)

Figure3 illustrates the three type of rotation in generalized


CORDIC. For the circular case with μ = 1, we introduce
rotations that led to expansion of vector length by a factor
(1+ tan αi)1/2 = i/ cos αi in each step and by K =
1.646760258121.overall, where the vector length is the
familiar ri=(x2+y2)1/2 . With reference to figure3.2, the
rotation angle AOB can be defined in terms of the area of
sector AOB as follows:

Angle AOB= 2(area AOB)/ (OU)2


Figure4. Rotation of a vector V by the angle ϕ
The following equations, repeated here for ready
comparison, characterize the results of circular CORDIC The individual equations for x’ and y’ can be rewritten as:
rotations:
X’ = (x cos ϕ – y sin ϕ) (29)
Xm =k(x cos z - y sin z) Y’ = (y cos ϕ + x sin ϕ) (30)
Ym =k(y cos z + x sin z)
Zm =0 (24) And rearranged so that:
(Circular rotation mode, Rule: choose di ϵ {-1, 1} such that X’ = cos ϕ(x – y tan ϕ) (31)
z→0) Y’ = cos ϕ(y + x tan ϕ) (32)
Xm = k(x2+y2)1/2
Ym = 0 D. A Bit-Parallel Iterative CORDIC
Zm = z + tan-1(y/x) (25) The CORDIC structure as described by the schematics
in Figure 3.5 when directly translated into hardware. Each
(Circular vectoring mode, Rule: choose di ϵ {-1, 1} such branch consists of an adder-sub tractor combination, a
that y→0). shift unit and a register for buffering the output. At the
beginning of a calculation initial values are fed into the
In linear rotations corresponding to μ = 0, the end register by the multiplexer where the MSB of the stored
point of the vector is kept on the line x=x0 and the vector value in the z-branch determines the operation mode for
length is defined by ri=xi. Hence, the length of the vector is the adder-sub tractor.
always its true length OV and the scaling factor is 1. The
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.01, January-2014, Pages:0073-0080
Bit Serial Iterative Cordic Implementation for the Calculation of Trigonometric Functions

However, inserting registers between stages would also


reduce the maximum path delays and correspondingly a
higher maximum speed can be achieved. It can be seen,
that the number of CLBs stays almost the same while the
maximum frequency increases as registers are inserted.
The reason for that is the decreasing amount of
combinatorial logic between sequential cells. Obviously,
the gain of speed when inserting registers exceeds the cost
of area and makes therefore the fully pipelined CORDIC a
suitable solution for generating a sine wave in FPGAs.
Especially if a sufficient number of CLBs is at one's
disposal, as is the case in high density devices like
XILINX's Virtex or ALTERA's FLEX families, this type
of architecture becomes more and more attractive.

Figure5. Iterative CORDIC E. A Bit-Serial Iterative CORDIC


Problems which involve repeated evaluation of a fixed
D. A Bit-Parallel Unrolled CORDIC set of nonlinear, algebraic equations appear frequently in
Instead of buffering the output of one iteration and scientific and engineering applications. Examples of such
using the same resources again, one could simply cascade problems can be found in the robotics, engineering
the iterative CORDIC, which means rebuilding the basic graphics, and signal processing areas. Evaluating
CORDIC structure for each iteration. Consequently, the complicated equation sets can be very time consuming in
output of one stage is the input of the next one, as shown software, even when co-processors are used, especially
in Figure 3.6, and in the face of separate stages two when these equations contain a large number of nonlinear
simplifications become possible. First, the shift operations and transcendental functions as well as many
for each step can be performed by wiring the connections multiplication and division operations. Both, the unrolled
between stages appropriately. Second, there is no need for and the iterative bit-parallel designs, show disadvantages
changing constant values and those can therefore be in terms of complexity and path delays going along with
hardwired as well. The purely unrolled design only the large number of cross connections between single
consists of combinatorial components and computes one stages. To reduce this complexity we can change the
sine value per clock cycle. design into a completely bit-serial iterative architecture.
Bit-serial means only one bit is processed at a time and
hence the cross connections become one bit-wide data
paths.
CLOCK RATE / (NUMBER OF ITERATIONS * WORD
WIDHT)

Figure6. Unrolled CORDIC Figure7. Bit-serial CORDIC


International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.01, January-2014, Pages:0073-0080
CHINTADA RAMANAMMA, SOLOMON J V GOTHAM

IV. SIMULATION RESULTS The above figure shows the top level RTL schematic
diagram of CORDIC algorithm, where x_i, y_i and theta_i
are 17-bit inputs and x_o, y_o and theta_o are the outputs.

Figure8. Simulation results

Sine and cosine values from 0o - 30o

Fig10(b)

The above figure shows the hardware implementation of


the CORDIC algorithm.

Figure9. Sine and cosine values from 0o-30o at


Transcript window

V. SYNTHESIS RESULTS
A. RTL Schematic of Cordic Algorithm

Fig10(c)

Figures10 (a, b, c): RTL schematics of CORDIC


algorithm

The above figure shows the add/subtract block of the


CORDIC algorithm. The single block will perform the add
Fig10 (a) and subtract both functions.
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.01, January-2014, Pages:0073-0080
Bit Serial Iterative Cordic Implementation for the Calculation of Trigonometric Functions

B. SYNTHESIS REPORT be implemented using PDPs (Programmable Digital


Processors). But a large amount of data processing is
required because of complex computations. In future there
is a chance to Implementation of dif algorithm, DFT
computation and simulation for more number of points and
Implementation and simulation for DHT, DCT and DST
calculations also.

VII. REFERENCES

[1] Johan Lofgren and Peter Nilsson, Dept. of Electrical


and information technology, Lund University, Bit Serial
CORDIC: Architecture and Implementation
Improvements, Sweden

[2] Volder J. E., .The CORDIC trigonometric computing


technique., IRE Trans. Electronic Computing, Volume
EC-8, pp 330 - 334, 1959.

[3] Lindlbauer N., www.cnmat.berkeley.edu/~norbert/


CORDIC/node3.htmlhtt.

[4] Avion J.C., http://www.argo.es/~jcea/artic/


CORDIC.html.

[5] Qian M., .Application of CORDIC Algorithm to


Neural Networks VLSI Design., IMACS Multiconference
on .Computational Engineering in Systems Applications
(CESA)., Beijing, China, October 4-6, 2006.

[6] Lin C. H. and Wu A. Y., .Mixed-Scaling-Rotation


CORDIC (MSR-CORDIC) Algorithm and Architecture
for High-Performance Vector Rotational DSP
Applications., Volume 52, pp 2385- 2398, November
2005.

[7] Walther J.S.A, .Unified algorithm for elementary


functions., Spring Joint Computer Conference, pp 379 -
385, Alantic city, 1971.

[8] Kolk K. J. V., Deprettere E.F.A. and Lee A Floating


Point Vectoring Algorithm Based on Fast Rotations.,
Journal of VLSI Signal Processing, Volume25, pp
125.139, Kluwer Academic Publishers, Netherlands, 2000.

Total latency 2.275ns (1.726ns logic, 0.549ns route) [9] Antelo E., LangT. and Bruguera J. D., .Very-High
(75.9% logic, 24.1% route) Radix CORDIC Rotation Based on Selection by
Rounding., Journal of VLSI Signal Processing, Vol.25,
VI. CONCLUSION 141.153, Kluwer Academic Publishers, Netherlands, 2000.
In this paper, a new and improved bit-serial CORDIC
architecture is presented. It is shown how it is possible to [10] Delosme M. J. Lau, C. Y. and Hsiao S. F., .Redundant
reduce the number of registers by calculating the angular Constant-Factor Implementation of Multi-Dimensional
path prior to the vector paths in the CORDIC. Some extra CORDIC and Its Application to Complex SVD., Journal of
registers and extra logic are needed to store the sign bits of VLSI Signal Processing, Volume 25, pp 155.166, Kluwer
the angular calculations. However, this is substantially less Academic Publishers, Netherlands, 2000.
than the area reduction in the vector paths. The improved
architecture is 20 % smaller and consumes 26 % less [11] Choi J. H., Kwak J. H. and Swartzlander, Journal of
power. The CORDIC algorithm is a powerful and widely VLSI Signal Processing, Volume 25, Kluwer Academic
used tool for digital signal processing applications and can Publishers, Netherlands, 2000.
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.01, January-2014, Pages:0073-0080
CHINTADA RAMANAMMA, SOLOMON J V GOTHAM

Author’s Profile:

CHINTADA. RAMANAMMA,
has completed B.Tech (E.C.E)
from Sanketika Vidya Parishad.
College of Engineering, pursuing
M.Tech in Kaushik College of
Engineering, Affiliated to
JNTUK, Andhra Pradesh, India.
Her main research interest
includes in Electronics,
Embedded & VLSI Systems.

SOLOMON JV GOTHAM, did


B.Tech from VR Siddhartha
College of Engineering,
Affiliated to Acharya Nagarjuna
University, Vijayawada and
M.Tech from GITAM college of
Engineering, affiliated to Andhra
University, Andhra Pradesh,
India. His main research interests
include Communications, Signal Processing, VLSI and
Biomedical Signal Processing. And having 22 yrs
experience.

International Journal of Scientific Engineering and Technology Research


Volume.03, IssueNo.01, January-2014, Pages:0073-0080

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