a Single Supply, Low Power

Triple Video Amplifier

AD813
FEATURES PIN CONFIGURATION
Low Cost 14-Lead DIP and SOIC
Three Video Amplifiers in One Package
Optimized for Driving Cables in Video Systems
DISABLE1 1 14 OUT2
Excellent Video Specifications (RL = 150 V)
DISABLE2 2 13 –IN2
Gain Flatness 0.1 dB to 50 MHz
0.03% Differential Gain Error DISABLE3 3 12 +IN2

0.068 Differential Phase Error VS+ 4 AD813 11 VS–

Low Power +IN1 5 10 +IN3

Operates on Single +3 V to 615 V Power Supplies –IN1 6 9 –IN3
5.5 mA/Amplifier Max Power Supply Current OUT1 7 8 OUT3
High Speed
125 MHz Unity Gain Bandwidth (–3 dB)
500 V/ms Slew Rate 50 MHz while offering differential gain and phase error of
High Speed Disable Function per Channel 0.03% and 0.06°. This makes the AD813 ideal for broadcast
Turn-Off Time 80 ns and consumer video electronics.
Easy to Use The AD813 offers low power of 5.5 mA per amplifier max and
50 mA Output Current runs on a single +3 V power supply. The outputs of each ampli-
Output Swing to 1 V of Rails fier swing to within one volt of either supply rail to easily accom-
APPLICATIONS modate video signals. While operating on a single +5 V supply
Video Line Driver the AD813 still achieves 0.1 dB flatness to 20 MHz and 0.05%
LCD Drivers & 0.05° of differential gain and phase performance. All this is
Computer Video Plug-In Boards offered in a small 14-lead plastic DIP or SOIC package. These
Ultrasound features make this triple amplifier ideal for portable and battery
RGB Amplifier powered applications where size and power are critical.
CCD Based Systems The outstanding bandwidth of 125 MHz along with 500 V/µs of
slew rate make the AD813 useful in many general purpose, high
PRODUCT DESCRIPTION speed applications where a single +3 V or dual power supplies
The AD813 is a low power, single supply triple video amplifier. up to ± 15 V are needed. Furthermore the AD813 contains a
Each of the three current feedback amplifiers has 50 mA of output high speed disable function for each amplifier in order to power
current, and is optimized for driving one back-terminated video down the amplifier or high impedance the output. This can then
load (150 Ω). The AD813 features gain flatness of 0.1 dB to be used in video multiplexing applications. The AD813 is avail-
able in the industrial temperature range of –40°C to +85°C in
plastic DIP and SOIC packages as well as chips.
G = +2
RL = 150V
0.2 500mV 500ns
615V
NORMALIZED GAIN – dB

0.1
100
0 90

–0.1
65V
–0.2
3V
–0.3
5V
–0.4
10
–0.5
0%

100k 1M 10M 100M

5V

FREQUENCY – Hz

Figure 1. Fine Scale Gain Flatness vs. Frequency, Figure 2. Channel Switching Characteristics for a 3:1 Mux
G = +2, RL = 150 Ω
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
otherwise under any patent or patent rights of Analog Devices. Fax: 781/326-8703 © Analog Devices, Inc., 1998
AD813–SPECIFICATIONS
Dual Supply (@ T = +258C, R = 150 V, unless otherwise noted)
A L

Model AD813A
Conditions VS Min Typ Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = +2, No Peaking ±5 V 45 65 MHz
± 15 V 75 100 MHz
Bandwidth for 0.1 dB
Flatness G = +2 ±5 V 15 25 MHz
± 15 V 25 50 MHz
Slew Rate1 G = +2, RL = 1 kΩ ±5 V 150 V/µs
± 15 V 150 250 V/µs
G = –1, RL = 1 kΩ ±5 V 225 V/µs
± 15 V 450 V/µs
Settling Time to 0.1% G = –1, RL = 1 kΩ
VO = 3 V Step ±5 V 50 ns
VO = 10 V Step ± 15 V 40 ns

NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion fC = 1 MHz, RL = 1 kΩ ± 15 V –90 dBc
Input Voltage Noise f = 10 kHz ± 5 V, ± 15 V 3.5 nV√Hz
Input Current Noise f = 10 kHz, +In ± 5 V, ± 15 V 1.5 pA√Hz
–In ± 5 V, ± 15 V 18 pA√Hz
Differential Gain Error NTSC, G = ± 2, RL = 150 Ω ±5 V 0.08 %
± 15 V 0.03 0.09 %
Differential Phase Error ±5 V 0.13 Degrees
± 15 V 0.06 0.12 Degrees

DC PERFORMANCE
Input Offset Voltage ± 5 V, ± 15 V 2 5 mV
TMIN–TMAX 12 mV
Offset Drift ± 5 V, ± 15 V 15 µV/°C
–Input Bias Current ± 5 V, ± 15 V 5 30 µA
TMIN–TMAX 35 µA
+Input Bias Current ± 5 V, ± 15 V 0.5 1.7 µA
TMIN–TMAX 2.5 µA
Open-Loop Voltage Gain VO = ± 2.5 V, RL = 150 Ω ±5 V 69 76 dB
TMIN–TMAX 66 dB
VO = ± 10 V, RL = 1 kΩ ± 15 V 73 82 dB
TMIN–TMAX 72 dB
Open-Loop Transresistance VO = ± 2.5 V, RL = 150 Ω ±5 V 300 500 kΩ
TMIN–TMAX 200 kΩ
VO = ± 10 V, RL = 1 kΩ ± 15 V 400 900 kΩ
TMIN–TMAX 300 kΩ

INPUT CHARACTERISTICS
Input Resistance +Input ± 15 V 15 MΩ
–Input ± 15 V 65 Ω
Input Capacitance +Input ± 15 V 1.7 pF
Input Common Mode ±5 V ± 4.0 V
Voltage Range ± 15 V ± 13.5 V
Common-Mode Rejection Ratio
Input Offset Voltage VCM = ± 2.5 V ±5 V 54 58 dB
–Input Current 2 3 µA/V
± Input Current 0.07 0.15 µA/V
Input Offset Voltage VCM = ± 10 V ± 15 V 57 62 dB
–Input Current 1.5 3.0 µA/V
+Input Current 0.05 0.1 µA/V

–2– REV. B
 AD813

Model AD813A
Conditions VS Min Typ Max Units
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 150 Ω, TMIN–TMAX ±5 V 3.5 3.8 ±V
RL = 1 kΩ, TMIN–TMAX ± 15 V 13.6 14.0 ±V
Output Current ±5 V 25 40 mA
± 15 V 30 50 mA
Short Circuit Current G = +2, RF = 715 Ω ± 15 V 100 mA
VIN = 2 V

MATCHING CHARACTERISTICS
Dynamic
Crosstalk G = +2, f = 5 MHz ± 5 V, ± 15 V –65 dB
Gain Flatness Match G = +2, f = 40 MHz ± 15 V 0.1 dB
DC
Input Offset Voltage TMIN–TMAX ± 5 V, ± 15 V 0.5 3.5 mV
–Input Bias Current TMIN–TMAX ± 5 V, ± 15 V 2 25 µA

POWER SUPPLY
Operating Range ± 1.2 ± 18 V
Quiescent Current Per Amplifier ±5 V 3.5 4.0 mA
± 15 V 4.5 5.5 mA
TMIN–TMAX ± 15 V 6.7 mA
Quiescent Current, Powered Down Per Amplifier ±5 V 0.5 0.65 mA
± 15 V 0.75 1.0 mA
Power Supply Rejection Ratio
Input Offset Voltage VS = ± 1.5 V to ± 15 V 72 80 dB
–Input Current 0.3 0.8 µA/V
+Input Current 0.005 0.05 µA/V

DISABLE CHARACTERISTICS
Off Isolation f = 5 MHz ± 5 V, ± 15 V –57 dB
Off Output Impedance G = +1 ± 5 V, ± 15 V 12.5 pF
Channel-to-Channel 2 or 3 Channels ± 5 V, ± 15 V –65 dB
Isolation Mux, f = 5 MHz
Turn-On Time ± 5 V, ± 15 V 100 ns
Turn-Off Time 80 ns
NOTES
1
Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
Specifications subject to change without notice.

REV. B –3–
AD813–SPECIFICATIONS
Single Supply (@ T = +258C, R = 150 V, unless otherwise noted)
A L

Model AD813A
Conditions VS Min Typ Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = +2, No Peaking +5 V 35 50 MHz
+3 V 25 40 MHz
Bandwidth for 0.1 dB
Flatness G = +2 +5 V 12 20 MHz
+3 V 8 15 MHz
Slew Rate1 G = +2, RL = 1 kΩ +5 V 100 V/µs
+3 V 50 V/µs

NOISE/HARMONIC PERFORMANCE
Input Voltage Noise f = 10 kHz +5 V, +3 V 3.5 nV√Hz
Input Current Noise f = 10 kHz, +In +5 V, +3 V 1.5 pA√Hz
–In +5 V, +3 V 18 pA√Hz
Differential Gain Error2 NTSC, G = +2, RL = 150 Ω +5 V 0.05 %
G = +1 +3 V 0.2 %
Differential Phase Error2 G = +2 +5 V 0.05 Degrees
G = +1 +3 V 0.2 Degrees

DC PERFORMANCE
Input Offset Voltage +5 V, +3 V 1.5 5 mV
TMIN–TMAX 10 mV
Offset Drift +5 V, +3 V 7 µV/°C
–Input Bias Current +5 V, +3 V 7 30 µA
TMIN–TMAX 40 µA
+Input Bias Current +5 V, +3 V 0.5 1.7 µA
TMIN–TMAX 2.5 µA
Open-Loop Voltage Gain VO = +2.5 V p-p +5 V 65 70 dB
VO = +0.7 V p-p +3 V 69 dB
Open-Loop Transresistance VO = +3 V p-p +5 V 180 300 kΩ
VO = +1 V p-p +3 V 225 kΩ

INPUT CHARACTERISTICS
Input Resistance +Input +5 V, +3 V 15 MΩ
–Input +5 V 90 Ω
Input Capacitance +Input 2 pF
Input Common Mode +5 V 1.0 4.0 V
Voltage Range +3 V 1.0 2.0 V
Common-Mode Rejection Ratio
Input Offset Voltage VCM = 1.25 V to 3.75 V +5 V 54 58 dB
–Input Current 3 6.5 µA/V
+Input Current 0.1 0.2 µA/V
Input Offset Voltage VCM = 1 V to 2 V +3 V 56 dB
–Input Current 3.5 µA/V
+Input Current 0.1 µA/V

OUTPUT CHARACTERISTICS
Output Voltage Swing p-p RL = 150 Ω, TMIN–TMAX +5 V 3.0 3.2 ± V p-p
+3 V 1.0 1.3 ± V p-p
Output Current +5 V 20 30 mA
+3 V 15 25 mA
Short Circuit Current G = +2, RF = 715 Ω +5 V 40 mA
VIN = 1 V

–4– REV. B
 AD813
Model AD813A
Conditions VS Min Typ Max Units
MATCHING CHARACTERISTICS
Dynamic
Crosstalk G = +2, f = 5 MHz +5 V, +3 V –65 dB
Gain Flatness Match G = +2, f = 20 MHz +5 V, +3 V 0.1 dB
DC
Input Offset Voltage TMIN–TMAX +5 V, +3 V 0.5 3.5 mV
–Input Bias Current TMIN–TMAX +5 V, +3 V 2 25 µA

POWER SUPPLY
Operating Range 2.4 36 V
Quiescent Current Per Amplifier +5 V 3.2 4.0 mA
+3 V 3.0 4.0 mA
TMIN–TMAX +5 V 5.0 mA
Quiescent Current, Powered Down Per Amplifier +5 V 0.4 0.6 mA
+3 V 0.4 0.5 mA
Power Supply Rejection Ratio
Input Offset Voltage VS = +3.0 V to +30 V 76 dB
–Input Current 0.3 µA/V
+Input Current 0.005 µA/V

DISABLE CHARACTERISTICS
Off Isolation f = 5 MHz +5 V, +3 V –55 dB
Off Output Impedance G = +1 +5 V, +3 V 13 pF
Channel-to-Channel 2 or 3 Channel +5 V, +3 V –65 dB
Isolation Mux, f = 5 MHz
Turn-On Time +5 V, +3 V 100 ns
Turn-Off Time 80 ns

TRANSISTOR COUNT 111

NOTES
1
Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
2
Single supply differential gain and phase are measured with the ac coupled circuit of Figure 52.
Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2 Temperature Package Package
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts Model Range Description Options
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 Watts AD813AN –40°C to +85°C 14-Lead Plastic DIP N-14
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . ± VS AD813AR-14 –40°C to +85°C 14-Lead Plastic SOIC R-14
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V AD813ACHIPS –40°C to +85°C Die Form
Output Short Circuit Duration AD813AR-REEL 13" REEL
. . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves AD813AR-REEL7 7" REEL
Storage Temperature Range N, R . . . . . . . . –65°C to +125°C 5962-9559601M2A* –55°C to +125°C 20-Lead LCC
Operating Temperature Range
AD813A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C *Refer to official DSCC drawing for tested specifications and pin configuration.
Lead Temperature Range (Soldering 10 sec) . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
14-Lead Plastic DIP Package: θJA = 75°C/W
14-Lead SOIC Package: θJA = 120°C/W

REV. B –5–
AD813
Maximum Power Dissipation 2.5
TJ = +150 C
The maximum power that can be safely dissipated by the

MAXIMUM POWER DISSIPATION – Watts

AD813 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for the plastic encap- 2.0
sulated parts is determined by the glass transition temperature
14-LEAD DIP PACKAGE
of the plastic, about 150°C. Exceeding this limit temporarily
may cause a shift in parametric performance due to a change in 1.5
the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can result
14-LEAD SOIC
in device failure.
1.0
While the AD813 is internally short circuit protected, this may
not be enough to guarantee that the maximum junction tem-
perature (150°C) is not exceeded under all conditions. To
0.5
ensure proper operation, it is important to observe the derating –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
curves. AMBIENT TEMPERATURE – C

It must also be noted that in (noninverting) gain configurations Figure 3. Maximum Power Dissipation vs. Ambient
(with low values of gain resistor), a high level of input overdrive Temperature
can result in a large input error current, which may result in a
significant power dissipation in the input stage. This power
must be included when computing the junction temperature rise
due to total internal power.

METALIZATION PHOTO
Dimensions shown in inches and (mm).

0.124
(3.15)
+IN2 VS– VS– VS– +IN3
12 11 11 11 10

9 –IN3

–IN2 13
8 OUT3
OUT2 14
0.057
(1.45)

DISABLE1 1 7 OUT1

DISABLE2 2

3 4 5 6
DISABLE3 VS+ +IN1 –IN1

CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. WARNING!
Although the AD813 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality.

–6– REV. B
 AD813
COMMON-MODE VOLTAGE RANGE – 6Volts 20 20

18
15
VS = 615V

SUPPLY CURRENT – mA
16

10 14

VS = 65V
12
5

10

0 8
0 5 10 15 20 –60 –40 –20 0 20 40 60 80 100 120 140
SUPPLY VOLTAGE – 6Volts
JUNCTION TEMPERATURE – C

Figure 4. Input Common-Mode Voltage Range vs. Figure 7. Supply Current vs. Junction Temperature
Supply Voltage

20 13

TA = +25 C

12
15
OUTPUT VOLTAGE – V p-p

SUPPLY CURRENT – mA
NO LOAD

11

10
RL = 150V
10

5
9

0 8
0 5 10 15 20 0 2 4 6 8 10 12 14 16
SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – ±Volts

Figure 5. Output Voltage Swing vs. Supply Voltage Figure 8 Supply Current vs. Supply Voltage at Low
Voltages

30 25

615V SUPPLY 20
25
15
INPUT BIAS CURRENT – mA
OUTPUT VOLTAGE – V p-p

10
20 –IB, VS = 65V
5

15 0
+IB, VS = 65V, 615V
–5
10
–10 –IB, VS = 615V
65V SUPPLY
–15
5
–20

0 –25
10 100 1k 10k –60 –40 –20 0 20 40 60 80 100 120 140
LOAD RESISTANCE – V JUNCTION TEMPERATURE – C

Figure 6. Output Voltage Swing vs. Load Resistance Figure 9. Input Bias Current vs. Junction Temperature

REV. B –7–
AD813
4 70

2
VS = 65V
0
INPUT OFFSET VOLTAGE – mV

60

OUTPUT CURRENT – mA
–2

–4 50
VS = 615V
–6

–8 40

–10

–12 30

–14

–16 20
–60 –40 –20 0 20 40 60 80 100 120 140 0 5 10 15 20
JUNCTION TEMPERATURE – C SUPPLY VOLTAGE – 6Volts

Figure 10. Input Offset Voltage vs. Junction Figure 13. Linear Output Current vs. Supply Voltage
Temperature

160 1k

VS = 615V CLOSED-LOOP OUTPUT RESISTANCE – V G = +2

140
SHORT CIRCUIT CURRENT – mA

100
SINK

120
10

100

SOURCE 1
80
5VS
0.1
60
15VS

40 0.01
–60 –40 –20 0 20 40 60 80 100 120 140 10k 100k 1M 10M 100M
JUNCTION TEMPERATURE – C FREQUENCY – Hz

Figure 11. Short Circuit Current vs. Junction Figure 14. Closed-Loop Output Resistance vs.
Temperature Frequency

80 1M

70

100k
OUTPUT CURRENT – mA

ΩOUTPUT RESISTANCE – V

60

50 10k

VS = 65V
40

VS = 615V 1k
30

20 100
–60 –40 –20 0 20 40 60 80 100 120 140 100k 1M 10M 100M
JUNCTION TEMPERATURE – C FREQUENCY – Hz

Figure 12. Linear Output Current vs. Junction Figure 15. Output Resistance vs. Frequency, Disabled
Temperature State

–8– REV. B
 AD813
100 100 0

PHASE – Degrees
120 –45
PHASE VS = 615V
–90
VOLTAGE NOISE – nV/ Hz

TRANSIMPEDANCE – dB
CURRENT NOISE – pA/ Hz
INVERTING INPUT CURRENT NOISE 100 –135
GAIN
VS = 3V
–180
10 10
80
VS = 615V
VS = 3V
VOLTAGE NOISE
60
NONINVERTING INPUT
CURRENT NOISE

1 1 40
10 100 1k 10k 100k 10k 100k 1M 10M 100M
FREQUENCY – Hz FREQUENCY – Hz

Figure 16. Input Current and Voltage Noise vs. Figure 19. Open-Loop Transimpedance vs. Frequency
Frequency (Relative to 1 Ω)

90 –30
681V
G = +2
80 681V VO = 2V p-p
VIN VOUT VS = 615V: RL = 1kV
COMMON-MODE REJECTION – dB

HARMONIC DISTORTION – dBc –50

70 VS = 65V: RL = 150V
681V
681V
60
–70
2ND HARMONIC
50 VS = 65V

VS = 3V –90
40 3RD HARMONIC
VS = 615V VS = 615V
VS = 65V
30
–110
20 2ND
3RD
10
–130
10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M
FREQUENCY – Hz FREQUENCY – Hz

Figure 17. Common-Mode Rejection vs. Frequency Figure 20. Harmonic Distortion vs. Frequency

80 10
GAIN = –1
8
70 VS = 615V
POWER SUPPLY REJECTION – dB

615V
OUTPUT SWING FROM 6V TO 0

6
60
4
50 2
61.5V
40 0 1% 0.1% 0.025%

–2
30
–4
20
–6
10
–8

0 –10
10k 100k 1M 10M 100M 20 40 60 80
FREQUENCY – Hz SETTLING TIME – ns

Figure 18. Power Supply Rejection vs. Frequency Figure 21. Output Swing and Error vs. Settling Time

REV. B –9–
AD813
1000 700
VS = 615V
900 RL = 500V
600
800
500 G = +10
700
SLEW RATE – V/ms

SLEW RATE – V/ms

600
400 G = –1
500 G = +10
300
400 G = –1
300 G = +2
200
G = +2
200
100
100 G = +1 G = +1

0 0
0 1 2 3 4 5 6 7 8 9 10 0 1.5 3.0 4.5 6.0 7.5 9.0 10.5 12.0 13.5 15.0
OUTPUT STEP SIZE – V p-p SUPPLY VOLTAGE – 6Volts

Figure 22. Slew Rate vs. Output Step Size Figure 25. Maximum Slew Rate vs. Supply Voltage

AAA
A AA
A
A
AAA AA
A
2V 50ns 500m V 20n s

AAAA
AAAA A
AAA
100 1 00
VIN
90
90 VIN

A AA
A A A
AAAAA
AA AAAAA
10

0%A 2V
VOUT VOUT
10

0%

500m V

Figure 23. Large Signal Pulse Response, Gain = +1, Figure 26. Small Signal Pulse Response, Gain = +1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

+90
PHASE SHIFT – Degrees

PHASE RL = 150V
VS = 615V 0 140

3V –90
5V 65V 120
–3dB BANDWIDTH – MHz

+1 –180
GAIN 100
0 –270
CLOSED-LOOP GAIN – dB

VS = 615V 80 RF = 750V RF = 866V

–1
3V
–2 60
RF = 1kV
–3 5V 65V
40
–4

–5

–6
1 10 100 1000 2 4 6 8 10 12 14 16
SUPPLY VOLTAGE – 6Volts
FREQUENCY – MHz

Figure 24. Closed-Loop Gain and Phase vs. Frequency, Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1
G = +1

–10– REV. B
 AD813

500mV 50ns 50mV 20ns

100 100
90 90 VIN
VIN

10 VOUT 10 VOUT
0% 0%

500mV 500mV

Figure 28. Large Signal Pulse Response, Gain = +10, Figure 31. Small Signal Pulse Response, Gain = +10,
(RF = 357 Ω, RL = 500 Ω, VS = ± 15 V) (RF = 357 Ω, RL = 150 Ω, VS = ± 5 V)

PHASE SHIFT – Degrees

PHASE SHIFT – Degrees

PHASE G = +10 PHASE VS = 615V G = +10
VS = 615V RL = 150V 0 0
RL = 1kV
65V
CLOSED-LOOP GAIN (NORMALIZED) – dB

–90 –90
CLOSED-LOOP GAIN (NORMALIZED) – dB
65V
5V 3V
+1 –180 +1 5V –180
3V
GAIN GAIN
0 –270 0 –270

–1 VS = 615V –1 –360
VS = 615V
5V 5V
–2 –2

–3 –3
3V 65V 3V 65V
–4 –4

–5 –5

–6 –6
1 10 100 1000 1 10 100 1000
FREQUENCY – MHz FREQUENCY – MHz

Figure 29. Closed-Loop Gain and Phase vs. Frequency, Figure 32. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 150 Ω G = +10, RL = 1 kΩ

G = +10 G = +10
RL = 150V RL = 1kV

80 90
RF = 357V
–3dB BANDWIDTH – MHz

–3dB BANDWIDTH – MHz

70 80
PEAKING 1dB RF = 357V
60 70
RF = 154V
50 60
RF = 649V RF = 649V
RF = 154V
40 50

30 40

20 30

20

2 4 6 8 10 12 14 16 2 4 6 8 10 12 14 16
SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts

Figure 30. –3 dB Bandwidth vs. Supply Voltage, Figure 33. –3 dB Bandwidth vs. Supply Voltage,
G = +10, RL = 150 Ω G = +10, RL = 1 kΩ

REV. B –11–
AD813
2V 50ns 500m V 2 0n s

100 10 0
90 90

10 10
0% 0%

2V 500m V

Figure 34. Large Signal Pulse Response, Gain = –1, Figure 37. Small Signal Pulse Response, Gain = –1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

PHASE SHIFT – Degrees

PHASE SHIFT – Degrees

PHASE VS = 615V G = –1 PHASE G = –10
0 VS = 615V 0
RL = 150V RL = 1kV

CLOSED-LOOP GAIN (NORMALIZED) – dB

65V –90 65V –90
3V
5V 3V
+1 –180 +1 5V –180
GAIN GAIN
–270 –270
CLOSED-LOOP GAIN – dB

0 0
VS = 615V
–1 –1
VS = 615V
3V
–2 –2
3V
65V
–3 –3
5V 65V
–4 –4
5V
–5 –5

–6 –6
1 10 100 1000 1 10 100 1000
FREQUENCY – MHz FREQUENCY – MHz

Figure 35. Closed-Loop Gain and Phase vs. Frequency, Figure 38. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 150 Ω G = –10, RL = 1 kΩ

G = –1 G = –10
RL = 150V RL = 1kV

110 80
–3dB BANDWIDTH – MHz

–3dB BANDWIDTH – MHz

100 70 RF = 357V
PEAKING 1.0dB
RF = 681V
90 60
RF = 154V
80 50
PEAKING 0.2dB
70 RF = 715V RF = 649V
40
60 30
50 20

40

2 4 6 8 10 12 14 16 2 4 6 8 10 12 14 16
SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts

Figure 36. –3 dB Bandwidth vs. Supply Voltage, G = –1, Figure 39. –3 dB Bandwidth vs. Supply Voltage,
RL = 150 Ω G = –10, RL = 1 kΩ

–12– REV. B
 AD813
General Consideration To estimate the –3 dB bandwidth for closed-loop gains or feed-
The AD813 is a wide bandwidth, triple video amplifier that back resistors not listed in the above table, the following two
offers a high level of performance on less than 5.5 mA per am- pole model for the AD813 may be used:
plifier of quiescent supply current. With its fast acting power
down switch, it is designed to offer outstanding functionality G
ACL =
and performance at closed-loop inverting or noninverting gains (RF + Gr IN)CT 

S 2 + S (R F + GrIN ) CT + 1
of one or greater. 

2 π f2 

Built on a low cost, complementary bipolar process, and achiev-
ing bandwidth in excess of 100 MHz, differential gain and phase where: ACL = closed-loop gain from “transcapacitance”
errors of better than 0.1% and 0.1° (into 150 Ω), and output G = 1 + RF/RG
current greater than 40 mA, the AD813 is an exceptionally rIN = input resistance of the inverting input
efficient video amplifier. Using a conventional current feedback CT = “transcapacitance,” which forms the
architecture, its high performance is achieved through careful open-loop dominant pole with the
attention to design details. transresistance
Choice of Feedback & Gain Resistors RF = feedback resistor
Because it is a current feedback amplifier, the closed-loop band- RG = gain resistor
width of the AD813 depends on the value of the feedback resis- f2 = frequency of second (nondominant) pole
tor. The bandwidth also depends on the supply voltage. In s = 2 πj f
addition, attenuation of the open-loop response when driving Appropriate values for the model parameters at different supply
load resistors less than about 250 Ω will also affect the band- voltages are listed in Table II. Reasonable approximations for
width. Table I contains data showing typical bandwidths at these values at supply voltages not found in the table can be
different supply voltages for some useful closed-loop gains when obtained by a simple linear interpolation between those tabu-
driving a load of 150 Ω. (Bandwidths will be about 20% greater lated values which ‘bracket’ the desired condition.
for load resistances above a few hundred ohms.)
Table II. Two Pole Model Parameters at Various Supplies
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and VS (V) rIN (V) CT (pF) f2 (MHz)
Feedback Resistor , (RL = 150 V)
± 15 85 2.5 150
VS (V) Gain RF (V) BW (MHz) ±5 90 3.8 125
± 15 +1 866 125 +5 105 4.8 105
+2 681 100 +3 115 5.5 95
+10 357 60 As discussed in many amplifier and electronics textbooks (such
–1 681 100 as Roberge’s Operational Amplifiers: Theory and Practice), the
–10 357 55 –3 dB bandwidth for the 2-pole model can be obtained as:
±5
[ ]
+1 750 75 1/2
+2 649 65 f 3 = f n 1 − 2d 2 + (2 − 4d 2 + 4d 4 )1/2
+10 154 40
–1 649 70 1/2
 f2 
–10 154 40 fn =  
where:  F
( R + Gr IN ) C T 
+5 +1 715 60
+2 619 50
+10 154 30 and: d=
1
2
[
f 2 (R F +Gr IN ) C T ]1/2
–1 619 50
–10 154 30
This model will predict –3 dB bandwidth within about 10% to
+3 +1 681 50 15% of the correct value when the load is 150 Ω. However, it is
+2 619 40 not accurate enough to predict either the phase behavior or the
+10 154 25 frequency response peaking of the AD813.
–1 619 40
–10 154 20

The choice of feedback resistor is not critical unless it is impor-

tant to maintain the widest, flattest frequency response. The
resistors recommended in the table are those (metal film values)
that will result in the widest 0.1 dB bandwidth. In those appli-
cations where the best control of the bandwidth is desired, 1%
metal film resistors are adequate. Wider bandwidths can be
attained by reducing the magnitude of the feedback resistor (at
the expense of increased peaking), while peaking can be reduced
by increasing the magnitude of the feedback resistor.

REV. B –13–
AD813
Printed Circuit Board Layout Guidelines
As with all wideband amplifiers, printed circuit board parasitics
can affect the overall closed-loop performance. Most important
for controlling the 0.1 dB bandwidth are stray capacitances at
the output and inverting input nodes. Increasing the space be-
tween signal lines and ground plane will minimize the coupling.
Also, signal lines connecting the feedback and gain resistors
should be kept short enough that their associated inductance
does not cause high frequency gain errors.
Power Supply Bypassing
Adequate power supply bypassing can be very important when
optimizing the performance of high speed circuits. Inductance
in the supply leads can (for example) contribute to resonant
circuits that produce peaking in the amplifier’s response. In
addition, if large current transients must be delivered to a load,
then large (greater than 1 µF) bypass capacitors are required to
produce the best settling time and lowest distortion. Although
0.1 µF capacitors may be adequate in some applications, more
elaborate bypassing is required in other cases.
When multiple bypass capacitors are connected in parallel, it is
important to be sure that the capacitors themselves do not form
resonant circuits. A small (say 5 Ω) resistor may be required in
series with one of the capacitors to minimize this possibility.
As discussed below, power supply bypassing can have a signifi-
cant impact on crosstalk performance.
Achieving Low Crosstalk
Measured crosstalk from the output of Amplifier 2 to the input
of Amplifier 1 of the AD813 is shown in Figure 40. All other
crosstalk combinations, (from the output of one amplifier to the
input of another), are a few dB better than this due to the addi-
tional distance between critical signal nodes.
–10
RL = 150V
–20
–30
–40
CROSSTALK – dB
–50
–60
–70
–80
–90
–100
–110
100k 1M 10M
FREQUENCY – Hz
Figure 40. Worst Case Crosstalk vs. Frequency
A carefully laid-out PC board should be able to achieve the level
of crosstalk shown in the figure. The most significant contribu-
tors to difficulty in achieving low crosstalk are inadequate power
supply bypassing, overlapped input and/or output signal paths,
and capacitive coupling between critical nodes.
The bypass capacitors must be connected to the ground plane at
a point close to and between the ground reference points for the
loads. (The bypass of the negative power supply is particularly
important in this regard.) This requires careful planning as
there are three amplifiers in the package, and low impedance
signal return paths must be provided for each load. (Using a
parallel combination of 1 µF, 0.1 µF, and 0.01 µF bypass ca-
pacitors will help to achieve optimal crosstalk.)
The input and output signal return paths (to the bypass caps)
must also be kept from overlapping. Since ground connections
are not of perfectly zero impedance, current in one ground
return path can produce a voltage drop in another ground re-
turn path if they are allowed to overlap.
Electric field coupling external to (and across) the package can
be reduced by arranging for a narrow strip of ground plane to be
run between the pins (parallel to the pin rows). Doing this on
both sides of the board can reduce the high frequency crosstalk
by about 5 dB or 6 dB.
Driving Capacitive Loads
When used with the appropriate output series resistor, any load
capacitance can be driven without peaking or oscillation. In
most cases, less than 50 Ω is all that is needed to achieve an
extremely flat frequency response. As illustrated in Figure 44,
the AD813 can be very attractive for driving large capacitive
loads. In this case, the AD813’s high output short circuit cur-
rent allows for a 150 V/µs slew rate when driving a 510 pF
capacitor.
RF
+VS 0.1mF
1.0mF
RG
4
RS
AD813 VO
VIN 11 CL RL
1.0mF
RT
0.1mF
–VS
100M
Figure 41. Circuit for Driving a Capacitive Load
–14– REV. B
 AD813
VS = 65V
Overload Recovery
G = +2 There are three important overload conditions to consider.
RF = 750V They are due to: input common-mode voltage overdrive, out-
RL = 1kV
CL = 10pF put voltage overdrive, and input current overdrive. When the
amplifier is configured for low closed-loop gains, and the input
CLOSED-LOOP GAIN – dB

9
RS = 0 common-mode voltage range is exceeded, the recovery time will
6 be very fast, typically under 30 ns. When configured for a
higher gain, and overloaded at the output, the recovery time will
3
RS = 30V also be short. For example, in a gain of +10, with 6 dB of
0 input overdrive, the recovery time of the AD813 is about 25 ns
RS = 50V
–3 (see Figure 45).

1V 50ns
1 10 100 1000
FREQUENCY – MHz 100
90
Figure 42. Response to a Small Load Capacitor at
VS = ± 5 V

VS = 615V
G = +2 10
RF = 750V 0%
RL = 1kV
2V
CLOSED-LOOP GAIN – dB

6
Figure 45. 6 dB Overload Recovery, G = +10,
CL = 150pF, RS = 30V
3 (RL = 500 Ω, RF = 357 Ω, VS = ± 5 V)
0 In the case of high gains with very high levels of input overdrive,
CL = 510pF, RS = 15V
–3 a longer recovery time will occur. For example, if the input
common-mode voltage range is exceeded in the gain of +10, the
recovery time will be on the order of 100 ns. This is primarily
due to current overloading of the input stage.
1 10 100 1000
FREQUENCY – MHz As noted in the warning under Maximum Power Dissipation, a
high level of input overdrive in a high noninverting gain circuit
Figure 43. Response to a Large Load Capacitor at
can result in a large current flow in the input stage. Though this
VS = ± 15 V
current is internally limited to about 40 mA, its effect on the
total power dissipation may be significant.

5V 1 00 n s

100
100

90

10
0%

5V

Figure 44. Circuit of Figure 38 Driving a 510 pF Load

Capacitor, VS = ± 15 V (RL = 1 kΩ, RF = RG = 750 Ω,
RS =15 Ω)

REV. B –15–
AD813
High Performance Video Line Driver Figures 50 and 51 show the worst case matching; the match
At a gain of +2, the AD813 makes an excellent driver for a back between amplifiers 2 and 3 is typically much better than this.
terminated 75 Ω video line. Low differential gain and phase
errors and wide 0.1 dB bandwidth can be realized over a wide
range of power supply voltage. Excellent gain and group delay
G = +2
matching are also attainable over the full operating supply volt- RL = 150V
age range. 0.2
615V

NORMALIZED GAIN – dB
RG RF 0.1

0
+VS
0.1mF –0.1
65V
–0.2

4 75V 3V
–0.3
75V CABLE
75V VOUT
CABLE
AD813 –0.4
5V
VIN 11 75V
–0.5
75V 0.1mF

100k 1M 10M 100M

–VS FREQUENCY – Hz

Figure 46. A Video Line Driver Operating at a Gain of Figure 49. Fine-Scale Gain (Normalized) vs. Frequency
+2 (RF = RG from Table I)
PHASE SHIFT – Degrees

+90 2.5
PHASE G = +2 G = +2
RL = 150V 0 2.0 RL = 150V
CLOSED-LOOP GAIN (NORMALIZED) – dB

VS = 615V –90 1.5

3V
65V
–180
GAIN MATCHING – dB

+1 1.0
5V
GAIN
0 –270 0.5

–1 0 VS = 615V
VS = 615V
–2 5V –0.5 VS = 3V

–3 –1.0
65V
–4 3V –1.5

–5 –2.0

–6 –2.5
1 10 100 1000 1 10 100 1000
FREQUENCY – MHz FREQUENCY – MHz

Figure 47. Closed-Loop Gain & Phase vs. Frequency for Figure 50. Closed-Loop Gain Matching vs. Frequency
the Line Driver

120 10

110 RF = 590V 8 VS = 3V
5V
100 RF = 681V 6 65V
–3dB BANDWIDTH – MHz

RF = 750V 4 615V
90
GROUP DELAY – ns

DELAY
80 2

70 NO PEAKING

60 1.0

0.5 VS = 615V
50

40 0
3V
30 –0.5
DELAY MATCHING
20 –1.0
0 2 4 6 8 10 12 14 16 18 20 100k 1M 10M 100M
SUPPLY VOLTAGE – Volts FREQUENCY – Hz

Figure 48. –3 dB Bandwidth vs. Supply Voltage for Figure 51. Group Delay and Group Delay Matching vs.
Gain = +2, RL = 150 Ω Frequency, G = +2, RL = 150 Ω

–16– REV. B
 AD813
Operation Using a Single Supply Disable Mode Operation
The AD813 will operate with total supply voltages from 36 V Pulling the voltage on any one of the Disable pins about 2.5 V
down to 2.4 V. With proper biasing (see Figure 52) it can down from the positive supply will put the corresponding ampli-
make an outstanding single supply video amplifier. Since the fier into a disabled, powered down, state. In this condition, the
input and output voltage ranges extend to within 1 V of the amplifier’s quiescent supply current drops to about 0.5 mA, its
supply rails, it will handle a 1.3 V peak-to-peak signal on a output becomes a high impedance, and there is a high level of
single 3.3 V supply, or a 3 V peak-to-peak signal on a single isolation from input to output. In the case of the gain of two
5 V supply. The small signal 0.1 dB bandwidths will exceed line driver for example, the impedance at the output node will
10 MHz in either case, and the large signal bandwidths will be about the same as for a 1.4 kΩ resistor (the feedback plus
exceed 6 MHz. gain resistors) in parallel with a 12.5 pF capacitor and the input
to output isolation will be about 65 dB at 1 MHz.
The capacitively coupled cable driver in Figure 52 will achieve
outstanding differential gain and phase errors of 0.05% and 0.05 Leaving the Disable pin disconnected (floating) will leave the
degrees respectively on a single 5 V supply. Resistor R2, in this corresponding amplifier operational, in the enabled state. The
circuit, is selected to optimize the differential gain and phase by input impedance of the disable pins is about 35 kΩ in parallel
biasing the amplifier in its most linear region. with a few pF. When grounded, about 50 µA flows out of a
disable pin on ± 5 V supplies.
619V 619V

R3
Input voltages greater than about 1.5 V peak-to-peak will defeat
C3
30mF 1kV
+5V
the isolation. In addition, large signals (greater than 3 V peak-
C2 R1 to-peak) applied to the output node will cause the output im-
1mF 9kV COUT 75V
4
47mF 75V CABLE
pedance to drop significantly.
C1
2mF AD813 VOUT When the Disable pins are driven by complementary output
75V
VIN 11 CMOS logic (such as the 74HC04), the disable time is about
R2
12.4kV 80 ns (until the output goes high impedance) and the enable
time is about 100 ns (to low impedance output) on ± 15 V sup-
Figure 52. Biasing for Single Supply Operation plies. When operated on ± 15 V supplies, the disable pins
should be driven by open drain logic. In this case, pull-up resis-
tors from the disable pins to the plus supply will ensure mini-
PHASE SHIFT – Degrees

VS = 5V mum switching time.

G = +2 0
PHASE RF = 619V
0.5 RL = 150V –90 464V 590V
CLOSED-LOOP GAIN – dB

0 –180 +5V
–0.5 GAIN –270
6 4
–1.0 84V
7
–1.5 VIN1 5 1
–2.0
75V
–2.5

–3.0 SELECT1

464V 590V
–3.5
1 10 100 1000
FREQUENCY – MHz

Figure 53. Closed-Loop Gain and Phase vs. Frequency, 13

75V
84V CABLE
Circuit of Figure 52 14 VOUT

VIN2 12 2 75V

1V 50ns 75V

100
90 VIN SELECT2

464V 590V

9
84V
VOUT 8
10 11
VIN3 10
0% 3
75V –5V
500mV

SELECT3
Figure 54. Pulse Response for the Circuit of Figure 52 Figure 55. A Fast Switching 3:1 Video Mux
with +VS = 5 V (Supply Bypassing Not Shown)

REV. B –17–
AD813
3:1 Video Multiplexer
Wiring the amplifier outputs together will form a 3:1 mux with
outstanding gain flatness. Figure 55 shows a recommended
configuration which results in –0.1 dB bandwidth of 20 MHz
and OFF channel isolation of 60 dB at 10 MHz on ± 5 V sup-
plies. The time to switch between channels is about 180 ns.
Switching time is only slightly affected by signal level.
500mV
100
90
Single Supply Differential Line Driver
Due to its outstanding overall performance on low supply volt-
ages, the AD813 makes possible exceptional differential trans-
mission on very low power. The circuit of Figure 59 will convert
a single-ended, ground referenced signal to a differential signal
whose common-mode reference is set to one half the supply
voltage. This allows for a greater than 2 V peak-to-peak signal
swing on a single 3 V power supply. A bandwidth over 30 MHz
is achieved with 20 mA of output drive on only 30 mW of quies-
500ns
cent power (excluding load current).
715V 715V
VOUT+
1mF +3V
RL1

4
2 +3V

715V
10
0% 1kV
1mF 715V 715V
5V VIN
1mF
9kV
1
715V 715V

Figure 56. Channel Switching Characteristic for the

1mF 10kV
3:1 Mux

–10
3 VOUT–
–20
11 RL2
–30

–40
FEEDTHROUGH – dB

–50 715V 715V

–60
Figure 59. Single 3 V Supply Differential Line Driver
–70
with 2 V Swing
–80

–90
1V 50ns
–100
100 VIN
–110 90
100k 1M 10M 100M
FREQUENCY – Hz

Figure 57. 3:1 Mux OFF Channel Feedthrough vs.

Frequency

0 10 VOUT+ – VOUT–
PHASE SHIFT – Degrees

PHASE 0%
–45
1V
–90

0.5 –135

0 –180 Figure 60. Differential Driver Pulse Response (VS = 3 V,

CLOSED-LOOP GAIN – dB

–0.5
GAIN
RL1 = RL2 = 200 Ω)
–1.0

–1.5

–2.0

–2.5

–3.0
1 10 100
FREQUENCY – MHz

Figure 58. 3:1 Mux ON Channel Gain and Phase vs.

Frequency
–18– REV. B
 AD813
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).

14-Lead Plastic DIP

(N-14)

0.795 (20.19)

C1860b–0–5/98
0.725 (18.42)

14 8
0.280 (7.11)
0.240 (6.10)
1 7 0.325 (8.25)
0.300 (7.62) 0.195 (4.95)
PIN 1 0.060 (1.52) 0.115 (2.93)
0.015 (0.38)
0.210 (5.33)
MAX 0.130
0.160 (4.06) (3.30)
0.115 (2.93) MIN
0.015 (0.381)
0.022 (0.558) 0.100 0.070 (1.77) SEATING 0.008 (0.204)
0.014 (0.356) (2.54) 0.045 (1.15) PLANE
BSC

14-Lead SOIC
(R-14)

0.3444 (8.75)
0.3367 (8.55)

14 8
0.1574 (4.00) 0.2440 (6.20)
0.1497 (3.80) 1 7 0.2284 (5.80)

PIN 1 0.0688 (1.75) 0.0196 (0.50)

0.0098 (0.25) 0.0532 (1.35) x 45
0.0099 (0.25)
0.0040 (0.10)

8
0.0500 0.0192 (0.49) 0
SEATING (1.27) 0.0099 (0.25) 0.0500 (1.27)
PLANE BSC 0.0138 (0.35)
0.0075 (0.19) 0.0160 (0.41)

PRINTED IN U.S.A.

REV. B –19–