A B C D E

1 1

Compal Confidential
2
FH50Q MB Schematics Document 2

AMD Picasso Platform

www.laptoprepairsecrets.com
nVidia N17P-G1 & N18P-G0
3
LA-J621P REV:1.0 3

2019-11-26

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Shared with Compal Date: Monday, November 25, 2019 Sheet 1 of 100
A B C D E
 A B C D E

Compal Confidential
Model Name : FH50Q

(Channel A) page 23 (Channel B) page 24

1
260pin DDRIV SO-DIMM 260pin DDRIV SO-DIMM 1

GPU Memory BUS(DDR4)

GDDR5 x4 N18P-G0 1.2V DDRIV

PEG x8
or 2400Mhz
128-bits N17P-G1
AMD USB2.0

page 35~36 Port 3 Port 1 Port 2 Port 4 Port 0 Port 5

page 27~33

Display Port
Picasso
Port 1 Port 0 Type-C Type-A (CHG) Type-A Type-A Camera WLAN/BT
NGFF Conn.
Conn. Conn. Conn. (SUB) page 38
page 52
eDP Conn. HDMI Conn. page 73
page 38 page 40
page 42~43 page 71 page 72

2 2

USB3.0
Port 3 Port 1 Port 2
AMD FP5 APU
BGA 1140-balls
PCIE

Port 0, 1, 2, 3 Port 4 Port 5 page 6~12

SSD1 page 68~70 LAN WLAN/BT
HD Audio
NGFF Conn. RTL8118ASA
page 51 www.laptoprepairsecrets.com
NGFF Conn.
page 52

SPI SATA III

Transformer
LPC I2C Audio
RJ45page 51
ALC255
page 56
3 3

page 10
ENE
BIOS (8M, 1.8V) KBC9022
page 38 page 73
page 58
Port 0 Port 1
PS2 Port 3
Int. DMIC Int. Speaker UAJ
PTP HDD SSD2 page 68 on Camera Conn. page 56 on Sub/B
page 63 Conn. NGFF Conn.
page 67
page 63
Int.KBD
Fan Control
page 77

RTC CKT.
page 11

Power On/Off CKT.

page 63

4 4

DC/DC Interface CKT.

page 78 Sub Board

LS-J621P IO/B
Power Circuit DC/DC page 73
page 82~97 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

LS-H502 Hall Sensor/B BLOCK DIAGRAMS

VRAM Config Table page 66
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
page 29 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 2 of 100
A B C D E
 A B C D E

Voltage Rails
BOARD ID Table Board ID / SKU ID Table for AD channel
Power Plane Description S0 S3 S5
Adapter power supply (19V) ON ON ON
Board ID PCB Revision
+19V_VIN
ON ON ON
0 EVT
+19VB AC or battery power rail for power circuit.
+APU_CORE Core voltage for APU ON OFF OFF
1 PVT
+APU_CORE_SOC Core voltage for APU ON OFF OFF

+1.8VALW 1.8V always on power rail ON ON OFF

+1.8VS 1.8V switched power rail ON OFF OFF

1 1
+2.5V 2.5V power rail for APU and DDR ON ON OFF

+1.2V 1.2V power rail for APU and DDR ON ON OFF

+0.6VS 0.6V switched power rail for DDR terminator ON OFF OFF

+3VALW 3.3V always on power rail ON ON OFF

+3VS 3.3V switched power rail ON OFF OFF

+5VALW 5V always on power rail ON ON ON

OFF OFF
BOM Structure Table
+5VS 5V switched power rail ON
ON ON ON
BOM Structure BTO Item
+0.9VALW 0.9V always on power rail
ON OFF OFF
@ Unpop
+0.9VS 0.9V switched power rail
+RTC_APU ON ON ON
EMC@/@EMC@ EMI/ESD Pop/Unpop
RTC power
OFF
45@ HDMI Royalty
+3V_LAN 3.3V LAN IC power ON ON
ON ON OFF
CONN@ Mechanical Connector
+TP_VCC 3.3V Touch Pad power
+FP_VCC ON ON OFF
JP@ Jump
3.3V Finger Print power
RS@ R-Short
TP@ Test Point
LDO@/SWR@ RTL8118ASA Switching-Mode only
R5/R7APUQC@ APU PN Refer p.6

+3VSDGPU ON OFF OFF

R5/R7APU@ APU PN Refer p.6
2
VGA power 2

+1.8VSDGPU_AON ON OFF OFF

TMS@ Thermal Sensor
VGA power
ON OFF OFF
TMSIEC@ Thermal Sensor for IEC safety POWER SEQUENCE
+1.8VSDGPU_MAIN VGA power
OFF OFF
EVT@/PVT@/MP@ Test BOM for EVT/PVT/MP
+RTCBATT
+1.35VSDGPU VGA power ON G-A
+1.0VSDGPU ON OFF OFF
KBLED@/LED14P@ Keyboard back light / RGB back light
EC_ON
VGA power
+NVVDD1 VGA power ON OFF OFF +5VALW
3V_EN

G-B +3VALW
0.9_1.8VALW_PWREN
N17P@ N17P-G1

www.laptoprepairsecrets.com
N18P@
DIS@
VRAM4G@
N18P-G0
VGA Circuits
GDDR5*4 G-C
+1.8VALW/+0.9VALW

SYSON
+1.2V/+2.5V
SUSP#
+5VS/+3VS/+1.8VS/+0.6VS
GC6@/NGC6@ nVidia DGPU GC6 2.0
0.9VS_PWR_EN#
ON_X76@ OVRM-ON
+0.9VS
APU SMBus/I2C Address Table uPI_X76@ OVRM-uPI*
Address [7:0] VR_ON
3 3
Master Device Address[7:1]
Write Read +APU_CORE
G-D
+APU_CORE_SOC
I2C Port 0
(+1.8VS) EC SMBus Address Table
0000 1011b 0001 0110b 0001 0111b
I2C Port 1 Smart Battery 0Bh 16h 17h
(+1.8VS) SMBus Port 1
(+3VALW)
Charger IC 0000 1001b 0001 0010b 0001 0011b
I2C Port 2 (BQ24735) 09h 12h 13h
(+3VS)
APU Temp. 0100 1100b 1001 1000b 1001 1001b
0101 0000b 1010 0000b 1010 0001b (TSI) 4Ch 98h 99h
JDIMM1 50h A0h A1h
SBMus Port 0
(+3VS) SMBus Port 2 1001 1110b
0101 0001b 1010 0010b 1010 0011b (+3VS) GPU Temp. 9Eh
JDIMM2 51h A2h A3h
Thermal Sensor 1001 1010b 1001 1011b
PTP 0010 1100b 0101 1000b 0101 1001b G781-1 9Ah 9Bh
I2C Port 3 (Synaptics) 2Ch 58h 59h
(+3VALW)
PTP 0001 1111b 0011 1110b 0011 1111b Thermal Sensor 1001 0000b 1001 0001b
4 4
(ELAN) 15h 3Eh 3Fh IEC 62368-1 90h 91h

SMBus Port 1 SMBus Port 3 LED driver 1100 0000b 1100 0001b
(+3VALW) (+3VALW) C0h C1h

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTES LIST
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 3 of 100
A B C D E
 5 4 3 2 1

PJP101
AC-IN
APU Power Rail
24810mA +APU_CORE 70000mA +APU_CORE
+19V_VIN VDDCR_VDD @0.65-TBD
+19VB 5243mA
PU301 PU801
+APU_CORE_SOC 13000mA +APU_CORE_SOC VDDCR_SOC @0.72-TBD
Group C, S0 domain
+17.4V_BATT

D D

PJP201 250mA +3VS

DC-IN VDD_33 @0.25A
2000mA +1.8VS
VDD_18 @2.0A

Group B, S0 domain
4000mA +0.9VS 4000mA +0.9VS
U4 VDDP @4.0A
+1.2V 9500mA 6000mA +1.2V
638mA VDDIO_MEM_S3 @6.0A
PU501
+0.6VS 1200mA 250mA +3VALW
VDD_33_S5 @0.25A
2026mA +1.8VALW To VGA 1013mA 500mA +1.8VALW
PU602 VDD_18_S5 @0.5A
2660mA
+1.8VS 200mA +1.8VS Group B, S3 domain
UG27 VDDIO_AUDIO @0.2A
5000mA 2200mA
237mA +0.9VALW 1000mA +0.9VALW
PU601 VDDP_S5 @1.0A

+RTCVCC
+RTC_APU_R 0.045mA +RTC_APU_R
JRTC1 UC8 VDDBT_RTC_G @0.045mA Group A, S5 domain

DDR4 SO-DIMM1/SO-DIMM2
528mA +2.5V 528mA +2.5V
C PU502 +2.5V C

4160mA +1.2V
+1.2V
1500mA +0.6VS
+0.6VS
280mA

SATA Redriver*2 (M.2 & HDD)

2790mA +3VS_SSD1
M.2 PCIE SSD
2311mA
PU401 13347mA +3VALW UL1 300mA +3V_LAN

RL2 LAN RTL8118ASA

+3VLP

KB9022 www.laptoprepairsecrets.com U13

RM101
UM3
30mA

1500mA
+TP_VCC

+3VS_WLAN
Touch Pad

WLAN

1500mA +LCDVDD
UX1 Panel Logic

10mA To VGA M.2 SATA SSD

GPU Power Rail (N17P-G1/N18P-G0)
200mA +1.2V_HDMI
B U1302 HDMI Retimer B

+19VB 110000mA +NVVDD1

8330mA +3VS 200mA +3VS_CAM PUV1 NVVDD @110A
RX18 Camera
U2
3869mA 14700mA +5VALW +3VS_SSD1 200mA +5VS_BL
PU401 U2616
U3 KB Light
4200mA +5VS
250mA +5VALW_MUX
US14
Type C
3000mA +USB3_VCCC RTS5441E
US11

2000mA +USB3_VCCA
US12 USB3.0(Charger) +3VALW 1900mA +1.0VSDGPU
PU1002
PEX_DVDD @1.9A
2000mA +USB3_VCCB
US13 USB3.0
+3VS
U2
2500mA
JIO2 +1.8VALW +1.8VSDGPU_AON
USB/B UG27
PEX_HVDD @2A
1500mA +5VS_HDD
RO4
HDD +1.8VALW +1.8VSDGPU_MAIN
UV45
1000mA +VCC_FAN1
RF4/RF7 +VCC_FAN2
FAN1/FAN2 15000mA
+19VB +1.35VSDGPU FBVDDQ @15A
1500mA +5VS_PVDD PUW1
LA1
Audio
A A
100mA +FP_VCC 5160mA
UK6 +1.35VSDGPU
Finger Print VRAM x4pcs
100mA +TS_PWR
RX17
Touch Screen +3VSDGPU
OVRM
2000mA +INVPWR_B+
LX1
Panel BackLight
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
POWER MAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 4 of 100
5 4 3 2 1
 5 4 3 2 1

AMD Picasso Platform Power Sequence

AC-IN G3 --> S0 S0 --> S3 S3 --> S0

S0 --> S5
+3VLP +3VLP
ACIN 1.88ms ACIN
EC_ON 236.1us EC_ON
D D
+5VALW 1.855ms, Tr = 452.2us +5VALW
197.4ms
ON/OFFBTN# 233.5us ON/OFFBTN#
3V_EN 88.57ms 8.598s 3V_EN
+3VALW 588us, Tr = 761us 4.491ms, Tf = 4.266ms +3VALW

0.9_1.8VALW_PWREN 88.7ms 9.27ms 0.9_1.8VALW_PWREN

+1.8VALW 302us, Tr = 293us 3.955ms, Tf = 3.752ms +1.8VALW
+0.9VALW 696us, Tr = 453us 4.095ms, Tf = 3.908ms +0.9VALW
197.8ms

PBTN_OUT# 6.798ms 98.6ms

8.598s PBTN_OUT#
EC_RSMRST# 114.4ms 8.598s EC_RSMRST#
SLP_S5# 178us SLP_S5#
SLP_S3# 178us SLP_S3#
SYSON 119ms 64.4ms SYSON
+1.2V 562us, Tr = 169.6us 37.32ms, Tf = 36.98ms +1.2V
+2.5V 1.291ms, Tr = 1.468ms 12.14ms, Tf = 11.83ms +2.5V
SUSP# 19.76ms 56ms 14.6ms 51.69ms SUSP#
C C
+5VS 350.5us, Tr = 512.4us 13.05ms. Tf = 12.81ms 361.5us, Tr = 535.9us 13.68ms, Tf = 13.42ms +5VS
+3VS 363.2us, Tr = 492.6us 10.19ms, Tf = 9.948ms 364us, Tr = 481.6us 9.84ms, Tf = 9.577ms +3VS
+1.8VS 1.582ms, Tr = 1.783ms 10.92ms, Tf = 10.63ms 1.605ms, Tr = 1.786ms 11.85ms, Tf = 11.61ms +1.8VS
+0.6VS 1.59us, Tr = 17.02us 6.46ms, Tf = 6.148ms 4.9us, Tr = 13.75us 999.5us, Tf = 908.5us +0.6VS
KBRST# 22.58ms 53.72ms 20.98ms 59.66ms KBRST#
0.9VS_PWR_EN# 40.48ms 53.77ms 42.56ms 59.74ms 0.9VS_PWR_EN#
+0.9VS 249.3us, Tr = 105.3us 2.299ms, Tf = 2.254ms 245.5us, Tr = 102us 2.033ms, Tf = 1.993ms +0.9VS
VR_ON 19.32ms 83.36ms 19.31ms 89.04ms VR_ON
+APU_CORE
+APU_CORE_SOC
2.269ms, Tr = 320.4us

2.266ms, Tr = 333.1us
www.laptoprepairsecrets.com 397.6us, Tf = 354us

398.5us, Tf = 352us
2.267ms, Tr = 368us

2.256ms, Tr = 336.1us
394.8us, Tf = 342us

396.8us, Tf = 350us
+APU_CORE
+APU_CORE_NB

VGATE 2.626ms 16.51ms 2.624ms 17.19ms VGATE

SYS_PWRGD_EC 39.45ms 27.45ms 38.59ms 28.47ms SYS_PWRGD_EC
APU_PWROK 17.75ms 1.31ms 17.81ms 1.32ms APU_PWROK
LPC_RST# 13.15ms 4.83ms 13.31ms 4.832ms LPC_RST#
10ms

APU_PCIE_RST# 15.42ms 600ms

4.921ms 15.35ms 5.184ms
APU_PCIE_RST#
B B
APU_RST# 9.1ms 4.92ms 8.99ms APU_RST#

VGA Sequence VGA Sequence

PE_GPIO1(DGPU_PWR_EN) 267ms
443.7ms 202.1ms 1.89s
PE_GPIO1(DGPU_PWR_EN)
+1.8VSDGPU_AON 136.4us, Tr = 135.6us 33.17us, Tf = 9.152ms 136.7ms, Tr = 136.2us 33.17us, Tf = 9.152ms
+1.8VSDGPU_AON
1.8VSDGPU_MAIN_EN 139.2u 32.88ms 136.3us 32.46ms
1.8VSDGPU_MAIN_EN
+1.8VSDGPU_MAIN 874.8us, Tr = 519.6us 38.66ms, Tf = 42.75ms 882.4us, Tr = 512.3us 36.76ms, Tf = 40.89ms
+1.8VSDGPU_MAIN
NVVDD1_EN 1.659ms 5.13ms 1.762ms 4.976ms
NVVDD1_EN
+NVVDD1 42us, Tr = 426.3us 3.568ms, Tf = 5.214ms 6.173ms, Tr = 84.5us 3.679ms, Tf = 5.334ms
+NVVDD1
1us
1VSDGPU_EN 3.638ms 1us 3.653ms 1VSDGPU_EN
+1.0VSDGPU 1us, Tr = 555.2us 2.704ms, Tf = 2.544ms 1us, Tr = 553.4us 2.846ms, Tf = 2.727ms
+1.0VSDGPU
1.35VSDGPU_EN 3.255ms 9.956us 3.266ms 7.935us 1.35VSDGPU_EN
+1.35VSDGPU 155.3us, Tr = 96.61us 4.3ms, Tf = 3.816ms 87.5us, Tr = 91.72us 4.376ms, Tf = 3.927ms +1.35VSDGPU
PE_GPIO0(DGPU_HOLD_RST#) 10ms
171.2ms 1.121ms
10ms
115.3ms
1.21ms PE_GPIO0(DGPU_HOLD_RST#)
PLTRST_VGA#_1V8 1us 1us PLTRST_VGA#_1V8

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title
POWER SEQUENCE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 5 of 100
5 4 3 2 1
 5 4 3 2 1

Main Func = CPU

UC1B
PEG
PEG PCIE
D D

PEG_ARX_C_GTX_P0 CC401 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P0 P8 P_GFX_RXP0 P_GFX_TXP0 N1 PEG_ATX_GRX_P0 CC417 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P0
27 PEG_ARX_C_GTX_P0 PEG_ARX_C_GTX_N0 PEG_ATX_C_GRX_P0 27
27 PEG_ARX_C_GTX_N0 CC402 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N0 P9 P_GFX_RXN0 P_GFX_TXN0 N3 PEG_ATX_GRX_N0 CC418 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N0
PEG_ATX_C_GRX_N0 27
PEG_ARX_C_GTX_P1 CC403 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P1 N6 P_GFX_RXP1 P_GFX_TXP1 M2 PEG_ATX_GRX_P1 CC419 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P1
27 PEG_ARX_C_GTX_P1 PEG_ARX_C_GTX_N1 PEG_ATX_C_GRX_P1 27
27 PEG_ARX_C_GTX_N1 CC404 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N1 N7 P_GFX_RXN1 P_GFX_TXN1 M4 PEG_ATX_GRX_N1 CC420 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N1
PEG_ATX_C_GRX_N1 27
PEG_ARX_C_GTX_P2 CC405 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P2 M8 P_GFX_RXP2 P_GFX_TXP2 L2 PEG_ATX_GRX_P2 CC422 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P2
27 PEG_ARX_C_GTX_P2 PEG_ARX_C_GTX_N2 PEG_ATX_C_GRX_P2 27
27 PEG_ARX_C_GTX_N2 CC406 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N2 M9 P_GFX_RXN2 P_GFX_TXN2 L4 PEG_ATX_GRX_N2 CC421 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N2
PEG_ATX_C_GRX_N2 27
PEG_ARX_C_GTX_P3 CC407 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P3 L6 P_GFX_RXP3 P_GFX_TXP3 L1 PEG_ATX_GRX_P3 CC423 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P3
27 PEG_ARX_C_GTX_P3 PEG_ARX_C_GTX_N3 PEG_ATX_C_GRX_P3 27
27 PEG_ARX_C_GTX_N3 CC408 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N3 L7 P_GFX_RXN3 P_GFX_TXN3 L3 PEG_ATX_GRX_N3 CC424 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N3
PEG_ATX_C_GRX_N3 27
PEG_ARX_C_GTX_P4 CC409 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P4 K11 P_GFX_RXP4 P_GFX_TXP4 K2 PEG_ATX_GRX_P4 CC425 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P4
27 PEG_ARX_C_GTX_P4 PEG_ARX_C_GTX_N4 PEG_ATX_C_GRX_P4 27
27 PEG_ARX_C_GTX_N4 CC410 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N4 J11 P_GFX_RXN4 P_GFX_TXN4 K4 PEG_ATX_GRX_N4 CC426 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N4
PEG_ATX_C_GRX_N4 27
PEG_ARX_C_GTX_P5 CC411 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P5 H6 P_GFX_RXP5 P_GFX_TXP5 J2 PEG_ATX_GRX_P5 CC427 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P5
27 PEG_ARX_C_GTX_P5 PEG_ARX_C_GTX_N5 PEG_ATX_C_GRX_P5 27
27 PEG_ARX_C_GTX_N5 CC412 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N5 H7 P_GFX_RXN5 P_GFX_TXN5 J4 PEG_ATX_GRX_N5 CC428 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N5
PEG_ATX_C_GRX_N5 27
PEG_ARX_C_GTX_P6 CC413 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P6 G6 P_GFX_RXP6 P_GFX_TXP6 H1 PEG_ATX_GRX_P6 CC429 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P6
27 PEG_ARX_C_GTX_P6 PEG_ARX_C_GTX_N6 PEG_ARX_GTX_N6 PEG_ATX_GRX_N6 PEG_ATX_C_GRX_N6 PEG_ATX_C_GRX_P6 27
27 PEG_ARX_C_GTX_N6 CC414 DIS@ 1 2 0.22U_0201_6.3V6K F7 P_GFX_RXN6 P_GFX_TXN6 H3 CC430 DIS@ 1 2 0.22U_0201_6.3V6K
PEG_ATX_C_GRX_N6 27
PEG_ARX_C_GTX_P7 CC415 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_P7 G8 P_GFX_RXP7 P_GFX_TXP7 H2 PEG_ATX_GRX_P7 CC431 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_P7
27 PEG_ARX_C_GTX_P7 PEG_ARX_C_GTX_N7 PEG_ATX_C_GRX_P7 27
27 PEG_ARX_C_GTX_N7 CC416 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ARX_GTX_N7 F8 P_GFX_RXN7 P_GFX_TXN7 H4 PEG_ATX_GRX_N7 CC432 DIS@ 1 2 0.22U_0201_6.3V6K PEG_ATX_C_GRX_N7
PEG_ATX_C_GRX_N7 27

PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 CC1204 1 2 0.22U_0402_16V7K

68 PCIE_ARX_DTX_P0 PCIE_ARX_DTX_N0 PCIE_ATX_DRX_N0 PCIE_ATX_C_DRX_P0 68
C N9 P_GPP_RXN0 P_GPP_TXN0 P3 CC1203 1 2 0.22U_0402_16V7K C
68 PCIE_ARX_DTX_N0 PCIE_ATX_C_DRX_N0 68
PCIE_ARX_DTX_P1 L10 P_GPP_RXP1 P_GPP_TXP1 P4 PCIE_ATX_DRX_P1 CC1206 1 2 0.22U_0402_16V7K
68 PCIE_ARX_DTX_P1 PCIE_ARX_DTX_N1 PCIE_ATX_DRX_N1 PCIE_ATX_C_DRX_P1 68
L9 P_GPP_RXN1 P_GPP_TXN1 P2 CC1205 1 2 0.22U_0402_16V7K
68 PCIE_ARX_DTX_N1 PCIE_ATX_C_DRX_N1 68
M.2 SSD1 M.2 SSD1
PCIE_ARX_DTX_P2 L12 P_GPP_RXP2 P_GPP_TXP2 R3 PCIE_ATX_DRX_P2 CC1212 1 2 0.22U_0402_16V7K
68 PCIE_ARX_DTX_P2 PCIE_ARX_DTX_N2 PCIE_ATX_DRX_N2 PCIE_ATX_C_DRX_P2 68
M11 P_GPP_RXN2 P_GPP_TXN2 R1 CC1211 1 2 0.22U_0402_16V7K
68 PCIE_ARX_DTX_N2 PCIE_ATX_C_DRX_N2 68
PCIE_ARX_DTX_P3 P12 P_GPP_RXP3 P_GPP_TXP3 T4 PCIE_ATX_DRX_P3 CC1214 1 2 0.22U_0402_16V7K
68 PCIE_ARX_DTX_P3 PCIE_ARX_DTX_N3 PCIE_ATX_DRX_N3 PCIE_ATX_C_DRX_P3 68
P11 P_GPP_RXN3 P_GPP_TXN3 T2 CC1213 1 2 0.22U_0402_16V7K
68 PCIE_ARX_DTX_N3 PCIE_ATX_C_DRX_N3 68

PCIE_ARX_DTX_P4 V6 W2 PCIE_ATX_DRX_P4 CC1 1 2 .1U_0402_16V7K

www.laptoprepairsecrets.com
P_GPP_RXP4 P_GPP_TXP4
51 PCIE_ARX_DTX_P4 PCIE_ARX_DTX_N4 PCIE_ATX_DRX_N4 PCIE_ATX_C_DRX_P4 51
LAN V7 P_GPP_RXN4 P_GPP_TXN4 W4 CC2 1 2 .1U_0402_16V7K LAN
51 PCIE_ARX_DTX_N4 PCIE_ATX_C_DRX_N4 51
PCIE_ARX_DTX_P5 T8 P_GPP_RXP5 P_GPP_TXP5 W3 PCIE_ATX_DRX_P5 CC3 1 2 .1U_0402_16V7K
52 PCIE_ARX_DTX_P5 PCIE_ARX_DTX_N5 PCIE_ATX_DRX_N5 PCIE_ATX_C_DRX_P5 52
WLAN T9 P_GPP_RXN5 P_GPP_TXN5 V2 CC4 1 2 .1U_0402_16V7K WLAN
52 PCIE_ARX_DTX_N5 PCIE_ATX_C_DRX_N5 52
SATA_ARX_DTX_P0 R6 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 V1 SATA_ATX_DRX_P0
67 SATA_ARX_DTX_P0 SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 SATA_ATX_DRX_P0 67
HDD R7 P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0 V3 HDD
67 SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 67
SATA_ARX_DTX_P1 R9 P_GPP_RXP7/SATA_RXP1 P_GPP_TXP7/SATA_TXP1 U2 SATA_ATX_DRX_P1
69 SATA_ARX_DTX_P1 SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 SATA_ATX_DRX_P1 69
M.2 SSD2 R10 P_GPP_RXN7/SATA_RXN1 P_GPP_TXN7/SATA_TXN1 U4 M.2 SSD2
69 SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 69

FP5 REV 0.90

PART 2 OF 13

B FP5_BGA_1140P B
@

APU PN Table
APU Platform Customer PN Customer PN Customer PN Customer PN Compal PN Compal PN

UC1 R5APUQC@ UC1 R7APUQC@ UC1 R5APU@ UC1 R7APU@

Picasso

S IC RYZEN5 YM3500C4T4MFG 2.1G BGA APU S IC RYZEN7 YM3700C4T4MFG 2.3G BGA APU S IC RYZEN5 YM3500C4T4MFG 2.1G APU ABO! S IC RYZEN7 YM3700C4T4MFG 2.3G APU ABO!
SA0000CCR20 SA0000C7640 SA0000CCR60 SA0000C7680

PCB Number
A A
ZZZ EVT@
PCB 2W M LA-J621P REV0 MB 2
DA8001LZ000

ZZZ1 PVT@
PCB FH50Q LA-J621P LS-J621P/H502P
Security Classification Compal Secret Data Compal Electronics, Inc.
DAZ2W M00100 2019/07/24 2020/07/24 Title
Issued Date Deciphered Date
ZZZ2 MP@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP5_(1/7)_PEG/PCIE/SATA
PCB FH50Q LA-J621P LS-J621P/H502P AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DAZ2W M00100 Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 6 of 100
5 4 3 2 1
 5 4 3 2 1

Main Func = CPU

UC1A UC1I
MEMORY A
23 DDR_A_MA[13..0]
MEMORY B
DDR_A_MA0 DDR_A_DQ[63..0] 23 24 DDR_B_MA[13..0]
AF25 MA_ADD0
DDR_A_MA1 AE23 J21 DDR_A_DQ0 DDR_B_MA0 AG30 DDR_B_DQ[63..0] 24
MA_ADD1 MA_DATA0 MB_ADD0
DDR_A_MA2 AD27 H21 DDR_A_DQ1 DDR_B_MA1 AC32 B21 DDR_B_DQ0
MA_ADD2 MA_DATA1 MB_ADD1 MB_DATA0
DDR_A_MA3 AE21 MA_ADD3 MA_DATA2 F23 DDR_A_DQ2 DDR_B_MA2 AC30 MB_ADD2 MB_DATA1 D21 DDR_B_DQ1
DDR_A_MA4 AC24 H23 DDR_A_DQ3 DDR_B_MA3 AB29 B23 DDR_B_DQ2
MA_ADD4 MA_DATA3 MB_ADD3 MB_DATA2
DDR_A_MA5 AC26 G20 DDR_A_DQ4 DDR_B_MA4 AB31 D23 DDR_B_DQ3
MA_ADD5 MA_DATA4 MB_ADD4 MB_DATA3
DDR_A_MA6 AD21 F20 DDR_A_DQ5 DDR_B_MA5 AA30 A20 DDR_B_DQ4
MA_ADD6 MA_DATA5 MB_ADD5 MB_DATA4
DDR_A_MA7 AC27 MA_ADD7 MA_DATA6 J22 DDR_A_DQ6 DDR_B_MA6 AA29 MB_ADD6 MB_DATA5 C20 DDR_B_DQ5
D DDR_A_MA8 DDR_A_DQ7 DDR_B_MA7 DDR_B_DQ6 D
AD22 MA_ADD8 MA_DATA7 J23 Y30 MB_ADD7 MB_DATA6 A22
DDR_A_MA9 AC21 DDR_B_MA8 AA31 C22 DDR_B_DQ7
MA_ADD9 MB_ADD8 MB_DATA7
DDR_A_MA10 AF22 G25 DDR_A_DQ8 DDR_B_MA9 W29
MA_ADD10 MA_DATA8 MB_ADD9
DDR_A_MA11 AA24 F26 DDR_A_DQ9 DDR_B_MA10 AH29 D24 DDR_B_DQ8
MA_ADD11 MA_DATA9 MB_ADD10 MB_DATA8
DDR_A_MA12 AC23 MA_ADD12 MA_DATA10 L24 DDR_A_DQ10 DDR_B_MA11 Y32 MB_ADD11 MB_DATA9 A25 DDR_B_DQ9
DDR_A_MA13 AJ25 MA_ADD13_BANK2 MA_DATA11 L26 DDR_A_DQ11 DDR_B_MA12 W31 MB_ADD12 MB_DATA10 D27 DDR_B_DQ10
DDR_A_MA14_WE# AG27 L23 DDR_A_DQ12 DDR_B_MA13 AL30 C27 DDR_B_DQ11
MA_WE_L_ADD14 MA_DATA12 MB_ADD13_BANK2 MB_DATA11
23 DDR_A_MA14_WE# DDR_A_MA15_CAS# AG23 F25 DDR_A_DQ13 DDR_B_MA14_WE# AK30 C23 DDR_B_DQ12
MA_CAS_L_ADD15 MA_DATA13 MB_WE_L_ADD14 MB_DATA12
23 DDR_A_MA15_CAS# DDR_A_MA16_RAS# AG26 K25 DDR_A_DQ14 24 DDR_B_MA14_WE# DDR_B_MA15_CAS# AK32 B24 DDR_B_DQ13
MA_RAS_L_ADD16 MA_DATA14 MB_CAS_L_ADD15 MB_DATA13
23 DDR_A_MA16_RAS# DDR_A_DQ15 24 DDR_B_MA15_CAS# DDR_B_MA16_RAS# DDR_B_DQ14
MA_DATA15 K27 AJ30 MB_RAS_L_ADD16 MB_DATA14 C26
24 DDR_B_MA16_RAS# B27 DDR_B_DQ15
MB_DATA15
DDR_A_BA0 AF21 M25 DDR_A_DQ16
MA_BANK0 MA_DATA16
23 DDR_A_BA0 DDR_A_BA1 DDR_A_DQ17 DDR_B_BA0 DDR_B_DQ16
AF27 MA_BANK1 MA_DATA17 M27 AH31 MB_BANK0 MB_DATA16 C30
23 DDR_A_BA1 DDR_A_DQ18 24 DDR_B_BA0 DDR_B_BA1 DDR_B_DQ17
MA_DATA18 P27 AG32 MB_BANK1 MB_DATA17 E29
DDR_A_BG0 DDR_A_DQ19 24 DDR_B_BA1 DDR_B_DQ18
AA21 MA_BG0 MA_DATA19 R24 MB_DATA18 H29
23 DDR_A_BG0 DDR_A_BG1 AA27 L27 DDR_A_DQ20 DDR_B_BG0 V31 H31 DDR_B_DQ19
MA_BG1 MA_DATA20 MB_BG0 MB_DATA19
23 DDR_A_BG1 M24 DDR_A_DQ21 24 DDR_B_BG0 DDR_B_BG1 V29 A28 DDR_B_DQ20
MA_DATA21 MB_BG1 MB_DATA20
DDR_A_ACT# DDR_A_DQ22 24 DDR_B_BG1 DDR_B_DQ21
AA22 MA_ACT_L MA_DATA22 P24 MB_DATA21 D28
23 DDR_A_ACT# DDR_A_DQ23 DDR_B_ACT# DDR_B_DQ22
MA_DATA23 P25 V30 MB_ACT_L MB_DATA22 F31
23 DDR_A_DM[7..0] DDR_A_DM0 24 DDR_B_ACT# DDR_B_DQ23
F21 MA_DM0 MB_DATA23 G30
DDR_A_DM1 G27 M22 DDR_A_DQ24 24 DDR_B_DM[7..0] DDR_B_DM0 C21
MA_DM1 MA_DATA24 MB_DM0
DDR_A_DM2 N24 N21 DDR_A_DQ25 DDR_B_DM1 C25 J29 DDR_B_DQ24
MA_DM2 MA_DATA25 MB_DM1 MB_DATA24
DDR_A_DM3 N23 T22 DDR_A_DQ26 DDR_B_DM2 E32 J31 DDR_B_DQ25
MA_DM3 MA_DATA26 MB_DM2 MB_DATA25
DDR_A_DM4 AL24 V21 DDR_A_DQ27 DDR_B_DM3 K30 L29 DDR_B_DQ26
MA_DM4 MA_DATA27 MB_DM3 MB_DATA26
DDR_A_DM5 AN27 L21 DDR_A_DQ28 DDR_B_DM4 AP30 L31 DDR_B_DQ27
MA_DM5 MA_DATA28 MB_DM4 MB_DATA27
DDR_A_DM6 AW25 M20 DDR_A_DQ29 DDR_B_DM5 AW31 H30 DDR_B_DQ28
MA_DM6 MA_DATA29 MB_DM5 MB_DATA28
DDR_A_DM7 AT21 R23 DDR_A_DQ30 DDR_B_DM6 BB26 H32 DDR_B_DQ29
MA_DM7 MA_DATA30 MB_DM6 MB_DATA29
T27 T21 DDR_A_DQ31 DDR_B_DM7 BD22 L30 DDR_B_DQ30
RSVD_36 MA_DATA31 MB_DM7 MB_DATA30
N32 L32 DDR_B_DQ31
RSVD_21 MB_DATA31
DDR_A_DQS0 F22 AL27 DDR_A_DQ32
MA_DQS_H0 MA_DATA32
23 DDR_A_DQS0 DDR_A_DQS0# G22 AL25 DDR_A_DQ33 DDR_B_DQS0 D22 AP29 DDR_B_DQ32
MA_DQS_L0 MA_DATA33 MB_DQS_H0 MB_DATA32
23 DDR_A_DQS0# DDR_A_DQS1 DDR_A_DQ34 24 DDR_B_DQS0 DDR_B_DQS0# DDR_B_DQ33
H27 MA_DQS_H1 MA_DATA34 AP26 B22 MB_DQS_L0 MB_DATA33 AP32
23 DDR_A_DQS1 DDR_A_DQS1# DDR_A_DQ35 24 DDR_B_DQS0# DDR_B_DQS1 DDR_B_DQ34
H26 MA_DQS_L1 MA_DATA35 AR27 D25 MB_DQS_H1 MB_DATA34 AT29
23 DDR_A_DQS1# DDR_A_DQS2 DDR_A_DQ36 24 DDR_B_DQS1 DDR_B_DQS1# DDR_B_DQ35
N27 MA_DQS_H2 MA_DATA36 AK26 B25 MB_DQS_L1 MB_DATA35 AU32
23 DDR_A_DQS2 DDR_A_DQS2# DDR_A_DQ37 24 DDR_B_DQS1# DDR_B_DQS2 DDR_B_DQ36
N26 MA_DQS_L2 MA_DATA37 AK24 F29 MB_DQS_H2 MB_DATA36 AN30
C 23 DDR_A_DQS2# DDR_A_DQS3 R21 AM24 DDR_A_DQ38 24 DDR_B_DQS2 DDR_B_DQS2# F30 AP31 DDR_B_DQ37 C
MA_DQS_H3 MA_DATA38 MB_DQS_L2 MB_DATA37
23 DDR_A_DQS3 DDR_A_DQS3# DDR_A_DQ39 24 DDR_B_DQS2# DDR_B_DQS3 DDR_B_DQ38
P21 MA_DQS_L3 MA_DATA39 AP27 K31 MB_DQS_H3 MB_DATA38 AR30
23 DDR_A_DQS3# DDR_A_DQS4 24 DDR_B_DQS3 DDR_B_DQS3# DDR_B_DQ39
AM26 MA_DQS_H4 K29 MB_DQS_L3 MB_DATA39 AT31
23 DDR_A_DQS4 DDR_A_DQS4# DDR_A_DQ40 24 DDR_B_DQS3# DDR_B_DQS4
AM27 MA_DQS_L4 MA_DATA40 AM23 AR29 MB_DQS_H4
23 DDR_A_DQS4# DDR_A_DQS5 DDR_A_DQ41 24 DDR_B_DQS4 DDR_B_DQS4# DDR_B_DQ40
AN24 MA_DQS_H5 MA_DATA41 AM21 AR31 MB_DQS_L4 MB_DATA40 AU29
23 DDR_A_DQS5 DDR_A_DQS5# AN25 AR25 DDR_A_DQ42 24 DDR_B_DQS4# DDR_B_DQS5 AW30 AV30 DDR_B_DQ41
MA_DQS_L5 MA_DATA42 MB_DQS_H5 MB_DATA41
23 DDR_A_DQS5# DDR_A_DQS6 DDR_A_DQ43 24 DDR_B_DQS5 DDR_B_DQS5# DDR_B_DQ42
AU23 MA_DQS_H6 MA_DATA43 AU27 AW29 MB_DQS_L5 MB_DATA42 BB30
23 DDR_A_DQS6 DDR_A_DQS6# DDR_A_DQ44 24 DDR_B_DQS5# DDR_B_DQS6 DDR_B_DQ43
AT23 MA_DQS_L6 MA_DATA44 AL22 BC25 MB_DQS_H6 MB_DATA43 BA28
23 DDR_A_DQS6# DDR_A_DQS7 AV20 AL21 DDR_A_DQ45 24 DDR_B_DQS6 DDR_B_DQS6# BA25 AU30 DDR_B_DQ44
MA_DQS_H7 MA_DATA45 MB_DQS_L6 MB_DATA44
23 DDR_A_DQS7 DDR_A_DQS7# DDR_A_DQ46 24 DDR_B_DQS6# DDR_B_DQS7 DDR_B_DQ45
AW20 MA_DQS_L7 MA_DATA46 AP24 BC22 MB_DQS_H7 MB_DATA45 AU31
23 DDR_A_DQS7# DDR_A_DQ47 24 DDR_B_DQS7 DDR_B_DQS7# DDR_B_DQ46
V24 RSVD_41 MA_DATA47 AP23 BA22 MB_DQS_L7 MB_DATA46 AY32
24 DDR_B_DQS7# DDR_B_DQ47
V23 RSVD_40 N31 RSVD_20 MB_DATA47 AY29
AW26 DDR_A_DQ48 N29
MA_DATA48 RSVD_18
DDR_A_CLK0 AD25 AV25 DDR_A_DQ49 BA27 DDR_B_DQ48
MA_CLK_H0 MA_DATA49 MB_DATA48
23 DDR_A_CLK0 DDR_A_CLK0# DDR_A_DQ50 DDR_B_CLK0 DDR_B_DQ49
AD24 MA_CLK_L0 MA_DATA50 AV22 AC31 MB_CLK_H0 MB_DATA49 BC27
23 DDR_A_CLK0# DDR_A_CLK1 DDR_A_DQ51 24 DDR_B_CLK0 DDR_B_CLK0# DDR_B_DQ50
AE26 MA_CLK_H1 MA_DATA51 AW22 AD30 MB_CLK_L0 MB_DATA50 BA24
23 DDR_A_CLK1 DDR_A_CLK1# AE27 AU26 DDR_A_DQ52 24 DDR_B_CLK0# DDR_B_CLK1 AD29 BC24 DDR_B_DQ51

www.laptoprepairsecrets.com
MA_CLK_L1 MA_DATA52 MB_CLK_H1 MB_DATA51
23 DDR_A_CLK1# AV27 DDR_A_DQ53 24 DDR_B_CLK1 DDR_B_CLK1# AD31 BD28 DDR_B_DQ52
MA_DATA53 MB_CLK_L1 MB_DATA52
DDR_A_DQ54 24 DDR_B_CLK1# DDR_B_DQ53
MA_DATA54 AW23 AE30 MB_CLK_H2 MB_DATA53 BB27
MA_DATA55 AT22 DDR_A_DQ55 AE32 MB_CLK_L2 MB_DATA54 BB25 DDR_B_DQ54
AF29 BD25 DDR_B_DQ55
MB_CLK_H3 MB_DATA55
AW21 DDR_A_DQ56 AF31
MA_DATA56 MB_CLK_L3
DDR_A_CS0# AG21 AU21 DDR_A_DQ57 BC23 DDR_B_DQ56
MA_CS_L0 MA_DATA57 MB_DATA56
23 DDR_A_CS0# DDR_A_CS1# DDR_A_DQ58 DDR_B_CS0# DDR_B_DQ57
AJ27 MA_CS_L1 MA_DATA58 AP21 AJ31 MB0_CS_L0 MB_DATA57 BB22
23 DDR_A_CS1# DDR_A_DQ59 24 DDR_B_CS0# DDR_B_CS1# DDR_B_DQ58
MA_DATA59 AN20 AM31 MB0_CS_L1 MB_DATA58 BC21
DDR_A_DQ60 24 DDR_B_CS1# DDR_B_DQ59
MA_DATA60 AR22 AJ29 MB1_CS_L0 MB_DATA59 BD20
AN22 DDR_A_DQ61 AM29 BB23 DDR_B_DQ60
MA_DATA61 MB1_CS_L1 MB_DATA60
AT20 DDR_A_DQ62 BA23 DDR_B_DQ61
MA_DATA62 MB_DATA61
AR20 DDR_A_DQ63 BB21 DDR_B_DQ62
MA_DATA63 MB_DATA62
DDR_A_CKE0 Y23 BA21 DDR_B_DQ63
MA_CKE0 MB_DATA63
23 DDR_A_CKE0 DDR_A_CKE1 DDR_B_CKE0
Y26 MA_CKE1 RSVD_34 T24 U29 MB0_CKE0
23 DDR_A_CKE1 T25 24 DDR_B_CKE0 DDR_B_CKE1 T30 M31
RSVD_35 MB0_CKE1 RSVD_17
24 DDR_B_CKE1
RSVD_51 W25 V32 MB1_CKE0 RSVD_19 N30
RSVD_52 W27 U31 MB1_CKE1 RSVD_26 P31
DDR_A_ODT0 AG24 R26 R32
MA_ODT0 RSVD_27 RSVD_29
B
23 DDR_A_ODT0 DDR_A_ODT1 AJ22 R27 DDR_B_ODT0 AL31 M30 B
MA_ODT1 RSVD_28 MB0_ODT0 RSVD_16
23 DDR_A_ODT1 V27 24 DDR_B_ODT0 DDR_B_ODT1 AM32 M29
RSVD_43 MB0_ODT1 RSVD_15
24 DDR_B_ODT1
RSVD_42 V26 AL29 MB1_ODT0 RSVD_25 P30
AM30 MB1_ODT1 RSVD_24 P29
DDR_A_ALERT# AA25 MA_ALERT_L
23 DDR_A_ALERT# AF24 DDR_A_PAR DDR_B_ALERT# W30
MA_PAROUT MB_ALERT_L
DDR_A_EVENT# DDR_A_PAR 23 24 DDR_B_ALERT# DDR_B_PAR
AE24 MA_EVENT_L MB_PAROUT AG31
23 DDR_A_EVENT# DDR_A_RST# DDR_B_EVENT# DDR_B_PAR 24
Y24 MA_RESET_L AG29 MB_EVENT_L
23 DDR_A_RST# 24 DDR_B_EVENT# DDR_B_RST#
FP5 REV 0.90 T31 MB_RESET_L
24 DDR_B_RST#
PART 1 OF 13 FP5 REV 0.90
@ PART 9 OF 13
FP5_BGA_1140P @
FP5_BGA_1140P

EVENT# pull high

+1.2V

RC1 1 2 1K_0402_5% DDR_B_EVENT#

+1.2V

RC2 1 2 1K_0402_5% DDR_A_EVENT#

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP5_(2/7)_DDR4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 7 of 100
5 4 3 2 1
 A B C D E

Main Func = CPU

DISP
+1.8VALW
EC/THERM

5
UC1C UC66
+3VS 1

P
NC 4 ENBKL
DISPLAY/SVI2/JTAG/TEST
APU_SID APU_DP0_P0 ENBKL_R ENBKL_R Y ENBKL 58
RC105 1 2 1K_0402_5% C8 DP0_TXP0 DP_BLON G15 2
40 APU_DP0_P0 A

G
RC106 1 2 1K_0402_5% APU_ALERT# APU_DP0_N0 A8 IO18 F15 ENVDD_R
DP0_TXN0 DP_DIGON
1 2 APU_SIC 40 APU_DP0_N0 L14 INVTPWM_R
RC107 1K_0402_5% DP_VARY_BL NL17SZ07EDFT2G_SC70-5

3
RC108 1 2 1K_0402_5% APU_PROCHOT# APU_DP0_P1 D8 SA0000BIO00
DP0_TXP1
40 APU_DP0_P1 APU_DP0_N1
1
B8 DP0_TXN1 DP0_AUXP D9 APU_DP0_CTRL_CLK 1
40 APU_DP0_N1 B9 APU_DP0_CTRL_DATA APU_DP0_CTRL_CLK 40
HDMI APU_DP0_P2
DP0_AUXN
APU_DP0_HPD APU_DP0_CTRL_DATA 40 HDMI
B6 DP0_TXP2 DP0_HPD C10
40 APU_DP0_P2 APU_DP0_N2 C7 APU_DP0_HPD 40 +1.8VALW
DP0_TXN2
40 APU_DP0_N2 G11 EDP_AUXP
DP1_AUXP
APU_DP0_P3 EDP_AUXN EDP_AUXP 38
C6 DP0_TXP3 DP1_AUXN F11 EDP
40 APU_DP0_P3 EDP_AUXN 38

5
APU_DP0_N3 D6 G13 EDP_HPD
40 APU_DP0_N3 DP0_TXN3 DP3: DP1_HPD
EDP_HPD 38 1
UC64

P
38 EDP_TXP0
EDP_TXP0 E6 DP1_TXP0
DP2: DP2_AUXP J12 NC 4 ENVDD
ENVDD 38
EDP_TXN0 D5 H12 ENVDD_R 2 Y
38 EDP_TXN0 DP1_TXN0 DP1: eDP DP2_AUXN
A

G
DP2_HPD K13
EDP_TXP1 E1 DP1_TXP1
DP0: HDMI NL17SZ07EDFT2G_SC70-5
38 EDP_TXP1

3
EDP_TXN1 C1 J10 @ SA0000BIO00
DP1_TXN1 DP3_AUXP
38 EDP_TXN1
DP3_AUXN H10
EDP EDP_TXP2 F3 K8
DP1_TXP2 DP3_HPD
38 EDP_TXP2 EDP_TXN2 ENVDD_R
E4 DP1_TXN2 RC690 1 RS@ 2 0_0402_5% ENVDD
38 EDP_TXN2 K15 DP_STEREOSYNC
DP_STEREOSYNC
EDP_TXP3 F4 DP1_TXP3
38 EDP_TXP3 EDP_TXN3 F2 DP1_TXN3 RSVD_4 F14
38 EDP_TXN3 +1.8VALW
RSVD_3 F12
EC_SMB_CK2 RC616 1 2 0_0402_5% APU_SIC
27,40,58,66 EC_SMB_CK2 EC_SMB_DA2 1 2 0_0402_5% APU_SID F10
RC617 RSVD_2
27,40,58,66 EC_SMB_DA2

5
UC65
1

P
NC 4 INVTPWM
INVTPWM_R Y INVTPWM 38
2
A

G
NL17SZ07EDFT2G_SC70-5

3
SA0000BIO00

AP14 APU_TEST4 TP@

TEST4 T4949
AN14 APU_TEST5 TP@
TEST5 T4948 +3VS
TEST6 F13
ENBKL RC3 1 2 4.7K_0402_5%
G18 APU_TEST14
TEST14
2 H19 APU_TEST15 ENVDD RC4 1 @ 2 4.7K_0402_5% 2
TEST15
F18 APU_TEST16
TEST16
F19 APU_TEST17 INVTPWM RC5 1 2 4.7K_0402_5%
TEST17
+3VS
W24 APU_TEST31 TP@
TEST31 T4942
RC664 1 2 1K_0402_5% THERMTRIP#
AR11 APU_TEST41 TP@
TEST41 T4941 ENBKL_R RC6130 1 2 100K_0402_5%
APU_TDI AU2 TDI TEST470 AJ21 APU_TEST470 TP@
APU_PROCHOT# APU_TDO APU_TEST471 TP@ T4940 ENVDD_R
AU4 TDO TEST471 AK21 T4939 RC6131 1 2 100K_0402_5%
APU_RST# APU_TCK AU1 TCK
APU_PWROK APU_TMS AU3 IO18S5 INVTPWM_R RC6132 1 @ 2 100K_0402_5%
TMS
APU_TRST# AV3
1 1 1 APU_DBREQ#
TRST_L
@EMC@ EMC@ EMC@ AW3 DBREQ_L
CC1202 CC5 CC6 +0.9VS
.1U_0402_16V7K 33P_0402_50V8J

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33P_0402_50V8J
2 2 2 RC80 1 2 300_0402_5% APU_RST# AW4 V4 SMU_ZVDDP RC1682 1 2 196_0402_1%
+1.8VS RESET_L SMU_ZVDD
RC81 1 2 300_0402_5% APU_PWROK AW2 IO18 +3VALW
+1.8VS PWROK

88 APU_PWROK APU_SIC H14 SIC CORETYPE AW11 CORETYPE RC1681 1 @ 2 1K_0402_5%

APU_SID J14
Close to APU APU_ALERT#
SID
J15 ALERT_L
THERMTRIP# AP16 THERMTRIP_L IO33 VDDP_SENSE AN11 APU_VDDP_SEN_H
58 THERMTRIP# APU_PROCHOT# APU_CORESOC_SEN_H APU_VDDP_SEN_H 87
L19 PROCHOT_L VDDCR_SOC_SENSE J19
58,84,88 APU_PROCHOT# APU_CORESOC_SEN_H 88
VDDCR_SENSE K18 APU_CORE_SEN_H
APU_CORE_SEN_H 88 Leakage prevent from power side
SVID 88 APU_SVC
RC669 1
RC670 1
2 0_0402_5% APU_SVC_R
2 0_0402_5% APU_SVD_R
F16
H16
SVC0
SVD0 IO18 VSS_SENSE_A J18 APU_VSS_SEN_L
88 APU_SVD APU_SVT_R APU_VSS_SEN_L 88
J16 SVT0 FP5 REV 0.90 VSS_SENSE_B AM11 APU_VDDP_SEN_L
+1.8VS 88 APU_SVT_R PART 3 OF 13
APU_VDDP_SEN_L 87

@ FP5_BGA_1140P

RC109 1 @ 2 1K_0402_5% APU_SVT_R

3 RC110 1 @ 2 1K_0402_5% APU_SVC 3
RC111 1 @ 2 1K_0402_5% APU_SVD

HDT+ TESTPOINT
+1.8VS

+1.8VALW DP_STEREOSYNC RC155 1 2 1K_0402_5%

+1.8VALW
JHDT1 CONN@ RC154 1 @ 2 1K_0402_5%
1 2 APU_TCK APU_TCK RH34 1 2 1K_0402_5%
1 2 APU_TMS RH35 1 2 1K_0402_5%
3 4 APU_TMS APU_TDI RH36 1 2 1K_0402_5%
3 4 APU_DBREQ# RH37 1 2 1K_0402_5%
5 6 APU_TDI
5 6
7 8 APU_TDO
7 8 +1.8VS
APU_TRST# RH21 1 2 33_0402_5% APU_TRST#_R 9 10 APU_PWROK APU_TRST# RH26 1 2 1K_0402_5%
9 10
RH38 2 1 10K_0402_5% HDT_P11 11 12 APU_RST#
2 11 12 APU_TEST14
CH2 RC112 2 @ 1 10K_0402_5%
0.01U_0402_16V7K RH39 2 1 10K_0402_5% HDT_P13 13 14 APU_TEST15 RC113 2 @ 1 10K_0402_5%
13 14 APU_TEST16 RC114 2 @ 1 10K_0402_5%
1 RH40 2 1 10K_0402_5% HDT_P15 15 16 APU_DBREQ#_R RH33 1 2 33_0402_5% APU_DBREQ# APU_TEST17 RC115 2 @ 1 10K_0402_5%
15 16
4 4
17 18
17 18
19 20 Follow C5V08
19 20

SAMTE_ASP-136446-07-B

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
(3/7)_DISP/MISC/HDT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 8 of 100
A B C D E
 A B C D E

Main Func = CPU

+1.8VALW

UC1D I2C_0_SCL RC6139 1 @ 2 2.2K_0402_5%

I2C_0_SDA RC6140 1 @ 2 2.2K_0402_5%
ACPI/AUDIO/I2C/GPIO/MISC
CC7 1 2 150P_0402_50V8J
@ CC100 1 2 150P_0402_50V8J AW12 I2C_1_SCL RC6176 1 @ 2 2.2K_0402_5%
EGPIO41/SFI_S5_EGPIO41
AU12 I2C_1_SDA RC6177 1 @ 2 2.2K_0402_5%
AGPIO39/SFI_S5_AGPIO39
APU_PCIE_RST#_C RC29 1 2 33_0402_5% APU_PCIE_RST#_R BD5 PCIE_RST0_L/EGPIO26
1 APU_PCIE1_RST#_C RC704 1 @ 2 33_0402_5% APU_PCIE1_RST#_R BB6 SW PU/PD SW PU/PD AR13 I2C_0_SCL 1
PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151
EC_RSMRST# AT16 SW PU/PD1.8V_S5 AT13 I2C_0_SDA
RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152
58 EC_RSMRST# +3VS
PBTN_OUT# AR15 SW PU/PD AN8 I2C_1_SCL
PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149
58 PBTN_OUT# SYS_PWRGD_EC I2C_1_SDA SMB_0_SCL
AV6 PWR_GOOD SW PU/PD1.8V_S5 I2C1_SDA/SFI1_I2C_SDA/EGPIO150 AN9 RC6157 1 2 2.2K_0402_5%
58 SYS_PWRGD_EC SYS_RST# SMB_0_SDA
AP10 SYS_RESET_L/AGPIO1 RC6156 1 2 2.2K_0402_5%
APU_PCIE_WAKE# AV11 SW PU/PD BC20 SMB_0_SCL
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0
SMB_0_SDA SMB_0_SCL 23,24
SW PU/PD 3.3V I2C2_SDA/EGPIO114/SDA0 BA20 DDR4
SLP_S3# SMB_0_SDA 23,24 +3VALW
AV13 SLP_S3_L
58 SLP_S3# SLP_S5# I2C_3_SCL
AT14 SLP_S5_L SW PU/PD I2C3_SCL/AGPIO19/SCL1 AM9
58 SLP_S5# I2C_3_SDA I2C_3_SCL 63 I2C_3_SCL
3.3V_S5 I2C3_SDA/AGPIO20/SDA1 AM10 Touch Pad RC6159 1 2 2.2K_0402_5%
I2C_3_SDA 63 I2C_3_SDA
AGPIO10 AR8 S0A3_GPIO/AGPIO10 RC6158 1 2 2.2K_0402_5%
PSA_I2C_SCL L16
AGPIO23 AT10 AC_PRES/AGPIO23 PSA_I2C_SDA M16
AGPIO12 AN6 LLB_L/AGPIO12 SW PU/PD
+3VS
AGPIO3 AT15 AGPIO3
AW8 AW10 AGPIO4
ACPI EGPIO42 AGPIO4/SATAE_IFDET

AGPIO5/DEVSLP0 AP9 AGPIO5

DEVSLP1 RC663 2 @ 1 10K_0402_5%
AGPIO5 27
AGPIO6/DEVSLP1 AU10 DEVSLP1
+3VALW PANEL_OD# DEVSLP1 68
SATA_ACT_L/AGPIO130 AV15
PANEL_OD# 38
AGPIO9 AU7 AGPIO9
RC6133 1 @ 2 10K_0402_5% APU_PCIE_WAKE# SW PU/PD3.3VALW input AU6 AGPIO40
AGPIO40
AGPIO40 68
3.3VS input AGPIO69 AW13
3.3VS input AGPIO86 AW15
HDA_BIT_CLK AR2 AZ_BITCLK/TDM_BCLK_MIC
HDA_SDIN0 AP7 AZ_SDIN0/CODEC_GPI
56 HDA_SDIN0 HDA_SDIN1 AP1 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU14
Reserve for MBDG/CRB HDA_SDIN2 AP4 3.3VS Output AU16 APU_SPKR
AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK SPKR/AGPIO91
HDA_RST# APU_SPKR 56
CRB use S0-rail AP3 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AV8 AGPIO11
+1.8VALW CC1210 HDA_SYNC AR4 AZ_SYNC/TDM_FRM_MIC
10U_0402_6.3V6M HDA_SDOUT AR3 3.3VS input AW16
AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89
+3VALW +3VS 1 2 3.3VS input BD15 TP_I2C_INT#_APU
GENINT2_L/AGPIO90
TP_I2C_INT#_APU 63
@ AT2 SW_MCLK/TDM_BCLK_BT
AT4 SW_DATA0/TDM_DOUT_BT
1

AGPIO7 AR6 AGPIO7/FCH_ACP_I2S_SDIN_BT 3.3VS input FANIN0/AGPIO84 AR18

RC6165 RC28 RC54 AP6 AGPIO8/FCH_ACP_I2S_LRCLK_BT 3.3VS input FANOUT0/AGPIO85 AT18
@ 10K_0402_1% 10K_0402_1% 22K_0402_1% FP5 REV 0.90
PART 4 OF 13
2

2 2
@ FP5_BGA_1140P
SYS_PWRGD_EC EC_RSMRST#

2 1
CC8
0.22U_0402_16V7K CC16
1U_0201_6.3V6M
1 2
AGPIO40 AGPIO9 AGPIO12 AGPIO23
DIS
H RSV Type1 RSV RSV

L RSV RSV DMIC x2 RSV

APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5% APU_PCIE_RST#_U

APU_PCIE1_RST#_C RC701 1 @ 2 0_0402_5%

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+3VALW

APU_PCIE_RST#_U RC30 1 RS@ 2 0_0402_5% APU_PCIE_RST#

1
@ @ @
RC693 RC6147 RC6135 RC6175
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
+3VALW CC14

2
0.1U_0201_10V6K
1 2 AGPIO40
@ AGPIO9
AGPIO12
5

AGPIO23
APU_PCIE_RST#_U 1
P

IN1 4 APU_PCIE_RST#
O APU_PCIE_RST# 27,51,52,68

1
2
IN2
G

@ @ @
UC4 SA0000BIP00 RC692 RC6148 RC6136 RC6174
3
2

@ MC74VHC1G08EDFT2G_SC70-5 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

3 RC6160 3

2
10K_0402_5% @
GPIO Table
1

AGPIO10 AGPIO11

AGPIO5 AGPIO7 AGPIO3 AGPIO4

HDA Strap Pin

APU_SPI_CLK_R SYS_RST#

USE 48MHZ CRYSTAL NORMAL RESET MODE

H CLOCK (Default)
HDA_RST# (Default)
RC116 1 EMC@ 2 33_0402_5%
56 HDA_RST#_R HDA_BIT_CLK
RC117 1 EMC@ 2 33_0402_5%
56 HDA_BIT_CLK_R HDA_SYNC +3VALW +3VALW +3VALW
RC118 1 EMC@ 2 33_0402_5% USE 100MHZ PCIE SHORT RESET MODE
56 HDA_SYNC_R
RC119 1 EMC@ 2 33_0402_5% HDA_SDOUT L CLOCK AS
56 HDA_SDOUT_R REFERENCE CLOCK

1
@ @ @ @ @ @
RC120 1 2 1K_0402_5% RC6145 RC6137 RC6170 RC6168 RC619 RC6172
RC121 1 2 1K_0402_5% +1.8VS +1.8VALW +3VALW 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
RC122 1 2 1K_0402_5%

2
RC123 1 2 1K_0402_5%
AGPIO5 AGPIO3 AGPIO10
1

AGPIO7 AGPIO4 AGPIO11

RC622 RC47 RC951
4 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 4
1

1
RC695 1 @ 2 10K_0402_5% HDA_SDIN1 @ @ @ @ @ @
2

RC696 1 @ 2 10K_0402_5% HDA_SDIN2 RC6146 RC6138 RC6171 RC6169 RC6134 RC6173

RC703 1 @ 2 10K_0402_5% HDA_SDIN0 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
APU_SPI_CLK_R
10 APU_SPI_CLK_R
2

2
SYS_RST#
1

RC1703 RC929
2K_0402_5% @ 2K_0402_5% @
Security Classification Compal Secret Data Compal Electronics, Inc.
2

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP5_(4/7)_GPIO/HDA/STRAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 9 of 100
A B C D E
 A B C D E

Main Func = CPU

RC602
33_0402_5%
LPC_RST_A# 1 2
LPC_RST# 58

UC1E CC615
150P_0402_50V8J
CLK/LPC/EMMC/SD/SPI/eSPI/UART
2

+3VS CLKREQ_PCIE#0 AV18 +3VALW

M.2 SSD1 68 CLKREQ_PCIE#0 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
AN19 CLK_REQ1_L/AGPIO115
CLKREQ_PCIE#2 AP19
M.2 WLAN 52 CLKREQ_PCIE#2 CLKREQ_PCIE#3
CLK_REQ2_L/AGPIO116
AT19
CLKREQ_PCIE#0 LAN 51 CLKREQ_PCIE#3 CLKREQ_PEG#4
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
EC_SCI#
RC1695 1 2 10K_0402_5% AU19 CLK_REQ4_L/OSCIN/EGPIO132 RC6154 2 1 10K_0402_5%
DGPU 27 CLKREQ_PEG#4
AW18 SW PU/PD
CLK_REQ5_L/EGPIO120
RC6149 1 2 10K_0402_5% CLKREQ_PCIE#2 AW19 CLK_REQ6_L/EGPIO121
1 RC1696 1 2 10K_0402_5% CLKREQ_PEG#4 1
RC1697 1 2 10K_0402_5% CLKREQ_PCIE#3 BD13 GC6_FB_EN RC6182 1 GC6@ 2 0_0402_5% GC6_FB_EN3V3
EGPIO70/SD_CLK GC6_FB_EN3V3 27
SW PU/PD LPC_PD_L/SD_CMD/AGPIO21 BB14 LPCPD# TP@ T103
CLK_PCIE_P0 AK1 BB12 LPC_AD0 RC101 1 2 10_0402_5%
GPP_CLK0P LAD0/SD_DATA0/EGPIO104
68 CLK_PCIE_P0 CLK_PCIE_N0 LPC_AD1 LPC_AD0_R 58 +3VS
M.2 SSD1 AK3 GPP_CLK0N M.2 WLAN/BT LAD1/SD_DATA1/EGPIO105 BC11 RC102 1 2 10_0402_5%
68 CLK_PCIE_N0 LPC_AD2 LPC_AD1_R 58
LAD2/SD_DATA2/EGPIO106 BB15 RC103 1 2 10_0402_5%
LPC_AD3 LPC_AD2_R 58
AM2 GPP_CLK1P LAD3/SD_DATA3/EGPIO107 BC15 RC104 1 2 10_0402_5%
LPC_CLK0 LPC_AD3_R 58
AM4 GPP_CLK1N GBE LAN SW PU/PD LPCCLK0/EGPIO74 BA15 RC449 1 2 22_0402_5%
LPC_CLK0_EC 58 ESPI_ALERT_L
BC13 RC6181 2 1 10K_0402_5%
48MHz CRYSTAL WLAN
52 CLK_PCIE_P2
CLK_PCIE_P2
CLK_PCIE_N2
AM1
AM3
GPP_CLK2P
GPP_CLK2N M.2 WWAN
SW PU/PD
LPC_CLKRUN_L/AGPIO88
LPCCLK1/EGPIO75
SERIRQ/AGPIO87
BB13
BC12
LPC_CLK1
SERIRQ
52 CLK_PCIE_N2 LPC_FRAME# SERIRQ 58 PE_GPIO1
SW PU/PD LFRAME_L/EGPIO109 BA12 RC6166 2 @ 1 10K_0402_5%
CLK_PCIE_P3 LPC_FRAME# 58
AL2 GPP_CLK3P
51 CLK_PCIE_P3 CLK_PCIE_N3 LPC_RST_A#
LAN AL4 GPP_CLK3N M.2 WLAN LPC_RST_L/SD_WP_L/AGPIO32 BD11 RC6183 2 @ 1 10K_0402_5%
48M_X2 51 CLK_PCIE_N3
AGPIO68/SD_CD BA11
CLK_PEG_P4 AN2 SW PU/PD LPC_PME_L/SD_PWR_CTRL/AGPIO22 BA13 EC_SCI#
48M_X1 27 CLK_PEG_P4 CLK_PEG_N4
GPP_CLK4P EC_SCI# 58
1 RC939 2 DGPU AN4 GPP_CLK4N PCIE X4 DT SLOT
27 CLK_PEG_N4 LPC_CLK1
1M_0402_5% RC6180 2 @ 1 10K_0402_5%
AN3 GPP_CLK5P
AP2 GPP_CLK5N M.2 PCIE SSD SPI_ROM_REQ/EGPIO67 BC8
2 1 SPI_ROM_GNT/AGPIO76 BB8
2 1 AJ2 GPP_CLK6P
AJ4 GPP_CLK6N EVAL GFX SLOT ESPI_RESET_L/KBRST_L/AGPIO129 BB11 KBRST# KBRST# 58
BC6 ESPI_ALERT_L
ESPI_ALERT_L/LDRQ0_L/EGPIO108
AJ3 48M_OSC
YC2 BB7 APU_SPI_CLK RC74 1 EMC@ 2 10_0402_5%
SPI_CLK/ESPI_CLK
APU_SPI_MISO APU_SPI_CLK_R 9
48MHZ_8PF_7V48000010 SPI_DI/ESPI_DATA BA9
SJ10000JP00 48M_X1 BB3 BB10 APU_SPI_MOSI
X48M_X1 SPI_DO
BA10 APU_SPI_WP#
SPI_WP_L/ESPI_DAT2
BC10 APU_SPI_HOLD#
SPI_HOLD_L/ESPI_DAT3
3 4 BC9 APU_SPI_CS#1 +SPI_VCC
1
3 4
1
48M_X2 BA5 X48M_X2 SW PU/PD
SPI_CS1_L/EGPIO118
SPI_CS2_L/ESPI_CS_L/AGPIO30
SPI_CS3_L/AGPIO31
BA8
BA6
8MB SPI ROM
C796 C797 BD8 APU_SPI_TPMCS# APU_SPI_MISO RC1706 1 @ 2 10K_0402_5%
SPI_TPM_CS_L/AGPIO29
3.9P_0402_50V8C 3.9P_0402_50V8C
2 2 AF8 APU_SPI_WP# RC640 1 2 10K_0402_5%
RSVD_76
AF9 BA16 UART_0_ARXD_DTXD
RSVD_77 UART0_RXD/EGPIO136
UART_0_ATXD_DRXD UART_0_ARXD_DTXD 52 APU_SPI_HOLD# RC642
UART0_TXD/EGPIO138 BB18 1 2 10K_0402_5%
UART_0_ATXD_DRXD 52
UART0_RTS_L/UART2_RXD/EGPIO137 BC17
BA18 APU_SPI_CS#1 RC639 1 2 10K_0402_5%
UART0_CTS_L/UART2_TXD/EGPIO135
T115 TP@ RTCCLK AW14 RTCCLK UART0_INTR/AGPIO139 BD18
APU_SPI_TPMCS# RC646 1 @ 2 10K_0402_5%
2 2

32.768KHz CRYSTAL 32K_X1 AY1 X32K_X1 EGPIO141/UART1_RXD

EGPIO143/UART1_TXD
BC18
BA17
PE_GPIO1
NVVDD1_PG PE_GPIO1 27
GPU_EVENT# NVVDD1_PG 91
EGPIO142/UART1_RTS_L/UART3_RXD BC16
PE_GPIO0 GPU_EVENT# 27
EGPIO140/UART1_CTS_L/UART3_TXD BB19
32K_X2 PE_GPIO0 27
AY4 X32K_X2 AGPIO144/UART1_INTR BB16
32K_X1 +1.8VALW +SPI_VCC
FP5 REV 0.90
1

PART 5 OF 13 RC1672
SJ10000PW00 YC3 0_0603_5%
32.768KHZ_9PF_X1A000141000200 FP5_BGA_1140P
1 RS@ 2
2

2 1 32K_X2 @
RC914
20M_0402_5%
1 1
CC682
CC686 10P_0402_50V8J
12P_0402_50V8J

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2 2 UC7
APU_SPI_CS#1 1 8 +SPI_VCC
APU_SPI_MISO 2 CS# VCC 7 APU_SPI_HOLD#
APU_SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 APU_SPI_CLK_R
4 WP#(IO2) CLK 5 APU_SPI_MOSI
GND DI(IO0)
2
GD25LB64CSIGR_SOIC_8P @
SA00008K400 CC635

USB Function 1
0.1U_0201_10V6K

@EMC@
APU_SPI_CLK_R 1 @EMC@2 1 2

RC680 CC636
10_0402_5% 10P_0402_50V8J
+1.8VALW
+SPI_VCC

JC1
RC94 1 2 4.7K_0402_5% APU_USBC_SCL APU_SPI_CS#1 1 8
UC1J APU_SPI_WP# CS# VCC APU_SPI_CLK_R
3 3 6 3
RC95 1 2 4.7K_0402_5% APU_USBC_SDA APU_SPI_HOLD# 7 WP# SCLK 5 APU_SPI_MOSI
4 HOLD# SI/SIO0 2 APU_SPI_MISO
USB
GND SO/SIO1
USB20_P0 AE7 AD2 ACES_91960-0084N_MX25L3206EM2I
USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2
38 USB20_P0 USB20_N0
CAMERA AE6 USB_0_DM0 USBC0_A3/USB_0_TXN0/DP3_TXN2 AD4 CONN@
38 USB20_N0 Port 0
USB20_P1 AG10 AC2
USB_0_DP1 USBC0_B11/USB_0_RXP0/DP3_TXP3
71 USB20_P1 USB20_N1
Type-A MB CHG AG9 USB_0_DM1 USBC0_B10/USB_0_RXN0/DP3_TXN3 AC4
71 USB20_N1 Controller 0
USB20_P2 AF12 AF4
USB_0_DP2 USBC0_B2/DP3_TXP1
72 USB20_P2 USB20_N2
Type-A MB AF11 USB_0_DM2 USBC0_B3/DP3_TXN1 AF2
72 USB20_N2
USB20_P3 AE10 AE3
USB_0_DP3 USBC0_A11/DP3_TXP0
43 USB20_P3 USB20_N3
Type-C MB AE9 USB_0_DM3 USBC0_A10/DP3_TXN0 AE1
43 USB20_N3
USB20_P4 AJ12 AG3 USB3_ATX_DRX_P1
USB_1_DP0 USB_0_TXP1
73 USB20_P4 USB20_N4 USB3_ATX_DRX_N1 USB3_ATX_DRX_P1 71
Type-A SUB AJ11 USB_1_DM0 Port 1 USB_0_TXN1 AG1
73 USB20_N4 Controller 1 USB3_ATX_DRX_N1 71
USB20_P5 USB3_ARX_DTX_P1 Type-A MB CHG
AD9 USB_1_DP1 USB_0_RXP1 AJ9 USB3_ARX_DTX_P1 71
52 USB20_P5 USB20_N5 USB3_ARX_DTX_N1
USB Hub AD8 USB_1_DM1 USB_0_RXN1 AJ8 USB3_ARX_DTX_N1 71
52 USB20_N5
AG4 USB3_ATX_DRX_P2
USB_0_TXP2
USB3_ATX_DRX_N2 USB3_ATX_DRX_P2 72
Port 2 USB_0_TXN2 AG2
USB3_ATX_DRX_N2 72
USB3_ARX_DTX_P2 Type-A MB
USB_0_RXP2 AG7
APU_USBC_SCL USB3_ARX_DTX_N2 USB3_ARX_DTX_P2 72
AM6 USBC_I2C_SCL USB_0_RXN2 AG6
USB3_ARX_DTX_N2 72
APU_USBC_SDA AM7 AA2 USB3_ATX_DRX_P3
USBC_I2C_SDA USBC1_A2/USB_0_TXP3/DP2_TXP2
USB3_ATX_DRX_N3 USB3_ATX_DRX_P3 42
Port 3 USBC1_A3/USB_0_TXN3/DP2_TXN2 AA4
USB3_ATX_DRX_N3 42
USB3_ARX_DTX_P3 Type-C MB
USBC1_B11/USB_0_RXP3/DP2_TXP3 Y1
USB3_ARX_DTX_N3 USB3_ARX_DTX_P3 42
USBC1_B10/USB_0_RXN3/DP2_TXN3 Y3 USB3_ARX_DTX_N3 42

USBC1_B2/DP2_TXP1 AC1
USBC1_B3/DP2_TXN1 AC3
AK10 USB_OC0_L/AGPIO16
AK9 USB_OC1_L/AGPIO17 USBC1_A11/DP2_TXP0 AB2
AL9 USB_OC2_L/AGPIO18 USBC1_A10/DP2_TXN0 AB4
AL8 USB_OC3_L/AGPIO24
AW7 AGPIO14/USB_OC4_L USB_1_TXP0 AH4
AT12 AGPIO13/USB_OC5_L SW PU/PD Port 4 USB_1_TXN0 AH2
4 4
USB_1_RXP0 AK7
USB_1_RXN0 AK6
FP5 REV 0.90
PART 10 OF 13

FP5_BGA_1140P
@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP5_(5/7)_CLK/USB/SPI/LPC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 10 of 100
A B C D E
 A B C D E

Main Func = CPU

UC1F

TDC: 10A POWER TDC: 53A

EDC: 13A M15 VDDCR_SOC_1 VDDCR_1 G7 EDC: 70A
+APU_CORE_SOC +APU_CORE
M18 VDDCR_SOC_2 VDDCR_2 G10
M19 VDDCR_SOC_3 VDDCR_3 G12
SCL/MBDG: N16 VDDCR_SOC_4 VDDCR_4 G14
7*22uF (BU) N18 VDDCR_SOC_5 VDDCR_5 H8
1*1uF (BU) N20 H11
1*180pF (BU) VDDCR_SOC_6 VDDCR_6
P17 VDDCR_SOC_7 VDDCR_7 H15
1
P19 VDDCR_SOC_8 VDDCR_8 K7 1
R18 VDDCR_SOC_9 VDDCR_9 K12
R20 VDDCR_SOC_10 VDDCR_10 K14
T19 VDDCR_SOC_11 VDDCR_11 L8
U18 VDDCR_SOC_12 VDDCR_12 M7
U20 M10 SCL/MBDG:
+APU_CORE_SOC Cap V19
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_13
VDDCR_14 N14 16*22uF (BU)
1*180pF (BU)
place at Power Side W18
W20
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_15

VDDCR_16
P7
P10
Y19 VDDCR_SOC_17 VDDCR_17 P13
VDDCR_18 P15
+1.2V TDC: 6A T32 VDDIO_MEM_S3_1 VDDCR_19 R8
V28 VDDIO_MEM_S3_2 VDDCR_20 R14
W28 VDDIO_MEM_S3_3 VDDCR_21 R16
W32 T7
Y22
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDCR_22
VDDCR_23 T10 +APU_CORE Cap place at Power Side
Y25 VDDIO_MEM_S3_6 VDDCR_24 T13
Y28 VDDIO_MEM_S3_7 VDDCR_25 T15
AA20 VDDIO_MEM_S3_8 VDDCR_26 T17
AA23 VDDIO_MEM_S3_9 VDDCR_27 U14
SCL/MBDG: AA26 VDDIO_MEM_S3_10 VDDCR_28 U16
9*22uF (BU) AA28 VDDIO_MEM_S3_11 VDDCR_29 V13
+1.2V +1.2V 2*1uF (BU) AA32 V15
4*0.22uF VDDIO_MEM_S3_12 VDDCR_30
1*180pF (BU) AC20 VDDIO_MEM_S3_13 VDDCR_31 V17
2*180pF AC22 VDDIO_MEM_S3_14 VDDCR_32 W7
AC25 VDDIO_MEM_S3_15 VDDCR_33 W10
CC1008 22U_0603_6.3V6M

CC1057 22U_0603_6.3V6M

CC1058 22U_0603_6.3V6M

CC1059 22U_0603_6.3V6M

CC1060 22U_0603_6.3V6M

CC1061 22U_0603_6.3V6M

CC1062 22U_0603_6.3V6M

CC1063 22U_0603_6.3V6M

CC1163 22U_0603_6.3V6M

CC1165 1U_0201_6.3V6M

CC1164 1U_0201_6.3V6M

CC1093 180P_0402_50V8J

CC1082 0.22U_0402_16V7K

CC1081 0.22U_0402_16V7K

CC1079 0.22U_0402_16V7K

CC1078 0.22U_0402_16V7K

CC1167 180P_0402_50V8J

CC1166 180P_0402_50V8J
AC28 VDDIO_MEM_S3_16 VDDCR_34 W14
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AD23 VDDIO_MEM_S3_17 VDDCR_35 W16
AD26 VDDIO_MEM_S3_18 VDDCR_36 Y8
AD28 VDDIO_MEM_S3_19 VDDCR_37 Y13
AD32 VDDIO_MEM_S3_20 VDDCR_38 Y15
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 AE20 VDDIO_MEM_S3_21 VDDCR_39 Y17
AE22 VDDIO_MEM_S3_22 VDDCR_40 AA7
AE25 VDDIO_MEM_S3_23 VDDCR_41 AA10
AE28 VDDIO_MEM_S3_24 VDDCR_42 AA14
AF23 VDDIO_MEM_S3_25 VDDCR_43 AA16
2 AF26 AA18 2
VDDIO_MEM_S3_26 VDDCR_44
AF28 VDDIO_MEM_S3_27 VDDCR_45 AB13
AF32 VDDIO_MEM_S3_28 VDDCR_46 AB15
AG20 VDDIO_MEM_S3_29 VDDCR_47 AB17
AG22 VDDIO_MEM_S3_30 VDDCR_48 AB19
AG25 AC14
All BU(on bottom side under SOC) ACROSS VDDIO AND VSS SPLIT AG28
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDCR_49
VDDCR_50 AC16
AJ20 VDDIO_MEM_S3_33 VDDCR_51 AC18
AJ23 VDDIO_MEM_S3_34 VDDCR_52 AD7
AJ26 VDDIO_MEM_S3_35 VDDCR_53 AD10
SCL/MBDG: SCL/MBDG: AJ28 VDDIO_MEM_S3_36 VDDCR_54 AD13
1 *22uF (BO) 1 *22uF (BO) AJ32 VDDIO_MEM_S3_37 VDDCR_55 AD15
+1.8VS +VDDIO_AUDIO 1*1uF (BU) +3VS +3VS_APU 2*1uF (BO+BU) AK28 AD17
VDDIO_MEM_S3_38 VDDCR_56
RC1677 RC1676 AL28 VDDIO_MEM_S3_39 VDDCR_57 AD19
0_0402_5% 0_0402_5% AL32 VDDIO_MEM_S3_40 VDDCR_58 AE8
1 RS@ 2 1 RS@ 2 TDC :0.2A VDDCR_59 AE14
+VDDIO_AUDIO AP12 AE16

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VDDIO_AUDIO VDDCR_60
CC1207

CC1192

CC1137

CC1208

CC1209

VDDCR_61 AE18
1 1 1 1 1 TDC :0.25A AL18 VDD_33_1 VDDCR_62 AF7
+3VS_APU
AM17 VDD_33_2 VDDCR_63 AF10
VDDCR_64 AF13
22U_0603_6.3V6M

1U_0201_6.3V6M

22U_0603_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

+1.8VS TDC :2A AL20 VDD_18_1 VDDCR_65 AF15

2 2 2 2 2 AM19 VDD_18_2 VDDCR_66 AF17
VDDCR_67 AF19
+1.8VALW TDC :0.5A AL19 VDD_18_S5_1 VDDCR_68 AG14
AM18 VDD_18_S5_2 VDDCR_69 AG16
VDDCR_70 AG18
TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
+3VALW
AM16 VDD_33_S5_2 VDDCR_72 AH15
AH17
BO BU BO BO BU TDC :1A AL14 VDDP_S5_1
VDDCR_73
VDDCR_74 AH19
+0.9VALW
AL15 VDDP_S5_2 VDDCR_75 AJ7
AM14 VDDP_S5_3 VDDCR_76 AJ10
VDDCR_77 AJ14
+0.9VS
TDC :4A AL13 VDDP_1 VDDCR_78 AJ16
3 SCL/MBDG: SCL/MBDG: SCL/MBDG: AM12 VDDP_2 VDDCR_79 AJ18 3
+1.8VS 1 *22uF (BO) +1.8VALW 1 *22uF (BO) +3VALW 1 *22uF (BO) AM13 VDDP_3 VDDCR_80 AK13
2*1uF (BO+BU) 2*1uF (BO+BU) 2*1uF (BO+BU) AN12 AK15
VDDP_4 VDDCR_81
AN13 VDDP_5 VDDCR_82 AK17
TDC :4.5uA VDDCR_83 AK19
+RTC_APU_R +RTCBATT
CC1189 22U_0603_6.3V6M

CC1190 1U_0201_6.3V6M

CC1191 1U_0201_6.3V6M

CC1186 22U_0603_6.3V6M

CC1187 1U_0201_6.3V6M

CC1188 1U_0201_6.3V6M

CC1183 22U_0603_6.3V6M

CC1184 1U_0201_6.3V6M

CC1185 1U_0201_6.3V6M

AT11 VDDBT_RTC_G
1 1 1 1 1 1 1 1 1
FP5 REV 0.90
PART 6 OF 13 JRTC1
FP5_BGA_1140P 1
2 2 2 2 2 2 2 2 2 2 1
@ 2
3
4 GND
GND

RTC OF APU ACES_50271-0020N-001

CONN@
BO BO BU BO BO BU BO BO BU
SP02000RO00
+RTC_APU_R +RTC_APU +RTCVCC +RTCBATT

Vo=1.5V
RC6161
close to UC1 RC6164 UC8 SA000066U00 DC1 1K_0402_5% +CHGRTC
SCL/MBDG: SCL/MBDG: W=20mils 1K_0402_5% AP2138N-1.5TRG1_SOT23-3 3 1 2
+0.9VS 2 *22uF (BO) +0.9VALW 1 *22uF (BO) 1 2 3
8*1uF (BOx4+BUx4) 3*1uF (BOx1+BUx2) Vout 1 1
1*180pF (BU) Vin
2
GND
1

1 1 1 2
CC1168

CC1169

CC1170

CC1171

CC1172

CC1177

CC1176

CC1173

CC1174

CC1175

CC1178

CC1179

CC1180

CC1181

CC1182

1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CC166 CC923 CLRP1 @ CC119 CC120
0.22U_0402_16V7K 1U_0201_6.3V6M 0_0603_5% 0.1U_0201_10V6K 680P_0402_50V7K CHN202UPT_SC70-3
2 2 2
2

2
22U_0603_6.3V6M

22U_0603_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

180P_0402_50V8J

22U_0603_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

4 4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

Need OPEN
for Clear CMOS
BO BOx4 BUx4 BU BO BO BU
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title
(6/7)_PWR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 11 of 100
A B C D E
 5 4 3 2 1

Main Func = CPU UC1G

UC1H UC1K

GND
N12 VSS_316 VSS_62 K32 GND
A3 VSS_1 VSS_63 L5 V8 VSS_124 VSS_186 AG8 GND/RSVD
A5 VSS_2 VSS_64 L13 V11 VSS_125 VSS_187 AG11 AR5 VSS_248 VSS_310 BD16
A7 VSS_3 VSS_65 L15 V12 VSS_126 VSS_188 AG12 AR7 VSS_249 VSS_311 BD19
A10 VSS_4 VSS_66 L18 V14 VSS_127 VSS_189 AG13 AR12 VSS_250 VSS_312 BD21
A12 VSS_5 VSS_67 L20 V16 VSS_128 VSS_190 AG15 AR14 VSS_251 VSS_313 BD23
A14 VSS_6 VSS_68 L25 V18 VSS_129 VSS_191 AG17 AR16 VSS_252 VSS_314 BD26
A16 VSS_7 VSS_69 L28 V20 VSS_130 VSS_192 AG19 AR19 VSS_253 VSS_315 BD30
D A19 VSS_8 VSS_70 M1 V22 VSS_131 VSS_193 AH14 AR21 VSS_254 D
A21 VSS_9 VSS_71 M5 V25 VSS_132 VSS_194 AH16 AR26 VSS_255
A23 VSS_10 VSS_72 M12 W1 VSS_133 VSS_195 AH18 AR28 VSS_256
A26 VSS_11 VSS_73 M21 W5 VSS_134 VSS_196 AH20 AR32 VSS_257
A30 VSS_12 VSS_74 M23 W13 VSS_135 VSS_197 AJ1 AU5 VSS_258
C3 VSS_13 VSS_75 M26 W15 VSS_136 VSS_198 AJ5 AU8 VSS_259
C32 VSS_14 VSS_76 M28 W17 VSS_137 VSS_199 AJ13 AU11 VSS_260
D16 VSS_15 VSS_77 M32 W19 VSS_138 VSS_200 AJ15 AU13 VSS_261
D18 VSS_16 VSS_78 N4 W23 VSS_139 VSS_201 AJ17 AU15 VSS_262
D20 VSS_17 VSS_79 N5 W26 VSS_140 VSS_202 AJ19 AU18 VSS_263
E7 VSS_18 VSS_80 N8 Y5 VSS_141 VSS_203 AK5 AU20 VSS_264
E8 VSS_19 VSS_81 N11 Y11 VSS_142 VSS_204 AK8 AU22 VSS_265
E10 VSS_20 VSS_82 N13 Y12 VSS_143 VSS_205 AK11 AU25 VSS_266 RSVD_1 B20
E11 VSS_21 VSS_83 N15 Y14 VSS_144 VSS_206 AK12 AU28 VSS_267 RSVD_5 G3
E12 VSS_22 VSS_84 N17 Y16 VSS_145 VSS_207 AK14 AV1 VSS_268 RSVD_7 J20
E13 VSS_23 VSS_85 N19 Y18 VSS_146 VSS_208 AK16 AV5 VSS_269 RSVD_8 K3
E14 VSS_24 VSS_86 N22 Y20 VSS_147 VSS_209 AK18 AV7 VSS_270 RSVD_9 K6
E15 VSS_25 VSS_87 N25 AA1 VSS_148 VSS_210 AK20 AV10 VSS_271 RSVD_10 K20
E16 VSS_26 VSS_88 N28 AA5 VSS_149 VSS_211 AK22 AV12 VSS_272 RSVD_11 M3
E18 VSS_27 VSS_89 P1 AA13 VSS_150 VSS_212 AK25 AV14 VSS_273 RSVD_12 M6
E19 VSS_28 VSS_90 P5 AA15 VSS_151 VSS_213 AL1 AV16 VSS_274 RSVD_13 M13
E20 VSS_29 VSS_91 P14 AA17 VSS_152 VSS_214 AL5 AV19 VSS_275 RSVD_22 P6
E21 VSS_30 VSS_92 P16 AA19 VSS_153 VSS_215 AL7 AV21 VSS_276 RSVD_23 P22
E22 VSS_31 VSS_93 P18 AB14 VSS_154 VSS_216 AL10 AV23 VSS_277 RSVD_30 T3
E23 VSS_32 VSS_94 P20 AB16 VSS_155 VSS_217 AL12 AV26 VSS_278 RSVD_31 T6
E25 VSS_33 VSS_95 P23 AB18 VSS_156 VSS_218 AL16 AV28 VSS_279 RSVD_37 T29
E26 VSS_34 VSS_96 P26 AB20 VSS_157 VSS_219 AL23 AV32 VSS_280 RSVD_44 W6
E27 VSS_35 VSS_97 P28 AC5 VSS_158 VSS_220 AL26 AW5 VSS_281 RSVD_49 W21
F5 VSS_36 VSS_98 P32 AC8 VSS_159 VSS_221 AM5 AW28 VSS_282 RSVD_50 W22
C F28 VSS_37 VSS_99 R5 AC11 VSS_160 VSS_222 AM8 AY6 VSS_283 RSVD_57 Y21 C
G1 VSS_38 VSS_100 R11 AC12 VSS_161 VSS_223 AM15 AY7 VSS_284 RSVD_58 Y27
G5 VSS_39 VSS_101 R12 AC13 VSS_162 VSS_224 AM20 AY8 VSS_285 RSVD_59 AA3
G16 VSS_40 VSS_102 R13 AC15 VSS_163 VSS_225 AM22 AY10 VSS_286 RSVD_60 AA6
G19 VSS_41 VSS_103 R15 AC17 VSS_164 VSS_226 AM25 AY11 VSS_287 RSVD_69 AC29
G21 VSS_42 VSS_104 R17 AC19 VSS_165 VSS_227 AM28 AY12 VSS_288 RSVD_70 AD3
G23 VSS_43 VSS_105 R19 AD1 VSS_166 VSS_228 AN1 AY13 VSS_289 RSVD_71 AD6
G26 VSS_44 VSS_106 R22 AD5 VSS_167 VSS_229 AN5 AY14 VSS_290 RSVD_74 AF3
G28 VSS_45 VSS_107 R25 AD14 VSS_168 VSS_230 AN7 AY15 VSS_291 RSVD_75 AF6
G32 VSS_46 VSS_108 R28 AD16 VSS_169 VSS_231 AN10 AY16 VSS_292 RSVD_78 AF30
H5 VSS_47 VSS_109 R30 AD18 VSS_170 VSS_232 AN15 AY18 VSS_293 RSVD_79 AJ6
H13 VSS_48 VSS_110 T1 AD20 VSS_171 VSS_233 AN18 AY19 VSS_294 RSVD_80 AJ24
H18 VSS_49 VSS_111 T5 AE5 VSS_172 VSS_234 AN21 AY20 VSS_295 RSVD_81 AK23
H20 T14 AE11 AN23 AY21 AK27

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VSS_50 VSS_112 VSS_173 VSS_235 VSS_296 RSVD_82
H22 VSS_51 VSS_113 T16 AE12 VSS_174 VSS_236 AN26 AY22 VSS_297 RSVD_83 AL3
H25 VSS_52 VSS_114 T18 AE13 VSS_175 VSS_237 AN28 AY23 VSS_298 RSVD_87 AN29
H28 VSS_53 VSS_115 T20 AE15 VSS_176 VSS_238 AN32 AY25 VSS_299 RSVD_88 AN31
K1 VSS_54 VSS_116 T23 AE17 VSS_177 VSS_239 AP5 AY26 VSS_300
K5 VSS_55 VSS_117 T26 AE19 VSS_178 VSS_240 AP8 AY27 VSS_301
K16 VSS_56 VSS_118 T28 AF1 VSS_179 VSS_241 AP13 BB1 VSS_302
K19 VSS_57 VSS_119 U13 AF5 VSS_180 VSS_242 AP15 BB20 VSS_303
K21 VSS_58 VSS_120 U15 AF14 VSS_181 VSS_243 AP18 BB32 VSS_304 RSVD_14 M14
K22 VSS_59 VSS_121 U17 AF16 VSS_182 VSS_244 AP20 BD3 VSS_305 RSVD_84 AL6
K26 VSS_60 VSS_122 U19 AF18 VSS_183 VSS_245 AP25 BD7 VSS_306 RSVD_85 AL11
K28 VSS_61 VSS_123 V5 AF20 VSS_184 VSS_246 AP28 BD10 VSS_307 RSVD_86 AN16
FP5 REV 0.90 AG5 VSS_185 VSS_247 AR1 BD12 VSS_308
PART 7 OF 13 FP5 REV 0.90 BD14 VSS_309
PART 8 OF 13 FP5 REV 0.90
FP5_BGA_1140P
PART 11 OF 13
B @ FP5_BGA_1140P B
@ FP5_BGA_1140P
@

UC1M UC1L

CAMERAS RSVD
T11 RSVD_32 RSVD_62 AA9
A18 CAM0_CSI2_CLOCKP CAM0_CLK B15 RSVD_61 AA8
C18 CAM0_CSI2_CLOCKN AC7 RSVD_66 RSVD_65 AC6
CAM0_I2C_SCL D15
A15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA C14
C15 CAM0_CSI2_DATAN0 Y9 RSVD_55
CAM0_SHUTDOWN B13 Y10 RSVD_56 RSVD_72 AD11
B16 CAM0_CSI2_DATAP1
C16 CAM0_CSI2_DATAN1 W11 RSVD_47 RSVD_67 AC9
W12 RSVD_48 RSVD_63 AA11
C19 CAM0_CSI2_DATAP2
B18 CAM0_CSI2_DATAN2 V9 RSVD_38 RSVD_33 T12
V10 RSVD_39 RSVD_73 AD12
B17 CAM0_CSI2_DATAP3
D17 CAM0_CSI2_DATAN3 RSVD_53 Y6
RSVD_54 Y7
D12 CAM1_CSI2_CLOCKP CAM1_CLK B10
B12 CAM1_CSI2_CLOCKN AA12 RSVD_64 RSVD_45 W8
CAM1_I2C_SCL A11 AC10 RSVD_68 RSVD_46 W9
C13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA C11
A13 CAM1_CSI2_DATAN0
A A
CAM1_SHUTDOWN D11 FP5 REV 0.90
B11 CAM1_CSI2_DATAP1 PART 12 OF 13
C12 CAM1_CSI2_DATAN1 CAM_PRIV_LED D13 FP5_BGA_1140P
CAM_IR_ILLU D10
J13 FP5 REV 0.90
@
RSVD_6
PART 13 OF 13
Security Classification Compal Secret Data Compal Electronics, Inc.
FP5_BGA_1140P Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP5_(7/7)_GND/RSVD/CSI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 12 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 13 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 14 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 15 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 16 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 17 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 18 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 19 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 20 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 21 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 22 of 100
5 4 3 2 1
 A B C D E

Reverse Type-4H
2-3A to 1 DIMMs/channel

JDIMM1A
DDR_A_CLK0 REVERSE DDR_A_DQ0 DDR_A_DQ[7..0] 7
137 8
7 DDR_A_CLK0 DDR_A_CLK0# CK0(T) DQ0 DDR_A_DQ1
139 7
7 DDR_A_CLK0# DDR_A_CLK1 138 CK0#(C) DQ1 20 DDR_A_DQ2 +1.2V +1.2V
7 DDR_A_CLK1 DDR_A_CLK1# 140 CK1(T) DQ2 21 DDR_A_DQ3 JDIMM1B

1
Address : A0 7

7
DDR_A_CLK1#

DDR_A_CKE0
DDR_A_CKE0
DDR_A_CKE1
109
110
CK1#(C)

CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
Follow CRB design
111
112
REVERSE

VDD1 VDD11
141
142
1
7 DDR_A_CKE1 CKE1 DQ6 17 DDR_A_DQ7 117 VDD2 VDD12 147
+3VS DDR_A_CS0# 149 DQ7 13 DDR_A_DQS0 +1.2V 118 VDD3 VDD13 148
7 DDR_A_CS0# DDR_A_CS1# 157 S0# DQS0(T) 11 DDR_A_DQS0# DDR_A_DQS0 7 123 VDD4 VDD14 153
7 DDR_A_CS1# S1# DQS0#(C) DDR_A_DQS0# 7 VDD5 VDD15
162 124 154
S2#/C0 DDR_A_DQ[15..8] 7 VDD6 VDD16

2
165 28 DDR_A_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1

29 DDR_A_DQ9 RD3 130 160

DDR_A_ODT0 DQ9 DDR_A_DQ10 +3VS VDD8 VDD18 +0.6VS
0_0402_5%
RD5

0_0402_5%
RD6

0_0402_5%
RD7

155 41 1K_0402_1% 135 163

7 DDR_A_ODT0 DDR_A_ODT1 161 ODT0 DQ10 42 DDR_A_DQ11 +VREFA_CA 136 VDD9 VDD19
7 DDR_A_ODT1 ODT1 DQ11 DDR_A_DQ12 VDD10 +2.5V
24

1
@ @ @ DDR_A_BG0 115 DQ12 25 DDR_A_DQ13 255 258
7 DDR_A_BG0
2

DDR_A_BG1 113 BG0 DQ13 38 DDR_A_DQ14 VDDSPD VTT

7 DDR_A_BG1 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_DQ15 15mil 164 257
DDR_A_SA2 7 DDR_A_BA0 DDR_A_BA1 BA0 DQ15 DDR_A_DQS1 VREFCA VPP1
145 34 259
DDR_A_SA1 7 DDR_A_BA1 BA1 DQS1(T) DDR_A_DQS1# DDR_A_DQS1 7 VPP2

CD20 4.7U_0402_6.3V6M

CD22 0.1U_0201_10V6K

CD21 0.1U_0201_10V6K

CD19 1000P_0402_50V7K
32
DDR_A_SA0 7 DDR_A_MA[13..0] DDR_A_MA0 DQS1#(C) DDR_A_DQS1# 7

CD31 1U_0201_6.3V6M
144 1 99
A0 DDR_A_DQ[23..16] 7 VSS VSS

2
DDR_A_MA1 133 50 DDR_A_DQ16 2 102
A1 DQ16 1 2 2 1 VSS VSS
1

DDR_A_MA2 132 49 DDR_A_DQ17 RD4 5 103

DDR_A_MA3 A2 DQ17 DDR_A_DQ18 VSS VSS 1
RS@
0_0402_5%
RD8

RS@
0_0402_5%
RD9

RS@
0_0402_5%
RD10

131 62 1K_0402_1% 6 106

DDR_A_MA4 128 A3 DQ18 63 DDR_A_DQ19 9 VSS VSS 107
DDR_A_MA5 126 A4 DQ19 46 DDR_A_DQ20 2 1 1 2 10 VSS VSS 167

1
DDR_A_MA6 127 A5 DQ20 45 DDR_A_DQ21 14 VSS VSS 168 2
2

DDR_A_MA7 122 A6 DQ21 58 DDR_A_DQ22 15 VSS VSS 171

CD1 @EMC@ DDR_A_MA8 125 A7 DQ22 59 DDR_A_DQ23 18 VSS VSS 172
.1U_0402_16V7K DDR_A_MA9 121 A8 DQ23 55 DDR_A_DQS2 19 VSS VSS 175
2 1 DDR_A_RST# DDR_A_MA10 A9 DQS2(T) DDR_A_DQS2# DDR_A_DQS2 7 VSS VSS
146 53 22 176
DDR_A_MA11 A10_AP DQS2#(C) DDR_A_DQS2# 7 VSS VSS
120 23 180
DDR_A_MA12 A11 DDR_A_DQ24 DDR_A_DQ[31..24] 7 VSS VSS
119 70 26 181 CRB use 1uF x1
DDR_A_MA13 158 A12 DQ24 71 DDR_A_DQ25 27 VSS VSS 184
DDR_A_MA14_WE# 151 A13 DQ25 83 DDR_A_DQ26 30 VSS VSS 185
Note:
7
7
DDR_A_MA14_WE#
DDR_A_MA15_CAS#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_A_DQ27
DDR_A_DQ28
Place near to SO-DIMM connector. 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of 7 DDR_A_MA16_RAS# A16_RAS# DQ28 67 DDR_A_DQ29 36 VSS VSS 192
Place near JDIMM1 VREF_DQ at the DIMM socket DDR_A_ACT# 114 DQ29 79 DDR_A_DQ30 39 VSS VSS 193
7 DDR_A_ACT# ACT# DQ30 DDR_A_DQ31 VSS VSS
80 40 196
2 DDR4 support Even Parity check in DRAMs. DDR_A_PAR 143 DQ31 76 DDR_A_DQS3 43 VSS VSS 197 2
7 DDR_A_PAR DDR_A_ALERT# PARITY DQS3(T) DDR_A_DQS3# DDR_A_DQS3 7 VSS VSS
116 74 44 201
7 DDR_A_ALERT# DDR_A_EVENT# ALERT# DQS3#(C) DDR_A_DQS3# 7 VSS VSS
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 134 47 202
7 DDR_A_EVENT# DDR_A_RST# EVENT# DDR_A_DQ32 DDR_A_DQ[39..32] 7 VSS VSS
108 174 48 205
+1.2V 7 DDR_A_RST# RESET# DQ32 DDR_A_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_A_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_A_DQ35 56 VSS VSS 210
9,24 SMB_0_SDA SMB_0_SCL SDA DQ35 DDR_A_DQ36 VSS VSS
253 170 57 213
9,24 SMB_0_SCL SCL DQ36 DDR_A_DQ37 VSS VSS
1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

169 60 214
DDR_A_SA2 166 DQ37 183 DDR_A_DQ38 61 VSS VSS 217
1 1 1 1 1 1 DDR_A_SA1 SA2 DQ38 DDR_A_DQ39 VSS VSS
CD2

CD3

CD4

CD5

CD6

CD7

260 182 64 218

DDR_A_SA0 256 SA1 DQ39 179 DDR_A_DQS4 65 VSS VSS 222
SA0 DQS4(T) DDR_A_DQS4# DDR_A_DQS4 7 VSS VSS
177 68 223
2 2 2 2 2 2 DQS4#(C) DDR_A_DQS4# 7 VSS VSS
69 226
DDR_A_DQ40 DDR_A_DQ[47..40] 7 VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_A_DQ41 73 VSS VSS 230
101 CB1_NC DQ41 207 DDR_A_DQ42 77 VSS VSS 231

www.laptoprepairsecrets.com 105 CB2_NC DQ42 208 DDR_A_DQ43 78 VSS VSS 234

88 CB3_NC DQ43 191 DDR_A_DQ44 81 VSS VSS 235
87 CB4_NC DQ44 190 DDR_A_DQ45 82 VSS VSS 238
100 CB5_NC DQ45 203 DDR_A_DQ46 85 VSS VSS 239
+1.2V 104 CB6_NC DQ46 204 DDR_A_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_A_DQS5 89 VSS VSS 244
Follow MA51 95 DQS8(T) DQS5(T) 198 DDR_A_DQS5# DDR_A_DQS5 7
90 VSS VSS 247
DQS8#(C) DQS5#(C) DDR_A_DQS5# 7 VSS VSS
93 248
DDR_A_DQ48 DDR_A_DQ[55..48] 7 VSS VSS
1 216 94 251
7 DDR_A_DM[7..0] DDR_A_DM0 12 DQ48 215 DDR_A_DQ49 98 VSS VSS 252
@
DDR_A_DM1 DM0#/DBI0# DQ49 DDR_A_DQ50 VSS VSS
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

+ CD18 33 228
1 1 1 1 1 1 1 DDR_A_DM2 DM1#/DBI1# DQ50 DDR_A_DQ51
CD10

CD11

CD12

CD13

CD14

CD15

CD98

330U_D2_2V_Y 54 229 262 261

DDR_A_DM3 75 DM2#/DBI2# DQ51 211 DDR_A_DQ52 GND GND
2 DDR_A_DM4 178 DM3#/DBI3# DQ52 212 DDR_A_DQ53
2 2 2 2 2 2 2 SGA00009S00 DDR_A_DM5 199 DM4#/DBI4# DQ53 224 DDR_A_DQ54 LOTES_ADDR0206-P001A
330U 2V H1.9 DDR_A_DM6 220 DM5#/DBI5# DQ54 225 DDR_A_DQ55
CONN@
9mohm POLY DDR_A_DM7 241 DM6#/DBI6# DQ55 221 DDR_A_DQS6
DM7#/DBI7# DQS6(T) DDR_A_DQS6# DDR_A_DQS6 7 SP07001EGA0
96 219
3 DM8#/DBI8# DQS6#(C) DDR_A_DQS6# 7 3

237 DDR_A_DQ56 DDR_A_DQ[63..56] 7

+1.2V DQ56 236 DDR_A_DQ57
DQ57 249 DDR_A_DQ58
DQ58 250 DDR_A_DQ59
DQ59 232 DDR_A_DQ60
DQ60 233 DDR_A_DQ61
DQ61 DDR_A_DQ62
0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K

180P_0402_50V8J

2 2 2 2 2 245
DQ62 DDR_A_DQ63
CD61

CD62

CD63

CD64

CD65

246
DQ63 242 DDR_A_DQS7
DQS7(T) DDR_A_DQS7# DDR_A_DQS7 7
240
1 1 1 1 1 DQS7#(C) DDR_A_DQS7# 7

LOTES_ADDR0206-P001A
CONN@ Layout Note:
SP07001EGA0 Place near JDIMM1.258

CRB use 4.7uF x1,0.1uF x1

+0.6VS
Layout Note: Layout Note:
Place near JDIMM1.257,259 Place near JDIMM1.255

1U_0201_6.3V6M

1U_0201_6.3V6M
10U_0402_6.3V6M

10U_0402_6.3V6M
1 1 1 1

CD27

CD28

CD29

CD30
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1

+2.5V +3VS 2 2 2 2
4 4
1U_0201_6.3V6M

1U_0201_6.3V6M
10U_0402_6.3V6M

10U_0402_6.3V6M

1 1 1 1
CD23

CD24

CD25

CD26

2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 23 of 100
A B C D E
 A B C D E

Stand Type-4H
2-3A to 1 DIMMs/channel

JDIMM2A
DDR_B_CLK0 STD DDR_B_DQ0 DDR_B_DQ[7..0] 7
137 8
7 DDR_B_CLK0 DDR_B_CLK0# CK0(T) DQ0 DDR_B_DQ1
139 7
7 DDR_B_CLK0# DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_DQ2 +1.2V +1.2V
7 DDR_B_CLK1 DDR_B_CLK1# 140 CK1(T) DQ2 21 DDR_B_DQ3 JDIMM2B

1
Address : A2 7

7
DDR_B_CLK1#

DDR_B_CKE0
DDR_B_CKE0
DDR_B_CKE1
109
110
CK1#(C)

CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
Follow CRB design
111
112 VDD1
STD

VDD11
141
142
1
7 DDR_B_CKE1 CKE1 DQ6 17 DDR_B_DQ7 117 VDD2 VDD12 147
+3VS DDR_B_CS0# 149 DQ7 13 DDR_B_DQS0 +1.2V 118 VDD3 VDD13 148
7 DDR_B_CS0# DDR_B_CS1# 157 S0# DQS0(T) 11 DDR_B_DQS0# DDR_B_DQS0 7 123 VDD4 VDD14 153
7 DDR_B_CS1# S1# DQS0#(C) DDR_B_DQS0# 7 VDD5 VDD15
162 124 154
S2#/C0 DDR_B_DQ[15..8] 7 VDD6 VDD16

2
165 28 DDR_B_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1

DDR_B_DQ9
10K_0402_5%
RD244

29 RD243 130 160

DDR_B_ODT0 DQ9 DDR_B_DQ10 +3VS VDD8 VDD18 +0.6VS
0_0402_5%
RD247

0_0402_5%
RD248

155 41 1K_0402_1% 135 163

7 DDR_B_ODT0 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_DQ11 +VREFB_CA 136 VDD9 VDD19
7 DDR_B_ODT1 ODT1 DQ11 DDR_B_DQ12 VDD10 +2.5V
24

1
@ @ DDR_B_BG0 115 DQ12 25 DDR_B_DQ13 255 258
7 DDR_B_BG0
2

DDR_B_BG1 113 BG0 DQ13 38 DDR_B_DQ14 VDDSPD VTT

7 DDR_B_BG1 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_DQ15 15mil 164 257
DDR_B_SA2 7 DDR_B_BA0 DDR_B_BA1 BA0 DQ15 DDR_B_DQS1 VREFCA VPP1
145 34 259
DDR_B_SA1 7 DDR_B_BA1 BA1 DQS1(T) DDR_B_DQS1# DDR_B_DQS1 7 VPP2

CD84 4.7U_0402_6.3V6M

CD76 0.1U_0201_10V6K

CD80 0.1U_0201_10V6K

CD87 1000P_0402_50V7K
32
DDR_B_SA0 7 DDR_B_MA[13..0] DDR_B_MA0 DQS1#(C) DDR_B_DQS1# 7

CD89 1U_0201_6.3V6M
144 1 99
A0 DDR_B_DQ[23..16] 7 VSS VSS

2
DDR_B_MA1 133 50 DDR_B_DQ16 2 102
A1 DQ16 1 2 2 1 VSS VSS
1

DDR_B_MA2 132 49 DDR_B_DQ17 RD251 5 103

DDR_B_MA3 A2 DQ17 DDR_B_DQ18 VSS VSS 1
RS@
0_0402_5%
RD252

RS@
0_0402_5%
RD246

0_0402_5%
RD249

131 62 1K_0402_1% 6 106

CD73 @EMC@ DDR_B_MA4 128 A3 DQ18 63 DDR_B_DQ19 9 VSS VSS 107
.1U_0402_16V7K DDR_B_MA5 126 A4 DQ19 46 DDR_B_DQ20 2 1 1 2 10 VSS VSS 167

1
@ 2 1 DDR_B_RST# DDR_B_MA6 127 A5 DQ20 45 DDR_B_DQ21 14 VSS VSS 168 2
2

DDR_B_MA7 122 A6 DQ21 58 DDR_B_DQ22 15 VSS VSS 171

DDR_B_MA8 125 A7 DQ22 59 DDR_B_DQ23 18 VSS VSS 172
DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 19 VSS VSS 175
DDR_B_MA10 A9 DQS2(T) DDR_B_DQS2# DDR_B_DQS2 7 VSS VSS
146 53 22 176
DDR_B_MA11 A10_AP DQS2#(C) DDR_B_DQS2# 7 VSS VSS
120 23 180
DDR_B_MA12 A11 DDR_B_DQ24 DDR_B_DQ[31..24] 7 VSS VSS
119 70 26 181 CRB use 1uF x1
DDR_B_MA13 158 A12 DQ24 71 DDR_B_DQ25 27 VSS VSS 184
DDR_B_MA14_WE# 151 A13 DQ25 83 DDR_B_DQ26 30 VSS VSS 185
Note:
7
7
DDR_B_MA14_WE#
DDR_B_MA15_CAS#
DDR_B_MA15_CAS#
DDR_B_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_B_DQ27
DDR_B_DQ28
Place near to SO-DIMM connector. 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of 7 DDR_B_MA16_RAS# A16_RAS# DQ28 67 DDR_B_DQ29 36 VSS VSS 192
Place near JDIMM2 VREF_DQ at the DIMM socket DDR_B_ACT# 114 DQ29 79 DDR_B_DQ30 39 VSS VSS 193
7 DDR_B_ACT# ACT# DQ30 DDR_B_DQ31 VSS VSS
80 40 196
2 DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 43 VSS VSS 197 2
7 DDR_B_PAR DDR_B_ALERT# PARITY DQS3(T) DDR_B_DQS3# DDR_B_DQS3 7 VSS VSS
116 74 44 201
7 DDR_B_ALERT# DDR_B_EVENT# ALERT# DQS3#(C) DDR_B_DQS3# 7 VSS VSS
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 134 47 202
7 DDR_B_EVENT# DDR_B_RST# EVENT# DDR_B_DQ32 DDR_B_DQ[39..32] 7 VSS VSS
108 174 48 205
+1.2V 7 DDR_B_RST# RESET# DQ32 DDR_B_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_B_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_B_DQ35 56 VSS VSS 210
9,23 SMB_0_SDA SMB_0_SCL SDA DQ35 DDR_B_DQ36 VSS VSS
253 170 57 213
9,23 SMB_0_SCL SCL DQ36 DDR_B_DQ37 VSS VSS
1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

169 60 214
DDR_B_SA2 166 DQ37 183 DDR_B_DQ38 61 VSS VSS 217
1 1 1 1 1 1 DDR_B_SA1 SA2 DQ38 DDR_B_DQ39 VSS VSS
CD86

CD67

CD78

CD93

CD71

CD81

260 182 64 218

DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 65 VSS VSS 222
SA0 DQS4(T) DDR_B_DQS4# DDR_B_DQS4 7 VSS VSS
177 68 223
2 2 2 2 2 2 DQS4#(C) DDR_B_DQS4# 7 VSS VSS
69 226
DDR_B_DQ40 DDR_B_DQ[47..40] 7 VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_B_DQ41 73 VSS VSS 230
101 CB1_NC DQ41 207 DDR_B_DQ42 77 VSS VSS 231

www.laptoprepairsecrets.com 105 CB2_NC DQ42 208 DDR_B_DQ43 78 VSS VSS 234

88 CB3_NC DQ43 191 DDR_B_DQ44 81 VSS VSS 235
87 CB4_NC DQ44 190 DDR_B_DQ45 82 VSS VSS 238
100 CB5_NC DQ45 203 DDR_B_DQ46 85 VSS VSS 239
+1.2V 104 CB6_NC DQ46 204 DDR_B_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_B_DQS5 89 VSS VSS 244
DQS8(T) DQS5(T) DDR_B_DQS5# DDR_B_DQS5 7 VSS VSS
95 198 90 247
DQS8#(C) DQS5#(C) DDR_B_DQS5# 7 VSS VSS
93 248
DDR_B_DQ48 DDR_B_DQ[55..48] 7 VSS VSS
216 94 251
7 DDR_B_DM[7..0] DDR_B_DM0 12 DQ48 215 DDR_B_DQ49 98 VSS VSS 252
DDR_B_DM1 DM0#/DBI0# DQ49 DDR_B_DQ50 VSS VSS
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

1 1 1 1 1 1 1 33 228
DDR_B_DM2 DM1#/DBI1# DQ50 DDR_B_DQ51
CD82

CD90

CD96

CD77

CD68

CD88

CD99

54 229 262 261

DDR_B_DM3 75 DM2#/DBI2# DQ51 211 DDR_B_DQ52 GND GND
DDR_B_DM4 178 DM3#/DBI3# DQ52 212 DDR_B_DQ53
2 2 2 2 2 2 2 DDR_B_DM5 199 DM4#/DBI4# DQ53 224 DDR_B_DQ54 LOTES_ADDR0205-P001A
DDR_B_DM6 220 DM5#/DBI5# DQ54 225 DDR_B_DQ55
DDR_B_DM7 DM6#/DBI6# DQ55 DDR_B_DQS6 CONN@
241 221
DM7#/DBI7# DQS6(T) DDR_B_DQS6# DDR_B_DQS6 7
96 219
3 DM8#/DBI8# DQS6#(C) DDR_B_DQS6# 7 3

237 DDR_B_DQ56 DDR_B_DQ[63..56] 7

+1.2V DQ56 236 DDR_B_DQ57
DQ57 249 DDR_B_DQ58
DQ58 250 DDR_B_DQ59
DQ59 232 DDR_B_DQ60
DQ60 233 DDR_B_DQ61
DQ61 DDR_B_DQ62
0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K

180P_0402_50V8J

2 2 2 2 2 261 245
GND1 DQ62 DDR_B_DQ63
CD91

CD94

CD97

CD66

CD85

262 246
GND2 DQ63 242 DDR_B_DQS7
DQS7(T) DDR_B_DQS7# DDR_B_DQS7 7
240
1 1 1 1 1 DQS7#(C) DDR_B_DQS7# 7

LOTES_ADDR0205-P001A
CONN@ Layout Note:
Place near JDIMM2.258

CRB use 4.7uF x1,0.1uF x1

+0.6VS
Layout Note: Layout Note:
Place near JDIMM2.257,259 Place near JDIMM2.255

1U_0201_6.3V6M

1U_0201_6.3V6M
10U_0402_6.3V6M

10U_0402_6.3V6M
1 1 1 1

CD70

CD74

CD92

CD72
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1

+2.5V +3VS 2 2 2 2
4 4
1U_0201_6.3V6M

1U_0201_6.3V6M
10U_0402_6.3V6M

10U_0402_6.3V6M

1 1 1 1
CD79

CD83

CD75

CD95

2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 24 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 25 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 26 of 100
5 4 3 2 1
 A B C D E

+1.8VSDGPU_AON

VGA_OVERT# RV327 2 DIS@ 1 10K_0201_5%

UV1A VGA_ALERT# RV328 2 DIS@ 1 10K_0201_5%
FRM_LCK# RV329 2 DIS@ 1 10K_0201_5%
PEG_ATX_C_GRX_P0 AN12 Part 1 of 7 ACIN_BUF RV330 2 DIS@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_P0 PEG_ATX_C_GRX_N0 PEX_RX0 GPU_EVENT#_1
AM12 P6 RV331 2 DIS@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_N0 PEG_ATX_C_GRX_P1 PEX_RX0_N GPIO0 GC6_FB_EN1V8 NVVDD_VID 91 1.8VSDGPU_MAIN_EN
AN14 M3 GC6@ RV1 2 DIS@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_P1 PEG_ATX_C_GRX_N1 PEX_RX1 GPIO1 GPU_EVENT#_1 GPU_EVENT# NVVDD_PSI
AM14 L6 DV8 2 1 RV4 2 DIS@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_N1 PEG_ATX_C_GRX_P2 PEX_RX1_N GPIO2 GPU_EVENT# 10
AP14 P5
6 PEG_ATX_C_GRX_P2 PEG_ATX_C_GRX_N2 PEX_RX2 GPIO3 1.8VSDGPU_MAIN_EN SYS_PEX_RST_MON#
AP15 P7 RB751S40T1G_SOD523-2 RV332 2 N17P@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_N2 PEG_ATX_C_GRX_P3 PEX_RX2_N GPIO4 FRM_LCK# GPU_PEX_RST_HOLD#
AN15 L7 RV82 2 N17P@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_P3 PEG_ATX_C_GRX_N3 PEX_RX3 GPIO5
AM15 M7
6 PEG_ATX_C_GRX_N3 PEG_ATX_C_GRX_P4 PEX_RX3_N GPIO6 NVVDD_PSI 91 FBVDDQ_PSI
AN17 N8 RV335 2 N18P@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_P4 PEG_ATX_C_GRX_N4 PEX_RX4 GPIO7 GPIO22_OC_WARN#
AM17 L3 RV386 2 N18P@ 1 10K_0201_5%
6 PEG_ATX_C_GRX_N4 PEG_ATX_C_GRX_P5 PEX_RX4_N GPIO8 VGA_ALERT# VRAM_VDD_CTL 94
AP17 M2
6 PEG_ATX_C_GRX_P5 PEG_ATX_C_GRX_N5 PEX_RX5 GPIO9
AP18 L1
1 6 PEG_ATX_C_GRX_N5 PEG_ATX_C_GRX_P6 PEX_RX5_N GPIO10 VRAM_VREF_CTL 32,33 VGA_I2CS_SDA 1
AN18 M5 RV2 1 DIS@ 2 1.8K_0402_1%
6 PEG_ATX_C_GRX_P6 PEG_ATX_C_GRX_N6 PEX_RX6 GPIO11 ACIN_BUF VGA_I2CS_SCL
AM18 N3 DV2 2 1 RV3 1 DIS@ 2 1.8K_0402_1%
6 PEG_ATX_C_GRX_N6 PEG_ATX_C_GRX_P7 PEX_RX6_N GPIO12

GPIO
AN20 M4 DIS@ DGPU_AC_DETECT 58,84
6 PEG_ATX_C_GRX_P7 PEG_ATX_C_GRX_N7 PEX_RX7 GPIO13 VGA_I2CC_SDA
AM20 N4 RB751S40T1G_SOD523-2 RV5 1 DIS@ 2 2K_0402_5%
6 PEG_ATX_C_GRX_N7 PEX_RX7_N GPIO14 VGA_I2CC_SCL
AP20 P2 RV6 1 DIS@ 2 2K_0402_5%
AP21 PEX_RX8 GPIO15 R8 SYS_PEX_RST_MON#
AN21 PEX_RX8_N GPIO16 M6
AM21 PEX_RX9 GPIO17 R1
AN23 PEX_RX9_N GPIO18 P3 NVVDD_PSI RV398 2 @ 1 10K_0201_5%
AM23 PEX_RX10 GPIO19 P4
AP23 PEX_RX10_N GPIO20 P1 VRAM_VREF_CTL RV333 2 DIS@ 1 100K_0201_5%
AP24 PEX_RX11 GPIO21 P8 GC6_FB_EN1V8 RV334 2 DIS@ 1 10K_0201_5%
PEX_RX11_N GPIO22 GPU_PEX_RST_HOLD# GPIO22_OC_WARN# 36
AN24 T8
AM24 PEX_RX12 GPIO23 L2 GPU_PEX_RST_HOLD# RV396 2 N18P@ 1 100K_0201_5%
AN26 PEX_RX12_N GPIO24 R4
AM26 PEX_RX13 GPIO25 R5 FBVDDQ_PSI 94
AP26 PEX_RX13_N GPIO26 U3 GPIO26_FP_FUSE 37
AP27 PEX_RX14 GPIO27
AN27 PEX_RX14_N +1.8VSDGPU_MAIN +1.8VSDGPU_MAIN
AM27 PEX_RX15
PEX_RX15_N
QV13A N18P@ QV2A DIS@

5
PEG_ARX_C_GTX_P0 AK14 AN9 PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6
6 PEG_ARX_C_GTX_P0 PEG_ARX_C_GTX_N0 PEX_TX0 ADC_IN ADC_IN_P 36
AJ14 AM9

G
6
6
PEG_ARX_C_GTX_N0
PEG_ARX_C_GTX_P1
PEG_ARX_C_GTX_P1 AH14 PEX_TX0_N OVR-M ADC_IN_N ADC_IN_N 36 VGA_I2CC_SCL 4 3
VGA_I2CC_SCL_PWR 91
VGA_I2CS_SCL 4 3
EC_SMB_CK2 8,40,58,66
PEG_ARX_C_GTX_N1 PEX_TX1 +1.8VSDGPU_AON

D
6 PEG_ARX_C_GTX_N1 AG14
PEG_ARX_C_GTX_P2 AK15 PEX_TX1_N
6 PEG_ARX_C_GTX_P2 PEG_ARX_C_GTX_N2 PEX_TX2 TS_AVDD RV385 1 N18P@ 2 0_0402_5%
AJ15 AG10 QV13B N18P@ QV2B DIS@
6 PEG_ARX_C_GTX_N2 PEX_TX2_N TS_AVDD

2
PEG_ARX_C_GTX_P3 AL16 PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6
6 PEG_ARX_C_GTX_P3 PEG_ARX_C_GTX_N3 PEX_TX3
AK16 CV377 1 2 1U_0201_6.3V6M
Thermal Sensor

G
6 PEG_ARX_C_GTX_N3 PEG_ARX_C_GTX_P4 PEX_TX3_N VGA_I2CC_SDA VGA_I2CS_SDA
6 PEG_ARX_C_GTX_P4 AK17 1 6 VGA_I2CC_SDA_PWR 91 1 6 EC_SMB_DA2 8,40,58,66
PEG_ARX_C_GTX_N4 AJ17 PEX_TX4

D
6 PEG_ARX_C_GTX_N4 N18P@
PEG_ARX_C_GTX_P5 AH17 PEX_TX4_N
6 PEG_ARX_C_GTX_P5 PEG_ARX_C_GTX_N5 PEX_TX5
AG17 AK9
6 PEG_ARX_C_GTX_N5

RES
PEG_ARX_C_GTX_P6 AK18 PEX_TX5_N RES AL10 27MHZ_10PF_XRCGB27M000F2P18R0
6 PEG_ARX_C_GTX_P6 PEG_ARX_C_GTX_N6 PEX_TX6 RES
6 PEG_ARX_C_GTX_N6 AJ18 AL9 RV80 DIS@ XV1
PEG_ARX_C_GTX_P7 AL19 PEX_TX6_N RES AP8 470_0402_1%
6 PEG_ARX_C_GTX_P7 PEG_ARX_C_GTX_N7 PEX_TX7 RES
AK19 XTALOUT 2 1 XTALOUT_R 1 3 XTALIN
PCI EXPRESS

6 PEG_ARX_C_GTX_N7 PEX_TX7_N 1 3
AK20
AJ20 PEX_TX8 AP9 +1.8VSDGPU_AON NC NC
PEX_TX8_N TS_VREF 1 1
AH20
AG20 PEX_TX9 unused pin PH 2K to 1V8AON CV1 DIS@ DIS@ 2 4 CV2 DIS@
2 PEX_TX9_N 2
AK21 R7 RV86 1 DIS@ 2 2K_0402_5% 18P_0402_50V8J 18P_0402_50V8J
AJ21 PEX_TX10 I2CB_SCL R6 RV85 1 DIS@ 2 2K_0402_5% 2 2
AL22 PEX_TX10_N I2CB_SDA
AK22 PEX_TX11 R2 VGA_I2CC_SCL +1.8VSDGPU_MAIN Crystals must have a max ESR of 80 ohm
I2C

AK23 PEX_TX11_N I2CC_SCL R3 VGA_I2CC_SDA

AJ23 PEX_TX12 I2CC_SDA
PEX_TX12_N VGA_I2CS_SCL
SM01000JX00
AH23 T4 +GPU_PLLVDD
PEX_TX13 I2CS_SCL VGA_I2CS_SDA 3000ma 33ohm@100mhz DCR 0.04
AG23 T3
AK24 PEX_TX13_N I2CS_SDA DIS@
AJ24 PEX_TX14 LV1 1 2
AL25 PEX_TX14_N TAI-TECH HCB1608KF-330T30
PEX_TX15

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

4.7U_0402_6.3V6M

22U_0603_6.3V6M
AK25 H26 1 1 1 1 1 1 SM01000JX00
PEX_TX15_N GPCPLL_AVDD

CV195 DIS@

CV5 DIS@

CV6 DIS@

CV3 DIS@
CV42 CV4
AD8
AJ11 XSN_PLLVDD DIS@ DIS@
No support S0ix PEX_WAKE# 2 2 2 2 2 2
AE8
CLK_PEG_P4 AL13 SP_PLLVDD
10 CLK_PEG_P4 CLK_PEG_N4 PEX_REFCLK Near
AK13 AD7 GPU
10 CLK_PEG_N4 VGA_CLKREQ#_R PEX_REFCLK_N VID_PLLVDD
AK12 Near Near Near Near
+1.8VSDGPU_AON PEX_CLKREQ_N
H26 AD7 AD8 AE8

www.laptoprepairsecrets.com
CLK

RV7 1 DIS@ 2 10K_0201_5% AJ26 H3 XTALIN

AK26 NC XTAL_IN H2 XTALOUT
NC XTAL_OUT
PLTRST_VGA#_1V8 AJ12 J4 XTAL_OUTBUFF RV9 1 DIS@ 2 10K_0201_5%
1 2 PEX_TREMP AP29 PEX_RST_N XTAL_OUTBUFF H1 XTAL_SSIN RV11 1 DIS@ 2 10K_0201_5%
PEX_TERMP EXT_REFCLK_FL
RV10 DIS@
2.49K_0402_1%

N18P-G0_FCBGA960~D
@
+1.8VSDGPU_AON +1.8VSDGPU_AON

PU at PCH side

2
UV11
CLKREQ_PEG#4 10
DIS@ RV83 @

5
NL17SZ08EDFT2G_SC70-5 10K_0201_5%

6
VCC

3
1VSDGPU_PG 1 QV5A 2 G
D
QV5B

1
IN B 4 ALL_GPWRGD 5 D
PJT138KA 2N SOT363-6
G S
PJT138KA 2N SOT363-6
2 OUT Y DIS@

GND
94 1.35VSDGPU_PG 1 S

1
IN A DIS@
3 DIS@ 3

4
CV226
0.1U_0201_10V6K

3
2 VGA_CLKREQ#_R
+1.8VSDGPU_AON

+1.8VSDGPU_AON
1

UV2
NL17SZ08EDFT2G_SC70-5 RV100 @
5

DIS@ 10K_0201_5%
+3VS
VCC

APU_PCIE_RST# 1.8VSDGPU_MAIN_EN3V3 37
1
9,51,52,68 APU_PCIE_RST#
2

IN B 4 PLTRST_VGA#_1V8
PE_GPIO0 RV402 1 DIS@ 2 0_0402_5% DGPU_HOLD_RST# 2 OUT Y 10K or 100K? +3VS
GND

10 PE_GPIO0 IN A

1
RV16 1 DIS@ 2 100K_0201_5%
1

RV106 DIS@
3

RV409 CV200 1 2 0.1U_0201_10V6K 100K_0201_5% RV108 UV10 DIS@

5
@ 10K_0201_5% DIS@ DIS@ 10K_0201_5% NL17SZ08EDFT2G_SC70-5

VCC
2

2
1
2

IN B 4
OUT Y GPUCORE_EN 37

3
2

GND
PJT138KA 2N SOT363-6
5 G
D
IN A
37 DGPU_PWR_EN

6
S

NV need to reserve 1.8VSDGPU_MAIN_EN 2 G

D
QV7A

3
QV7B S DIS@ @
PJT138KA 2N SOT363-6 DGPU_PWR_EN DV4 2 1
NVVDD1_EN 37,91

1
DIS@
RB751S40T1G_SOD523-2
RV403 1 DIS@ 2 PE_GPIO1
PE_GPIO1 10
0_0402_5% 2 1
RV105 2
RV408 1 @ 2 AGPIO5 12K_0402_1%
AGPIO5 9
0_0402_5% DIS@ CV197 DIS@
GC6 2.0 function +1.8VSDGPU_MAIN 0.22U_0402_16V7K
GPU_OVERT# DV7 1 2 1
+3VS DV3 PU at EC side
1

GC6_FB_EN3V3 2 RB751S40T1G_SOD523-2 DIS@

1 RV131 GPU_OVERT# DV5 1 2
1.35VSDGPU_EN 37,94 GPU_OVERT# 58 DIS@ 1VSDGPU_EN 95
1

3 GC6@ 100K_0201_5%
95 1VSDGPU_PG
RV113 GC6@ DIS@ RB751S40T1G_SOD523-2
1

4 10K_0201_5% BAV70W_SOT323-3 4
6 2

5 1 2
D
RV111 GC6@ RV12 G QV1A
100K_0201_5% 100K_0201_5% S
PJT138KA 2N SOT363-6 RV103
3 2

GC6_FB_EN3V3 DIS@ VGA_OVERT# 2

D
DIS@ 28.7K_0402_1% 2
G
GC6_FB_EN3V3 10 29 VGA_OVERT#
4

RV401 1 NGC6@ 2 0_0402_5% S DIS@

6 2

D
5 G QV1B CV196 DIS@
1

S PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6 0.22U_0402_16V7K

GC6_FB_EN1V8 2 G
D
QV8A DIS@ 1
4

QV8B S GC6@
PJT138KA 2N SOT363-6
1

GC6@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P PEG 1/7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 27 of 100
A B C D E
 A B C D E

GDDR5 Mode H Mapping

UV1B UV1C
32 FBA_D[63..0] FBA_CMD[31..0] 32 33 FBB_D[63..0] FBB_CMD[31..0] 33 DATA Bus
Part 2 of 7 Part 3 of 7
FBA_D0 L28 U30 FBA_CMD0 FBB_D0 G9 D13 FBB_CMD0 Address
FBA_D1 FBA_D0 FBA_CMD0 FBA_CMD1 FBB_D1 FBB_D0 FBB_CMD0 FBB_CMD1
0..31 32..63
M29 T31 E9 E14
FBA_D2 L29 FBA_D1 FBA_CMD1 U29 FBA_CMD2 FBB_D2 G8 FBB_D1 FBB_CMD1 F14 FBB_CMD2
FBA_D3 FBA_D2 FBA_CMD2 FBA_CMD3 FBB_D3 FBB_D2 FBB_CMD2 FBB_CMD3
CMD0 CS#
M28 R34 F9 A12
FBA_D4 N31 FBA_D3 FBA_CMD3 R33 FBA_CMD4 FBB_D4 F11 FBB_D3 FBB_CMD3 B12 FBB_CMD4
FBA_D5 FBA_D4 FBA_CMD4 FBA_CMD5 FBB_D5 FBB_D4 FBB_CMD4 FBB_CMD5
CMD1 A3_BA3
P29 U32 G11 C14
FBA_D6 R29 FBA_D5 FBA_CMD5 U33 FBA_CMD6 FBB_D6 F12 FBB_D5 FBB_CMD5 B14 FBB_CMD6
FBA_D7 FBA_D6 FBA_CMD6 FBA_CMD7 FBB_D7 FBB_D6 FBB_CMD6 FBB_CMD7
CMD2 A2_BA0
P28 U28 G12 G15
FBA_D8 J28 FBA_D7 FBA_CMD7 V28 FBA_CMD8 FBB_D8 G6 FBB_D7 FBB_CMD7 F15 FBB_CMD8
FBA_D9 FBA_D8 FBA_CMD8 FBA_CMD9 FBB_D9 FBB_D8 FBB_CMD8 FBB_CMD9
CMD3 A4_BA2
H29 V29 F5 E15
FBA_D10 J29 FBA_D9 FBA_CMD9 V30 FBA_CMD10 FBB_D10 E6 FBB_D9 FBB_CMD9 D15 FBB_CMD10
1 FBA_D11 FBA_D10 FBA_CMD10 FBA_CMD11 FBB_D11 FBB_D10 FBB_CMD10 FBB_CMD11
CMD4 A5_BA1 1
H28 U34 F6 A14
FBA_D12 G29 FBA_D11 FBA_CMD11 U31 FBA_CMD12 FBB_D12 F4 FBB_D11 FBB_CMD11 D14 FBB_CMD12
FBA_D13 FBA_D12 FBA_CMD12 FBA_CMD13 FBB_D13 FBB_D12 FBB_CMD12 FBB_CMD13
CMD5 WE#
E31 V34 G4 A15
FBA_D14 E32 FBA_D13 FBA_CMD13 V33 FBA_CMD14 FBB_D14 E2 FBB_D13 FBB_CMD13 B15 FBB_CMD14
FBA_D15 FBA_D14 FBA_CMD14 FBA_CMD15 FBB_D15 FBB_D14 FBB_CMD14 FBB_CMD15
CMD6 A7_A8
F30 Y32 F3 C17
FBA_D16 C34 FBA_D15 FBA_CMD15 AA31 FBA_CMD16 FBB_D16 C2 FBB_D15 FBB_CMD15 D18 FBB_CMD16
FBA_D17 FBA_D16 FBA_CMD16 FBA_CMD17 FBB_D17 FBB_D16 FBB_CMD16 FBB_CMD17
CMD7 A6_A11
D32 AA29 D4 E18
FBA_D18 B33 FBA_D17 FBA_CMD17 AA28 FBA_CMD18 FBB_D18 D3 FBB_D17 FBB_CMD17 F18 FBB_CMD18
FBA_D19 FBA_D18 FBA_CMD18 FBA_CMD19 FBB_D19 FBB_D18 FBB_CMD18 FBB_CMD19
CMD8 ABI#
C33 AC34 C1 A20
FBA_D20 F33 FBA_D19 FBA_CMD19 AC33 FBA_CMD20 FBB_D20 B3 FBB_D19 FBB_CMD19 B20 FBB_CMD20
FBA_D21 FBA_D20 FBA_CMD20 FBA_CMD21 FBB_D21 FBB_D20 FBB_CMD20 FBB_CMD21
CMD9 A12_RFU
F32 AA32 C4 C18
FBA_D22 H33 FBA_D21 FBA_CMD21 AA33 FBA_CMD22 FBB_D22 B5 FBB_D21 FBB_CMD21 B18 FBB_CMD22
FBA_D23 FBA_D22 FBA_CMD22 FBA_CMD23 FBB_D23 FBB_D22 FBB_CMD22 FBB_CMD23
CMD10 A0_A10
H32 Y28 C5 G18
FBA_D24 P34 FBA_D23 FBA_CMD23 Y29 FBA_CMD24 FBB_D24 A11 FBB_D23 FBB_CMD23 G17 FBB_CMD24
FBA_D25 FBA_D24 FBA_CMD24 FBA_CMD25 FBB_D25 FBB_D24 FBB_CMD24 FBB_CMD25
CMD11 A1_A9
P32 W31 C11 F17
FBA_D26 P31 FBA_D25 FBA_CMD25 Y30 FBA_CMD26 FBB_D26 D11 FBB_D25 FBB_CMD25 D16 FBB_CMD26
FBA_D27 FBA_D26 FBA_CMD26 FBA_CMD27 FBB_D27 FBB_D26 FBB_CMD26 FBB_CMD27
CMD12 RAS#
P33 AA34 B11 A18
FBA_D28 L31 FBA_D27 FBA_CMD27 Y31 FBA_CMD28 FBB_D28 D8 FBB_D27 FBB_CMD27 D17 FBB_CMD28
FBA_D29 FBA_D28 FBA_CMD28 FBA_CMD29 FBB_D29 FBB_D28 FBB_CMD28 FBB_CMD29
CMD13 RST#
L34 Y34 A8 A17

MEMORY INTERFACE B
FBA_D30 L32 FBA_D29 FBA_CMD29 Y33 FBA_CMD30 FBB_D30 C8 FBB_D29 FBB_CMD29 B17 FBB_CMD30
FBA_D31 FBA_D30 FBA_CMD30 FBA_CMD31 FBB_D31 FBB_D30 FBB_CMD30 FBB_CMD31
CMD14 CKE#
L33 V31 B8 E17
FBA_D32 AG28 FBA_D31 FBA_CMD31 R28 FBB_D32 F24 FBB_D31 FBB_CMD31 G14
FBA_D33 FBA_D32 FBA_CMD32 FBB_D33 FBB_D32 FBB_CMD32 CMD15 CAS#
AF29 AC28 G23 G20
FBA_D34 AG29 FBA_D33 FBA_CMD33 R32 FBB_D34 E24 FBB_D33 FBB_CMD33 C12
FBA_D35 FBA_D34 FBA_CMD34 FBB_D35 FBB_D34 FBB_CMD34 CMD16 CS#
AF28 AC32 G24 C20
FBA_D36 AD30 FBA_D35 FBA_CMD35 FBB_D36 D21 FBB_D35 FBB_CMD35
FBA_D37 FBA_D36 FBB_D37 FBB_D36 CMD17 A3_BA3
AD29 E21
FBA_D38 AC29 FBA_D37 FBB_D38 G21 FBB_D37
FBA_D39 FBA_D38 FBB_D39 FBB_D38 CMD18 A2_BA0
AD28 F21
FBA_D40 AJ29 FBA_D39 FBB_D40 G27 FBB_D39
FBA_D41 FBA_D40 FBB_D41 FBB_D40 CMD19 A4_BA2
AK29 D27
FBA_D42 AJ30 FBA_D41 FBB_D42 G26 FBB_D41
FBA_D43 FBA_D42 FBB_D43 FBB_D42 CMD20 A5_BA1
AK28 E27
MEMORY INTERFACE

FBA_D44 AM29 FBA_D43 FBB_D44 E29 FBB_D43

FBA_D45 FBA_D44 FBB_D45 FBB_D44 CMD21 WE#
AM31 R30 F29 D12
2 FBA_D46 FBA_D45 FBA_CLK0 FBA_CLKA0 32 FBB_D46 FBB_D45 FBB_CLK0 FBB_CLKA0 33 2
AN29 R31 E30 E12 CMD22 A7_A8
FBA_D47 FBA_D46 FBA_CLK0_N FBA_CLKA0# 32 FBB_D47 FBB_D46 FBB_CLK0_N FBB_CLKA0# 33
AM30 AB31 D30 E20
FBA_D48 FBA_D47 FBA_CLK1 FBA_CLKA1 32 FBB_D48 FBB_D47 FBB_CLK1 FBB_CLKA1 33
AN31 AC31 A32 F20 CMD23 A6_A11
FBA_D49 FBA_D48 FBA_CLK1_N FBA_CLKA1# 32 FBB_D49 FBB_D48 FBB_CLK1_N FBB_CLKA1# 33
AN32 C31
FBA_D50 AP30 FBA_D49 FBB_D50 C32 FBB_D49
FBA_D51 FBA_D50 FBB_D51 FBB_D50 CMD24 ABI#
AP32 B32
FBA_D52 AM33 FBA_D51 K31 FBB_D52 D29 FBB_D51 F8
FBA_D53 FBA_D52 FBA_WCK01 FBA_WCK01 32 FBB_D53 FBB_D52 FBB_WCK01 FBB_WCK01 33 CMD25 A12_RFU
AL31 L30 A29 E8
FBA_D54 FBA_D53 FBA_WCK01_N FBA_WCK01# 32 FBB_D54 FBB_D53 FBB_WCK01_N FBB_WCK01# 33
AK33 H34 C29 A5 CMD26 A0_A10
FBA_D55 FBA_D54 FBA_WCK23 FBA_WCK23 32 FBB_D55 FBB_D54 FBB_WCK23 FBB_WCK23 33
AK32 J34 B29 A6
FBA_D56 FBA_D55 FBA_WCK23_N FBA_WCK23# 32 FBB_D56 FBB_D55 FBB_WCK23_N FBB_WCK23# 33
AD34 AG30 B21 D24 CMD27 A1_A9
FBA_D57 FBA_D56 FBA_WCK45 FBA_WCK45 32 FBB_D57 FBB_D56 FBB_WCK45 FBB_WCK45 33
AD32 AG31 C23 D25
FBA_D58 FBA_D57 FBA_WCK45_N FBA_WCK45# 32 FBB_D58 FBB_D57 FBB_WCK45_N FBB_WCK45# 33
AC30 AJ34 A21 B27 CMD28 RAS#
FBA_D59 FBA_D58 FBA_WCK67 FBA_WCK67 32 FBB_D59 FBB_D58 FBB_WCK67 FBB_WCK67 33
A

AD33 AK34 C21 C27

FBA_D60 FBA_D59 FBA_WCK67_N FBA_WCK67# 32 FBB_D60 FBB_D59 FBB_WCK67_N FBB_WCK67# 33
AF31 B24 CMD29 RST#
FBA_D61 AG34 FBA_D60 FBB_D61 C24 FBB_D60
FBA_D62 AG32 FBA_D61 FBB_D62 B26 FBB_D61
CMD30 CKE#

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FBA_D63 AG33 FBA_D62 J30 FBB_D63 C26 FBB_D62 D6
FBA_D63 FBA_WCKB01 J31 FBB_D63 FBB_WCKB01 D7
32 FBA_DBI[7..0] FBA_DBI0 FBA_WCKB01_N 33 FBB_DBI[7..0] FBB_DBI0 FBB_WCKB01_N CMD31 CAS#
P30 J32 E11 C6
FBA_DBI1 F31 FBA_DQM0 FBA_WCKB23 J33 FBB_DBI1 E3 FBB_DQM0 FBB_WCKB23 B6
FBA_DBI2 F34 FBA_DQM1 FBA_WCKB23_N AH31 FBB_DBI2 A3 FBB_DQM1 FBB_WCKB23_N F26
FBA_DBI3 M32 FBA_DQM2 FBA_WCKB45 AJ31 FBB_DBI3 C9 FBB_DQM2 FBB_WCKB45 E26
FBA_DBI4 AD31 FBA_DQM3 FBA_WCKB45_N AJ32 FBB_DBI4 F23 FBB_DQM3 FBB_WCKB45_N A26
FBA_DBI5 AL29 FBA_DQM4 FBA_WCKB67 AJ33 FBB_DBI5 F27 FBB_DQM4 FBB_WCKB67 A27
FBA_DBI6 AM32 FBA_DQM5 FBA_WCKB67_N FBB_DBI6 C30 FBB_DQM5 FBB_WCKB67_N
FBA_DBI7 AF34 FBA_DQM6 FBB_DBI7 A24 FBB_DQM6
FBA_DQM7 FBB_DQM7
32 FBA_EDC[7..0] FBA_EDC0 33 FBB_EDC[7..0] FBB_EDC0
M31 D10
FBA_EDC1 G31 FBA_DQS_WP0 +1.8VSDGPU_MAIN FBB_EDC1 D5 FBB_DQS_WP0
FBA_EDC2 E33 FBA_DQS_WP1 FBB_EDC2 C3 FBB_DQS_WP1
FBA_EDC3 M33 FBA_DQS_WP2 DIS@ FBB_EDC3 B9 FBB_DQS_WP2
FBA_EDC4 AE31 FBA_DQS_WP3 K27 +FB_PLLAVDD LV3 1 2 FBB_EDC4 E23 FBB_DQS_WP3 H17 +FB_PLLAVDD
FBA_EDC5 AK30 FBA_DQS_WP4 FB_REFPLL_AVDD TAI-TECH HCB1608KF-330T30 FBB_EDC5 E28 FBB_DQS_WP4 FBB_PLL_AVDD
FBA_EDC6 AN33 FBA_DQS_WP5 FBB_EDC6 FBB_DQS_WP5
1U_0201_6.3V6M

1U_0201_6.3V6M

22U_0603_6.3V6M

4.7U_0402_6.3V6M

1U_0201_6.3V6M

4.7U_0402_6.3V6M
1 1 1 1 SM01000JX00 B30 1 1
FBA_EDC7 AF33 FBA_DQS_WP6 FBB_EDC7 FBB_DQS_WP6
CV9 DIS@

CV10 DIS@

CV11 DIS@

CV379 DIS@

CV7 DIS@

CV12 DIS@
3 A23 3
FBA_DQS_WP7 U27 FBB_DQS_WP7
FBA_PLL_AVDD SM01000JX00
M30 3000ma 33ohm@100mhz DCR 0.04 D9
H30 RES 2 2 2 2 E4 RES 2 2
E34 RES B2 RES
M34 RES H31 FB_VREF A9 RES
AF30 RES FB_VREF D22 RES
AK31 RES D28 RES
RES Near Near RES Near
AM34 U27 K27 A30 H17
AF32 RES B23 RES
RES RES

N18P-G0_FCBGA960~D N18P-G0_FCBGA960~D
@ @

+1.35VSDGPU FB_VREF
+1.35VSDGPU
1

FBA_CMD14
3.9P_0402_50V8C
CV378

49.9_0402_1%
RV393

2 DIS@ 1 1
RV87 10K_0402_5% FBB_CMD14 2 DIS@ 1
FBA_CMD30 2 DIS@ 1 RV91 10K_0402_5%
CKE FBB_CMD30
RV88 10K_0402_5% signal 2 DIS@ 1
2
N18P@

N18P@

RV92 10K_0402_5%
2

FBA_CMD13 2 DIS@ 1
RV89 10K_0402_5% FBB_CMD13 2 DIS@ 1
FBA_CMD29 2 DIS@ 1 RV93 10K_0402_5%
RST
RV90 10K_0402_5% FBB_CMD29 2 DIS@ 1
signal
RV94 10K_0402_5%

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P VRAM 2/7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 28 of 100
A B C D E
 A B C D E

UV1D

Part 4 of 7
AM6
IFPA_L3 +1.8VSDGPU_AON
MULTI LEVEL
AN6
AP3 IFPA_L3_N
IFPA_L2 NC
AC6 +1.8VSDGPU_MAIN STRAPS
AN3 AJ28
AN5 IFPA_L2_N NC AJ4
AM5 IFPA_L1 NC AJ5 strap0 strap1 strap2 strap3 strap4 strap5
AL6 IFPA_L1_N NC AL11
IFPA_L0 NC

2
AK6 C15 RV26 RV27 RV78 RV31 RV32
AJ6 IFPA_L0_N NC D19 100K_0402_5% 100K_0402_5% RV28 RV29 RV30 100K_0402_5% 100K_0402_5% 100K_0402_5% RV33
AH6 IFPA_AUX_SCL NC D20 X76@ @ 100K_0201_5% 100K_0201_5% 100K_0201_5% @ N17P@ N17P@ 100K_0201_5%

NC
IFPA_AUX_SDA_N NC D23 X76@ @ @ N17P@
NC D26

1
AJ9 NC
AH9 IFPB_L3
1 IFPB_L3_N 1
AP6 V32 STRAP0
AP5 IFPB_L2 NC STRAP1 ROM_SI
AM7 IFPB_L2_N STRAP2 ROM_SO
AL7 IFPB_L1 STRAP3 ROM_SCLK
AN8 IFPB_L1_N STRAP4
AM8 IFPB_L0 STRAP5
AK8 IFPB_L0_N
IFPB_AUX_SCL

2
AL8
IFPB_AUX_SDA_N

2
L4 RV34 RV35 RV79 RV39 RV41 N17P@
VDD_SENSE NVVDD1_VCC_SENSE 91 100K_0402_5% 100K_0402_5% RV36 RV37 RV38 100K_0402_5% 100K_0402_5% RV40 RV41
AK1 @ X76@ 100K_0201_5% 100K_0201_5% 100K_0201_5% DIS@ N18P@ 10K_0402_5% 100K_0201_5%
AJ1 IFPC_L0 @ DIS@ DIS@ N18P@ N18P@

1
AJ3 IFPC_L0_N L5
NVVDD1_VSS_SENSE 91 100K_0201_5%

1
AJ2 IFPC_L1 GND_SENSE
IFPC_L1_N SD043100380
AH3
IFPC_L2

TMDS
AH4
AG5 IFPC_L2_N X76 BOM
AG4 IFPC_L3
IFPC_L3_N
TEST +1.8VSDGPU_AON
AM1 AK11 TESTMODE RV42 1 DIS@ 2 10K_0402_5%
AM2 IFPD_L0 NVJTAG_SEL +1.8VSDGPU_AON
AM3 IFPD_L0_N AM10 JTAG_TCK_VGA @ TV5
AM4 IFPD_L1 JTAG_TCK AM11 JTAG_TDI @ TV6
AL3 IFPD_L1_N JTAG_TDI AP12 JTAG_TDO @ TV7
IFPD_L2 JTAG_TDO

1
AL4 AP11 JTAG_TMS @ TV8
IFPD_L2_N JTAG_TMS JTAG_RST 1
AK4 AN11 RV43 1 DIS@ 2 10K_0402_5% RV336 N18P@ CV355 N18P@
AK5 IFPD_L3 JTAG_TRST_N N18P@ 10K_0402_5% 0.1U_0201_10V6K
IFPD_L3_N RV337
33_0402_5% UV49 2 N18P@

2
AD2 ROM_CS# 1 2 ROM_CS_R# 1 8 RV339
AD3 IFPE_L0 ROM_SO 1 2 ROM_SO_R 2 CS# VCC 7 33_0402_5%
AD1 IFPE_L0_N 3 DO(IO1) HOLD#(IO3) 6 ROM_SCLK_R 1 2 ROM_SCLK
AC1 IFPE_L1 SERIAL RV338 @ 4 WP#(IO2) CLK 5 ROM_SI_R 1 2 ROM_SI
AC2 IFPE_L1_N H6 ROM_CS# 0_0402_5% GND DI(IO0)
2 AC3 IFPE_L2 ROM_CS_N H4 ROM_SCLK W25Q80EWSSIG_SO8 RV340 2
AC4 IFPE_L2_N ROM_SCLK H5 ROM_SI N18P@ 33_0402_5%
AC5 IFPE_L3 ROM_SI H7 ROM_SO
IFPE_L3_N ROM_SO SA00009QP00 N18P@

AE3
AE4 NC DGPU VBIOS ROM 8Mb
AF4 NC
AF5 NC
AD4 NC GENERAL
AD5 NC E1 GPU_BUFRST# @ TV9
AG1 NC BUFRST_N
AF1 NC M1
NC OVERT VGA_OVERT# 27

AG3

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AG2 IFPC_AUX_SCL
IFPC_AUX_SDA_N J2 STRAP0
STRAP0 J7 STRAP1
AK3 STRAP1 J6 STRAP2
AK2 IFPD_AUX_SCL STRAP2 J5 STRAP3
IFPD_AUX_SDA_N STRAP3 J3 STRAP4
STRAP4 J1 STRAP5
AB3 STRAP5
AB4 IFPE_AUX_SCL
IFPE_AUX_SDA_N K3
THERMDP K4
AF3 THERMDN
AF2 NC
NC

N18P-G0_FCBGA960~D
3 3
@

SMB_ATL_ADDR

* LOW Single GPU

High Dual GPU
4 4
DEVID_SEL

* LOW Orig. Device ID

High Support G-Sync GPUID
VGA_DEVICE
* LOW 3D Device
High VGA Device
Security Classification Compal Secret Data Compal Electronics, Inc.
PCIE_CFG
Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title
* LOW Normal signal swing
N17P STRAP 3/7
High Reduce the signal amplitude THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 29 of 100
A B C D E
 A B C D E

+1.35VSDGPU CHA
/6*1uF+2*10uF
Under
GPU
2*22uF+3*10uF+3*4.7uF+6*1uF

0.47U_0201_6.3V6K
CV395

0.47U_0201_6.3V6K
CV396

1U_0201_6.3V6M
CV18

1U_0201_6.3V6M
CV19

1U_0201_6.3V6M
CV20

1U_0201_6.3V6M
CV21

1U_0201_6.3V6M
CV22

1U_0201_6.3V6M
CV23

10U_0402_6.3V6M
CV24

10U_0402_6.3V6M
CV26
1 1 1 1 1 1 1 1 1 1 Under Near
+1.0VSDGPU
GPU GPU

2 2 2 2 2 2 2 2 2 2

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

1U_0201_6.3V6M
CV134

1U_0201_6.3V6M
CV13

1U_0201_6.3V6M
CV14

1U_0201_6.3V6M
CV33

1U_0201_6.3V6M
CV385

1U_0201_6.3V6M
CV386

4.7U_0402_6.3V6M
CV29

4.7U_0402_6.3V6M
CV16

4.7U_0402_6.3V6M
CV387

10U_0402_6.3V6M
CV28

10U_0402_6.3V6M
CV388

10U_0402_6.3V6M
CV389

22U_0603_6.3V6M
CV34

22U_0603_6.3V6M
CV390
1 1 1 1 1 1 1 1 1 1 1 1 1 1
@

@
2 2 2 2 2 2 2 2 2 2 2 2 2 2

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
reserve

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
1
UV1E 1
CHB
/6*1uF+2*10uF Part 5 of 7

AA27 AG19
FBVDDQ_0 PEX_DVDD_0
0.47U_0201_6.3V6K
CV397

0.47U_0201_6.3V6K
CV398

1U_0201_6.3V6M
CV126

1U_0201_6.3V6M
CV127

1U_0201_6.3V6M
CV128

1U_0201_6.3V6M
CV129

1U_0201_6.3V6M
CV130

1U_0201_6.3V6M
CV131

10U_0402_6.3V6M
CV132

10U_0402_6.3V6M
CV133
1 1 1 1 1 1 1 1 1 1 AA30 AG21
AB27 FBVDDQ_1 PEX_DVDD_1 AG22
AB33 FBVDDQ_2 PEX_DVDD_2 AG24
AC27 FBVDDQ_3 PEX_DVDD_3 AH21
2 2 2 2 2 2 2 2 2 2 FBVDDQ_4 PEX_DVDD_4
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
AD27 AH25
FBVDDQ_5 PEX_DVDD_5
@

DIS@

DIS@
AE27
AF27 FBVDDQ_6
FBVDDQ_7 2*22uF+3*10uF+3*4.7uF+7*1uF
AG27 AG13 Near
B13 FBVDDQ_8 PEX_HVDD_0 AG15 +1.8VSDGPU_MAIN
reserve FBVDDQ_9 PEX_HVDD_1 Under GPU
B19 AG16 GPU
E13 FBVDDQ_11 PEX_HVDD_2 AG18
FBVDDQ_12 PEX_HVDD_3

1U_0201_6.3V6M
CV399

1U_0201_6.3V6M
CV381

1U_0201_6.3V6M
CV380

1U_0201_6.3V6M
CV137

1U_0201_6.3V6M
CV136

1U_0201_6.3V6M
CV25

1U_0201_6.3V6M
CV15

4.7U_0402_6.3V6M
CV382

4.7U_0402_6.3V6M
CV17

4.7U_0402_6.3V6M
CV32

10U_0402_6.3V6M
CV30

10U_0402_6.3V6M
CV27

10U_0402_6.3V6M
CV383

22U_0603_6.3V6M
CV31

22U_0603_6.3V6M
CV384
E19 AG25 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
H10 FBVDDQ_14 PEX_HVDD_4 AH15
H11 FBVDDQ_15 PEX_HVDD_5 AH18
H12 FBVDDQ_16 PEX_HVDD_6 AH26
FBVDDQ_17 PEX_HVDD_7 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
GPU H13 AH27
FBVDDQ_18 PEX_HVDD_8

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
/5*22uF+2*10uF H14 AJ27
H18 FBVDDQ_19 PEX_HVDD_9 AK27
FBVDDQ_22 PEX_HVDD_10
10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1 1 1 1 1 1 1 H19 AL27
FBVDDQ_23 PEX_HVDD_11
CV37

CV38

CV202

CV36

CV39

CV40

CV41
H20 AM28
H21 FBVDDQ_24 PEX_HVDD_12 AN28

POWER
H22 FBVDDQ_25 PEX_HVDD_13
2 2 2 2 2 2 2 H23 FBVDDQ_26
FBVDDQ_27
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
H24
H8 FBVDDQ_28 AH12
FBVDDQ_29 PEX_PLL_HVDD +1.8VSDGPU_MAIN
H9 1
L27 FBVDDQ_30 +FP_FUSE_GPU CV43 DIS@
M27 FBVDDQ_31 1U_0201_6.3V6M
Place close to N27 FBVDDQ_32 AG12 12mils
P27 FBVDDQ_33 FP_FUSE_SRC 2
GPU FBVDDQ_34 Near
R27 GPU 3*4.7uF+5*1uF
2 T27 FBVDDQ_35 +1.8VSDGPU_MAIN +1.8VSDGPU_AON 2
T30 FBVDDQ_36 AG26
T33 FBVDDQ_37 NC
FBVDDQ_38
10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

1U_0201_6.3V6M
CV135

1U_0201_6.3V6M
CV49

1U_0201_6.3V6M
CV51

1U_0201_6.3V6M
CV391

1U_0201_6.3V6M
CV392

4.7U_0402_6.3V6M
CV50

4.7U_0402_6.3V6M
CV393

4.7U_0402_6.3V6M
CV394
1 1 1 1 1 1 1 Y27 1 1 1 1 1 1 1 1
FBVDDQ_43
CV217

CV218

CV219

CV220

CV221

CV222

CV223

J8
1V8_AON K8
2 2 2 2 2 2 2 1V8_AON 2 2 2 2 2 2 2 2

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
L8
B16 NC M8
FBVDDQ NC
@

E16
H15 FBVDDQ
H16 FBVDDQ
V27 FBVDDQ AH8
near GPU for NV update spec 1210 FBVDDQ IFPAB_PLLVDD Under Near
W27 AJ8 GPU GPU
W30 FBVDDQ IFPAB_RSET +1.8VSDGPU_MAIN
+1.35VSDGPU FBVDDQ 2*4.7uF+1*1uF+2*0.1uF
W33 RV394 2 N17P@ 1 0_0402_5%
FBVDDQ AF7

www.laptoprepairsecrets.com
IFPCD_PLLVDD
2

0.1U_0201_10V6K
CV52

0.1U_0201_10V6K
CV53

1U_0201_6.3V6M
CV54

4.7U_0402_6.3V6M
CV55
AF8 1 1 1 1
RV45 IFPCD_RSET
@ 0_0402_5%
AB8
IFPE_PLLVDD 2 2 2 2

N17P@

N17P@

N17P@

N17P@
AD6
1

FB_VDDQ_SENSE F1 IFPE_RSET
94 FB_VDDQ_SENSE FBVDDQ_SENSE

TV10@ FB_GND_SENSE F2 AG8 Under

PROBE_FB_GND IFP_IOVDD AG9
IFP_IOVDD GPU Near
+1.35VSDGPU
FB_CAL_PD_VDDQ GPU
RV47 1 DIS@ 2 40.2_0402_1% J27 AF6
FB_CAL_PD_VDDQ IFP_IOVDD AG6
IFP_IOVDD
RV48 1 DIS@ 2 40.2_0402_1% FB_CAL_PU_GND H27 AC7
FB_CAL_PU_GND IFP_IOVDD AC8
IFP_IOVDD
1 N17P@ 2 FB_CAL_TERM_GND H25 nVidia GPU PN
3 RV49 60.4_0402_1% FB_CAL_TERM_GND AG7 3
NC AN2
NC
RV49 N18P@ N17P-G1 PN R3(ROH)
N18P-G0_FCBGA960~D UV1 N17P@
@
40.2_0402_1%
SD034402A80

For nVidia N17P-G1 VRAM Device ID: 1C8C/CC For nVidia N18P-G0 VRAM Device ID: 1F91/D1 S IC N17P-G1-A1 FCBGA 908P GPU
SA0000A0660
STRAP 2 (H: RV28, L: RV36) STRAP 2 (H: RV28, L: RV36)
Strap/Vendor/Size Memory PN R3(ABO!) STRAP[2:0] STRAP 1 (H: RV27, L: RV35) Strap/Vendor/Size Memory PN R3(ABO!) STRAP[2:0] STRAP 1 (H: RV27, L: RV35) N18P-G0 PN R3(ROH)
STRAP 0 (H: RV26, L: RV34) STRAP 0 (H: RV26, L: RV34)
UV1 N18P@
(8Gb) UV4 X76_H4G@ 100K_0402_5%
RV26 X76_H4G@
SD028100380
(8Gb) UV4 X76_N18H4G@ 100K_0402_5%
RV34 X76_N18H4G@
SD028100380
0x05 UV5 X76_H4G@ 0x02 UV5 X76_N18H4G@
UV6 X76_H4G@ RV35 X76_H4G@ UV6 X76_N18H4G@ RV27 X76_N18H4G@
HYNIX UV7 X76_H4G@ 100K_0402_5% SD028100380 HYNIX UV7 X76_N18H4G@ 100K_0402_5% SD028100380
S IC N18P-G0-MP-A1 FCBGA 960P GPU
256M x32 S IC D5 256M32 H5GC8H24AJR-R2C BGA ABO! RV28 X76_H4G@ 256M x32 S IC D5 256M32 H5GC8H24AJR-R2C BGA ABO! RV36 X76_N18H4G@ SA0000CK230
SA0000C1700 100K_0201_5% SD043100380 SA0000C1700 100K_0201_5% SD043100380

(8Gb) UV4
UV5
X76_S4G@
X76_S4G@ 100K_0402_5%
RV26 X76_S4G@
SD028100380
(8Gb) UV4
UV5
X76_N18S4G@
X76_N18S4G@ 100K_0402_5%
RV34 X76_N18S4G@
SD028100380
0x03 UV6 X76_S4G@ 0x04 UV6 X76_N18S4G@
UV7 X76_S4G@ RV27 X76_S4G@ UV7 X76_N18S4G@ RV35 X76_N18S4G@
Samsung 100K_0402_5% SD028100380 Samsung 100K_0402_5% SD028100380
S IC D5 256M32 K4G80325FC-HC25 FBGA ABO! S IC D5 256M32 K4G80325FC-HC25 FBGA ABO!
4 256M x32 SA00009TA40 RV36 X76_S4G@ 256M x32 SA00009TA40 RV28 X76_N18S4G@ 4

100K_0201_5% SD043100380 100K_0201_5% SD043100380

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P POWER 4/7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 30 of 100
A B C D E
 A B C D E

UV1F
N17P VDDS
1uF*5/4.7uF*5 (under GPU) Part 6 of 7
330uF*1/22uF*3/10uF*2/4.7uF*2 A2 D2
AA17 GND_0 GND_100 D31
AA18 GND_1 GND_101 D33
AA20 GND_2 GND_102 E10
AA22 GND_3 GND_103 E22
AB12 GND_4 GND_104 E25
AB14 GND_5 GND_105 E5
UV1G AB16 GND_6 GND_106 E7
+NVVDD1 +NVVDD1 AB19 GND_7 GND_107 F28
AB2 GND_8 GND_108 F7
AA14 Part 7 of 7 V17 AB21 GND_9 GND_109 G10
AA21 VDD_1 VDD_56 V20 A33 GND_10 GND_110 G13
1 VDD_4 VDD_58 GND_11 GND_111 1
AB13 V22 AB23 G16
AB15 VDD_6 VDD_59 W12 AB28 GND_12 GND_112 G19
AB17 VDD_7 VDD_60 W16 AB30 GND_13 GND_113 G2
AB18 VDD_8 VDD_62 W19 AB32 GND_14 GND_114 G22
AB20 VDD_9 VDD_63 W23 AB5 GND_15 GND_115 G25
AB22 VDD_10 VDD_65 Y13 AB7 GND_16 GND_116 G28
AC12 VDD_11 VDD_66 Y15 AC13 GND_17 GND_117 G3
AC16 VDD_12 VDD_67 Y17 AC15 GND_18 GND_118 G30
AC19 VDD_14 VDD_68 Y18 AC17 GND_19 GND_119 G32
AC23 VDD_15 VDD_69 Y20 AC18 GND_20 GND_120 G33
M12 VDD_17 VDD_70 Y22 AA13 GND_21 GND_121 G5
M16 VDD_18 VDD_71 AC20 GND_22 GND_122 G7
M19 VDD_20 AC22 GND_23 GND_123 K2
M23 VDD_21 AE2 GND_24 GND_124 K28
N13 VDD_23 U1 AE28 GND_25 GND_125 K30
VDD_24 RSVD_VDDS_SENSE
NVVDD & NVVDDS merge GND_26 GND_126
N15 U2 confirm NV nc or not AE30 K32
N17 VDD_25 RSVD_GNDS_SENSE AE32 GND_27 GND_127 K33
N18 VDD_26 +NVVDD1 AE33 GND_28 GND_128 K5
N20 VDD_27 AE5 GND_29 GND_129 K7
N22 VDD_28 U4 AE7 GND_30 GND_130 M13
P14 VDD_29 XVDD_4 U5 AH10 GND_31 GND_131 M15
POWER
P21 VDD_31 XVDD_5 U6 AA15 GND_32 GND_132 M17
R13 VDD_34 XVDD_6 U7 AH13 GND_33 GND_133 M18
R15 VDD_36 XVDD_7 U8 AH16 GND_34 GND_134 M20
R17 VDD_37 XVDD_8 AH19 GND_35 GND_135 M22
R18 VDD_38 AH2 GND_36 GND_136 N12
R20 VDD_39 V1 AH22 GND_37 GND_137 N14
R22 VDD_40 XVDD_9 V2 AH24 GND_38 GND_138 N16
T12 VDD_41 XVDD_10 V3 AH28 GND_39 GND_139 N19
T16 VDD_42 XVDD_11 V4 AH29 GND_40 GND_140 N2
T19 VDD_44 XVDD_12 V5 AH30 GND_41 GND_141 N21
T23 VDD_45 XVDD_13 V6 AH32 GND_42 GND_142 N23
U13 VDD_47 XVDD_14 V7 AH33 GND_43 GND_143 N28
U15 VDD_48 XVDD_15 V8 AH5 GND_44 GND_144 N30

GND
U18 VDD_49 XVDD_16 AH7 GND_45 GND_145 N32
2 U20 VDD_51 W2 AJ7 GND_46 GND_146 N33 2
U22 VDD_52 XVDD_17 W3 AK10 GND_47 GND_147 N5
V13 VDD_53 XVDD_18 W4 AK7 GND_48 GND_148 N7
V15 VDD_54 XVDD_19 W5 AL12 GND_49 GND_149 P13
VDD_55 XVDD_20 W7 AL14 GND_50 GND_150 P15
XVDD_21 W8 AL15 GND_51 GND_151 P17
XVDD_22 AL17 GND_52 GND_152 P18
AL18 GND_53 GND_153 P20
AA12 AL2 GND_54 GND_154 P22
AA16 VDD_72 Y1 AL20 GND_55 GND_155 R12
AA19 VDD_73 XVDD_20 Y2 AL21 GND_56 GND_156 R14
AA23 VDD_74 XVDD_21 Y3 AL23 GND_57 GND_157 R16
AC14 VDD_75 XVDD_22 Y4 AL24 GND_58 GND_158 R19
AC21 VDD_76 XVDD_23 Y5 AL26 GND_59 GND_159 R21
M14 VDD_77 XVDD_24 Y6 AL28 GND_60 GND_160 R23
M21 VDD_78 XVDD_25 Y7 AL30 GND_61 GND_161 T13
P12 VDD_79 XVDD_26 Y8 AL32 GND_62 GND_162 T15

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P16 VDD_80 XVDD_27 AL33 GND_63 GND_163 T17
P19 VDD_81 AL5 GND_64 GND_164 T18
P23 VDD_82 AA1 AM13 GND_65 GND_165 T2
T14 VDD_83 XVDD_28 AA2 AM16 GND_66 GND_166 T20
T21 VDD_84 XVDD_29 AA3 AM19 GND_67 GND_167 T22
U17 VDD_85 XVDD_30 AA4 AM22 GND_68 GND_168 AG11
V18 VDD_86 XVDD_31 AA5 AM25 GND_69 GND_169 T28
W14 VDD_87 XVDD_32 AA6 AN1 GND_70 GND_170 T32
W21 VDD_88 XVDD_33 AA7 AN10 GND_71 GND_171 T5
VDD_89 XVDD_34 AA8 AN13 GND_72 GND_172 T7
XVDD_35 AN16 GND_73 GND_173 U12
AN19 GND_74 GND_174 U14
AB11 R11 AN22 GND_75 GND_175 U16
AB24 VDD_90 VDD_106 R24 AN25 GND_76 GND_176 U19
AD11 VDD_91 VDD_107 U11 AN30 GND_77 GND_177 U21
AD13 VDD_92 VDD_108 U24 AN34 GND_78 GND_178 U23
AD15 VDD_93 VDD_109 V11 AN4 GND_79 GND_179 V12
AD17 VDD_94 VDD_110 V24 AN7 GND_80 GND_180 V14
3 AD18 VDD_95 VDD_111 Y11 AP2 GND_81 GND_181 V16 3
AD20 VDD_96 VDD_112 Y24 AP33 GND_82 GND_182 V19
AD22 VDD_97 VDD_113 B1 GND_83 GND_183 V21
AD24 VDD_98 B10 GND_84 GND_184 V23
L11 VDD_95 B22 GND_85 GND_185 W13
L13 VDD_96 B25 GND_86 GND_186 W15
L15 VDD_97 B28 GND_87 GND_187 W17
L17 VDD_98 B31 GND_88 GND_188 W18
L18 VDD_99 B34 GND_89 GND_189 W20
L20 VDD_100 B4 GND_90 GND_190 W22
L22 VDD_101 B7 GND_91 GND_191 W28
L24 VDD_102 C10 GND_92 GND_192 Y12
N11 VDD_103 C13 GND_93 GND_193 Y14
N24 VDD_104 C19 GND_94 GND_194 Y16
VDD_105 C22 GND_95 GND_195 Y19
C25 GND_96 GND_196 Y21
C28 GND_97 GND_197 Y23
N18P-G0_FCBGA960~D C7 GND_98 GND_198
GND_99
@
L21 AA11
L23 GND_214 GND_200 AA24
M11 GND_215 GND_201 AC11
M24 GND_216 GND_202 AC24
P11 GND_217 GND_203 AD12
T11 GND_218 GND_204 AD14
T24 GND_219 GND_205 AD16
W11 GND_220 GND_206 AD19
W24 GND_221 GND_207 AD21
P24 GND_222 GND_208 AD23
GND_223 GND_209 L12
GND_210 L14
GND_211 L16
GND_212 L19
GND_213

4 AH11 RV395 2 N17P@ 1 0_0402_5% 4

NC
C16
GND_OPT W32
GND_OPT
N18P-G0_FCBGA960~D
@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P POWER & GND 5/7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 31 of 100
A B C D E
 A B C D E

MF=1
MF=0
28 FBA_D[63:0] 2 OF 2 2 OF 2
UV4B +1.35VSDGPU UV5B

K4 A4 FBA_D0 K4 A4 FBA_D56
28 FBA_CMD6 A8/A7 DQ0 28 FBA_CMD26 A8/A7 DQ0

1
H5 A2 FBA_D1 H5 A2 FBA_D57
28 FBA_CMD11 A9/A1 DQ1 FBA_D2 28 FBA_CMD23 A9/A1 DQ1 FBA_D58
H4 B4 RV50 H4 B4
28 FBA_CMD10 A10/A0 DQ2 FBA_D3 28 FBA_CMD22 A10/A0 DQ2 FBA_D59
K5 B2 549_0402_1% K5 B2
28 FBA_CMD7 J5 A11/A6 DQ3 E4 FBA_D4 28 FBA_CMD27 J5 A11/A6 DQ3 E4 FBA_D60
DIS@
28 FBA_CMD9 A12/RFU#J5/NC#J5 DQ4 E2 FBA_D5 28 FBA_CMD25 A12/RFU#J5/NC#J5 DQ4 E2 FBA_D61
RV51

2
H11 DQ5 F4 FBA_D6 931_0402_1% H11 DQ5 F4 FBA_D62
28 FBA_CMD2 BA0/A2 DQ6 FBA_D7 FBA_VREFC_R FBA0_VREFC 28 FBA_CMD19 BA0/A2 DQ6 FBA_D63
K10 F2 1 2 K10 F2
1 28 FBA_CMD4 BA1/A5 DQ7 FBA_D8 28 FBA_CMD17 BA1/A5 DQ7 FBA_D48 1
K11 A11 K11 A11
28 FBA_CMD3 H10 BA2/A4 DQ8 A13 FBA_D9 28 FBA_CMD18 H10 BA2/A4 DQ8 A13 FBA_D49
DIS@
28 FBA_CMD1 BA3/A3 DQ9 28 FBA_CMD20 BA3/A3 DQ9

1
B11 FBA_D10 B11 FBA_D50
J4 DQ10 B13 FBA_D11 RV52 J4 DQ10 B13 FBA_D51
28 FBA_CMD8 ABI# DQ11 FBA_D12 28 FBA_CMD24 ABI# DQ11 FBA_D52
G3 E11 1.33K_0402_1% G3 E11
28 FBA_CMD12 G12 RAS# DQ12 E13 FBA_D13 28 FBA_CMD31 G12 RAS# DQ12 E13 FBA_D53
28 FBA_CMD0 L3 CS# DQ13 F11 FBA_D14 28 FBA_CMD21 L3 CS# DQ13 F11 FBA_D54
DIS@
28 FBA_CMD15 28 FBA_CMD28

2
CAS# DQ14 CAS# DQ14

1
L12 F13 FBA_D15 L12 F13 FBA_D55
28 FBA_CMD5 WE# DQ15 U11 FBA_D16 28 FBA_CMD16 WE# DQ15 U11 FBA_D40
QV3 DIS@

Drain

Source
J12 DQ16 U13 FBA_D17 J12 DQ16 U13 FBA_D41
LBSS139WT1G_SC70-3

Gate
28 FBA_CLKA0 J11 CK DQ17 T11 FBA_D18 28 FBA_CLKA1 J11 CK DQ17 T11 FBA_D42
28 FBA_CLKA0# CK# DQ18 FBA_D19 28 FBA_CLKA1# CK# DQ18 FBA_D43
J3 T13 J3 T13
28 FBA_CMD14 CKE# DQ19 FBA_D20 28 FBA_CMD30 CKE# DQ19 FBA_D44
N11 N11

3
D2 DQ20 N13 FBA_D21 D2 DQ20 N13 FBA_D45
28 FBA_DBI0 DBI0# DQ21 FBA_D22 28 FBA_DBI7 DBI0# DQ21 FBA_D46
D13 M11 D13 M11
28 FBA_DBI1 DBI1# DQ22 FBA_D23 28 FBA_DBI6 DBI1# DQ22 FBA_D47
P13 M13 P13 M13
28 FBA_DBI2 DBI2# DQ23 FBA_D24 28 FBA_DBI5 DBI2# DQ23 FBA_D32
P2 U4 P2 U4
28 FBA_DBI3 DBI3# DQ24 FBA_D25 27,33 VRAM_VREF_CTL 28 FBA_DBI4 DBI3# DQ24 FBA_D33
U2 U2
J2 DQ25 T4 FBA_D26 J2 DQ25 T4 FBA_D34
28 FBA_CMD13 RESET# DQ26 FBA_D27 28 FBA_CMD29 RESET# DQ26 FBA_D35
T2 T2
J10 DQ27 N4 FBA_D28 J10 DQ27 N4 FBA_D36
FBA0_ZQ1 J13 SEN DQ28 N2 FBA_D29 +1.35VSDGPU FBA1_ZQ3 J13 SEN DQ28 N2 FBA_D37
J1 ZQ DQ29 M4 FBA_D30 J1 ZQ DQ29 M4 FBA_D38
MF DQ30 M2 FBA_D31 MF DQ30 M2 FBA_D39
D4 DQ31 D4 DQ31
28 FBA_WCK01 WCK01 28 FBA_WCK67 WCK01
D5 C2 D5 C2
28 FBA_WCK01# WCK01# EDC0 FBA_EDC0 28 28 FBA_WCK67# WCK01# EDC0 FBA_EDC7 28
C13 C13
EDC1 FBA_EDC1 28 EDC1 FBA_EDC6 28
P4 R13 P4 R13
28 FBA_WCK23 WCK23 EDC2 FBA_EDC2 28 28 FBA_WCK45 WCK23 EDC2 FBA_EDC5 28
P5 R2 P5 R2
28 FBA_WCK23# WCK23# EDC3 FBA_EDC3 28 28 FBA_WCK45# WCK23# EDC3 FBA_EDC4 28
1

1
X76@ X76@
VRAM4G@ H5GC2H24BFR-T2C_FBGA170 DIS@ H5GC2H24BFR-T2C_FBGA170
RV58 RV61
121_0402_1% 121_0402_1%
2 2
2

2
+1.35VSDGPU
UV4A 1 OF 2 +1.35VSDGPU
UV5A 1 OF 2
C5 B5
C10 VDD VSS B10 C5 B5
D11 VDD VSS D10 C10 VDD VSS B10
G1 VDD VSS G5 D11 VDD VSS D10
VDD VSS FBA_CLKA0 FBA_CLKA0# +1.35VSDGPU VDD VSS
G4 G10 G1 G5
G11 VDD VSS H1 G4 VDD VSS G10
VDD VSS VDD VSS

1
G14 H14 G11 H1
+1.35VSDGPU VDD VSS VDD VSS
L1 K1 RV63 RV95 G14 H14
VDD VSS VDD VSS

1U_0201_6.3V6M
CV58

1U_0201_6.3V6M
CV59

1U_0201_6.3V6M
CV67

1U_0201_6.3V6M
CV56

1U_0201_6.3V6M
CV57

1U_0201_6.3V6M
CV60

1U_0201_6.3V6M
CV68
L4 K14 40.2_0402_1% 40.2_0402_1% 1 1 1 1 1 1 1 L1 K1
L11 VDD VSS L5 VRAM4G@ VRAM4G@ L4 VDD VSS K14
L14 VDD VSS L10 L11 VDD VSS L5

www.laptoprepairsecrets.com

2
VDD VSS VDD VSS
1U_0201_6.3V6M
CV61

1U_0201_6.3V6M
CV62

1U_0201_6.3V6M
CV63

1U_0201_6.3V6M
CV64

1U_0201_6.3V6M
CV65

1U_0201_6.3V6M
CV66

1U_0201_6.3V6M
CV69

1 1 1 1 1 1 1 P11 P10 L14 L10

VDD VSS 2 2 2 2 2 2 2 VDD VSS

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
R5 T5 1 P11 P10
VDD VSS VDD VSS

0.01U_0402_16V7K
R10 T10 VRAM4G@ R5 T5
VDD VSS VDD VSS

CV190
R10 T10
2 2 2 2 2 2 2 VDD VSS
VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

B1 A1
B3 VDDQ VSSQ A3 2 B1 A1
B12 VDDQ VSSQ A12 B3 VDDQ VSSQ A3
B14 VDDQ VSSQ A14 B12 VDDQ VSSQ A12
D1 VDDQ VSSQ C1 B14 VDDQ VSSQ A14
VDDQ VSSQ Close to VDDQ VSSQ
D3 C3 VRAM D1 C1
D12 VDDQ VSSQ C4 D3 VDDQ VSSQ C3
VDDQ VSSQ VDDQ VSSQ

1U_0201_6.3V6M
CV173

1U_0201_6.3V6M
CV85

1U_0201_6.3V6M
CV140

10U_0402_6.3V6M
CV73

10U_0402_6.3V6M
CV74

10U_0402_6.3V6M
CV75

10U_0402_6.3V6M
CV76
Close to D14 C11 1 1 1 1 1 1 1 D12 C4
E5 VDDQ VSSQ C12 D14 VDDQ VSSQ C11
VRAM VDDQ VSSQ VDDQ VSSQ
E10 C14 E5 C12
VDDQ VSSQ VDDQ VSSQ
1U_0201_6.3V6M
CV77

1U_0201_6.3V6M
CV78

1U_0201_6.3V6M
CV79

10U_0402_6.3V6M
CV169

10U_0402_6.3V6M
CV81

10U_0402_6.3V6M
CV82

10U_0402_6.3V6M
CV83

1 1 1 1 1 1 1 F1 E1 E10 C14
VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ

DIS@

DIS@

DIS@
F3 E3 F1 E1
VDDQ VSSQ VDDQ VSSQ

DIS@

DIS@

DIS@

DIS@
F12 E12 F3 E3
F14 VDDQ VSSQ E14 FBA_CLKA1 FBA_CLKA1# F12 VDDQ VSSQ E12
2 2 2 2 2 2 2 VDDQ VSSQ VDDQ VSSQ
VRAM4G@

VRAM4G@

VRAM4G@

3 G2 F5 F14 E14 3
VDDQ VSSQ VDDQ VSSQ
1

1
VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

G13 F10 G2 F5
H3 VDDQ VSSQ H2 RV96 RV62 G13 VDDQ VSSQ F10
H12 VDDQ VSSQ H13 40.2_0402_1% 40.2_0402_1% H3 VDDQ VSSQ H2
K3 VDDQ VSSQ K2 DIS@ DIS@ H12 VDDQ VSSQ H13
VDDQ VSSQ Close to VDDQ VSSQ
K12 K13 VRAM K3 K2
2

L2 VDDQ VSSQ M5 K12 VDDQ VSSQ K13

L13 VDDQ VSSQ M10 L2 VDDQ VSSQ M5
Close to VDDQ VSSQ 1 VDDQ VSSQ
0.01U_0402_16V7K

10U_0402_6.3V6M
CV84

10U_0402_6.3V6M
CV142

22U_0603_6.3V6M
CV70

22U_0603_6.3V6M
CV71

22U_0603_6.3V6M
CV72

22U_0603_6.3V6M
CV138

22U_0603_6.3V6M
CV139
VRAM M1 N1 DIS@ 1 1 1 1 1 1 1 L13 M10
VDDQ VSSQ VDDQ VSSQ
CV191

M3 N3 M1 N1
M12 VDDQ VSSQ N12 M3 VDDQ VSSQ N3
VDDQ VSSQ 2 VDDQ VSSQ
10U_0402_6.3V6M
CV86

10U_0402_6.3V6M
CV87

22U_0603_6.3V6M
CV143

22U_0603_6.3V6M
CV144

22U_0603_6.3V6M
CV145

22U_0603_6.3V6M
CV146

22U_0603_6.3V6M
CV147

1 1 1 1 1 1 1 M14 N14 M12 N12

N5 VDDQ VSSQ R1 2 2 2 2 2 2 2 M14 VDDQ VSSQ N14
VDDQ VSSQ VDDQ VSSQ

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
N10 R3 N5 R1
P1 VDDQ VSSQ R4 N10 VDDQ VSSQ R3
2 2 2 2 2 2 2 P3 VDDQ VSSQ R11 P1 VDDQ VSSQ R4
VDDQ VSSQ VDDQ VSSQ
VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

P12 R12 P3 R11

P14 VDDQ VSSQ R14 P12 VDDQ VSSQ R12
VDDQ VSSQ (3GHz and VDDQ VSSQ
T1 U1 up) P14 R14
T3 VDDQ VSSQ U3 T1 VDDQ VSSQ U1
VDDQ VSSQ Around VDDQ VSSQ
T12 U12 VRAM T3 U3
T14 VDDQ VSSQ U14 T12 VDDQ VSSQ U12
VDDQ VSSQ T14 VDDQ VSSQ U14
Around FBA0_VREFC VDDQ VSSQ
VRAM J14 A5
VREFC VPP/NC#A5 FBA0_VREFC
1U_0201_6.3V6M
CV161

1U_0201_6.3V6M
CV160

1U_0201_6.3V6M
CV158

1U_0201_6.3V6M
CV162

1U_0201_6.3V6M
CV163

1U_0201_6.3V6M
CV164

1U_0201_6.3V6M
CV159

1U_0201_6.3V6M
CV165
U5 1 1 1 1 1 1 1 1 J14 A5
VPP/NC#U5 VREFC VPP/NC#A5
1U_0201_6.3V6M
CV166

1U_0201_6.3V6M
CV168

1U_0201_6.3V6M
CV167

1U_0201_6.3V6M
CV170

1U_0201_6.3V6M
CV80

1U_0201_6.3V6M
CV172

1U_0201_6.3V6M
CV171

1U_0201_6.3V6M
CV141

1 1 1 1 1 1 1 1 A10 U5
VREFD VPP/NC#U5
820P_0402_50V7K

1 U10 1 A10
CV89 VREFD U10 VREFD
2 2 2 2 2 2 2 2 VREFD
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

820P_0402_50V7K
VRAM4G@ CV88
2 2 2 2 2 2 2 2
VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

VRAM4G@

X76@ DIS@
2 H5GC2H24BFR-T2C_FBGA170 2 X76@
H5GC2H24BFR-T2C_FBGA170

x32
x32 only
4 only 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P GDDR5 CHA 6/7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 32 of 100
A B C D E
 A B C D E

MF=1
28 FBB_D[63:0] MF=0 UV7B 2 OF 2

UV6B 2 OF 2 K4 A4 FBB_D56
28 FBB_CMD26 H5 A8/A7 DQ0 A2 FBB_D57
+1.35VSDGPU
FBB_D0 28 FBB_CMD23 A9/A1 DQ1 FBB_D58
K4 A4 H4 B4
28 FBB_CMD6 A8/A7 DQ0 FBB_D1 28 FBB_CMD22 A10/A0 DQ2 FBB_D59
H5 A2 K5 B2
28 FBB_CMD11 A9/A1 DQ1 28 FBB_CMD27 A11/A6 DQ3

1
H4 B4 FBB_D2 J5 E4 FBB_D60
28 FBB_CMD10 K5 A10/A0 DQ2 B2 FBB_D3 28 FBB_CMD25 A12/RFU#J5/NC#J5 DQ4 E2 FBB_D61
RV67
28 FBB_CMD7 J5 A11/A6 DQ3 E4 FBB_D4 H11 DQ5 F4 FBB_D62
549_0402_1%
28 FBB_CMD9 A12/RFU#J5/NC#J5 DQ4 FBB_D5 28 FBB_CMD19 BA0/A2 DQ6 FBB_D63
E2 DIS@ K10 F2
1 DQ5 FBB_D6 28 FBB_CMD17 BA1/A5 DQ7 FBB_D48 1
H11 F4 RV68 K11 A11
28 FBB_CMD2 28 FBB_CMD18

2
K10 BA0/A2 DQ6 F2 FBB_D7 931_0402_1% H10 BA2/A4 DQ8 A13 FBB_D49
28 FBB_CMD4 K11 BA1/A5 DQ7 A11 FBB_D8 FBB_VREFC_R 1 2 FBB0_VREFC 28 FBB_CMD20 BA3/A3 DQ9 B11 FBB_D50
28 FBB_CMD3 H10 BA2/A4 DQ8 A13 FBB_D9 J4 DQ10 B13 FBB_D51
28 FBB_CMD1 BA3/A3 DQ9 FBB_D10 28 FBB_CMD24 ABI# DQ11 FBB_D52
B11 DIS@ G3 E11
DQ10 28 FBB_CMD31 RAS# DQ12

1
J4 B13 FBB_D11 G12 E13 FBB_D53
28 FBB_CMD8 G3 ABI# DQ11 E11 FBB_D15 28 FBB_CMD21 L3 CS# DQ13 F11 FBB_D54
RV70
28 FBB_CMD12 RAS# DQ12 FBB_D13 28 FBB_CMD28 CAS# DQ14 FBB_D55
G12 E13 1.33K_0402_1% L12 F13
28 FBB_CMD0 L3 CS# DQ13 F11 FBB_D14 28 FBB_CMD16 WE# DQ15 U11 FBB_D40
28 FBB_CMD15 CAS# DQ14 FBB_D12 DQ16 FBB_D41
L12 F13 DIS@ J12 U13
28 FBB_CMD5 28 FBB_CLKA1

2
WE# DQ15 CK DQ17

1
U11 FBB_D16 J11 T11 FBB_D42
DQ16 FBB_D17 28 FBB_CLKA1# CK# DQ18 FBB_D43
J12 U13 QV4 DIS@ J3 T13

Drain

Source
28 FBB_CLKA0 CK DQ17 FBB_D18 28 FBB_CMD30 CKE# DQ19 FBB_D44
J11 T11 LBSS139WT1G_SC70-3 N11

Gate
28 FBB_CLKA0# CK# DQ18 FBB_D19 DQ20 FBB_D45
J3 T13 D2 N13
28 FBB_CMD14 CKE# DQ19 FBB_D22 28 FBB_DBI7 DBI0# DQ21 FBB_D46
N11 D13 M11
DQ20 FBB_D21 28 FBB_DBI6 DBI1# DQ22 FBB_D47
D2 N13 P13 M13
28 FBB_DBI0 28 FBB_DBI5

3
D13 DBI0# DQ21 M11 FBB_D23 P2 DBI2# DQ23 U4 FBB_D32
28 FBB_DBI1 DBI1# DQ22 FBB_D20 28 FBB_DBI4 DBI3# DQ24 FBB_D33
P13 M13 U2
28 FBB_DBI2 DBI2# DQ23 FBB_D24 DQ25 FBB_D34
P2 U4 J2 T4
28 FBB_DBI3 DBI3# DQ24 FBB_D25 28 FBB_CMD29 RESET# DQ26 FBB_D35
U2 T2
DQ25 FBB_D26 27,32 VRAM_VREF_CTL DQ27 FBB_D36
J2 T4 J10 N4
28 FBB_CMD13 RESET# DQ26 FBB_D27 +1.35VSDGPU FBB1_ZQ3 J13 SEN DQ28 FBB_D37
T2 N2
J10 DQ27 N4 FBB_D28 J1 ZQ DQ29 M4 FBB_D38
FBB0_ZQ1 J13 SEN DQ28 N2 FBB_D29 MF DQ30 M2 FBB_D39
J1 ZQ DQ29 M4 FBB_D31 D4 DQ31
MF DQ30 FBB_D30 28 FBB_WCK67 WCK01
M2 D5 C2
DQ31 28 FBB_WCK67# WCK01# EDC0 FBB_EDC7 28
D4 C13
28 FBB_WCK01 WCK01 EDC1 FBB_EDC6 28
D5 C2 P4 R13
28 FBB_WCK01# WCK01# EDC0 FBB_EDC0 28 28 FBB_WCK45 WCK23 EDC2 FBB_EDC5 28
C13 P5 R2
EDC1 FBB_EDC1 28 28 FBB_WCK45# WCK23# EDC3 FBB_EDC4 28
P4 R13
28 FBB_WCK23 WCK23 EDC2 FBB_EDC2 28
P5 R2
28 FBB_WCK23# WCK23# EDC3 FBB_EDC3 28

1
X76@
DIS@ H5GC2H24BFR-T2C_FBGA170
1

X76@ RV72
DIS@ H5GC2H24BFR-T2C_FBGA170 121_0402_1%
2 2
RV74

2
121_0402_1%
2

+1.35VSDGPU
UV7A 1 OF 2

+1.35VSDGPU C5 B5
+1.35VSDGPU VDD VSS
UV6A 1 OF 2 C10 B10
D11 VDD VSS D10
+1.35VSDGPU VDD VSS
C5 B5 G1 G5
C10 VDD VSS B10 G4 VDD VSS G10
VDD VSS VDD VSS

1U_0201_6.3V6M
CV90

1U_0201_6.3V6M
CV94

1U_0201_6.3V6M
CV96

1U_0201_6.3V6M
CV97

1U_0201_6.3V6M
CV91

1U_0201_6.3V6M
CV95

1U_0201_6.3V6M
CV98
D11 D10 1 1 1 1 1 1 1 G11 H1
G1 VDD VSS G5 G14 VDD VSS H14
VDD VSS VDD VSS
1U_0201_6.3V6M
CV99

1U_0201_6.3V6M
CV100

1U_0201_6.3V6M
CV101

1U_0201_6.3V6M
CV92

1U_0201_6.3V6M
CV93

1U_0201_6.3V6M
CV102

1U_0201_6.3V6M
CV103

1 1 1 1 1 1 1 G4 G10 L1 K1
G11 VDD VSS H1 L4 VDD VSS K14
VDD VSS FBB_CLKA0 FBB_CLKA0# 2 2 2 2 2 2 2 VDD VSS

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
G14 H14 L11 L5
L1 VDD VSS K1 L14 VDD VSS L10

www.laptoprepairsecrets.com
VDD VSS VDD VSS

1
2 2 2 2 2 2 2
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

L4 K14 P11 P10

L11 VDD VSS L5 RV76 RV77 R5 VDD VSS T5
L14 VDD VSS L10 40.2_0402_1% 40.2_0402_1% R10 VDD VSS T10
P11 VDD VSS P10 DIS@ DIS@ VDD VSS
R5 VDD VSS T5 B1 A1

2
R10 VDD VSS T10 B3 VDDQ VSSQ A3
VDD VSS Close to VDDQ VSSQ
1 VRAM B12 A12
VDDQ VSSQ

0.01U_0402_16V7K
Close to B1 A1 B14 A14
VDDQ VSSQ VDDQ VSSQ

CV193

1U_0201_6.3V6M
CV104

1U_0201_6.3V6M
CV180

1U_0201_6.3V6M
CV181

10U_0402_6.3V6M
CV174

10U_0402_6.3V6M
CV108

10U_0402_6.3V6M
CV189

10U_0402_6.3V6M
CV110
VRAM B3 A3 1 1 1 1 1 1 1 D1 C1
B12 VDDQ VSSQ A12 D3 VDDQ VSSQ C3
VDDQ VSSQ 2 VDDQ VSSQ
1U_0201_6.3V6M
CV111

1U_0201_6.3V6M
CV112

1U_0201_6.3V6M
CV113

10U_0402_6.3V6M
CV114

10U_0402_6.3V6M
CV115

10U_0402_6.3V6M
CV116

10U_0402_6.3V6M
CV117

1 1 1 1 1 1 1 B14 A14 D12 C4

D1 VDDQ VSSQ C1 D14 VDDQ VSSQ C11
VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ

DIS@

DIS@

DIS@
D3 C3 E5 C12
VDDQ VSSQ VDDQ VSSQ

DIS@

DIS@

DIS@

DIS@
D12 C4 E10 C14
2 2 2 2 2 2 2 VDDQ VSSQ VDDQ VSSQ
DIS@

DIS@

DIS@

D14 C11 F1 E1
VDDQ VSSQ VDDQ VSSQ
DIS@

DIS@

DIS@

DIS@

E5 C12 DIS@ F3 E3
E10 VDDQ VSSQ C14 F12 VDDQ VSSQ E12
F1 VDDQ VSSQ E1 F14 VDDQ VSSQ E14
3 F3 VDDQ VSSQ E3 FBB_CLKA1 FBB_CLKA1# G2 VDDQ VSSQ F5 3
F12 VDDQ VSSQ E12 G13 VDDQ VSSQ F10
VDDQ VSSQ
1 Close to VDDQ VSSQ
1
F14 E14 VRAM H3 H2
G2 VDDQ VSSQ F5 RV97 RV98 H12 VDDQ VSSQ H13
Close to VDDQ VSSQ VDDQ VSSQ
VRAM G13 F10 40.2_0402_1% 40.2_0402_1% K3 K2
VDDQ VSSQ VDDQ VSSQ

10U_0402_6.3V6M
CV118

10U_0402_6.3V6M
CV119

22U_0603_6.3V6M
CV153

22U_0603_6.3V6M
CV155

22U_0603_6.3V6M
CV154

22U_0603_6.3V6M
CV156

22U_0603_6.3V6M
CV157
H3 H2 DIS@ DIS@ 1 1 1 1 1 1 1 K12 K13
H12 VDDQ VSSQ H13 L2 VDDQ VSSQ M5
2

VDDQ VSSQ VDDQ VSSQ

10U_0402_6.3V6M
CV120

10U_0402_6.3V6M
CV121

22U_0603_6.3V6M
CV148

22U_0603_6.3V6M
CV149

22U_0603_6.3V6M
CV150

22U_0603_6.3V6M
CV152

22U_0603_6.3V6M
CV151

1 1 1 1 1 1 1 K3 K2 L13 M10
K12 VDDQ VSSQ K13 M1 VDDQ VSSQ N1
VDDQ VSSQ 1 2 2 2 2 2 2 2 VDDQ VSSQ
0.01U_0402_16V7K

L2 M5 M3 N3
VDDQ VSSQ VDDQ VSSQ
CV192

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
L13 M10 M12 N12
2 2 2 2 2 2 2 M1 VDDQ VSSQ N1 M14 VDDQ VSSQ N14
VDDQ VSSQ 2 VDDQ VSSQ
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

M3 N3 N5 R1
M12 VDDQ VSSQ N12 N10 VDDQ VSSQ R3
M14 VDDQ VSSQ N14 P1 VDDQ VSSQ R4
N5 VDDQ VSSQ R1 P3 VDDQ VSSQ R11
N10 VDDQ VSSQ R3 P12 VDDQ VSSQ R12
VDDQ VSSQ Around VDDQ VSSQ
P1 R4 DIS@ VRAM P14 R14
P3 VDDQ VSSQ R11 T1 VDDQ VSSQ U1
Around VDDQ VSSQ (3GHz and VDDQ VSSQ
VRAM P12 R12 up) T3 U3
P14 VDDQ VSSQ R14 T12 VDDQ VSSQ U12
VDDQ VSSQ VDDQ VSSQ
1U_0201_6.3V6M
CV182

1U_0201_6.3V6M
CV184

1U_0201_6.3V6M
CV183

1U_0201_6.3V6M
CV185

1U_0201_6.3V6M
CV175

1U_0201_6.3V6M
CV188

1U_0201_6.3V6M
CV187

1U_0201_6.3V6M
CV109
T1 U1 1 1 1 1 1 1 1 1 T14 U14
T3 VDDQ VSSQ U3 VDDQ VSSQ
T12 VDDQ VSSQ U12 FBB0_VREFC J14 A5
VDDQ VSSQ VREFC VPP/NC#A5
1U_0201_6.3V6M
CV107

1U_0201_6.3V6M
CV176

1U_0201_6.3V6M
CV186

1U_0201_6.3V6M
CV177

1U_0201_6.3V6M
CV178

1U_0201_6.3V6M
CV179

1U_0201_6.3V6M
CV105

1U_0201_6.3V6M
CV106

1 1 1 1 1 1 1 1 T14 U14 U5
VDDQ VSSQ 2 2 2 2 2 2 2 2 VPP/NC#U5
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
A10
FBB0_VREFC J14 A5 U10 VREFD
VREFC VPP/NC#A5 1 VREFD
U5
2 2 2 2 2 2 2 2 VPP/NC#U5
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

820P_0402_50V7K
A10 CV122
U10 VREFD DIS@ X76@
VREFD 2 H5GC2H24BFR-T2C_FBGA170
1 x32
CV123 only
820P_0402_50V7K

DIS@ X76@
x32 H5GC2H24BFR-T2C_FBGA170
2
only
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P GDDR5 CHB 7/7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 33 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 34 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N18E-GDDR6_D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 35 of 100
5 4 3 2 1
 A B C D E

+3V_OVRM

CSSP_B+ RV343 1 N18P@ 2 75K_0402_1% PFM_CH1_BS_IN1

1
CV361 RV344

2K_0402_5%
RV345

2K_0402_5%
RV346

2K_0402_5%
RV347

2K_0402_5%
RV348
1 2 1 1 2 1
649_0402_1%
1000P_0402_50V7K +3V_OVRM N18P@ N18P@ N18P@ N18P@
ON_X76@
N18P@

2
PFM_CH1_SH_IN_P3
CSSP_NVVDD RV349 1 N18P@ 2 75K_0402_1% PFM_CH1_BS_IN2 RV351 1 uPI_X76@
2 0_0402_5% PFM_CH1_SH_IN_N3
+3VSDGPU SNN_PFM_CH1_SH_IN_P4
CV362 RV350 SNN_PFM_CH1_SH_IN_N4
2 1 1 2
0730 FAE CF suggest RV399 1 ON_X76@
2 0_0402_5% +3VLP

2
649_0402_1%

0_0402_5%
RV352

0_0402_5%
RV353
1000P_0402_50V7K
N18P@
ON_X76@ 0727 FAE CF suggest
1

1
@ @ N18P@
CV363
UV47 1U_0201_6.3V6M
2
3 27
6 BS_IN1 VCC
PFM_CH1_BS_IN3 11 BS_IN2 2 PFM_CH1_SH_IN_P1 RV355 1 N18P@ 2 100_0402_1% CSSP_B+
PFM_CH1_BS_IN4 14 BS_IN3 SH_IN_P1 PFM_CH1_SH_IN_N1 CSSN_B+ CSSP_B+ 92
1 RV356 1 @ 2 0_0402_5%
BS_IN4 SH_IN_N1 PFM_CH1_SH_IN_P2 CSSN_B+ 92
5 RV357 1 N18P@ 2 100_0402_1% CSSP_NVVDD
SH_IN_P2 PFM_CH1_SH_IN_N2 CSSN_NVVDD CSSP_NVVDD 92
4 RV358 1 @ 2 0_0402_5%
PFM_FILTER_GND_FET SH_IN_N2 PFM_CH1_SH_IN_P3 CSSN_NVVDD 92
@1 RV354 2 9 12
GND_FET SH_IN_P3 13 PFM_CH1_SH_IN_N3
0_0402_5% SH_IN_N3 15 SNN_PFM_CH1_SH_IN_P4
RV359 1 2
ON_X76@ 475_0402_1% 32 SH_IN_P4 16 SNN_PFM_CH1_SH_IN_N4
RV360 1 2
ON_X76@ 475_0402_1% 7 SH_O1 SH_IN_N4 N18P@
2 RV361 1 @ 2 169_0402_1% 10 SH_O2 20 ADC_IN_P RV362 1 @ 2 0_0402_5% CV364 1 2 47P_0402_50V8J 2
RV363 1 @ 2 169_0402_1% 17 SH_O3 DIFF_OUT_P 19 ADC_IN_N RV364 1 @ 2 0_0402_5% CV365 1 2 47P_0402_50V8J
SH_O4 DIFF_OUT_N N18P@
1 1 1 1
PFM_PF_BSOK_R
0.015U_0402_16V7K

0.015U_0402_16V7K

0.015U_0402_16V7K

0.015U_0402_16V7K

30
BS_OK ADC_IN_P 27
CV366

CV367

CV368

CV369

RV365
PFM_ADC_MUX_SEL_R 29 SNN_ADC_CUSTOM8 ADC_IN_N 27
1 @ 2 8
2 2 2 2 0_0402_5% MUX_SEL NC 18 SNN_ADC_CUSTOM18
NC 21 SNN_ADC_CUSTOM21
PFM_ADC_FILTER_EN 28 NC 31 SNN_ADC_CUSTOM31
ENABLE NC ON_X76@ 243K_0402_1%
23 PFM_BG_REF_OUT RV366 1 2
PFM_SKIP_R 25 BG_REF_OUT 24 PFM_BS_REF
@ @ N18P@ N18P@ SKIP BS_REF 22 PFM_CM_REF_IN
CM_REF_IN RV367

www.laptoprepairsecrets.com
1 1 1

1
27 GPIO22_OC_W ARN# PFM_ADC_FILTER_MODE

1000P_0402_50V7K
CV370

1000P_0402_50V7K
CV371

1000P_0402_50V7K
CV372

10K_0402_1%
RV369
26 33 1 2 1
MODE_SEL GND

1000P_0402_50V7K
CV373
365K_0402_1%

1
681K_0402_1%
RV368
2 2 2 N18P@
NCP45491XMNTW G_QFN32_4X4
2

N18P@
SA0000C9Q00

N18P@
N18P@
ON_X76@ N18P@ N18P@ N18P@

2
+3V_OVRM

+3V_OVRM
1

RV370 +3V_OVRM
@ 10K_0402_1% RV371
3 1K_0402_1% 3

1
2

PFM_ADC_FILTER_EN RV372
2

N18P@ 10K_0402_1%
N18P@
1

PFM_SKIP_R
1

D
RV373

2
10K_0402_1% 2 OVRM_EN
OVRM_EN 58
N18P@ G
1

S QV16 @ PFM_PF_BSOK_R
2

L2N7002W T1G_SC-70-3 RV400 DIS@ UV47 uPI_X76@

SB00001GE00 100K_0402_5%

S IC US5650QQKI W QFN 32P POW ER MONITOR

2

+3V_OVRM
SA0000CMA00 0730 FAE CF suggest , reserve pull high only

RV344 uPI_X76@ RV359 uPI_X76@ RV366 uPI_X76@

1

RV374
@ 10K_0402_1% 487_0402_1% 357_0402_1% 324K_0402_1%
SD00000EL80 SD034357080 SD034324380
2

PFM_ADC_FILTER_MODE
RV350 uPI_X76@ RV360 uPI_X76@
1

RV375
4 10K_0402_1% 487_0402_1% 357_0402_1% 4
@
SD00000EL80 SD034357080
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
OVR-M
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom FH50Q M/B LA-J621P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 25, 2019 Sheet 36 of 100
A B C D E
 5 4 3 2 1

+1.8V_AON/+1.8VS +1.8V_MAIN
+1.8VALW

+1.8VSDGPU_AON UV45
+1.8VALW UG27 1 +1.8VSDGPU_MAIN
1 14 2 VIN1
VIN1 VOUT1 1 VIN2
2 13 DIS@ CV357
+5VALW VIN1 VOUT1 CG335 220P_0402_50V7K 1U_0201_6.3V6M 7 6
1V8_AON_EN VIN thermal VOUT

10U_0402_6.3V6M
3 12 1 2 1
ON1 CT1 2

CG334 DIS@

10U_0402_6.3V6M

0.1U_0201_10V6K
CV360
D 3 D
PU at GPU side +5VALW VBIAS 1 1

CV359 DIS@
1 2 4 11 DIS@
CG337 0.1U_0201_10V6K VBIAS GND 4 5
1 2 0_0402_5% 1.8VS_ON 5 10 1 2 +1.8VS 2 27 1.8VSDGPU_MAIN_EN3V3 ON GND
R1669
58,78,84,86 SUSP# ON2 CT2 2 2
C21 4700P_0402_50V7K 1 1
+1.8VS_LS

DIS@
2 1 6 9 J9 JP@ @ CV400 DIS@ CV358 AOZ1334DI-01_DFN8-7_3X3
+1.8VALW VIN2 VOUT2
C24 1 2 7 8 1 0.1U_0201_10V6K 0.1U_0201_10V6K DIS@
C2751 @ 4.7U_0402_6.3V6M VIN2 VOUT2 JUMP_43X79
1U_0201_6.3V6M 15 C26 2 2 SA000070V00
GPAD
0.1U_0201_10V6K
EM5209VF_DFN14_2X3 2

For Power down sequence

+1.8VALW N18P@ DV9
+3VS 1 2
22U_0603_6.3V6M

RB751S40T1G_SOD523-2

5
UV46
1

CG339

DIS@ RV341

VCC
DGPU_PWR_EN 1 10K_0402_5%
IN B 4 3VSDGPU_EN_1 1 2 3VSDGPU_EN_R
2

1.8VSDGPU_MAIN_EN3V3 2 OUT Y N18P@ 3VSDGPU_EN_R 78

GND
IN A

1
1
N18P@ CV356 RV342
NL17SZ08EDFT2G_SC70-5 0.1U_0201_10V6K 1M_0402_5%

3
N18P@ DIS@
2

2
For Power down sequence
C DV1 DIS@ C
2 1 1V8_AON_EN
27 DGPU_PWR_EN
RB751S40T1G_SOD523-2 +1.8VSDGPU_AON

1 2
1 1
RV22 CV374
200K_0402_1% CV35 2.2U_0402_6.3V6M +FP_FUSE_GPU
DIS@ 0.1U_0201_10V6K N18P@
2 DIS@ 2 UV48 12mils
6 1
5 VIN1 VOUT1 2
VIN2 VOUT2

1
1
4 3 CV376 RV384

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VSS EN 2.2U_0402_6.3V6M 2.21K_0402_1%
GS7616SC-R_SOT363-6 N18P@ N18P@
2
@

2
2 @ 1 GPIO26_FP_FUSE_R
27 GPIO26_FP_FUSE
RV382 1

10K_0201_5%
0_0402_5% @

RV383
CV375
N18P@ 0.1U_0201_10V6K +1.8VSDGPU_AON
2
UV50 +FP_FUSE_GPU

1
1
2 VIN1
+5VALW VIN2
7 6
VIN thermal VOUT
3
B VBIAS B
4 5
ON GND

AOZ1334DI-01_DFN8-7_3X3
N18P@
SA000070V00

+3VSDGPU +1.0VSDGPU

+NVVDD1
+1.35VSDGPU
2

DIS@

2
+5VS N18P@ +5VS RV377 +5VS

2
RV380 20_0402_5% +5VS DIS@ DIS@
1_0603_5% RV116 RV118
2

2
N18P@ DIS@ 20_0402_5% DIS@ 1_0603_5%
1

2
RV381 RV376 DIS@ RV117

1
100K_0402_5% 100K_0402_5% RV115 100K_0402_5%

1
100K_0402_5%
6

6
D D D
1

1
6
3VSDGPU_EN_R# 2 QV15A GPUCORE_EN# 2 QV14A DIS@ D NVVDD_EN# 2

1
G 2N7002KDW_SOT363-6 G 2N7002KDW_SOT363-6 1.35VSDGPU_EN# 2 G

3
N18P@ G D

3
S S D 5 S
27,91 NVVDD1_EN
1

1
3

D D 5 S G QV10A
27,94 1.35VSDGPU_EN

1
3VSDGPU_EN_R 5 5 G QV11A 2N7002KDW_SOT363-6
G 27 GPUCORE_EN G S
2N7002KDW_SOT363-6 DIS@

4
S DIS@ QV10B

4
A S S QV11B A
2N7002KDW_SOT363-6
4

QV15B QV14B 2N7002KDW_SOT363-6 DIS@

2N7002KDW_SOT363-6 2N7002KDW_SOT363-6 DIS@
N18P@ DIS@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GPU DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 37 of 100
5 4 3 2 1
 5 4 3 2 1

LCD POWER CIRCUIT W=60mils +INVPW R_B+

+3VS +LCDVDD Place closed to JEDP1 LX1 LED PANEL Conn.
UX1 W=60mils HCB2012KF-221T30_0805 W=60mils
1U_0201_6.3V6M +LCDVDD
CX22
5 1 +19VB_CPU 1 2 W=60mils JEDP1
IN OUT 1
1 +INVPW R_B+ 1
2 1 1 SM01000EJ00 3000ma 2
GND 3 2
220ohm@100mhz 3

10U_0402_6.3V6M
4 3 CX21 1 1 DCR 0.04 4
2 EN OC 0.1U_0201_10V6K 5 4
1 1 5
CX23 2 2@

CX1

68P_0402_50V8J
CX24 @EMC@

1000P_0402_50V7K
CX25 @EMC@
SY6288C20AAC_SOT23-5 CX26 INVTPW M 6
8 INVTPW M 6
SA000079400 4.7U_0402_6.3V6M 0.1U_0201_10V6K BKOFF# 7
2 2@ 58 BKOFF# EDP_HPD 7
D 8 D
8 ENVDD 2 2 8 EDP_HPD 8
Vih=1.5
+LCDVDD 9
10 9
11 10
PANEL_OD#_R 12 11
13 12
EDP_AUXN_C 14 13
EDP_AUXP_C 15 14
16 15
EDP_TXP0_C 17 16
EDP_TXN0_C 18 17
19 18
EDP_TXP1_C 20 19
RX11 10K_0402_5% EDP_TXN1_C 21 20
2 @ 1 22 21
+LCDVDD EDP_TXP2_C 22
23
EDP_HPD RX13 1 2 100K_0402_5% RX12 10K_0402_5% EDP_TXN2_C 24 23
1 @ 2 25 24
INVTPW M RX14 1 @ 2 100K_0402_5% EDP_TXP3_C 26 25
EDP_TXN3_C 27 26
@EMC@ 28 27
CX27 1 2 220P_0402_50V7K RX21 1 RS@ 2 0_0402_5% PANEL_OD#_R 29 28
9 PANEL_OD# 29
@EMC@ 30
BKOFF# CX28 1 2 220P_0402_50V7K DX2 1 2 31 30
@ 32 31
Touch Screen +TS_PW R 32
RX15 1 @ 2 10K_0402_5% RB751V-40_SOD323-2 33
TS_EN 34 33
58 TS_EN 34
+3VS_CAM 35 41
USB20_N0_L 36 35 GND 42
C USB20_P0_L 37 36 GND 43 C
38 37 GND 44
For Camera DMIC_CLK_R 38 GND
39 45
56 DMIC_CLK_R DMIC_DATA_R 39 GND
40 46
Touch Screen 56 DMIC_DATA_R 40 GND
ACES_50203-04001-002
+5VS +3VS +TS_PW R CONN@

CX11 1 2 0.1U_0201_10V6K EDP_TXP0_C RX16 1 @ 2 0_0603_5% SP010014B10

8 EDP_TXP0 EDP_TXN0_C
CX12 1 2 0.1U_0201_10V6K RX17 1 RS@ 2 0_0603_5%
8 EDP_TXN0 EDP_TXP1_C
CX13 1 2 0.1U_0201_10V6K
8 EDP_TXP1

3
CX14 1 2 0.1U_0201_10V6K EDP_TXN1_C
8 EDP_TXN1 EDP_TXP2_C
CX15 1 2 0.1U_0201_10V6K
8 EDP_TXP2 EDP_TXN2_C
CX16 1 2 0.1U_0201_10V6K
8
8
8
EDP_TXN2
EDP_TXP3
EDP_TXN3
CX17
CX18
1
1
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
EDP_TXP3_C
EDP_TXN3_C
www.laptoprepairsecrets.com +3VS

RX18 1 RS@ 2 0_0603_5%

+3VS_CAM DX1
@EMC@
YSLC05CH_SOT23-3

SCA00000U10

1
W=20mils

0.1U_0201_10V6K
CX30

1U_0201_6.3V6M
CX31
1 1

8 EDP_AUXP CX19 1 2 0.1U_0201_10V6K EDP_AUXP_C @

8 EDP_AUXN CX20 1 2 0.1U_0201_10V6K EDP_AUXN_C
2 2

B B

Place closed to JEDP1

RX19 1 2 15_0402_1%
LX2
CX32 1 2 470P_0402_50V8J USB20_P0_RC 4 3 USB20_P0_L
10 USB20_P0

CX33 1 2 470P_0402_50V8J USB20_N0_RC 1 2 USB20_N0_L

10 USB20_N0
RX20 1 2 15_0402_1%
DLM0NSN900HY2D_4P
EMC@
SM070005U00

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EDP/CAMERA/DMIC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 38 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 39 of 100
5 4 3 2 1
 5 4 3 2 1

+1.2V_HDMI
C2737 +5VALW +5VS_DISP
1U_0201_6.3V6M U74 W=40mils ZZZ
2 1

1
+5VS 3
2

22P_0402_50V8J
U1302 R4012 OUT

10U_0402_6.3V6M

10U_0402_6.3V6M
+3VS 10 1 4.99K_0402_1% @ 1

C2759
VDD VOUT IN 1
C2736 9 2
10U_0402_6.3V6M 8 VIN VOUT 3 1 2 C543 HDMI_ROYALTY
1 1

2
2 1 7 VIN VOUT 4 GND 0.1U_0201_10V6K ROYALTY HDMI W/LOGO+HDCP

C2738

C2752
6 VIN ADJ/NC 5 2
+3VS EN PGOOD RO0000003HM

1
AP2330W-7_SC59-3 45@
11 R4013 2 2
PAD SA00004ZA00
10K_0402_1%
RT9059GQW_WDFN10_3X3
D
SA000071S00 D

2
+3VS
HDMI_RT_CLKN R756 1 2 0_0402_5% HDMI_L_CLKN For HDMI DDC Capacitance Leakage issue
@ Improve Intra-pair Skew on CLK+/-
+1.2V_HDMI

0.1U_0201_10V6K
0.01U_0402_16V7K

0.01U_0402_16V7K
L2512
1 1 1 SM070003V00
2 1 2
D2016 @EMC@

C2746
C2749 HDMI_RT_HPD 6 3 HDMI_CTRL_CLK

C2744

C2745
0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K

0.01U_0402_16V7K

0.01U_0402_16V7K

1 1 1 1 1 0.01U_0402_16V7K 1
2 2 2 3 4 @ 3.3P_0402_50V8
I/O4 I/O2
1
U2615
C2739

C2740

C2748

6 1 HCM1012GH900BP_4P 5 2
C2741

C2742

C2743

2 2 2 2 2 2 30 VDD12 VDD33 24 HDMI_RT_CLKP R765 1 2 0_0402_5% HDMI_L_CLKP VDD GND

11 VDD12 VDD33 @
43 VDDA12
46 VDDRX12 23 HDMI_RT_TX_P2 4 1 HDMI_CTRL_DAT
VDDRX12 OUT_D2p HDMI_RT_TX_N2 HDMI_RT_TX_N0 HDMI_L_TX_N0 +5VS_DISP I/O3 I/O1
15 22 R769 1 RS@ 2 0_0402_5%
18 VDDTX12 OUT_D2n AZC099-04S.R7G_SOT23-6
37 VDDTX12 20 HDMI_RT_TX_P1
POWERSWITCH OUT_D1p HDMI_RT_TX_N1 L2513 SC300001G00
19 @ SM070003V00
C505 1 2 .1U_0402_16V7K HDMI_TX_P2 38 OUT_D1n 2 1
8 APU_DP0_P0 HDMI_TX_N2 IN_D2p HDMI_RT_TX_P0
C506 1 2 .1U_0402_16V7K 39 17
8 APU_DP0_N0 IN_D2n OUT_D0p HDMI_RT_TX_N0
16
C507 1 2 .1U_0402_16V7K HDMI_TX_P1 41 OUT_D0n 3 4
8 APU_DP0_P1 HDMI_TX_N1 IN_D1p HDMI_RT_CLKP D2017
C508 1 2 .1U_0402_16V7K 42 14 @EMC@
8 APU_DP0_N1 IN_D1n OUT_CLKp HDMI_RT_CLKN HDMI_L_CLKN HDMI_L_CLKN
13 1 1 10 9
C509 1 2 .1U_0402_16V7K HDMI_TX_P0 44 OUT_CLKn HCM1012GH900BP_4P
8 APU_DP0_P2 HDMI_TX_N0 IN_D0p APU_DP0_CTRL_DATA HDMI_RT_TX_P0 HDMI_L_TX_P0 HDMI_L_CLKP HDMI_L_CLKP
C510 1 2 .1U_0402_16V7K 45 33 R779 1 RS@ 2 0_0402_5% 2 2 9 8
8 APU_DP0_N2 IN_D0n SDA_SRC/AUXN APU_DP0_CTRL_CLK APU_DP0_CTRL_DATA 8
34
HDMI_CLKP SCL_SRC/AUXP HDMI_CTRL_DAT APU_DP0_CTRL_CLK 8 HDMI_L_TX_N0 HDMI_L_TX_N0
C511 1 2 .1U_0402_16V7K 47 8 4 4 7 7
8 APU_DP0_P3 HDMI_CLKN IN_CLKp SDA_SNK HDMI_CTRL_CLK
C512 1 2 .1U_0402_16V7K 48 7
8 APU_DP0_N3 IN_CLKn SCL_SNK HDMI_L_TX_P0 HDMI_L_TX_P0
5 5 6 6
R4018 0_0402_5% HDMI_RT_TX_N1 R781 1 RS@ 2 0_0402_5% HDMI_L_TX_N1
C HDMI_DCIN_EN 3 40 HDMI_HPD 2 RS@ 1 3 3 C
HDMI_EQ DCIN_ENB HPD_SRC HDMI_RT_HPD APU_DP0_HPD 8
5 21
HDMI_I2C_ADDR EQ HPD_SNK L2514
31 @ SM070003V00 8
+3VS I2C_ADDR HPD_SNK internal PD 150K ohm 2 1
10 L05ESDL5V0NA-4 SLP2510P8
25 RSV1 32 HDMI_ID
NC HDMI_ID SC300003Z00
2

26 9 3 4
R4004 RSV2 HDMI_CEC 12
R4006 should be placed close to REXT pin. CEC_EN D2018 @EMC@
10K_0402_5% HCM1012GH900BP_4P
R4006 1 2 4.99K_0402_1% 36 29 CSCL R4020 1 @ 2 0_0402_5% HDMI_L_TX_N1 1 1 10 9 HDMI_L_TX_N1
REXT CSCL EC_SMB_CK2 8,27,58,66 HDMI_RT_TX_P1 HDMI_L_TX_P1
4 28 CSDA R4021 1 @ 2 0_0402_5% EC_SMB_DA2 8,27,58,66 R782 1 RS@ 2 0_0402_5%
1

RESET# RESET# 35 PDB CSDA HDMI_L_TX_P1 2 2 8 HDMI_L_TX_P1

9
Enhance Vswing HDMI_PRE 27 RESETB
2 PRE 49 HDMI_L_TX_N2 4 4 7 HDMI_L_TX_N2
1 TESTMODEB EPAD
7

C2747
1U_0201_6.3V6M HDMI_RT_TX_N2 R783 1 RS@ 2 0_0402_5% HDMI_L_TX_N2 HDMI_L_TX_P2 5 5 6 6 HDMI_L_TX_P2

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2 PS8409AQFN48GTR2-A0_QFN48_6X6 3 3
SA0000AC330 L2515
@ SM070003V00
S IC PS8409AQFN48GTR2-A2 QFN48P REPEATER 2 1 8

2019-09-03 Modify to SA0000AC330 PS8409AQFN48GTR2-A2-M2 L05ESDL5V0NA-4 SLP2510P8

3 4
SC300003Z00
HDMI_DCIN_EN HDMI_PRE
HCM1012GH900BP_4P
DC coupling enable; Internal pull up, 3.3V I/O. Output pre-emphasis setting;Internal pull-up 3.3V I/O
1

HDMI_RT_TX_P2 R794 1 RS@ 2 0_0402_5% HDMI_L_TX_P2

@ L: DC coupling input L: Pre-emphasis =2.5dB
R4005 H: Default,AC coupling input @ R4007 H: Default, No Pre-emphasis
4.7K_0402_5% 4.7K_0402_5% HDMI connector
2

JHDMI1
HDMI_RT_HPD 19
+5VS_DISP +3VS 18 HP_DET
+5VS_DISP +5V
17
B HDMI_CTRL_DAT 16 DDC/CEC_GND B
HDMI_CTRL_CLK 15 SDA
+3VS 14 SCL
13 Reserved
HDMI_L_CLKN 12 CEC 20
CK- GND
1

+3VS 11 21
CK_shield GND

1
@ HDMI_L_CLKP 10 22
R4009 R4014 R4015 R4016 R4017 HDMI_L_TX_N0 9 CK+ GND 23
D0- GND
1

4.7K_0402_5% Receiver equalization setting(Internal 150K PD) 2K_0402_5% 2K_0402_5% 47K_0402_5% @ 47K_0402_5% @ 8
@
HDMI_ID enable ; Internal pull down;3.3V I/O HDMI_L_TX_P0 7 D0_shield
(*) L: programmable EQ for channel loss up to 5.3dB L: Default, HDMI ID enable
2

HDMI_EQ R4008 HDMI_L_TX_N1 6 D0+

2
( ) H: programmable EQ for channel loss up to 10dB 4.7K_0402_5% H: HDMI ID disable 5 D1-
D1_shield
1

HDMI_CTRL_DAT APU_DP0_CTRL_DATA HDMI_L_TX_P1 4

( ) M: programmable EQ for channel loss up to 14dB
2

@ HDMI_ID HDMI_L_TX_N2 3 D1+

R4010 2 D2-
4.7K_0402_5% HDMI_CTRL_CLK APU_DP0_CTRL_CLK HDMI_L_TX_P2 1 D2_shield
D2+
2

ACON_HMR2E-AK120D
CONN@
DC232000Y00

+3VS
1

@
I2C Slave Address select i on; I nt er nal pull do wn; 3. 3V I / O
R4011 L: Default, Slave address 0x10-0x2F.
4.7K_0402_5% H: Alternat i ve sal ve addr ess 0x90- 0x9F, 0x D0- 0x DF.
2

HDMI_I2C_ADDR

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI REDRIVER (PS8409)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 40 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 41 of 100
5 4 3 2 1
 5 4 3 2 1

+5VALW +5VALW _MUX

US14
5 1
IN OUT

10U_0402_6.3V6M

0.1U_0201_10V6K
2 1 1
GND
D D

CS116

CS15
4 3
58,72,73 USB_EN EN OC
SY6288C20AAC_SOT23-5 2 2

Close to Pin19

+5VALW _MUX +USB3_VCCC

CC1_VCONN CS130 1 2 220P_0402_50V7K

CC2_VCONN CS129 1 2 220P_0402_50V7K
1

RS134
RS20 200K_0402_1%
4.7K_0402_5%
US3
2

OCP_DET# VMON
1

VMON 17 12 CC1_VCONN
VMON CC1 CC2_VCONN CC1_VCONN 43
RS128 RS135 14 CC2_VCONN 43
10K_0402_1% 10K_0402_1% OCP_DET# 16 CC2
43 OCP_DET# OCP_DET
USBC_EN 15
2

43 USBC_EN VBUS_EN Type-C Port Side

C 11 USB3_CC_TX_P2 CS112 1 2 .1U_0402_16V7K USB3_CC_TX_P2_C C
USB3.0 (Port 3) System side C_TX2_1P/2N 10 USB3_CC_TX_N2 CS113 1 2 .1U_0402_16V7K USB3_CC_TX_N2_C USB3_CC_TX_P2_C 43
C_TX2_1N/2P USB3_CC_TX_N2_C 43
CS125 1 2 0.22U_0201_6.3V6K USB3_ARX_C_DTX_P3 4
10 USB3_ARX_DTX_P3 USB3_ARX_C_DTX_N3 SSRX_1P/2N USB3_CC_RX_P2
CS126 1 2 0.22U_0201_6.3V6K 5 24 CS121 1 2 0.33U_0201_6.3V6M USB3_CC_RX_P2_C USB3_CC_RX_P2_C 43
10 USB3_ARX_DTX_N3 SSRX_1N/2P C_RX2_1P/2N USB3_CC_RX_N2
1 CS122 1 2 0.33U_0201_6.3V6M USB3_CC_RX_N2_C USB3_CC_RX_N2_C 43
C_RX2_1N/2P

CS127 1 2 0.22U_0201_6.3V6K USB3_ATX_C_DRX_P3 6 10 Gbps 2:1 MUX 8 USB3_CC_TX_P1 CS114 1 2 .1U_0402_16V7K USB3_CC_TX_P1_C
10 USB3_ATX_DRX_P3 USB3_ATX_C_DRX_N3 SSTX_1P/2N C_TX1_1P/2N USB3_CC_TX_N1 USB3_CC_TX_N1_C USB3_CC_TX_P1_C 43
10 USB3_ATX_DRX_N3 CS128 1 2 0.22U_0201_6.3V6K 7 9 CS115 1 2 .1U_0402_16V7K
SSTX_1N/2P C_TX1_1N/2P USB3_CC_TX_N1_C 43

2 USB3_CC_RX_P1 CS123 1 2 0.33U_0201_6.3V6M USB3_CC_RX_P1_C

C_RX1_1P/2N USB3_CC_RX_N1 USB3_CC_RX_P1_C 43
3 CS124 1 2 0.33U_0201_6.3V6M USB3_CC_RX_N1_C

www.laptoprepairsecrets.com
PLUG_ORI
M1
M0
23
21
22
GPIO
CURRENT_M1
CURRENT_M0
C_RX1_1N/2P

USB3_CC_RX_P2_C
USB3_CC_RX_N1_C 43

USB3_CC_RX_N2_C

VCON_IN
LDO_3V3
18
REXT

2
5V_IN
1

RS129 25 RS130 RS131

6.2K_0402_1% E-PAD 220K_0201_1% 220K_0201_1%
RTS5441E-GRT_QFN24_4X4

20

19

13
+3VO_MUX +3VO_MUX

1
2

+3VO_MUX +5VALW _MUX

B B
1

1 1
1

CS14 CS117 USB3_CC_RX_P1_C

RS1 RS3 4.7U_0402_6.3V6M 0.1U_0201_10V6K USB3_CC_RX_N1_C
RS114 @ 10K_0402_5% 10K_0402_5%
10K_0402_5% 2 2
Close to Pin13
2

2
2

PLUG_ORI M1 M0 1 2 RS132 RS133

TYPEC_1P5A 43,58
RS137 0_0402_5% 220K_0201_1% 220K_0201_1%
1

1
RS115 RS2 @ RS4 @
10K_0402_5% 10K_0402_5% 10K_0402_5%
2

5441E Current Limit RTS5441 M0 truth table by 2018 BIOS spec

M1 M0 MODE limit point Condition
TYPEC_1P5A_EC MODE
L H 0.9A H 3A 3.5A AC mode or Battery >30%
H L 1.5A L 1.5A 1.92A Battery <30% when DC mode
A H H 3A A

confirm realtek hand-shake

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CC+ USB MUX
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 42 of 100
5 4 3 2 1
 5 4 3 2 1

+5VALW +USB3_VCCC

RSET

SGA00003700
150U_D2_6.3VY_R15M
CS95
1

1
0.1U_0201_10V6K

0.1U_0402_25V6

22U_0805_25V6M

22U_0805_25V6M
1 1 1 1

CS96

CS97 @

CS98 @

CS99 @
+ RS113 RS109 RS110
6.2K_0402_5% 4.3K_0402_5% 8.2K_0402_5%
2 2 2 2 2

3 2
US11
D
D 6 1 5 TYPEC_3A 58 D
IN OUT G

RSET 5 2 S QS2B

4
SET GND 1 @ 2 2N7002KDW _SOT363-6
OCP_DET# 42

6
RS136 0_0402_5% D
4 3 2 TYPEC_1P5A 42,58
42 USBC_EN EN FLAG G

1
SY6861B1ABC_TSOT23-6 1
RB77 S QS2A

1
47K_0402_5% footprint : G518 CS100 2N7002KDW _SOT363-6
0.1U_0201_10V6K
PN : SA0000BDN00(SILERGY SY6861B1) 2 @

2
SILERGY SY6861B1 MOS Current Limit
For ESD request
TYPEC_1P5A TYPEC_3A RSET(kΩ ) MODE limit point
DS3 EMC@
1 9 USB3_CC_TX_P1_C
42 USB3_CC_TX_P1_C L L 6.2 0.9A 1.09A
2 8 USB3_CC_TX_N1_C
42 USB3_CC_TX_N1_C L H 3.53 1.5A 1.92A
CC1_VCONN 4 7 CC1_VCONN
H L 2.54 2A 2.67A
TBTA_SBU1 5 6 TBTA_SBU1
*H H 1.94 3A 3.5A

C C
3

TVW DF1004AD0_DFN9
SC300003Z00

DS4 EMC@
1 9

2 8

4 7 USB3_CC_TX_N2_C
42 USB3_CC_TX_N2_C

42 USB3_CC_TX_P2_C 5

3
6 USB3_CC_TX_P2_C

www.laptoprepairsecrets.com +USB3_VCCC +USB3_VCCC

JTYPEC1
TVW DF1004AD0_DFN9 A1 B12
GND GND
SC300003Z00 USB3_CC_TX_P1_C A2 B11 USB3_CC_RX_P1_C
USB3_CC_TX_N1_C A3 SSTXP1 SSRXP1 B10 USB3_CC_RX_N1_C
0.1U_0402_25V6 2 1 CS84 SSTXN1 SSRXN1
DS6 EMC@ A4 B9 CS87 1 2 0.1U_0402_25V6
USB20_P3_L 1 9 USB20_P3_L VBUS VBUS
1
CS13 A5 B8 TBTA_SBU2
USB20_N3_L USB20_N3_L 42 CC1_VCONN CC1 SBU2
2 8 10U_0603_25V6M
B USB20_P3_L A6 B7 USB20_N3_L B
4 7 USB3_CC_RX_N2_C 2 USB20_N3_L A7 DP1 DN2 B6 USB20_P3_L
42 USB3_CC_RX_N2_C DN1 DP2
3

5 6 USB3_CC_RX_P2_C 2 TBTA_SBU1 A8 B5 CC2_VCONN 42

42 USB3_CC_RX_P2_C SBU1 CC2
0.1U_0402_25V6
2 1 CS86 A9 B4 CS85 1 2 0.1U_0402_25V6
DS19 EMC@ VBUS VBUS
3 PESD24VS2UT_SOT23-3 USB3_CC_RX_N2_C A10 B3 USB3_CC_TX_N2_C
SCA00004500 USB3_CC_RX_P2_C A11 SSRXN2 SSTXN2 B2 USB3_CC_TX_P2_C
1

TVW DF1004AD0_DFN9 SSRXP2 SSTXP2

SC300003Z00 A12 B1
GND GND

DS5 EMC@ 1 5
CC2_VCONN 1 9 CC2_VCONN 2 GND GND 6
3 GND GND 7
TBTA_SBU2 2 8 TBTA_SBU2 4 GND GND 8
GND GND
4 7 USB3_CC_RX_N1_C DEREN_40-42407-0246300RHF
42 USB3_CC_RX_N1_C
CONN@
5 6 USB3_CC_RX_P1_C
42 USB3_CC_RX_P1_C DC23300RC00

3
CC1_VCONN & CC2_VCONN need 20miil trace width.
TVW DF1004AD0_DFN9
SC300003Z00
A A

RS144 1 2 15_0402_1%
LS10 EMC@
CS141 1 2 470P_0402_50V8J USB20_P3_RC 2 1 USB20_P3_L
10 USB20_P3 2 1
Security Classification Compal Secret Data Compal Electronics, Inc.
CS142 1 2 470P_0402_50V8J USB20_N3_RC 3 4 USB20_N3_L 2019/07/24 2020/07/24 Title
10 USB20_N3 3 4 Issued Date Deciphered Date
RS145 1 2 15_0402_1% DLM0NSN900HY2D_4P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB TYPE C
SM070005U00 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 43 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 44 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 45 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 46 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 47 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 48 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 49 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 50 of 100
5 4 3 2 1
 A B C D E

+3V_LAN Rising time (10%~90%) must >0.5mS and <100mS

RTL8111H LDO mode

+3VALW +3V_LAN
RTL8118ASA SWR mode

RL2 @
0_0805_5% LDO@
1 2 W=60mil RL1 1 2 0_0603_5% W=60mil Place near Pin 11,32
+LAN_VDD +3V_LAN
60mil 60mil 300mA 300mA W=60mil
UL1 SWR@
5 1 +REGOUT LL1 1 2
1 IN OUT 1
2 2.2UH_HPC252012NF-2R2M_20%
GND
1 IDC=1200mA 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0.1U_0201_10V6K
CL1

4.7U_0402_6.3V6M
CL2

0.1U_0201_10V6K
CL3

0.1U_0201_10V6K
CL4

0.1U_0201_10V6K
CL5

0.1U_0201_10V6K
CL6

0.1U_0201_10V6K
CL7

0.1U_0201_10V6K
CL8

1U_0201_6.3V6M
CL9

0.1U_0201_10V6K
CL10

0.1U_0201_10V6K
CL11

4.7U_0402_6.3V6M
CL12 SWR@

0.1U_0201_10V6K
CL13 SWR@

4.7U_0402_6.3V6M
CL14 @

4.7U_0402_6.3V6M
CL15 @
4 3
EN OC
2
SY6288C20AAC_SOT23-5 Using for Switch mode
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

LDO@

SWR@

SWR@
CL16
1U_0201_6.3V6M The trace length from
1 LAN_PWR_EN Lx to PIN48 (REGOUT)
LAN_PWR_EN 58
and from C to Lx must
< 200mils.
Place near Pin 3,8,22,30 Place near Pin 22
11/27: P/N change to SH00000RT00 Place near Pin 11,32
From EC
( S COIL 2.2UH +-20%
High active. HPC252012NF-2R2M 1.3A) Using for Switch mode
Reserve for surge improvement
EN threshold voltage min:1.2V The trace length
typ:1.6V max:2.0V from C to Place near Pin 11,32
Current limit threshold 1.5~2.8A
PIN46,47(VDDREG)
+3V_LAN Rising time must >0.5ms and <100ms must < 200mils.

+3VS UL2
1

RL3
2 1K_0402_5% 2

+3V_LAN +LAN_VDD LAN_MIDI0+ 1 17 PCIE_ARX_C_DTX_P4 .1U_0402_16V7K 2 1 CL17

PCIE_ARX_DTX_P4 6
2

ISOLATEB LAN_MIDI0- 2 MDIP0 HSOP 18 PCIE_ARX_C_DTX_N4 .1U_0402_16V7K 2 1 CL18

3 MDIN0 HSON 19 PCIE_ARX_DTX_N4 6
AVDD10 PERSTB APU_PCIE_RST# 9,27,52,68
2

LAN_MIDI1+ 4 20 ISOLATEB
RL5 LAN_MIDI1- 5 MDIP1 ISOLATEB 21 LAN_PME# 0_0402_5% 1 RS@ 2 RL4
LAN_MIDI2+ MDIN1 LANWAKEB LAN_WAKE# 58
15K_0402_5% 6 22 10K_0402_5% 2 1 RL6
LAN_MIDI2- MDIP2 DVDD10 +LAN_VDD +3V_LAN
7 23
MDIN2 VDDREG +3V_LAN
8 24 +REGOUT reserve EC_PME# pull high 47K to +3VLP_EC
1

LAN_MIDI3+ 9 AVDD10 REGOUT 25 LAN_LED2 T4963 @

LAN_MIDI3- 10 MDIP3 LED2 26 LAN_LED1_GPO 2 @ 1
LAN_CLKREQ# pull up at PCH side 11 MDIN3 LED1/GPIO 27 LAN_LED0 T4964 @ 0_0402_5% RL7
LAN_GPO 58
12 AVDD33 LED0 28 XTLI for disable PHY
10 CLKREQ_PCIE#3 13 CLKREQB CKXTAL1 29 XTLO reserve 0 ohm
6 PCIE_ATX_C_DRX_P4

www.laptoprepairsecrets.com 14 HSIP CKXTAL2 30

6 PCIE_ATX_C_DRX_N4 HSIN AVDD10 LAN_RST
YL1 15 31 1 2
10 CLK_PCIE_P3 16 REFCLK_P RSET 32
25MHZ_20PF_XRCGB25M000F2P34R0 RL8
10 CLK_PCIE_N3 REFCLK_N AVDD33 33 2.49K_0402_1%
XTLI 3 1 XTLO_R RL14 1 2 XTLO GND
3 1 680_0402_5%
NC NC
1 1
CL21 4 2 CL22 +3V_LAN
18P_0402_50V8J 18P_0402_50V8J
2 2 RTL8118ASA-CG_QFN32_4X4 LAN_LED1_GPO 10K_0402_5% 2 @ 1 RL9
SA0000B9F20
P/N: SJ10000UP00 (S CRYSTAL 25MHZ 10PF XRCGB25M000F2P34R0) SA0000B9F20, S IC RTL8118ASA-CG QFN 32P E-LAN CTRL
3 3

LAN Connector
JRJ45
TL1
LAN_TERMAL 1 24 RJ45_MIDI3- 8
LAN_MIDI3- 2 TCT1 MCT1 23 RJ45_MIDI3- PR4-
LAN_MIDI3+ 3 TD1+ MX1+ 22 RJ45_MIDI3+ RJ45_MIDI3+ 7
TD1- MX1- PR4+
4 21 RJ45_MIDI1- 6
LAN_MIDI2- 5 TCT2 MCT2 20 RJ45_MIDI2- PR2-
LAN_MIDI2+ 6 TD2+ MX2+ 19 RJ45_MIDI2+ RJ45_MIDI2- 5
TD2- MX2- PR3-
7 18 RJ45_MIDI2+ 4
LAN_MIDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- PR3+
LAN_MIDI1+ 9 TD3+ MX3+ 16 RJ45_MIDI1+ RJ45_MIDI1+ 3
TD3- MX3- PR2+
10 15 RJ45_MIDI0- 2
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- PR1-
LAN_MIDI0+ 12 TD4+ MX4+ 13 RJ45_MIDI0+ RJ45_MIDI0+ 1 CL23
TD4- MX4- PR1+ 12
40mil 40mil
10P_0402_50V8J
GND 11 LANGND 2 1 RJ45_GND
GND 10
GST5009-E GND 9
GND

2
75_0402_1%

75_0402_1%

75_0402_1%

75_0402_1%

SP050006B10
1

AZ5125-02S_SOT23-3
1 SANTA_130460-5 JP@
CONN@ DL1
RL11

RL12

RL10

RL13

EMC@ JPL1
CL24 DC234007W00 JUMP_43X118
0.1U_0201_10V6K 2
2

4 4
LANGND

1
RJ45_GND

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8118ASA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 51 of 100
A B C D E
 A B C D E

Wireless LAN
RS146 1 2 15_0402_1%

CS143 1 2 470P_0402_50V8J USB20_P5_RC

10 USB20_P5
+3VS 60mil +3VS_W LAN
CS144 1 2 470P_0402_50V8J USB20_N5_RC
10 USB20_N5
1 @ 2
1 RM101 1 1 1 RS147 1 2 15_0402_1% 1
0_0805_5% CM68 @
CM69 CM70
4.7U_0402_6.3V6M 0.1U_0201_10V6K 0.1U_0201_10V6K
2 2 2

+1.8VS

KEY E +3VS_W LAN

CM79
UART_0_ATXD_R_DRXD RM1121
UART_0_ARXD_R_DTXD RM1131
@
@
2 1K_0402_5%
2 1K_0402_5%
+3VS_W LAN JNGFF1 10U_0402_6.3V6M
+3VALW 1 2 1 2
UM3 USB20_P5_RC 3 GND_1 3.3VAUX_2 4 @
W=60mils USB20_N5_RC USB_D+ 3.3VAUX_4
1U_0201_6.3V6M
CM71

5 1 5 6
IN OUT 7 USB_D- LED1# 8
1 GND_7 PCM_CLK
2 9 10
GND 11 SDIO_CLK PCM_SYNC 12
4 3 13 SDIO_CMD PCM_OUT 14
2 EN OC 15 SDIO_DAT0 PCM_IN 16
SY6288C20AAC_SOT23-5 17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
SA000079400 SDIO_DAT3 UART_WAKE UART_0_ARXD_R_DTXD RM1141
21 22 @ 2 0_0402_5%
SDIO_WAKE UART_TX UART_0_ARXD_DTXD 10
Vih=1.5 23
58 W LAN_ON SDIO_RST
24 UART_0_ATXD_R_DRXD RM1151 @ 2 0_0402_5%
UART_RX UART_0_ATXD_DRXD 10
25 26
27 GND_33 UART_RTS 28
6 PCIE_ATX_C_DRX_P5 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
29 30 RM106 2 RS@ 1 0_0402_5%
2 NGFF WL+BT (KEY E) 6 PCIE_ATX_C_DRX_N5
31
33
PET_RX_N0
GND_39
CLink_RST
CLink_DATA
32
34
E51RXD_P80CLK_R RM107 2 RS@ 1 0_0402_5%
EC_TX 58
EC_RX 58
2

6 PCIE_ARX_DTX_P5 PER_TX_P0 CLink_CLK

35 36 2 1
6 PCIE_ARX_DTX_N5 PER_TX_N0 COEX3
37 38 RM108 100K_0402_5%
39 GND_45 COEX2 40
10 CLK_PCIE_P2 REFCLK_P0 COEX1
41 42 T4947 TP@
10 CLK_PCIE_N2 REFCLK_N0 SUSCLK(32KHz) W L_RST#_R
43 44 RM109 2 RS@ 1 0_0402_5%
GND_51 PERST0# BT_ON APU_PCIE_RST# 9,27,51,68
45 46
10 CLKREQ_PCIE#2 CLKREQ0# W_DISABLE2# W L_OFF# BT_ON 58
47 48
PEWAKE0# W_DISABLE1# W L_OFF# 58
49 50
51 GND_57 I2C_DAT 52
RM110 53 RSVD/PCIE_RX_P1 I2C_CLK 54
2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
+3VS_W LAN GND_63 RSVD_64
57 58

www.laptoprepairsecrets.com 59
61
63
65
67
RSVD/PCIE_TX_P1
RSVD/PCIE_TX_N1
GND_69
RSVD_71
RSVD_73
RSVD_66
RSVD_68
RSVD_70
3.3VAUX_72
3.3VAUX_74
60
62
64
66
1
CM80
10U_0402_6.3V6M

@
2

GND_75 68
69 GND1
GND2
BELLW _80152-3221
CONN@
SP070013E00

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 KEY-E (WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 52 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 53 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 54 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 55 of 100
5 4 3 2 1
 A B C D E

HD Audio Codec 2000mA 600ohm@100MHz

DCR 0.1
+5VS LA1
40mil +5VS_PVDD
TAI-TECH HCB1608KF-601T20
1 2
SM01000UN00
+5VS
1 1 1 1
+5VS_AVDD

10U_0402_6.3V6M
CA1

0.1U_0201_10V6K
CA2

10U_0402_6.3V6M
CA29

0.1U_0201_10V6K
CA3
20mil
2 2 2 2 RA1 1 RS@ 2 0_0603_5%

1 1 1 1

0.1U_0201_10V6K
CA5

10U_0402_6.3V6M
CA6
2 2
near Pin41 near Pin46

near Pin9 GNDA

CA7 1 2 0.1U_0201_10V6K
near Pin26 +1.8VS
Pin9 need to matching with SOC HDA
interface. CA8 1 2 10U_0402_6.3V6M
+1.8VS_VDDA RA3 1 RS@ 2 0_0402_5%
RA2 1 RS@ 2 0_0402_5% +1.8VS_DVDDIO
+1.8VS 1 1

0.1U_0201_10V6K
CA11

10U_0402_6.3V6M
CA12
+3VS_DVDD
Int. Speaker Conn.
+3VS 2 2
RA4 1 RS@ 2 0_0402_5%
20mil
GNDA
1 1

10U_0402_6.3V6M
CA9

0.1U_0201_10V6K
CA10
40mil
JSPK2
2 2 HDA_BIT_CLK_R SPKL+ LA4 EMC@1 2 PBY160808T-121Y-N_2P SPK_L+ 1
SPKL- LA5 EMC@1 2 PBY160808T-121Y-N_2P SPK_L- 2 1
near Pin1 Place near Pin40 2

2
3

41

46

26

40
G1

9
10P_0402_50V8J 2 1 CA27 DMIC_CLK UA1 RA5 4
G2
0_0402_5%

DVDD

DVDD-IO

PVDD1

PVDD2

AVDD1

AVDD2
@EMC@ CVILU_CI4202M2HR0-NH
Reserved for RF CONN@

1
@EMC@
LINE1_L 22 43 SPKL- SP02001CK00
LINE1_R LINE1-L(PORT-C-L) SPK-OUT-L- 2
21 42 SPKL+ GND
LINE1-R(PORT-C-R) SPK-OUT-L+ CA13
24 45 SPKR+ SPKR+ 73 22P_0402_50V8J
2 23 LINE2-L(PORT-E-L) SPK-OUT-R+ 44 SPKR- 1 2
+MICBIAS LINE2-R(PORT-E-R) SPK-OUT-R- SPKR- 73
@EMC@
31
30 LINE1-VREFO-L 32 HP_LEFT
LINE1-VREFO-R HPOUT-L(PORT-I-L) 33 HP_RIGHT
+3VS RING2 17 HPOUT-R(PORT-I-R)
2 1 SENSE_A SLEEVE 18 MIC2-L(PORT-F-L) /RING
RA13 100K_0402_1%
40mil MIC2-R(PORT-F-R) /SLEEVE 10 HDA_SYNC_R
DMIC_DATA 2 SYNC 6 HDA_BIT_CLK_R HDA_SYNC_R 9
DMIC_CLK 3 GPIO0/DMIC-DATA BCLK 5 HDA_SDOUT_R HDA_BIT_CLK_R 9
GPIO1/DMIC-CLK SDATA-OUT 8 HDA_SDIN0_AUDIO 1 2 HDA_SDOUT_R 9

58 EC_MUTE#
47
PDB
SDATA-IN RA10 33_0402_5%
HDA_SDIN0 9
Digital MIC
48
11 SPDIF-OUT/GPIO2
9 HDA_RST#_R RESETB 16 MIC BOM upload by Audio Team
MONO_IN 12 MONO-OUT
PCBEEP +MIC2_VREFO
Close codec
73 HP_PLUG#

GNDA
RA12

RA17
2

2 @
1
1

CA15
200K_0402_1% SENSE_A

20K_0402_5%
13
14
15

37
35
HP/LINE1 JD(JD1)
MIC2/LINE2 JD(JD2)
SPDIFO/FRONT JD(JD3)/GPIO3

CBP
CBN
www.laptoprepairsecrets.com MIC2-VREFO

LDO3-CAP
LDO2-CAP
LDO1-CAP
29

7
39
27
CA14
CA16
CA17
1
1
1
2 10U_0402_6.3V6M
2 10U_0402_6.3V6M
2 10U_0402_6.3V6M
GND
DMIC_DATA 2 1 DMIC_DATA_R TO eDP cable
DMIC_DATA_R 38
2.2U_0402_6.3V6M 10mil RA14 1 2 100K_0402_5% RA7 0_0402_5%
2
CODEC_VREF GNDA
+3VS_DVDD
36 28
CPVDD VREF
CA20 1 2 2.2U_0402_6.3V6M
20
+3VALW VD33 STB CA21 @1 2 0.1U_0201_10V6K
GNDA CA19 1 2 19 34 CPVEE
MIC CAP CPVEE DMIC_CLK DMIC_CLK_R

1U_0201_6.3V6M
CA22
1 2 1
10U_0402_6.3V6M LA6 EMC@ BLM15PX221SN1D_2P DMIC_CLK_R 38
GNDA
SM01000Q500
RA19 2 RS@ 1 0_0402_5% 4 25 change PN to SM01000Q500
3 49 DC DET AVSS1 38 2 3
Thermal PAD AVSS2

ALC255-CG_MQFN48_6X6
GND SA000082700
GNDA

Headphone Out
+MIC2_VREFO
TO IO/B
RA15 1 2 2.2K_0402_5% SLEEVE SLEEVE 73
RA18 1 2 2.2K_0402_5% RING2 RING2 73

HP_LEFT RA20 1 @ 2 0_0603_5% HPOUT_L_1 HPOUT_L_1 73

HP_RIGHT RA21 1 @ 2 0_0603_5% HPOUT_R_1
HPOUT_R_1 73

LINE1_L CA23 1 2 4.7U_0402_6.3V6M

RA22
22K_0402_5% CA25 LINE1_R CA24 1 2 4.7U_0402_6.3V6M
1U_0201_6.3V6M
2 1 BEEP#_R 1 2 MONO_IN RA25 1 RS@ 2 0_0402_5% RA26 1 RS@ 2 0_0402_5%
58 EC_BEEP#
+MICBIAS DA3
2

RA27 @EMC@ 1 RA29 1 RS@ 2 0_0402_5% RA30 1 RS@ 2 0_0402_5% 2 2 RA23 1

22K_0402_5% 4.7K_0402_5%
100P_0201_50V8J
CA26

4 2 1 RA24 1 4
9 APU_SPKR 4.7K_0402_5% RA31 1 RS@ 2 0_0402_5% RA32 1 RS@ 2 0_0402_5%
2 3 2 RA28 1
1

4.7K_0402_5%
RA33 1 RS@ 2 0_0402_5% RA34 1 RS@ 2 0_0402_5% BAT54A-7-F_SOT23-3
SCSBAT54100
GND
GND GNDA GND GNDA
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC255
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 56 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 57 of 100
5 4 3 2 1
 5 4 3 2 1

+EC_VCC

1
Board ID / Rb R1562
+3VLP
JP2
+EC_VCC L44
FCM1608KF-800T07_0603
+EC_VCCA
EVT 0
R1564 EVT@
0_0402_5%
Ra 100K_0402_5%

2
1 2 1 2 SD028000080
1 2 AD_BID

0.1U_0201_10V6K
C1255

0.1U_0201_10V6K
C1256

0.1U_0201_10V6K
C1257

0.1U_0201_10V6K
C1258

1000P_0402_50V7K
C1261

1000P_0402_50V7K
C1259
JUMP_43X39 2 R1564 PVT@

1
JP@ C1262 PVT 1 12K_0402_1%
2 2 2 2 1 1 2
0.1U_0201_10V6K SD034120280 R1564 C1269
D

@ @ 1 R1564 MP@
Rb @ 20K_0402_1% 0.1U_0201_10V6K
@
D

1 1 1 1 2 2 ECAGND 83 1
MP 2 15K_0402_1%

2
SD034150280

111
125
ECAGND

22
33
96

67
9
VCC_LPC
VCC
VCC
VCC

VCC

AVCC
VCC0
SPOK_5V 1 21 LAN_PWR_EN +RTC_APU_R
85 SPOK_5V GATEA20/GPIO00 EC_VCCST_PG/GPIO0F EC_BEEP# LAN_PWR_EN 51
KBRST# 2 23
10 KBRST# KBRST#/GPIO01 BEEP#/GPIO10 FAN_PWM1 EC_BEEP# 56
SERIRQ 3 26
10 SERIRQ LPC_FRAME# SERIRQ EC_FAN_PWM/GPIO12 FAN_PWM2 FAN_PWM1 77
4 PWM Output 27
10 LPC_FRAME# LPC_FRAME# AC_OFF/GPIO13 FAN_PWM2 77

1
LPC_AD3_R 5 D
10 LPC_AD3_R LPC_AD2_R LPC_AD3 EC_RTCRST
7 2 Q91
10 LPC_AD2_R LPC_AD1_R LPC_AD2 BATT_TEMP
8 63 G L2N7002WT1G_SC-70-3
10 LPC_AD1_R LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 BATT_TEMP 83,84

1
LPC_AD0_R 10 64 VCIN1_BATT_DROP
10 LPC_AD0_R LPC & MISC VCIN1_BATT_DROP 83 S SB00001GE00

3
LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 ADP_I R1563
LPC_CLK0_EC ADP_I/AD2/GPIO3A AD_BID ADP_I 83,84
12 AD Input 66 10K_0402_5%
1 2 1 2 LPC_CLK0_EC 10 LPC_CLK0_EC LPC_RST# CLK_PCI_EC AD_BID/AD3/GPIO3B VRAM_TEMP
13 75
10 LPC_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42 LAN_WAKE# VRAM_TEMP 83
C1263 @EMC@ R1560 @EMC@ 37 76
77 EC_RST# LAN_WAKE# 51

2
22P_0402_50V8J 10_0402_1% EC_SCI# 20 EC_RST# AD5/GPIO43
10 EC_SCI# WLAN_ON EC_SCI#/GPIO0E
38
52 WLAN_ON CLKRUN#/GPIO1D
C819 1 2 0.1U_0201_10V6K EC_RST# 68 TS_EN Reserve TS_EN
DA0/GPIO3C GPU_OVERT# TS_EN 38 +3VS
DA Output EN_DFAN1/DA1/GPIO3D 70 GPU_OVERT# 27
63 KSI[0..7] TP_SENOFF#
EMC@ KSI0 55 71
KSI0/GPIO30 DA2/GPIO3E SPOK_3V TP_SENOFF# 63 EC_MUTE#
KSI1 56 72 New Add for GPU Thermal R1565 1 @ 2 10K_0402_5%
KSI1/GPIO31 DA3/GPIO3F SPOK_3V 85 TP_I2C_INT#
KSI2 57 R116 1 @ 2 1K_0402_5%
1 @ 2 LPC_RST# KSI3 58 KSI2/GPIO32 83 TYPEC_1P5A
KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A TYPEC_3A TYPEC_1P5A 42,43
R207 100K_0402_5% KSI4 59 84 New Add for PW I Limit
KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_SMB_CK3 TYPEC_3A 43
1 2 @EMC@ KSI5 60 85 +EC_VCC
KSI5/GPIO35 PSCLK2/GPIO4C EC_SMB_DA3 EC_SMB_CK3 63
C1279 100P_0201_50V8J KSI6 61 PS2 Interface 86
KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK EC_SMB_DA3 63 EC_SMB_DA1
KSI7 62 87 R1577 1 2 2.2K_0402_5%
C 63 KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_DATA TP_CLK 63 EC_SMB_CK1 C
KSO0 39 88 PS2 R1574 1 2 2.2K_0402_5%
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 63 LID_SW#
KSO1 40 R344 1 2 47K_0402_5%
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 CHG_CTL1 Change for New Charger IC
KSO3/GPIO23 ENKBL/GPXIOA00 DGPU_AC_DETECT CHG_CTL1 71
KSO4 43 98
KSO4/GPIO24 WOL_EN/GPXIOA01 0.9VS_PWR_EN# DGPU_AC_DETECT 27,84
KSO5 44 99
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 9022_PH1 0.9VS_PWR_EN# 78
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 9022_PH1 83 +5VALW
KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface EC_RTCRST EC_SMB_CK3
KSO9 48 119 RB79 1 2 4.7K_0402_5%
KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON RB80 1 2 4.7K_0402_5% EC_SMB_DA3
KSO10/GPIO2A MOSI/GPIO5C THERMAL1_ALERT# BT_ON 52
KSO11 50 SPI Flash ROM SPICLK/GPIO58 126 THERMAL1_ALERT# 66
KSO12 51 KSO11/GPIO2B 128 FP_PWR_EN
KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN 66 +3VS
KSO13 52 Reserve for FP For GPU_OVERT#
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 CHG_EN Change for New Charger IC
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 CHG_EN 71 GPU_OVERT#
KSO16 81 74 VGATE R4019 1 DIS@ 2 10K_0402_5%

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KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 BATT_4S VGATE 88
KSO17 82 89
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S 84
BATT_CHG_LED#/GPIO52 GPU_ALERT# BATT_BLUE_LED# 73
91 GPU_ALERT# 83
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 PWR_LED#
83,84 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 GPIO PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# 73 BATT_TEMP
78 93 1 2
83,84 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# 73
79 95 SYSON C1265 100P_0201_50V8J
8,27,40,66 EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 VR_ON SYSON 86
80 121 ACIN 1 2
8,27,40,66 EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 0.9_1.8VALW_PWREN VR_ON 87,88
127 C1266 100P_0201_50V8J
DPWROK_EC/GPIO59 0.9_1.8VALW_PWREN 87
SM Bus EC_RSMRST# R3907 1 @ 2 47K_0402_5%
SLP_S3# 6 100 EC_RSMRST# SYSON R1675 1 @ 2 100K_0402_5%
9 SLP_S3# TP_I2C_INT# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 CHG_ILMSEL EC_RSMRST# 9 3V_EN
14 101 Change for New Charger IC R940 1 2 1M_0402_5%
63 TP_I2C_INT# CHG_CTL3 GPIO07 GPXIOA04 9022_VCIN CHG_ILMSEL 71
15 102 9022_VCIN 83
71 CHG_CTL3 TP_3V_EN GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 EC_THERM
16 103
63 TP_3V_EN WL_OFF# GPIO0A VCOUT1_PROCHOT#/GPXIOA06
17 104 MAINPWON
52 WL_OFF# EC_MUTE# GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 MAINPWON 77,85
18 105 BKOFF#
56 EC_MUTE# USB_EN GPIO0C BKOFF#/GPXIOA08 LAN_GPO BKOFF# 38
19 GPIO GPO 106
42,72,73 USB_EN KBL_EN AC_PRESENT/GPIO0D GPXIOA09 3V_EN_R_EC LAN_GPO 51
25 107
63 KBL_EN FAN_SPEED1 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10
B 28 108 THERMTRIP# B
77 FAN_SPEED1 FAN_SPEED2 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 THERMTRIP# 8
29 R1690
77 FAN_SPEED2 EC_TX 30 FANFB1/GPIO15 EC_THERM 1 RS@ 2 0_0402_5%
52 EC_TX EC_RX EC_TX/GPIO16 APU_PROCHOT# 8,84,88
31 110 ACIN
52 EC_RX SYS_PWRGD_EC EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 EC_ON ACIN 84
SYS_PWRGD_EC is OD-Pin 32 112
9 SYS_PWRGD_EC PWR_SUSP_LED# PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON 85
34 114 ON/OFFBTN#
73 PWR_SUSP_LED# OVRM_EN SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW# ON/OFFBTN# 63
36 GPI 115
36 OVRM_EN NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# 66
116 SUSP#
SUSP#/GPXIOD05 SUSP# 37,78,84,86
117 ENBKL
GPXIOD06 THERMAL_ALERT# ENBKL 8
Need to remove 118
PBTN_OUT# 122 PECI/GPXIOD07 THERMAL_ALERT# 66
9 PBTN_OUT# SLP_S5# 123 PBTN_OUT#/GPIO5D 124
9 SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +EC_VCC
AGND
GND
GND
GND
GND
GND

MAINPWON 1 2 3V_EN
3V_EN 85
11
24
35
94
113

69

U44 D2012 @
KB9022QD_LQFP128_14X14 L43 RB751V-40_SOD323-2
FCM1608KF-800T07_0603
2 1 3V_EN_R_EC R3926 1 2 1K_0402_5%

ECAGND
20mil

SPOK_3V 1 2 EC_RSMRST#

D2013 @
RB751V-40_SOD323-2

1 2 SYS_PWRGD_EC
A A

D2014 @
RB751V-40_SOD323-2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9022
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 58 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 59 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 60 of 100
5 4 3 2 1
 5 4 3 2 1

2.2K
+3VS
2.2K
SMB_0_SCL
I2C2_SCL/EGPIO113/SCL0

SMB_0_SDA SO-DIMM A & B

I2C2_SDA/EGPIO114/SDA0

D D
1.8K

Picasso 1K +1.8VSDGPU_AON
1.8K
APU +3VS
1K
+1.8VSDGPU_MAIN
SIC
APU_SIC EC_SMB_CK2 VGA_I2CS_SCL
(RC616,RC617) (QV2)
SID
APU_SID R-short EC_SMB_DA2 PJT138KA 2N VGA_I2CS_SDA

nVidia
N17P-G1
THERMAL SENSOR
G781-1P8F N18P-G0
2.2K
+EC_VCC
2.2K
THERMAL SENSOR
EC_SMB_CK1 EC_SMB_CK1-1 G753T11U
100 ohm
BATTERY
EC_SMB_DA1 100 ohm EC_SMB_DA1-1 CONN
C C

KB9022 EC_SMB_CK1_CHGR
(R4020,R4021)
CSCL
HDMI Retimer
(PR317,PR315) EC_SMB_DA1_CHGR Charger 0 ohm_0402 CSDA PS8409A
0 ohm_0402
EC_SMB_CK2

EC_SMB_DA2

4.7K 2.2K
+5VALW +5VS_BL

EC_SMB_CK3

EC_SMB_DA3
4.7K
+5VS_BL

(QE62)
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EC_SMB_CK3_LEDDRV

EC_SMB_DA3_LEDDRV
2.2K

2N7002DW LED driver

(RE1,RE2)
R-short

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBUS Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 61 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 62 of 100
5 4 3 2 1
ON/OFF BTN TP/B Conn.
+TP_VCC

I2C_3_SDA_R R812 1 2 2.2K_0402_5%

+3VALW +TP_VCC I2C_3_SCL_R R813 1 2 2.2K_0402_5%
20mil 0.1A U13 SA000079400
SY6288C20AAC_SOT23-5 +3VS

4.7U_0402_6.3V6M
R534 5 1
100K_0402_5% IN OUT TP_I2C_INT#_APU R814 1 2 2.2K_0402_5% +TP_VCC
1
+TP_VCC

1U_0201_6.3V6M

C2563
2 1 2
+3VLP GND TP_I2C_INT#

C2562
2 R633 2 1 10K_0402_5%
C663 4 3
ON/OFFBTN# JTP1 0.1U_0201_10V6K EN OC 2
58 ON/OFFBTN#
1 1 2
1 2 TP_CLK @ 1 Vih=1.5
2 3 TP_DATA
3 4
4 5 I2C_3_SDA_R TP_3V_EN 58
4 3 5
6
6
7
I2C_3_SCL_R
TP_I2C_INT# TP_I2C_INT# 58
To EC
Test Only 7 8 TP_SENOFF# TP_I2C_INT# 1 2 TP_I2C_INT#_APU
SWK1 EVT@
BOT NTC013-AA1J-A160T_4P 8
GND
9
TP_SENOFF# 58 TP_I2C_INT#_APU 9 To APU
2 1 SN10000CV00 10 D22
GND RB751V-40_SOD323-2
JXT_FP202DH-008M10M
CONN@
+TP_VCC
SP010020L00 +TP_VCC

Vgs=1.0-2.5V

5
G
1

1
Q2509B
R2507 R2509 2N7002KDW_SOT363-6
4.7K_0402_5% 4.7K_0402_5% SB00000EO00
I2C_3_SCL_R 4 3

S
I2C_3_SCL 9

D
2

2
G
TP_CLK
TP_DATA TP_CLK 58
Q2509A To APU
2N7002KDW_SOT363-6
TP_DATA 58 I2C_3_SDA_R 1 6 SB00000EO00

S
I2C_3_SDA 9

D
R2622 1 @ 2 0_0402_5%
R2623 1 @ 2 0_0402_5%

LED driver +5VS_BL +5VS_BL

1

1
2.2K_0402_5%
RE69 @

2.2K_0402_5%
RE70 @
5
G

QE62B @
KB Conn. / Backlight
2

2N7002KDW_SOT363-6
+5VS
4 3 EC_SMB_CK3_LEDDRV +5VALW
S

58 EC_SMB_CK3
D

JKB1
R41 1 2 0_0603_5% 30
KBLED@ +5VS_BL 29 GND2
GND1
2

U2616 KSO16 28
G

R42 1LED14P@ 2 0_0603_5% +5VS_BL_IN 5 1 KSI[0..7] KSO17 27 28

IN OUT KSI[0..7] 58 27
KSO0 26

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26

0.1U_0201_10V6K
change to @ at EVT only 2 KSO[0..17] KSO1 25
EC_SMB_DA3_LEDDRV GND KSO[0..17] 58 25

C32
1 6 KSO2 24
S

58 EC_SMB_DA3 24
D

58 KBL_EN
4 3 1 KSO3 23
QE62A @ EN OC KSO4 22 23
SY6288C20AAC_SOT23-5 @ KSO5 21 22
2N7002KDW_SOT363-6 21
KSO6 20
2 KSO7 19 20
KSO8 18 19
+5VS_BL KSO9 17 18
JBL1 KSO10 16 17
1 KSO11 15 16
2 1 KSO12 14 15
3 2 KSO13 13 14
4 3 KSO14 12 13
4 KSO15 11 12
5 KSI0 10 11
6 GND KSI1 9 10
GND KSI2 8 9
ACES_51524-0040N-001 KSI3 7 8
CONN@ KSI4 6 7
KSI5 5 6
SP010022M00 KSI6 4 5
KSI7 3 4
2 3
ON/OFFBTN# 1 2
1

+5VS_BL +5VS_BL ACES_85201-2805

CONN@

SP01000GO00
1

RE65 LED14P@
JBL2
4.7K_0402_1% 1
CE3 LED14P@ 16
UE4 0.1U_0201_10V6K 15 GND
+5VS_BL GND
2

KB Conn.
24 27 2
RESET Vcc
3 KB_A_LED_R_DRV# 14
EC_SMB_CK3 RE1 2 RS@ 1 0_0402_5% EC_SMB_CK3_LEDDRV 25 OUT0 4 KB_A_LED_G_DRV# 13 14
EC_SMB_DA3 RE2 2 RS@ 1 0_0402_5% EC_SMB_DA3_LEDDRV 26 SCL OUT1 5 KB_A_LED_B_DRV# KB_A_LED_R_DRV# 12 13
SDA OUT2 12

KB BackLight
6 KB_B_LED_R_DRV# KB_A_LED_G_DRV# 11
AD0 31 OUT3 8 KB_B_LED_G_DRV# AD0 KB_A_LED_B_DRV# 10 11
AD1 32 A0 OUT4 9 KB_B_LED_B_DRV# AD1 KB_B_LED_R_DRV# 9 10
AD2 1 A1 OUT5 10 KB_C_LED_R_DRV# AD2 KB_B_LED_G_DRV# 8 9
AD3 2 A2 OUT6 11 KB_C_LED_G_DRV# AD3 KB_B_LED_B_DRV# 7 8
A3 OUT7 14 KB_C_LED_B_DRV# KB_C_LED_R_DRV# 6 7
OUT8 6
1

1
12 15 KB_D_LED_R_DRV# KB_C_LED_G_DRV# 5
13 N.C. OUT9 16 KB_D_LED_G_DRV# RE75 RE74 RE73 RE72 KB_C_LED_B_DRV# 4 5
28 N.C. OUT10 17 KB_D_LED_B_DRV# 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% KB_D_LED_R_DRV# 3 4
29 N.C. OUT11 19 LED14P@ LED14P@ LED14P@ LED14P@ KB_D_LED_G_DRV# 2 3
30 N.C. OUT12 20 KB_D_LED_B_DRV# 1 2
2

2
N.C. OUT13 21 1
OUT14
1

22
RE64 OUT15 ACES_51522-01401-P01
@ 10K_0402_5% 7 23 CONN@
18 GND GND 33
GND GND SP01001R800
set RE7 to 10k / output = 1.875mA
2

TLC59116FIRHBR_VQFN32_5X5
LED14P@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

Raptor: NC for 59116F THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 63 of 100
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 64 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 65 of 100
5 4 3 2 1
 5 4 3 2 1

THERMAL SENSOR +3VS

To Hall sensor/B +3VS

RF24
10K_0402_5%
THERMAL_ALERT# 2 TMS@ 1

+3VLP CF20 TMS@

0.1U_0201_10V6K
JHS1 2 1 PU +3VS with 1K at APU side
1 UF2
LID_SW # 2 1 1 8 EC_SMB_CK2
58 LID_SW# 2 VCC SMBCLK EC_SMB_CK2 8,27,40,58
D 3 2 7 EC_SMB_DA2 D
3 DXP SMBDATA THERMAL_ALERT# EC_SMB_DA2 8,27,40,58
4 3 6 THERMAL_ALERT# 58
4 1 TMS@ 2 TH1_THERM# 4 DXN #ALERT 5
+3VS #THERM GND
5 RF23 10K_0402_5%
6 GND G781-1P8F_MSOP8
GND TMS@
ACES_51524-0040N-001 SA00000V200
CONN@
SP010022M00

+3VLP

EMC@ SMBUS ADDRESS

C2754 1 2 0.1U_0201_10V6K
1001_101xb
EMC@
LID_SW # C2753 1 2 0.1U_0201_10V6K REMOTE1,2(+/-):
Trace length: <8"
Close to JHS1
Reserved for ESD require at 2019

C C

PIN ETU801 FA577E-1200

THERMAL SENSOR IEC safety 1 +FP_VCC(5V) +FP_VCC(3V)
Finger Print 2 USBP D+
3 USBN D-
GND GND
www.laptoprepairsecrets.com 4
5
6
NC
NC
NC
NC
UF3
EC_SMB_CK2 1 5 EC_SMB_DA2 7 NC
SMBCLK SMBDATA
2 +3VS Power Souce Check 8 NC
GND

58 THERMAL1_ALERT#
THERMAL1_ALERT# 3 4 EGIS ETU801 +FP_VCC=5V
ALERT# +Vs
1 1
ELAN SA464K-2200 +FP_VCC=3.3V +FP_VCC
G753T11U_SOT23-5
COnfirm with EC TMSIEC@ TMSIEC@ CF23 TMSIEC@ CF24 RK16 1 FP@ 2 0_0603_5% UK6
B +3VALW B
0.1U_0201_10V6K 10U_0402_6.3V6M +5VALW RK17 1 @ 2 0_0603_5% 5 1
2 2 IN OUT
2 1
FP@ 2 FP@
CK11 GND CK12
+3VS 1U_0201_6.3V6M 4 3 4.7U_0402_6.3V6M
1 EN OC 2
SY6288C20AAC_SOT23-5
THERMAL1_ALERT# 1 2 Nuvoton NCT7717U SA00005NN00 FP@
RF25 2K_0402_5%
GMT G753T11U SA00008CH00 58 FP_PWR_EN SA000079400

+FP_VCC

JFP1
8
RK19 1 RS@ 2 0_0402_5% HUB_USB20_P3_L 7 8 10
RK18 1 RS@ 2 0_0402_5% HUB_USB20_N3_L 6 7 G2 9
5 6 G1
4 5
3 4
DK2 @EMC@ 2 3
6 3 HUB_USB20_N3_L 1 2
I/O4 I/O2 1
ACES_51522-00801-001
CONN@
+FP_VCC 5 2 SP01001AE00
VDD GND

A HUB_USB20_P3_L A
4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
SC300001G00

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Sensors/FP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 66 of 100
5 4 3 2 1
 A B C D E F G H

SATA Re-Driver and cable HDD Conn.

+5VS_HDD

100mils
FFC Type

B_EQ1
A_EQ2
A_EQ1

10U_0402_6.3V6M
CO12
1

DEW

1
1 CO13 1
CO1 +3VS 0.1U_0201_10V6K JHDD1

2
0.01U_0402_16V7K 2 @ 14
2 1 +5VS +5VS_HDD 13 GND
GND
RO4 1 @ 2 0_0805_5% 12

20
19
18
17
16
11 12
10 11

DEW
VDD2
B_EQ1
A_EQ2
A_EQ1
RO25 1 2 0_0402_5% JHDD_P9 9 10
8 9
SATA_ATX_DRX_P0 CO4 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_P0 1 15 SATA_ATX_RD_DRX_P0 7 8
6 SATA_ATX_DRX_P0 SATA_ATX_DRX_N0 SATA_ATX_C_RD_DRX_N0 A_INP A_OUTP SATA_ATX_RD_DRX_N0 SATA_ARX_RD_DTX_P0 SATA_ARX_C_DTX_P0 7
CO5 2 1 0.01U_0402_16V7K 2 14 CO7 2 1 0.01U_0402_16V7K 6
6 SATA_ATX_DRX_N0 A_INN A_OUTN B_EQ2 SATA_ARX_RD_DTX_N0 SATA_ARX_C_DTX_N0 6
3 13 CO6 2 1 0.01U_0402_16V7K 5
SATA_ARX_DTX_N0 CO8 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_N0 4 GND1 B_EQ2 12 SATA_ARX_RD_DTX_N0 4 5
6 SATA_ARX_DTX_N0 SATA_ARX_DTX_P0 CO14 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_P0 5 B_OUTN B_INN 11 SATA_ARX_RD_DTX_P0 SATA_ATX_RD_DRX_N0 CO3 2 1 0.01U_0402_16V7K SATA_ATX_C_DRX_N0 3 4
6 SATA_ARX_DTX_P0 21 B_OUTP B_INP SATA_ATX_RD_DRX_P0 CO2 2 1 0.01U_0402_16V7K SATA_ATX_C_DRX_P0 2 3
GND2 2

VDD1
REXT
1

B_DE
A_DE
1

EN
UO1 ACES_51625-01201-001
PS8527CTQFN20GTR2A_TQFN20_4X4 CONN@

6
7
8
9
10
SA00007JU10 SP010028W00
+3VS RO7 2 1
+3VS +3VS

0.1U_0201_10V6K
4.99K_0402_1%

B_DE
A_DE
A_DE 1
RO6 1 @ 2 4.7K_0402_5%
RO15 1 2 4.7K_0402_5% A_DE 1 RO9 @ 2
@ A DE: M -3.5dB

CO10
4.7K_0402_5%
RO11 1 @ 2 4.7K_0402_5% A_EQ1 2
RO18 1 2 4.7K_0402_5% A_EQ1 2 1
CO15
RO12 1 @ 2 4.7K_0402_5% A_EQ2 0.1U_0201_10V6K
RO19 1 2 4.7K_0402_5% A_EQ2
2
@ A EQ: 9.4dB (ML) @
2
RO8 1 @ 2 4.7K_0402_5% B_DE
RO16 1 2 4.7K_0402_5% B_DE
@ B DE: M -3.5dB
RO10 1 @ 2 4.7K_0402_5% B_EQ1
RO17 1 2 4.7K_0402_5% B_EQ1

RO13 1 @ 2 4.7K_0402_5% B_EQ2

RO20 1 2 4.7K_0402_5% B_EQ2
B EQ: 7.4dB (LL)
RO14 1 @ 2 4.7K_0402_5% DEW

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3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/SSD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 67 of 100
A B C D E F G H
 5 4 3 2 1

SATA SSD Conn.

+3VS_SSD2 +3VS_SSD2 +3VS

JSSD2
M.2 SSD2
1 2 RO26 1 @ 2 0_0805_5%
3 GND 3P3VAUX 4
GND 3P3VAUX

22U_0603_6.3V6M

0.1U_0201_10V6K
5 6 1 1
7 PERn3 NC 8
PERp3 NC 1

CM14

CM13
9 10
D 11 GND DAS/DSS# 12 + CM58 D
13 PETn3 3P3VAUX 14 2 2 150U_D2_6.3VY_R15M
15 PETp3 3P3VAUX 16 SGA00003700
17 GND 3P3VAUX 18 2 @
19 PERn2 3P3VAUX 20
21 PERp2 NC 22
23 GND NC 24
25 PETn2 NC 26
27 PETp2 NC 28
29 GND NC 30
31 PERn1 NC 32
33 PERp1 NC 34 LON:If system didn't support DEVSLP, set Device Sleep Signal high and
35 GND NC 36 keep (from power on), device will ignore.
37 PETn1 NC 38 DEVSLP1_R RM21 1 2 0_0402_5%
39 PETp1 DEVSLP 40 DEVSLP1 9
CM7 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P1 41 GND NC 42 RM20 1 @ 2 0_0402_5%
69 SATA_ARX_RD_DTX_P1 SATA_ARX_C_DTX_N1 PERn0/SATA-B+ NC
CM8 1 2 0.01U_0402_16V7K 43 44
69 SATA_ARX_RD_DTX_N1 45 PERp0/SATA-B- NC 46
SATA SSD SATA_ATX_C_DRX_N1 GND NC
CM9 1 2 0.01U_0402_16V7K 47 48
69 SATA_ATX_RD_DRX_N1 SATA_ATX_C_DRX_P1 PETn0/SATA-A- NC
CM10 1 2 0.01U_0402_16V7K 49 50
69 SATA_ATX_RD_DRX_P1 51 PETp0/SATA-A+ PERST# 52
53 GND CLKREQ# 54
55 REFCLKN PEWake# 56
57 REFCLKP NC 58
GND NC

67 68 SUSCLK_SSD2 @ T4962
SSD2_DET# 69 NC SUSCLK(32kHz) 70
T210 @ PEDET(NC-PCIE/GND-SATA) 3P3VAUX
71 72
73 GND 3P3VAUX 74
C 75 GND 3P3VAUX C
GND 76
GND1 77
GND2
LOTES_APCI0079-P005A
CONN@

SP07001EZ00

www.laptoprepairsecrets.com
M.2 SSD1 +3VS_SSD1 +3VS_SSD1 +3VALW

JSSD1 SA0000BIP00 UM5

1 2 MC74VHC1G08EDFT2G_SC70-5
GND 3P3VAUX

5
3 4
PCIE_ARX_DTX_N3 GND 3P3VAUX

22U_0603_6.3V6M

0.1U_0201_10V6K
5 6 1 1 1 1

P
6 PCIE_ARX_DTX_N3 PCIE_ARX_DTX_P3 7 PERn3 NC 8 SSD1_PCIE_RST# 4 IN1 AGPIO40 9
6 PCIE_ARX_DTX_P3 PERp3 NC O APU_PCIE_RST#

CM18

CM20
9 10 + CM59 2
GND DAS/DSS# IN2

G
PCIE_ATX_C_DRX_N3 11 12 150U_D2_6.3VY_R15M
6 PCIE_ATX_C_DRX_N3 PCIE_ATX_C_DRX_P3 13 PETn3 3P3VAUX 14 2 2 SGA00003700 @
6 PCIE_ATX_C_DRX_P3

3
15 PETp3 3P3VAUX 16 2
PCIE_ARX_DTX_N2 17 GND 3P3VAUX 18 RM135
6 PCIE_ARX_DTX_N2 PCIE_ARX_DTX_P2 19 PERn2 3P3VAUX 20 100K_0402_5% RM28
B 6 PCIE_ARX_DTX_P2 21 PERp2 NC 22 1 2 1 2 0_0402_5% B
@
PCIE_ATX_C_DRX_N2 23 GND NC 24 APU_PCIE_RST# 9,27,51,52
6 PCIE_ATX_C_DRX_N2 PCIE_ATX_C_DRX_P2 25 PETn2 NC 26
6 PCIE_ATX_C_DRX_P2 27 PETp2 NC 28
PCIE SSD PCIE_ARX_DTX_N1 GND NC
29 30
6 PCIE_ARX_DTX_N1 PCIE_ARX_DTX_P1 31 PERn1 NC 32
6 PCIE_ARX_DTX_P1 33 PERp1 NC 34
PCIE_ATX_C_DRX_N1 35 GND NC 36
6 PCIE_ATX_C_DRX_N1 PCIE_ATX_C_DRX_P1 37 PETn1 NC 38
6 PCIE_ATX_C_DRX_P1 39 PETp1 DEVSLP 40
PCIE_ARX_DTX_N0 41 GND NC 42
6 PCIE_ARX_DTX_N0 PCIE_ARX_DTX_P0 43 PERn0/SATA-B+ NC 44 Place close to JSSD pin 50
6 PCIE_ARX_DTX_P0 45 PERp0/SATA-B- NC 46 ESD request to reserve.
@EMC@ CM17 1 2 100P_0201_50V8J
PCIE_ATX_C_DRX_N0 47 GND NC 48
6 PCIE_ATX_C_DRX_N0 PCIE_ATX_C_DRX_P0 49 PETn0/SATA-A- NC 50 SSD1_PCIE_RST#
6 PCIE_ATX_C_DRX_P0 51 PETp0/SATA-A+ PERST# 52 CLKREQ_PCIE#0_R RM27 1 RS@ 2 0_0402_5% CLKREQ_PCIE#0 10
CLK_PCIE_N0 53 GND CLKREQ# 54
10 CLK_PCIE_N0 CLK_PCIE_P0 55 REFCLKN PEWake# 56
10 CLK_PCIE_P0 57 REFCLKP NC 58
GND NC

67 68 SUSCLK_SSD1 @ T4961
69 NC SUSCLK(32kHz) 70
71 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 72
73 GND 3P3VAUX 74
75 GND 3P3VAUX
GND 76
GND1 77
GND2
LOTES_APCI0079-P005A
A A
CONN@

SP07001EZ00

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 SSD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 68 of 100
5 4 3 2 1
 5 4 3 2 1

SATA Re-Driver for M.2 Connector

B2_EQ1
A2_EQ2
A2_EQ1
DEW2
CM72 +3VS

2 1
D D
0.01U_0201_6.3V7K

20
19
18
17
16
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
SATA_ATX_DRX_P1 CM73 2 1 0.01U_0402_16V7K SATA_ATX_C_RD_DRX_P1 1 15 SATA_ATX_RD_DRX_P1
6 SATA_ATX_DRX_P1 SATA_ATX_DRX_N1 SATA_ATX_C_RD_DRX_N1 A_INP A_OUTP SATA_ATX_RD_DRX_N1 SATA_ATX_RD_DRX_P1 68
6 SATA_ATX_DRX_N1 CM74 2 1 0.01U_0402_16V7K 2 14
3 A_INN A_OUTN 13 B2_EQ2 SATA_ATX_RD_DRX_N1 68
SATA_ARX_DTX_N1 CM75 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_N1 4 GND1 B_EQ2 12 SATA_ARX_RD_DTX_N1
6 SATA_ARX_DTX_N1 SATA_ARX_DTX_P1 SATA_ARX_C_RD_DTX_P1 B_OUTN B_INN SATA_ARX_RD_DTX_P1 SATA_ARX_RD_DTX_N1 68
CM76 2 1 0.01U_0402_16V7K 5 11 SATA_ARX_RD_DTX_P1 68
6 SATA_ARX_DTX_P1 21 B_OUTP B_INP
GND2

REXT

VDD1
B_DE
A_DE
EN
UM4
PS8527CTQFN20GTR2A_TQFN20_4X4

6
7
8
9
10
SA00007JU10
RM133 2 1 +3VS
+3VS +3VS

0.1U_0201_10V6K
B2_DE
A2_DE
4.99K_0402_1% 1
RM1261 @ 2 4.7K_0402_5% A2_DE 1 @ 2
A2_DE

CM77
RM1201 @ 2 4.7K_0402_5% A DE: M -3.5dB 4.7K_0402_5%
RM134 2
RM1291 @ 2 4.7K_0402_5% A2_EQ1 2 1
RM1231 2 4.7K_0402_5% A2_EQ1 CM78
0.1U_0201_10V6K
RM1301 @ 2 4.7K_0402_5% A2_EQ2 @
RM1241 @ 2 4.7K_0402_5% A2_EQ2
A EQ: 9.4dB (ML)
C C
RM1271 @ 2 4.7K_0402_5% B2_DE
RM1211 @ 2 4.7K_0402_5% B2_DE
B DE: M -3.5dB
RM1281 @ 2 4.7K_0402_5% B2_EQ1
RM1221 @ 2 4.7K_0402_5% B2_EQ1

RM1311 @ 2 4.7K_0402_5% B2_EQ2

RM1251 2 4.7K_0402_5% B2_EQ2
B EQ: 2.4dB (LM)
RM1321 @ 2 4.7K_0402_5% DEW 2

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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 SATA Redriver
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 69 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 70 of 100
5 4 3 2 1
 A B C D E

USB3.0
DS1 EMC@
CS2 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P1 RS86 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_P1 USB3_ATX_L_DRX_P1 1 9 USB3_ATX_L_DRX_P1
10 USB3_ATX_DRX_P1
CS3 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N1 RS89 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_N1 USB3_ATX_L_DRX_N1 2 8 USB3_ATX_L_DRX_N1
10 USB3_ATX_DRX_N1
USB3_ARX_L_DTX_P1 4 7 USB3_ARX_L_DTX_P1
CS131 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P1 RS90 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_P1
10 USB3_ARX_DTX_P1 USB3_ARX_L_DTX_N1 USB3_ARX_L_DTX_N1
1 5 6 1
CS132 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_N1 RS91 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_N1 +USB3_VCCA
10 USB3_ARX_DTX_N1
W=100mils
3
1 2
TVW DF1004AD0_DFN9
CS5 + CS6 EMC@
SC300003Z00 150U_D2_6.3VY_R15M 0.1U_0201_10V6K
SGA00003700 1
2
USB3.0 Conn.
JUSB1
1
CHR_USB20_N1_R 2 VBUS
CHR_USB20_P1_R 3 D-
4 D+
USB3_ARX_L_DTX_N1 5 GND
USB3_ARX_L_DTX_P1 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11
USB3_ATX_L_DRX_N1 8 GND-DRAIN GND 12
RS138 1 2 15_0402_1% DS2 EMC@ USB3_ATX_L_DRX_P1 9 StdA-SSTX- GND 13
LS3 EMC@ 6 3 CHR_USB20_N1_R StdA-SSTX+ GND
CS135 1 2 470P_0402_50V8J USB20_P1_RC CHR_USB20_P1 2 1 CHR_USB20_P1_R I/O4 I/O2 ACON_TARAC-9V1391
10 USB20_P1 2 1 +USB3_VCCA CONN@

10 USB20_N1
CS136 1 2 470P_0402_50V8J USB20_N1_RC CHR_USB20_N1 3
3 4
4 CHR_USB20_N1_R 5
VDD GND
2 DC23300AG00
2 RS139 1 2 15_0402_1% DLM0NSN900HY2D_4P 2

SM070005U00 CHR_USB20_P1_R 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
SC300001G00

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+5VALW

3 3

USB Host Charger

22U_0603_6.3V6M

0.1U_0201_10V6K
1 1

CS9

CS7
@
+USB3_VCCA
+5VALW 2 2 US12

1 12
VIN VOUT
RS14 1 2 10K_0402_5% CHG_CTL2 USB20_N1_RC 2
USB20_P1_RC 3 DM_OUT
DP_OUT 10 CHR_USB20_P1
13 DP_IN 11 CHR_USB20_N1
RS15 1 @ 2 10K_0402_5% CHG_ILMSEL FAULT# DM_IN
CHG_ILMSEL 4
58 CHG_ILMSEL ILIM_SEL
5 15
58 CHG_EN EN ILIM_L 16
ILIM_HI

1
6
58 CHG_CTL1 CHG_CTL2 CTL1

22.1K_0402_1%

39K_0402_1%
7 9
CTL2 NC

RS12

RS13
8 14
58 CHG_CTL3 CTL3 GND 17 ILM R vaule
Thermal Pad @
Ios(mA)=50250/R(Kohm)

2
SLGC55544CVTR_TQFN16_3X3 ILIM_Hi=2273mA
USB Host Charger Truth Table ILIM_L=1288mA(reserve)
4 CHG_EN CTL1 CTL2 CTL3 ILIM_SEL MODE Current Limit Note 4
Setting
0 0 1 0 1 SDP1-OFF ILIM_H Port power off
1 0 1 0 1 SDP1 ILIM_H Data Lines Connected
1 0 1 1 1 DCP ILIM_H Data Lines Disconnected
Security Classification Compal Secret Data Compal Electronics, Inc.
Auto Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

1 1 1 1 1 CDP ILIM_H Data Lines Connected THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0 Conn/USB Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 71 of 100
A B C D E
 5 4 3 2 1

USB3.0
+5VALW
For ESD request +USB3_VCCB
D CS109 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P2 RS124 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_P2 CS107 EMC@ D
10 USB3_ATX_DRX_P2 DS20 EMC@ 0.1U_0201_10V6K US13
CS108 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N2 RS123 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_N2 USB3_ATX_L_DRX_P2 1 9 USB3_ATX_L_DRX_P2 1 2 5 1
10 USB3_ATX_DRX_N2 IN OUT W=60mils
USB3_ATX_L_DRX_N2 2 8 USB3_ATX_L_DRX_N2 2
CS133 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P2 RS126 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_P2 GND
10 USB3_ARX_DTX_P2 USB3_ARX_L_DTX_P2 4 7 USB3_ARX_L_DTX_P2 4 3
USB3_ARX_C_DTX_N2 RS125 USB3_ARX_L_DTX_N2 42,58,73 USB_EN EN OC
CS134 1 2 0.33U_0402_10V6K 1 RS@ 2 0_0402_5%
10 USB3_ARX_DTX_N2 USB3_ARX_L_DTX_N2 5 6 USB3_ARX_L_DTX_N2 SY6288C20AAC_SOT23-5

TVWDF1004AD0_DFN9
SC300003Z00 +USB3_VCCB

W=100mils
1 2
CS111 + CS110 EMC@
150U_D2_6.3VY_R15M 0.1U_0201_10V6K
SGA00003700 1
2
USB3.0 Conn.
DS21 EMC@ JUSB2
U2DN2_L 6 3 1
RS142 1 2 15_0402_1% I/O4 I/O2 U2DN2_L 2 VBUS
LS13 EMC@ +USB3_VCCB U2DP2_L 3 D-
C CS139 1 2 470P_0402_50V8J USB20_P2_RC USB20_N2_RC 3 4 U2DN2_L 4 D+ C
10 USB20_P2 3 4 5 2 USB3_ARX_L_DTX_N2 5 GND
VDD GND USB3_ARX_L_DTX_P2 6 StdA-SSRX- 10
CS140 1 2 470P_0402_50V8J USB20_N2_RC USB20_P2_RC 2 1 U2DP2_L 7 StdA-SSRX+ GND 11
10 USB20_N2 2 1 USB3_ATX_L_DRX_N2 8 GND-DRAIN GND 12
RS143 1 2 15_0402_1% DLM0NSN900HY2D_4P 4 1 U2DP2_L USB3_ATX_L_DRX_P2 9 StdA-SSTX- GND 13
I/O3 I/O1 StdA-SSTX+ GND
SM070005U00 AZC099-04S.R7G_SOT23-6 ACON_TARAC-9V1391
SC300001G00 CONN@
DC23300AG00

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B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0 Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 72 of 100
5 4 3 2 1
 A B C D E

IO/B CONN
JIO2
26
GND2
25
HPOUT_L_1 24 GND1
56 HPOUT_L_1 HPOUT_R_1 24
56 HPOUT_R_1 23
SLEEVE 22 23
56 SLEEVE 22
1 56 RING2 RING2 21 1
HP_PLUG# 20 21
56 HP_PLUG# 20
GNDA 19
RS140 1 2 15_0402_1% LS12 EMC@ 18 19
56 SPKR+ 18
DLM0NSN900HY2D_4P 17
CS137 1 2 470P_0402_50V8J USB20_P4_RC 1 2 USB20_P4_L 16 17
10 USB20_P4 1 2 56 SPKR- 16
15
BATT_AMB_LED# 14 15
USB20_N4_RC USB20_N4_L 58 BATT_AMB_LED# BATT_BLUE_LED# 14
CS138 1 2 470P_0402_50V8J 4 3 58 BATT_BLUE_LED# 13
10 USB20_N4 4 3 PWR_SUSP_LED# 13
58 PW R_SUSP_LED# 12
RS141 1 2 15_0402_1% PW R_LED# 11 12
58 PW R_LED# 11
10
SM070005U00 +5VALW
9 10
8 9
7 8
6 7
USB_EN 5 6
42,58,72 USB_EN 5
4
USB20_P4_L 3 4
USB20_N4_L 2 3
1 2
1
CVILU_CF35242D0RD-NH
CONN@

2 2

www.laptoprepairsecrets.com

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IO/B Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 73 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 74 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB2.0 HUB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 75 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 76 of 100
5 4 3 2 1
FAN Conn Screw Hole
Stand Off
@ GASKET1 @ GASKET2 @ GASKET3
GS-002C-302520 GS-002C-302520 GS-002C-302520
@ H2 @ H3 @ H4 @ H5 @ H17 @ H20 @ H18 @ H19
H_3P0 H_3P0 H_3P0 H_3P0 H_2P5N H_3P0X2P5N H_3P2 H_3P2
+5VS

1
1 @ 2 +VCC_FAN1

1
RF4 0_0603_5% 40mil
1 @ 2 +VCC_FAN2
1 1 RF7 0_0603_5%
@ H6 @ H7 @ H8 @ H9
CF6 CF5 H_4P0 H_4P0 H_4P0 H_4P0 CLIP1 CLIP2 CLIP3
1000P_0402_50V7K 10U_0402_6.3V6M EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
2 2
@ @
FD1 FD2

1
@ @

1
@ H11 @ H12 @ H13
H_3P3 H_3P3 H_3P3 FIDUCIAL_C40M80 FIDUCIAL_C40M80

FD3 FD4 CLIP4 CLIP5 CLIP6

EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P

1
@ @

1
+3VS

1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ H14 @ H15 @ H16
1

1 H_3P8 H_3P8 H_3P8

RF3 CF13
10K_0402_5% 4.7U_0402_6.3V6M

1
2 JFAN1
2

+VCC_FAN1 1
2 1
58 FAN_SPEED1 FAN_PW M1 3 2
58 FAN_PW M1
1 4 3
CF7 5 4
1000P_0402_50V7K 6 G1
@EMC@ G2
2 ACES_50278-00401-001 +3VLP 1 @ 2
MAINPWON 58,85
CONN@ R23 0_0402_5%
SP02000RR00 Reset Circuit 1 RS@ 2
EC_RST# 58

2
R24 0_0402_5%
R25
10K_0402_5%
+3VS

www.laptoprepairsecrets.com

6
Q1A D
1

BI_GATE# 2
1
RF5 CF12 BI_GATE PH to +RTCVCC at PWR G Reset Button
10K_0402_5% 4.7U_0402_6.3V6M 2N7002KDW _SOT363-6
side S @
SW 3

1
2 JFAN2 1
2

+VCC_FAN2 1 BI_GATE 1 2 BI_GATE

1

3
2 Q1B D C40
58 FAN_SPEED2 FAN_PW M2 2 BI_GATE
3 5 0.1U_0201_10V6K
58 FAN_PW M2 3 83 BI_GATE 2
1 4 G
CF10 5 4 3 4
2N7002KDW _SOT363-6
1000P_0402_50V7K 6 G1 S

4
@EMC@ G2
2 ACES_50278-00401-001 SKRPABE010_4P
CONN@ SN10000CV00
SP02000RR00
change PN to SN10000CV00

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 77 of 100
 A B C D E

+3VALW TO +3VS
+3VALW +3VS TO +3VSDGPU
C2750 @ 4.7U_0402_6.3V6M (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm
2 1 +3VS
U2
1 2 J7 JP@
1 2 C12 1 14 +3VS_LS
37,58,84,86 SUSP# VIN1 VOUT1
R1667 0_0402_5% 1U_0201_6.3V6M 2 13 1
+5VALW VIN1 VOUT1 JUMP_43X118
3 12 1 2 C13
ON1 CT1
C10 0.1U_0201_10V6K
1 2 4 11 560P_0402_50V7K 2
C2760 0.1U_0201_10V6K VBIAS GND
1 1
3VSDGPU_EN_R 5 10 1 2
37 3VSDGPU_EN_R ON2 CT2 +3VSDGPU
CG336 220P_0402_50V7K
+3VS 6 9 DIS@
1 2 7 VIN2 VOUT2 8
CV401 1U_0201_6.3V6M VIN2 VOUT2

10U_0402_6.3V6M
15 1
GPAD

CG338 DIS@
EM5209VF_DFN14_3X2
SA00007PM00 2

+5VALW TO +5VS
+3VALW TO +3VS_SSD1
+3VALW (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm
CM33
U3
CM32 @ 1U_0201_6.3V6M J10 JP@
2 1 0.1U_0201_10V6K 1 2 1 14 +3VS_SSD_1
VIN1 VOUT1 +3VS_SSD1
2 13 2
SUSP# RM53 1 RS@ 2 0_0402_5% VIN1 VOUT1 JUMP_43X118
+3V_NGFF_GATE 3 12 1 2 CM35
ON1 CT1 CM38
+5VALW 0.1U_0201_10V6K
1 2 4 11 1000P_0402_50V7K 1
2 C2761 0.1U_0201_10V6K VBIAS GND 2
SUSP# R1668 1 RS@ 2 0_0402_5% 5VS_ON 5 10 1 2
ON2 CT2 C9 +5VS
+5VALW 6 9 330P_0402_50V7K J8 JP@
1 2 7 VIN2 VOUT2 8 +5VS_LS
C11 VIN2 VOUT2
1
1U_0201_6.3V6M 15 JUMP_43X118
GPAD C14
EM5209VF_DFN14_3X2 0.1U_0201_10V6K
2
SA00007PM00

SB00001IY00
www.laptoprepairsecrets.com
S TR EMB04N03G 1N SOP-8

+0.9VALW U4 +0.9VS
EMB04N03G 1N SOIC8
8 1 160mils(4.0A)
1 7 2
4.7U_0402_6.3V6M
C939

1U_0201_6.3V6M
C46

C940 6 3 1 1
4.7U_0402_6.3V6M 5
2
4

3 2 @2 3

+5VALW

1 2 0.9VS_GATE
R1674 1
4.7K_0402_5%
C16
1

D
0.1U_0201_10V6K
2 Q84 2
58 0.9VS_PW R_EN#
G
S L2N7002W T1G_SC-70-3
3

SB00001GE00

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 78 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 79 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 80 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 81 of 100
5 4 3 2 1
 A B C D

1
+19V_ADPIN +19V_VIN 1

EMI@ PL101
NA_2P
@ +19V_ADPIN 1 2
ACES_50299-00601-001

2
1 EMI@ PL102
1 2 PR102 NA_2P PR103
2 3 1 2
3 4.7_1206_5% 4.7_1206_5%

1
4 EMI@
7 4 5 PC101 EMI@ PC102
1

1
8 G7 5 6 100P_0201_50V8J 1000P_0402_50V7K

2
G8 6
2

2
PJP101
EMI@ PC103 EMI@ PC104
0.1U_0603_25V7K 0.1U_0603_25V7K
1

1
2 2

www.laptoprepairsecrets.com

3 3

@ PR101
0_0603_5%
1 2
+3VLP +CHGRTC

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 82 of 100
A B C D
 A B C D

PR201 100_0402_1%
1 2
EC_SMB_DA1 58,84
PR202 100_0402_1%
1 2
EC_SMB_CK1 58,84
+3VLP
PR203
200K_0402_1%
@ 1 2
PJP201 +3VLP
1 @
1

1
2 1 2 PC202
1
2 3 EC_SMB_DA1-1 BATT_TEMP 58,84 1

1
4 EC_SMB_CK1-1 PR204 1K_0402_1% 0.1U_0603_25V7K

2
4 5 BATT_TS @ @
5

1
6 BATT_B/I @ PR205 PR206
6 7 PR207 10K_0402_1% 10K_0402_1%
7 8 100K_0402_1%

2
8 9 +RTCVCC @
GND 10 PU201

2
GND 1 8
VCC TMSNS1

1
CVILU_CI9908M2HR0-NH 2 7 2 1
PR208 GND RHYST1

1
100K_0402_5% GPU_ALERT# 3 6 @
D PQ201 58 GPU_ALERT# OT1 TMSNS2 PR209 @

2
2 4 5 47K_0402_1% PH201
77 BI_GATE G OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
S LBSS139LT1G_SOT23-3 G718TM1U_SOT23-8

2
EMI@ PL201

3
+17.4V_BATT+ NA_2P
1 2

EMI@ PL202
NA_2P
1 2
+17.4V_BATT

1
1

1 PR212
EMI@ PC201 EMI@ PC203 0_0402_5%
1000P_0402_50V7K 1000P_0402_50V7K
2

For KB9022
Active Recovery Active Recovery

2
2

OTP For KB9022 2

VCIN0_PH(V) 85C, 1V 50C, 2V ADP_I 96%, 1.3286V 85%, 1.1764V

PH202(ohm) 9.1831K 33.19K 9022_VCIN 150%, 1.038V 150%, 1.038V

www.laptoprepairsecrets.com
+EC_VCCA
ADP_I 58,84

2013/10/02 +EC_VCCA
Add for ENE9022 Battery Voltage drop detection.
3
Connect to ENE9022 pin64 AD1. 3

1
PR210
PR211
Reserve for 2-cell design 21K_0402_1%

1
10K_0402_1%
PR218 VGA@

2
16.5K_0402_1%
58 9022_PH1

+19VB_5V

2
58 VRAM_TEMP

9022_VCIN 58

1
PH202
1

@ 100K_0402_1%_B25/50 4250K
1

PR213
750K_0402_1% @VGA@ PH204 VGA@ PH203 B value:4250K± 1%

2
@ 100K_0402_1%_B25/50 4250K 100K_0402_1%_B25/50 4250K
PR214
2

0_0402_5%
2

1 2 VCIN1_BATT_DROP 58 @
T1

1
@
T2 PR215
1

@ @ 10K_0402_1%
2

1
PC204 PR216 B value:4250K± 1%

0_0402_5%
PR217
0.1U_0402_25V6 150K_0402_1%

2
1

2
4 4

ECAGND

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 83 of 100
A B C D
 5 4 3 2 1

PR302

1
D
1M_0402_1%
2 1 2 PQ301
+19VB PQ312
G L2N7002WT1G_SC70-3 AON7380_DFN3X3-8-5 +17.4V_BATT_CHG
PR303 S 1

3
2 1 2
+19V_P1 +19V_P2 5 3
PQ310 3M_0402_5% PQ311
EMP21N03HC_EDFN5X6-8-5
1 1
AON7380_DFN3X3-8-5 PR304
0.01_1206_1% EMI@ PL302
+19V_CHG

4
2 2 HCB2012KF-121T50_0805
5 3 3 5 1 4 1 2
+19V_VIN

PC307 2200P_0402_50V7K
PC306 68P_0402_50V8J
0.1U_0402_25V6

0.1U_0402_25V6

@ PC308 10U_0805_25V6K

PC309 10U_0805_25V6K
2 3
D D

0.047U_0603_25V7M
4

4
1000P_0402_50V7K
PC302
1 2

1
PC301

PC303
ACP ACN

2
4.7_0603_1%
0.022U_0603_25V7K

PR301

4.02K_0402_1%
2

10_0402_1%
1

1
PC327

PC328
PC311

1
PC310

10U_0805_25V6K
0.1U_0402_25V6 PC312

PR306

PR307
10U_0805_25V6K
2 1 1 2 1 2

1
@ PC304

PC305
0.01U_0402_25V7K~N

2
@EMI@
EMI@

EMI@

EMI@
0.1U_0603_25V7K

2
PR308
4.02K_0402_1% BATDRV_CHGR
1 2 ACDRV_CHGR

1
PR309 PR310
0_0402_5% 0_0402_5%
2 1CMSRC_CHGR BATSRC_CHGR
PR305

2
4.02K_0402_1%

ACN_CHGR
ACP_CHGR
+19V_VIN
PD301 PR312 @ PC313
S SCH DIO BAS40CW SOT-323 10_0805_5% 1000P_0402_50V7K
3 1 2
+19V_VIN
1

1 2 1
PR311 2 ACDRV_CHGR
+19VB
422K_0402_1% PC314 1U_0603_25V6K +6V_CHG_REGN
2 1 PC316 PQ305
2.2U_0603_25V7M
2

AON7506_DFN33-8-5
ACDET PU301
1 2 Choke 4.7uH SH00000YC00 (Common Part)

ACDRV

ACP

ACN
28
VCC (Size:6.6 x 7.3 x 3 mm)
66.5K_0402_1%

PR314
1

CMSRC_CHGR 3 24 0_0603_5% (DCR:28m~33m)

CMSRC REGN
1

2DH_CHGR_R4
PR313

PR316 PC317 1
PC315 6 0_0603_5% 0.047U_0603_25V7M
2200P_0402_25V7K ACDET 25 BST_CHGR1 2BST_CHGR_R 1 2
2

C EC_SMB_DA1_CHGR11 BTST C
@0@ PR317 2 1 0_0402_5%
58,83 EC_SMB_DA1
2

SDA
+17.4V_BATT

3
2
1
@0@ PR315 2 1 0_0402_5% EC_SMB_CK1_CHGR12 26 UG_CHGR PR318
58,83 EC_SMB_CK1 SCL HIDRV PL301 0.01_1206_1%
ACPRN_CHGR 5 4.7UH_PCMB063T-4R7MS_8A_20%
58,83 ADP_I PC318 ACOK 27 LX_CHGR 1 2 1 4
1 2 PR333 1 2 0_0402_5% 7 PHASE
IADP 2 3

1
LG_CHGR

4.7_1206_5%
100P_0402_50V8J 8 23 PQ306
Close to EC IDCHG LODRV

EMI@ PR319
@ PC319

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
1 2 9

AON7506_DFN33-8-5
PMON
100P_0603_50V8 10 22 PR332 316K_0402_1% SRP SRN

1SNUB_CHGR2
/PROCHOT GND

1
PC320

PC321

PC329
1 2
+3VLP 4
@0@ PR321 PR322 150K_0402_1%

2
0_0402_5% 13 21 ILIM_CHGR 1 2
2 1 GND ILIM PR323 @
8,58,88 APU_PROCHOT#

680P_0402_50V7K
14 10_0402_1%

3
2
1
NC SRP_CHGR

EMI@ PC323
20 1 2

www.laptoprepairsecrets.com
@0@ PR334 ILIM=charge current limit
0_0402_5% SRP
2 1 15 19 SRN_CHGR 1 2 Rsr=input current sense

2
/BATPRES SRN I(CHG_LIM)=V(ILIM)/(20*Rsr)
BATDRV_CHGR
PR324 =(3.3*150/466)/(20*0.01)
16 18 10_0402_1% PC324
/TB_STAT BATDRV 0.1U_0402_25V6
=5.31A
29 17 BATSRC_CHGR 1 2
PWPD BATSRC
58,83 BATT_TEMP
BQ24781RUYR_WQFN28_4X4

0.1U_0402_25V6

0.1U_0402_25V6
H/L Side AON7506 SB000010A00
Rds(on):13~15.8mohm

1
PC325

PC326
Vgs=20V
Vds=30V

2
ID= 10.5A (Ta=70C)

B B

+3VS
For 4S per cell 4.35V battery +6V_CHG_REGN

ACDET
1

1
PR325
10K_0402_1% @ PR343 @ PR342
1

PR326 10K_0402_1% 10K_0402_1%

PR339 10K_0402_1%
2

2M_0402_1% 1 2 ACPRN_CHGR
58 ACIN

2
DGPU_AC_DETECT 27,58
1
2 2

PR327

@ PR341 12K_0402_1% @ PQ315A

6
0_0402_5% D 2N7002KDW_SOT363-6
2

2
G
1

1
S

1
1

@ PQ314 @ PQ315B

3
PQ307 RUM001L02_VMT3 D 2N7002KDW_SOT363-6
PR340 LTC015EUBFS8TL_UMT3F APU_PROCHOT# 2 ACIN 5
100K_0402_1% G
1 2 2
58 BATT_4S S

4
3
3
1

D
A 2 PQ308 A
37,58,78,86 SUSP#
G L2N7002WT1G_SC70-3
S
3

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 84 of 100
5 4 3 2 1
 A B C D E

PR402
499K_0402_1%
ENLDO_3V5V 1 2
+19VB

1
150K_0402_1%
PR404
EN1 and EN2 dont't floating

2
PU401
1 +19VB EMI@ PL401 SY8288BRAC_QFN20_3X3 @ PR401 PC401
1

HCB2012KF-121T50_0805 0_0603_5% 0.1U_0603_25V7K

+19VB_3V BST_3V

2200P_0402_50V7K
1 2 1 2 1 2 Choke 2.2uH SH00000YV00 (Common Part)
(Size:7.3 x 6.6 x 3 mm)

EMI@ PC431

@EMI@ PC403

EMI@ PC404

10U_0805_25V6K
0.1U_0402_25V6

0.1U_0402_25V6
(DCR:14m~16m)

1
PC405

BS
IN

IN

IN

IN
PL402

2
LX_3V6 20 LX_3V 1 2
LX LX +3VALWP
7 19 2.2UH_9A_20%_7X7X3_M
GND LX

@EMI@

PR405

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1

1
8 18

680P_0402_50V7K 4.7_1206_5%
+3VALWP GND GND

PC407

PC408

PC409

PC410

PC429

PC430
9 17
+3VLP

2
PG LDO
1

13V_SN
10 16 @ @

2
NC NC

1
Check pull up resistor of SPOK at HW side PC411

OUT
EN2

EN1
21 4.7U_0402_6.3V6M

NC
FF
PR406 GND 2
100K_0402_5%

11

12

13

14

15

@EMI@

PC412
2

2
3.3V LDO 150mA~300mA Vout is 3.234V~3.366V
58 SPOK_3V
ENLDO_3V5V PC402 PR403
Ipeak=4.65A
3V_FB
1000P_0402_25V8J1K_0402_5% Imax=3.25A
1 2 1 2
58 3V_EN Iocp=10A
2 2

+19VB +19VB_5V
EMI@ PL403 PU402 @ PR408 PC418
HCB2012KF-121T50_0805 SY8288CRAC_QFN20_3X3 0_0603_5% 0.1U_0603_25V7K
1 2 +19VB_5V BST_5V
1 2 1 2
Choke 1.5uH SH000016700 (Common Part)

1
(Size:7.3 x 6.6 x 3 mm)

BS
IN

IN

IN

IN
(DCR:14m~15m)
EMI@ PC432
0.1U_0402_25V6
1

LX_5V 6 20
2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

LX LX PL404
7 19 LX_5V 1 2 +5VALWP
2

GND LX
1

1
PC414

PC415

EMI@ PC416

@EMI@ PC417

8 18 1.5UH_9A_20%_7X7X3_M

www.laptoprepairsecrets.com
GND GND PC419

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
2

1
9 17 1 2
PG VCC

1
PR409

PC420

PC421

PC422

PC423

PC424

PC425
4.7_1206_5%
+3VLP

@EMI@
10 16 4.7U_0402_6.3V6M

2
NC NC

OUT

LDO
EN2

EN1
21 @ @

FF
GND
1

2
11

12

13

14

15
PR413
VL

15V_SN
100K_0402_5% 1
5V LDO 150mA~300mA
2

680P_0402_50V7K
PC427
58 SPOK_5V ENLDO_3V5V 2
4.7U_0402_6.3V6M Vout is 4.998V~5.202V

PC426
@EMI@
Ipeak=9A

2
5V_EN
3 Imax=6.6A 3

Iocp=10A
PC413 PR407
1000P_0402_25V8J 1K_0402_5%
5V_FB 1 2 1 2

PR410
2.2K_0402_5%
1 2
58 EC_ON
@

PR411
0_0402_5% @ PJ401
1 2 +3VALWP 1 2 +3VALW
58,77 MAINPWON 1 2
JUMP_43X118

5V_EN
1M_0402_1%

4.7U_0402_6.3V6M
1

@ PJ402
1
PR412

PC428

+5VALWP 1 2 +5VALW
1 2
JUMP_43X118
2
2

4 4

Security Classification
2018/12/18
Compal Secret Data
2019/12/18 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 85 of 100
A B C D E
 5 4 3 2 1

0.6Volt +/- 5%
TDC 0.7A
@ PJ504
D
1 2 +19VB_1.2V PR501 Peak Current 1A D
+19VB 1 2 2.2_0603_5%
BST_1.2V_R BST_1.2V

2200P_0402_50V7K
1 2

10U_0805_25V6K

10U_0805_25V6K
JUMP_43X79
+1.2VP

0.1U_0402_25V6

0.1U_0402_25V6
1

1
EMI@ PC525

@EMI@ PC501

EMI@ PC502

PC503

PC504
UG_1.2V +0.6VSP

0.1U_0603_25V7K
2

2
LX_1.2V

10U_0402_6.3V6M

10U_0402_6.3V6M
5

1
PC505
AON7408L_DFN8-5

PC506

PC507
16

17

18

19

20
2
PU501

2
BOOT

VTT
PHASE

UGATE

VLDOIN
4 21
PAD

PQ501
LG_1.2V 15 1
LGATE VTTGND

1
2
3
14 2
PL503 PR502 PGND VTTSNS
1UH_6.6A_20%_5X5X3_M 26.7K_0402_1%
1 2 1 2 CS_1.2V 13 3
+1.2VP PC508 CS RT8207PGQW_WQFN20_3X3 GND

1
1U_0402_10V6K
1 2 12 4 VTTREF_1.2V

AON7506_DFN3X3-8-5
VDDP VTTREF

5
@EMI@ PR503 PR504
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

4.7_1206_5% 5.1_0603_5%
1

1 2 VDD_1.2V 11 5
+5VALW +1.2VP
1 2
VDD VDDQ

1
PC511

PC512

PC513

PC514

PC515

PC516

PGOOD
C PC510 2 1 PC509 C

TON
2

PQ502
@EMI@ PC517 4 1U_0402_10V6K 0.033U_0402_16V7K

FB
S5

S3

2
2
680P_0402_50V7K 2 1 @ PD501
2

RB751V-40_SOD323-2

10

6
PR505
2.2_0603_5%

1
2
3

FB_1.2V
TON_1.2V
1

EN_0.6VSP
PR506

EN_1.2V
6.19K_0402_1%
+5VALW PR507 1 2 +1.2VP
470K_0402_1%
+19VB_1.2V 1 2
H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm

1
Mode Level +0.6VSP VTTREF_1.2V Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A
S5 L off off

www.laptoprepairsecrets.com

@
PR509 PR508 0.75*(1+6.19/10)=1.21
S3 L off on L/S AON7506 Rds(on) :typ:13mOhm, max:15.8mOhm 0_0402_5% 10K_0402_1%
S0 H on on Idsm(TA=25)=12A, Idsm(TA=70)=10.5A 58 SYSON 1 2

2
Note: S3 - sleep ; S5 - power off

1
Choke: 5x5x3 @ PC518
Rdc=13mohm(Typ), 14mohm(Max) 0.1U_0402_10V7K

2
Switching Frequency: 530kHz
Ipeak=10.91A

@
PR510
Iocp~120% 0_0402_5%
1 2 @ PJ501
OVP: 110%~120% 37,58,78,84 SUSP# 1 2
+1.2VP 1 2 +1.2V

1
JUMP_43X118
B @ PC519 B
+5VALW 0.1U_0402_10V7K

2
+3VALW
@ PJ502
1 2
+0.6VSP 1 2 +0.6VS
@ PJ505 JUMP_43X39
1

1 2 VIN_2.5V
1 2
1

PC524
JUMP_43X39 1U_0201_6.3V6M
2

PC521
2

4.7U_0402_6.3V6M @ PJ503
1 2
+2.5VP 1 2 +2.5V
JUMP_43X39
PU502 G9661MF11U_SO8
@

PR515 4 5
0_0402_5% 3 VDD NC 6
SYSON 1 2 EN_2.5V 2 VIN VOUT 7 +2.5VP
GND

1 EN ADJ 8
22U_0603_6.3V6M
0.01U_0402_25V7K

PGOOD GND
1
0.1U_0402_16V7K

PC522

PR512
9
1

1
PC520

PC523

PR511
21.5K_0402_1%
Rup Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%
2

1M_0402_5%
2

2
2

@ FB_2.5V
1

A PR513 A

10K_0402_1%
Rdown
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.2VP/0.6VSP/2.5VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 86 of 100
5 4 3 2 1
 5 4 3 2 1

EN pin don't floating

@ PJ601
If have pull down resistor at HW side, pls delete PR2 +0.9VALWP 1 2
1 2 +0.9VALW
JUMP_43X118
+19VB @ PJ604 PU601
1 2 +19VB_VDDP 2 9 @ PR603 PC602 @EMI@ PR602 @EMI@ PC603
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
D D
3 1 BST_VDDP 1 2 1 2 1 2SNB_VDDP 1 2

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

0.1U_0402_25V6
JUMP_43X79 IN BS

1
EMI@ PC623

@EMI@ PC604
4 6

EMI@ PC601
IN LX

2
5 19 PL602

PC605

PC622
IN LX 1UH_6.6A_20%_5X5X3_M
LX_VDDP
7
GND LX
20
FB_VDDP
1 2
+0.9VALWP
8 14

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
GND FB

330P_0402_50V7K

1
@ PR601 18 17 LDO_VDDP
GND VCC

1
0_0402_5%

PC606

PC607

PC608

PC609

PC610

PC611
1

1
58,87 0.9_1.8VALW_PWREN 1 2 11 10 PC612 PR610

PC613

2
EN NC 2.2U_0402_6.3V6M 10_0402_1%
ILMT_VDDP 13 12

2
ILMT NC

2
1
15 16
+3VALW BYP NC

1
PR607 @ PC614
1M_0402_1% 0.22U_0402_10V6K 21 PR606
PAD

1
13.7K_0402_1% 1 2

2
LDO_VDDP PC615 SY8288RAC_QFN20_3X3 1 2 VR_ON 58,88

2
1U_0201_6.3V6M @ PR623

2
0_0402_5%
(R1)
1

FB = 0.6V
@ PR604
0_0402_5% 1 2 1 3
APU_VDDP_SEN_H 8
2

1
ILMT_VDDP @ PR622
PR609 0_0402_5% @ PQ601
(R2)
1

24.9K_0402_1% LSK3541G1ET2L_VMT3

@ PR605

2
0_0402_5%
C C
2

1 2
APU_VDDP_SEN_L 8
@ PR621
0_0402_5%

VFB=0.6V
Vout=0.6V*(1+R1/R2)=0.93V

PR1811
100K_0402_5%

www.laptoprepairsecrets.com 2 1
+3VALW

+19VB @ PJ1803 PU1802

1 2 +19VB_1.8VALWP 2 9 @0@ PR1814 PC1810 @EMI@ PR1807 @EMI@ PC1806
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
10U_0603_25V6M

10U_0603_25V6M

3 1 1.8VALWP_BST 1 2 1 2 1 2 1.8VALWP_SNB 1 2
2200P_0402_50V7K
0.1U_0402_25V6

0.1U_0402_25V6

JUMP_43X79 IN BS
1

1
PC1801

PC1802

4 6
EMI@ PC1816

EMI@ PC1815

@EMI@ PC1808

IN LX
2

B 5 19 PL1802 B
IN LX 1UH_6.6A_20%_5X5X3_M
1.8VALWP_LX
7
GND LX
20
1.8VALWP_FB
1 2
+1.8VALWP
8 14

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
GND FB

1
@0@ PR1801 18 17 1.8VALWP_LDO
0_0402_5% GND VCC (R1)

PC1812

PC1813

PC1814

PC1804

PC1805

PC1817
330P_0402_50V7K
1

1
1 2 11 10 PC1809

2
EN NC

1
58,87 0.9_1.8VALW_PWREN 2.2U_0402_6.3V6M PR1813

PC1803
1.8VALWP_ILMT 13 12 20.5K_0402_1%

2
ILMT NC @ @

2
1

15 16
+3VALW

2
BYP NC
1

PR1808
1.8VALWP_LDO 1M_0402_1% @ PC1811 21 PR1812
PAD
1

0.47U_0402_6.3V6K 1K_0402_1%
2

PC1807 SY8286RAC_QFN20_3X3 1 2
2
1

1U_0201_6.3V6M
2

@0@ PR1815 FB = 0.6V

0_0402_5%

@ PJ1804
2

1.8VALWP_ILMT JUMP_43X79

1
1 2
+1.8VALWP 1 2 +1.8VALW
1

PR1810
@ 10K_0402_1%
PR1809
0_0402_5%
(R2)

2
2

Vout=0.6V* (1+Rup/Rdown)
Vout=0.6V*(1+20.5/10)
=1.83V (x1.017)

A
8288RAC A
Min
ILMT='0' 8A
ILMT=Floating 12A
ILMT='1' 16A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.9VALW/1.8VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 87 of 100
5 4 3 2 1
 5 4 3 2 1

8 APU_VSS_SEN_L APU_CORE_SEN_H 8 +19VB_CPU

+5VS +5VS +19VB_CPU
PR817 EMI@ PL801

ISEN3N_CPU

ISEN3P_CPU
1
0_0603_5% NA_2P
UG2_CPU 1 2 UG2_CPU_R 1 2
PR801 PR802 PC802 +19VB
10_0402_5% 10_0402_5% 0.01U_0402_50V7K CORE SW= 430KHz

2
1 2 1 2 EMI@ PL802
+APU_CORE

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

33U_25V_NC_6.3X4.5

33U_25V_NC_6.3X4.5
NA_2P

@EMI@ PC821

@EMI@ PC822
1 1

2200P_0402_50V7K
1 2

1
+ +

15W_CPU@ PR844

35W_CPU@ PR843

35W_CPU@ PR845

15W_CPU@ PR846

PC819

PC818

PC820

PC834
88.7K_0402_1%
2

2
0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

2
2 2

PR807

2
1 2

G1

D1
1

1
PR820 PC824
@ PC801 2.2_0603_5% 0.22U_0603_25V7K
BST2_CPU1 2 BST2_CPU_R1 2 7
330P_0402_50V7K PQ802
D
PR805 PR806 D2/S1 AON6962_DFN5X6D-8-7 D
10K_0402_1% 60.4K_0402_1% PL804
1 2 1 2 2 1 0.22UH_24A_20%_ 7X7X4_M

G2

S2

S2

S2
+5VS LX2_CPU 1 4
15W_CPU@ PR848 +APU_CORE APU_core

3
ISEN2P_CPU_R2 3
PC807 PC808 0_0402_5%

@EMI@ PR824
4.7_1206_5%
PWM3_CPU
390P_0402_50V7K 68P_0402_50V8J 2 1 TDC 35A (15W & 25W), 56A (35W)

1
1 2 1 2 PR826
35W_CPU@ PR847
LG2_CPU
2.7K_0402_1%
EDC 45A (15W & 25W), 70A (35W)
0_0402_5% 1 2 1 2 OCP current 63A (15W & 25W), 98A (35W)
PC825 Load line -0.7mV/A

680P_0402_50V7K
1 2
SNB_APU
0.1U_0402_25V6 FSW=430kHz

@EMI@ PC826
ISEN3N_CPU_IC

ISEN3P_CPU_IC

PWM3_CPU_IC
TONSET_CPU
ISEN1N_CPU

ISEN2N_CPU
DCR 0.98mohm +/-5%

ISEN1P_CPU

ISEN2P_CPU
COMP_CPU

BST2_CPU

UG2_CPU
TYP MAX

FB_CPU

2
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm
PU801

13

12

11

10

1
RT3663BMGQW_WQFN52_6X6

ISEN2N_CPU_R
ISEN2P_CPU

TONSET

PWM3

BOOT2

UGATE2
VSEN

ISEN3N

ISEN1N

ISEN2N
COMP

FB

ISEN3P

ISEN1P

ISEN2P
+5VALW
53 PR811
GND 2.2_0402_5% PR830
14 52 LX2_CPU PVCC_CPU 1 2 1.1K_0402_1%
RGND PHASE2 ISEN2N_CPU 1 2
IMON_CPU 15 51 LG2_CPU

0.1U_0402_25V6
IMON LGATE2 VCC_CPU 1 2

PC832
VREF_CPU 16 PVCC_CPU

1
+1.8VS 50
V064/SET3 PVCC PR812

2.2U_0603_10V6K

2.2U_0603_10V6K
IMONA_CPU17 LG1_CPU

1
49 10_0603_5% @

PC814

PC815

2
IMONA LGATE1
SVD_CPU and SVC_CPURC filter put CPU side. 1 2 PC813 18 48 LX1_CPU
SVT_CPU RC filter put controller side.

2
1U_0201_6.3V6M VDDIO PHASE1
19 47 UG1_CPU
15W_CPU@
8 APU_PWROK PWROK UGATE1
PR816
APU_SVC 20 46 BST1_CPU
16.5K_0402_1% 8 APU_SVC SVC BOOT1
APU_SVD 21 45 LG1_NB +19VB_CPU
8 APU_SVD PR838
SVD LGATEA1 0_0603_5% 35W_CPU@
1 2APU_SVT 22 44 LX1_NB UG1_CPU 1 2 UG1_CPU_R
PR853
8 APU_SVT_R SVT PHASEA1 +19VB_CPU
0_0603_5%
23 43 UG1_NB UG3_CPU 1 2 UG3_CPU_R
PR815 0_0402_5%

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
15W_CPU@ OFS UGATEA1

@EMI@ PC809

@EMI@ PC810
2200P_0402_50V7K
BST1_NB
2

PR821 35W_CPU@ 24 42 35W_CPU@ 35W_CPU@

35W_CPU@ PC847

35W_CPU@ PC848
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

2200P_0402_50V7K
OFSA BOOTA1

1
8.66K_0402_1% PR816 PR818 PR860 PC846

PC839

PC840

@EMI@ PC816

@EMI@ PC817
SET1_CPU 25 41
7.87K_0402_1% 25.5K_0402_1% +5VS PR819 2.2_0603_5% 0.22U_0603_25V7K
SET1 PWMA2 2 BST3_CPU_R 1

1
100K_0402_1% 1 2

2
SET2_CPU 26 +19VB_CPU

2
40 1 2

BST3_CPU
1

SET2 TONSETA

PGOODA
ISENA2N

ISENA1N
ISENA2P

ISENA1P

G1

D1

2
PGOOD
COMPA
35W_CPU@ PR839 PC841 PL805 35W_CPU@ 35W_CPU@ PQ805

VSENA
OCP_L

2
IBIAS

PR821 PR822 2.2_0603_5% 0.22U_0603_25V7K 0.22UH_24A_20%_ 7X7X4_M PU802 AON6962_DFN5X6D-8-7

VCC

FBA
BST1_CPU1 2 BST1_CPU_R
1 2 7 1 4

EN
15W_CPU@ 12.1K_0402_1% 5.9K_0402_1% PQ804

G1

D1
D2/S1 +APU_CORE
C PR825 1 2 1 2 AON6962_DFN5X6D-8-7 4 3 35W_CPU@ PL806 C
ISEN1P_CPU_R BOOT UGATE
100K_0402_1%_B25/50 4250K

17.8K_0402_1% 2 3 0.22UH_24A_20%_ 7X7X4_M

@EMI@ PR840
4.7_1206_5%
27

28

1 IBIAS_CPU 29
COMPA_CPU 30

31

32

33

34

35

36

37

38

39
PWM3_CPU LX3_CPU
100K_0402_1%_B25/50 4250K

Confirm HW side the pull high resistor 5 2 7 1 4

G2

S2

S2

S2
LX1_CPU
1

1
PR841 PWM PHASE D2/S1

@EMI@ PR855
VGATE 58 ISEN3P_CPU_R +APU_CORE
VCC_CPU

ISENA1N_CPU

ISENA1P_CPU
35W_CPU@ PR823 2.7K_0402_1% 1 6 2 3
PH801

PH802

4.7_1206_5%
6

3
FBA_CPU

PR825 20.5K_0402_1% 1 2 1 2 EN PGND 35W_CPU@

G2

S2

S2

S2
LG3_CPU

1
PR859 14.3K_0402_1% 8 7 PR856
APU_PROCHOT# 8,58,84 +5VS VCC LGATE
43K_0402_1% 1 2 PC842 9 2.7K_0402_1%

680P_0402_50V7K
+3VS
2

1 2

3
VCC_CPU 1 2 VREF_CPU LG1_CPU SNB_APU2 GND 1 2 1 2
0.1U_0402_25V6

PC843
Pull high at HW side

2
PR828 35W_CPU@ RT9610CGQW_WDFN8_2X2
100K_0402_1%
48.7K_0402_1%
2

1 +5VS 100K_0402_5% PC845 35W_CPU@

680P_0402_50V7K
1 2
SNB_APU3
0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

VR_ON 58,87 1U_0603_10V6K PC850

PR858

PR827

PC849
2

1
1

PC852 0.1U_0402_25V6

@EMI@
PC827

PC828

2
0.022U_0402_25V7K EN: high > 2V, Low < 0.8V
Can't be floating.
1

2
@ @

@EMI@
0.1U_0402_25V6
1

ISEN1N_CPU_R
1
PC829 PC830 @ PR829

PC831
390P_0402_50V7K ISEN1P_CPU
68P_0402_50V8J 10K_0402_5%
PC852 close to IC Pin16 1 2 1 2

ISEN3N_CPU_R
2
@

2
ISEN3P_CPU
PR842
PR831 PR832 1.1K_0402_1%
ISEN1N_CPU 1 2
110K_0402_1% 10K_0402_1%
1 2 1 2 35W_CPU@ PR857
@ PC833 1.1K_0402_1%

0.1U_0402_25V6
ISEN3N_CPU

1
330P_0402_50V7K 1 2

PC844
1 2

www.laptoprepairsecrets.com

0.1U_0402_25V6
2

1
@

@35W_CPU@ PC851
SVD and SVC RC filter put CPU side.

2
SVT RC filter put controller side.
APU_SVC
APU_VSS_SEN_L

+19VB_CPU
APU_SVD
PR803
0_0603_5%
UG1_NB 2UG1_NB_R
1

1
@ PC854 PC855 @
10P_0402_25V8J 10P_0402_25V8J

10U_0805_25V6K

10U_0805_25V6K
2

APU_SVT_R

1
PR833

PC803

PC804
10_0402_5%
1

1 2
SET1_CPU

+APU_CORE_SOC

2
PC853 @
1

2
10P_0402_25V8J PR834 PR835
2

8.2K_0402_1% 124K_0402_1% PC838

G1

D1
1 2 1 2 0.01U_0402_50V7K PR804 PC805 PQ801 PL803 +APU_CORE_SOC
2

2.2_0603_5% 0.22U_0603_25V7K AON6962_DFN5X6D-8-7 0.22UH_24A_20%_ 7X7X4_M

BST1_NB 2 BST1_NB1_R
PR836 PR837 VCC_CPU
1 1 2 7
D2/S1
1 4
+APU_CORE_SOC TDC 10A (15W & 25W &35W)
470_0402_1% 33K_0402_1%
APU_CORESOC_SEN_H

1 2 1 2 ISENA1P_CPU_R 2 3 EDC 13A (15W & 25W &35W)

1
PR809 OCP current 24.2A (15W & 25W &35W)

G2

PC811 @EMI@ PR808

S2

S2

S2

680P_0402_50V7K 4.7_1206_5%
LX1_NB
2.7K_0402_1%
Load line -2.1mV/A
SET2_CPU

B 1 2 1 2 B

3
PC806
FSW=400kHz
DCR 0.98mohm +/-5%

2
0.1U_0402_25V6
LG1_NB SNB_APU_NB
TYP MAX

1
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm

2
@EMI@

ISENA1N_CPU-1
ISENA1P_CPU

ISENA1N_CPU 1 2

PR810

0.1U_0402_25V6
1
845_0402_1%

PC812
2
@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+APU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 88 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/12/18 Deciphered Date 2019/12/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 89 of 100
5 4 3 2 1
 A
B
C
D

2
1
+
PC9095
330U_D2_2V_Y PC9048 PC9029 PC9001
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2
1
+
2 1 2 1 2 1 2 1 2 1
Under CPU PC9096
220U_D7_2VM_R4.5M PC9081 PC9056 PC9052 PC9030 PC9002
180P_0402_50V8J 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2
1
+
2 1 2 1 2 1 2 1

+APU_CORE

@
Bot PC9097
+APU_CORE

330U_D2_2V_Y PC9057 PC9046 PC9031 PC9003

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

5
5

2
1
+
2 1 2 1 2 1 2 1
PC9098
330U_D2_2V_Y PC9058 PC9050 PC9032 PC9004
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2
1
+
2 1 2 1 2 1 2 1
PC9094
330U_D2_2V_Y PC9059 PC9051 PC9033 PC9005
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

PC9060 PC9047 PC9034 PC9006

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

2
1
+
Under CPU PC9021 PC9061 PC9049 PC9035 PC9007
220U_D7_2VM_R4.5M 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

PC9062 PC9101 PC9036 PC9008

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
+APU_CORE

PC9063 PC9102 PC9037 PC9009

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1

PC9038 PC9010
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1

4
4

180pF*1
22uF*29
220uF*2
330uF*3

0.22uF*8
APU_CORE

330u is common part SGA00009S00

2
1
+

3
3

PC9099 PC9039 PC9011

Issued Date
330U_D2_2V_Y 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
+

2 1 2 1

Security Classification
PC9100 PC9040 PC9012
near CPU

330U_D2_2V_Y PC9082 PC9064 22U_0603_6.3V6M 22U_0603_6.3V6M

180P_0402_50V8J 0.22U_0402_16V7K 2 1 2 1
2 1
PC9041 PC9013
PC9065 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2 1
PC9042 PC9014
+APU_CORE_SOC

PC9066 22U_0603_6.3V6M 22U_0603_6.3V6M

0.22U_0402_16V7K 2 1 2 1

2018/12/18
2 1
PC9043 PC9015
PC9067 22U_0603_6.3V6M 22U_0603_6.3V6M
180pF*1
22uF*19
330uF*2

2 1 2 1
0.22uF*8

0.22U_0402_16V7K
2 1
PC9044 PC9016
PC9068 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2 1
PC9045 PC9017
PC9069 22U_0603_6.3V6M 22U_0603_6.3V6M
APU_CORE_SOC

0.22U_0402_16V7K 2 1 2 1
2 1
PC9053 PC9018
PC9070 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
330u is common part SGA00009S00

0.22U_0402_16V7K
Compal Secret Data

2 1
Deciphered Date

PC9103 PC9019
PC9071 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
www.laptoprepairsecrets.com

2
2

PC9020
+APU_CORE_SOC

22U_0603_6.3V6M
2 1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2019/12/18

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Title

Date:
Custom
Size Document Number

Monday, November 25, 2019

1
1

FH50Q M/B LA-J621P

Sheet
90
+APU_CORE Cap
Compal Electronics, Inc.

of
100
Rev
1.0
A
B
C
D
 5 4 3 2 1

@ PCV1
0.1U_0402_25V6
2 1

PRV1 PRV3
1 2 1 2
0_0402_5% 34K_0402_1%
N17P-G1N
NVVDD_B+
VVDD1
PCV2
0.1U_0402_25V6 +5VCC PRV6 TDC 59A
+3VS 1 2 4.3K_0402_1% Peak Current 124A
2 1
OCP 200A

91K_0402_1%
10K_0402_1%

10K_0402_1%

PRV8
PRV9 Fsw=300kHz

1
3.6K_0402_1%

PRV139

PRV140
2 1
D PRV11 D

2
10K_0402_1% PRV2 +5VCC
2 1 4.99K_0402_1%
2

2
VGA_I2CC_SDA_PWR 2 1
VGA_I2CC_SCL_PWR PCV4 @ PCV5 PRV4
0.1U_0402_25V6 0.1U_0402_25V6 3.4K_0402_1%
1

1
0_0402_5%

0_0402_5%
1 2 1 2 2 1
@ PRV142

@ PRV141 2 1 2 1 PRV7
PRV12 PRV13 442_0402_1%
0_0402_5% 0_0402_5% 1 2
2

0_0402_5%
1 2 2 1 PCV3

PRV16
PCV6 PRV15 1U_0402_6.3V6K
0.015U_0402_16V7K 2.4K_0402_1% 1 2

2 1 1 2

2
PRV18 @ PCV7
@0@ PRV20 0_0402_5% 0.1U_0402_25V6 PRV14
29 NVVDD1_VCC_SENSE 0_0402_5% 2K_0402_1%

0_0402_5%
PRV21
2 1 1 2

1 2 @

FDMF3170_REFIN
+NVVDD1 @0@ PRV145

ADDR/FSW_GPU
PRV22 +5VCC 0_0402_5%

VINMON_GPU
1
10_0402_1% 2 1
FDMF3170_IMON1 92

COMP_GPU

IMON_GPU

0.1U_0402_25V6
DAC_GPU
EAP_GPU

LPC_GPU

PCV8
1
100K_0402_1%
@ PRV25 @ PCV11 @ PRV19

1
0_0402_5% 0.1U_0402_25V6 1K_0402_1%

2
+5VCC

@
PRV10
VOUT_S 1 2 1 2

2
0.1U_0402_25V6

@0@ PRV146

24

23

22

21

20

19

18

17
C C
PCV14

2 1 PUV1 0_0402_5%

2
2

100K_0402_1%
PRV31 2 1

REFOUT
COMP

EAP

DAC

VINMON

ADDR

IMON

LPC
FDMF3170_IMON2 92

0.1U_0402_25V6
1K_0402_1%

1
PRV29
@
1

1
CSPSUM_GPU

@ PCV13
25 16
FB CSPSUM @ PRV30
@0@ PRV34 NVVDD1_FBRTN 26 15 CSNSUM_GPU 1K_0402_1%

2
29 NVVDD1_VSS_SENSE 0_0402_5% FBRTN CSNSUM

2
2 1 TSENSE_GPU 27 14 CSP1_GPU
92 TSENSE_GPU TSENSE CSP1
VGA_I2CC_SDA_PWR CSP2_GPU FDMF3170_REFIN 92
1 2 28 13
PRV35 27 VGA_I2CC_SDA_PWR SDA UP9512QQKI_WQFN32_4X4 CSP2
10_0402_1% VGA_I2CC_SCL_PWR 29 12 CSP3_GPU
NVVDD1_FBRTN 27 VGA_I2CC_SCL_PWR SCL CSP3 +5VS
+5VCC
1 2 EN_GPU 30 11
+3VALW EN CSP4

www.laptoprepairsecrets.com
PRV39
1

PSI_GPU
10K_0402_1%

10K_0402_1% 31 10 2 1
PSI 5VCC

4.7U_0402_6.3V6M
PRV40

PRV42
DMN53D0LDW-7 2N SOT363-6

DMN53D0LDW-7 2N SOT363-6

1
NVVDD1_PG

PCV18
32 9 2.2_0603_5%
PGOOD PWM1
6

REFADJ
33

CH_OC
2

2
GND

REFIN

PWM4

PWM3

PWM2
PQV01A

PQV01B

VREF
VID
2 5
27,37 NVVDD1_EN

8
1

REFADJ_GPU
1 2

PWM4_GPU

PWM3_GPU
VREF_GPU

CH_OC_GPU
+3VS

REFIN_GPU

PWM2_GPU

PWM1_GPU
VID_GPU

@ PRV46
0_0402_5%

PRV50
NVVDD_PSI 27 0_0402_5%
6.19K_0402_1%

B 2 1 B
1

PRV44

1 2
@ PRV52
R1 @0@ PRV54
0_0402_5% 0_0402_5%
2

2 1 GPU_PWM1 92
PRV61
100K_0402_1% 2 1 GPU_PWM2 92
+3VS 1 2 2 1
@0@ PRV56
113K_0402_1%

232K_0402_1%
22.6K_0402_1%

63.4K_0402_1%

PRV53 0_0402_5%

PRV63
4.32K_0402_1%
16.5K_0402_1%

R3
1

1
+5VS 10 NVVDD1_PG
1

@ 100K_0402_1%
PRV57

@ PCV9
1U_0402_6.3V6K
1 2
R4
PRV71

@ PRV72

PRV73

PRV69

@ PUV8 @0@ PRV70

2

TC7SH08FU_SSOP5~D 0_0402_5%
R2
2

2
5

2 1
1 PRV66
P

+5VS B GPU_DRVON 92 27 NVVDD_VID

4 20.5K_0402_1%
EN_GPU 2 O 2 1
A
G
3

4700P_0402_50V7K

1
309_0402_1%
1
PCV26

PRV64

1U_0402_6.3V6K

PRV51
C R5
0_0402_5% PWMVID 的 RC BOM
2

PCV25

2 1
請 根 據GPU
據GPU 's conf i g 設定
2

A A

NVVDD1_FBRTN

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_VGA_UP9512Q
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 91 of 100
5 4 3 2 1
 1 2 3 4 5

GPU_B+ NVVDD_B+
EMI@ PLV11
+19VB PRV74 PRV75
HCB2012KF-121T50_0805
1 2 1 4 1 4

EMI@ PLV12 2 3 2 3
HCB2012KF-121T50_0805
1 2
0.005_1206_1% 0.005_1206_1%

+5VS
A A

2
36 CSSP_B+ 36 CSSN_B+ CSSP_NVVDD 36 36 CSSN_NVVDD
NCP303150@
PRV77
0_0402_5%
PRV76 NVVDD_B+

1
30K_0402_5%
1 2

PRV82
91 TSENSE_GPU

2200P_0402_50V7K
PCV30

PCV31

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK
0_0402_5%

0.1U_0402_25V6
TMON1_FDMF3170 BST1_FDMF3170 1

33U_25V_M
2 1 1 2

1
+

PCV32

PCV33

PCV34

PCV35

PCV39

PCV249
PRV80
2.2_0603_1%

2
1
+5VS 2

EMI@

EMI@
16

17

11

10

13
9
PCV40
0.1U_0603_25V7K

FAULT

BOOT
ZCD_EN

N/C

VIN
VIN1

2
PRV85
0_0402_5%
PCV27 +NVVDD1 2 1 VOS1_FDMF3170 1
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE1_FDMF3170
PVCC PHASE
1 2 VCC1_FDMF3170 3
PRV78 VCC
2_0402_5% 2
AGND
1

PCV37
2.2U_0402_6.3V6M 5 PUV2
PGND QD9619AQR1
2

20
PGND2
@0@ PRV79 PLV2 +NVVDD1
B 0_0402_5% S COIL 0.22UH 20% MMD-10DZIR22MER1L 50A B
2 1 PWM1_FDMF3170 14 8 LX1_FDMF3170 1 2
GPU_DRVON 91 91 GPU_PWM1 PWM SW

1
2 1 EN1_FDMF3170 15
@0@ PRV84 0_0402_5% DISB#
FDMF3170_IMON1 18
10X10X4
EMI@ PRV154
91 FDMF3170_IMON1 IMON 4.7_1206_5%
Isat:90A
2 1 FDMF3170_REFIN1 19 DCR:0.55mΩ (+/-5%)

PGND1

2
REFIN
@0@ PRV81 GPU1_SNB1
GL

TP

1
0_0402_5%
EMI@ PCV255
6

21

7
680P_0402_50V7K

2
+5VS www.laptoprepairsecrets.com
2

NCP303150@
PRV87
0_0402_5%
PRV88 NVVDD_B+
1

30K_0402_5%
1 2

PRV92

2200P_0402_50V7K
PCV47

PCV48

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK
0_0402_5%

0.1U_0402_25V6
2 1 TMON2_FDMF3170 BST2_FDMF3170
1 2

1
PCV49

PCV50

PCV51

PCV52
C PRV90 C
2.2_0603_1%

2
1

+5VS

EMI@

EMI@
16

17

11

10

13
9

PCV57
0.1U_0603_25V7K
FAULT

BOOT
ZCD_EN

N/C

VIN
VIN1

PRV95
0_0402_5%
PCV44 +NVVDD1 2 1 VOS2_FDMF3170 1
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE2_FDMF3170
PVCC PHASE
1 2 VCC2_FDMF3170 3
PRV86 VCC
2_0402_5% 2
AGND
1

PCV54
2.2U_0402_6.3V6M 5
PGND PUV3
2

20 QD9619AQR1
PGND2
@0@ PRV89 PLV3 +NVVDD1
0_0402_5% S COIL 0.22UH 20% MMD-10DZIR22MER1L 50A
2 1 PWM2_FDMF3170 14 8 LX2_FDMF3170 1 2
91 GPU_PWM2 PWM SW
1

2 1 EN2_FDMF3170 15
@0@ PRV94 0_0402_5% DISB#
FDMF3170_IMON2 18 EMI@ PRV93
91 FDMF3170_IMON2 IMON 10X10X4
4.7_1206_5%
2 1 FDMF3170_REFIN219 Isat:90A
PGND1

DCR:0.55mΩ (+/-5%)
2

REFIN
@0@ PRV91 0_0402_5% GPU1_SNB2
GL

TP

FDMF3170_REFIN 91
1

EMI@ PCV60
6

21

D 680P_0402_50V7K D
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+NVVDD1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 92 of 100
1 2 3 4 5
 A
B
C
D

+NVVDD1

5
5

2 1 2 1 2 1

PCV155 PCV159 PCV251

1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM
2 1 2 1 2 1

2
1
+
PCV156 PCV160 PCV140 PCV136
1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM 560U_D2_2VM_R4.5M
2 1 2 1 2 1

2
1
+
PCV157 PCV161 PCV141 PCV137
1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM 560U_D2_2VM_R4.5M
2 1 2 1 2 1

2
1
+
PCV158 PCV258 PCV142 PCV138
1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM 560U_D2_2VM_R4.5M
2 1 2 1 2 1

2
1
+
PCV162 PCV149 PCV143 PCV139
1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM 560U_D2_2VM_R4.5M
2 1 2 1 2 1

2
1
+
PCV163 PCV150 PCV144 PCV272
1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM 560U_D2_2VM_R4.5M
2 1 2 1 2 1

PCV164 PCV151 PCV145

1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM
2 1 2 1 2 1

PCV165 PCV152 PCV146

1U_0201_6.3VAM 1U_0201_6.3VAM 1U_0201_6.3VAM
2 1 2 1

PCV153 PCV147
1U_0201_6.3VAM 1U_0201_6.3VAM

4
4

2 1 2 1

PCV154 PCV148
1U_0201_6.3VAM 1U_0201_6.3VAM
+NVVDD
N18P-G0

+NVVDD1

2 1
560uF X 5

2 1 2 1 2 1
PCV215
PCV283 PCV225 PCV235 10U_0402_6.3V6M
2 1
1uF_0201 X 28
10uF_0402X 34

10U_0402_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M

2 1 2 1 2 1
22uF_0603 X 15

PCV216
PCV280 PCV226 PCV236 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1 2 1
PCV217
PCV237 PCV227 PCV279 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1 2 1
PCV218
PCV276 PCV229 PCV282 10U_0402_6.3V6M
2 1

3
3

10U_0402_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M

Issued Date
2 1 2 1
PCV219
PCV228 PCV287 10U_0402_6.3V6M

Security Classification
10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1
PCV220
PCV230 PCV250 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1
PCV221
PCV231 PCV275 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1
PCV222

2016/01/06
PCV232 PCV281 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1
PCV223
PCV233 PCV284 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M 2 1
2 1 2 1
PCV224
PCV234 PCV277 10U_0402_6.3V6M
10U_0402_6.3V6M 10U_0402_6.3V6M
+NVVDD1

Compal Secret Data

Deciphered Date

2 1 2 1
www.laptoprepairsecrets.com

PCV254 PCV243
2
2

22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1

PCV253 PCV244
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2017/01/06

PCV252 PCV245
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

PCV257 PCV246
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1

PCV256 PCV247
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1
Size
Title

Date:

PCV248
22U_0603_6.3V6M
2 1

PCV358
22U_0603_6.3V6M
2 1

PCV359
Document Number

22U_0603_6.3V6M
2 1

PCV360
22U_0603_6.3V6M
Monday, November 25, 2019

2 1

PCV361
1
1

22U_0603_6.3V6M
Sheet
FH50Q M/B LA-J621P
93
PWR_VGA DECOUPLING
Compal Electronics, Inc.

of
100
Rev
1.0
A
B
C
D
 5 4 3 2 1

EMI@ PLW11
Micron & Hynix & Samesung VRAM FBMA-L11-201209-800LMA50T
B+_+1.35VS_VGAP
Vboot=Vref*R2/(R1+R2+80) 1 2
GPU_B+

2200P_0402_50V7K
When,VRAM_VDD_CTL=High

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK
0.1U_0402_25V6

0.1U_0402_25V6
PRW1

PCW1

PCW2

EMI@ PCW19
Vboot=2*30.9K/(10K+30.9K+80)

1
1K_0402_1%

PCW3

PCW4

PCW5
1 2
=1.508V (x1.11) 27,37 1.35VSDGPU_EN

2
EMI@

EMI@
PCW6
When,VRAM_VDD_CTL=Low 0.1U_0402_25V6 MOSFET: DFN 5X6E
1 2
H/S Rds(on): 5.2mohm(Typ), 7mohm(Max)
D Vboot=2*(30.9K//68.1K)/(10K+(30.9K//68.1K)+80) +3VALW L/S Rds(on): 0.8mohm(Typ), 1.05mohm(Max) N18P-G0 D
=1.356V (x1.08) UG1_+1.35VS_VGAP
+1.35VSDGPU
TDC 14A

1
SW1_+1.35VS_VGAP
VREF_+1.35VS_VGAP PRW10
Peak Current 15A
31.6K_0402_1% 13X8X4 OCP current 31A
Rref1 Isat:55A fsw=400kHz
1

REFIN_+1.35VS_VGAP @ PRW3

2
Outside@ 0_0402_5% DCR:1.3mΩ (+/-5%)
PRW2 1 2 PQW1
27 FBVDDQ_PSI

4
10K_0402_1% AOE6930_DFN5X6E8-10 PLW1
0.1U_0402_25V6

0.47UH_MHT-MHDZIR47MEM1-RT_30A_20%

G1

D2/S1_3 S1/D2

D1_1

D1_2
2

1
SW1_+1.35VS_VGAP-1 1 2
+1.35VSDGPU
Outside@

PRW6
PCW7

10K_0402_1% 9 10

1
D1_3 S2

D2/S1_2

D2/S1_1
+3VALW
2

Rref2

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
PRW4 1 1 1

2
@EMI@ PRW8
68.1K_0402_1%

G2
0.033U_0402_16V7K

330U_D1_2VY_R9M

330U_D1_2VY_R9M

330U_D1_2VY_R9M
2.2_0603_5%
1

1
Outside@ Inside@ PRW26 2 1 4.7_1206_5% + + +

PCW23

PCW9

PCW10

PCW11

PCW12

PCW13
Outside@
1

Outside@ PRW21 0_0402_5%

Outside@ PCW8

PRW5

BOOT1_+1..35VS_VGAP_R

2
PRW7 10K_0402_1% VID_+1.35VS_VGAP_R 1 2

2
2 2 2

BOOT1_+1.35VS_VGAP
30.9K_0402_1%

SNB1_+1.35VS_VGAP
2

UG1_+1.35VS_VGAP
VID_+1.35VS_VGAP

PSI_+1.35VS_VGAP
2

EN_+1.35VS_VGAP
1
LG1_+1.35VS_VGAP
DMN53D0LDW-7 2N SOT363-6

Outside@ PRW27
0_0402_5%
DMN53D0LDW-7 2N SOT363-6

2
3

6
Outside@ PQW2B

Outside@ PQW2A

@0@ PRW9
0_0402_5%

1
5 2 VID_+1.35VS_VGAP_R 2 1 @EMI@ PCW16

1
VRAM_VDD_CTL 27 PUW1 680P_0402_50V7K

1
RT8816BGQW_WQFN20_3X3 PCW14
0.1U_0402_16V7K
4

2
1
@ PCW15

0.22U_0603_25V7K

UGATE1

BOOT1
VID

PSI

EN

2
1

PRW28
10K_0402_1% REFADJ_+1.35VS_VGAP 6 20 SW1_+1.35VS_VGAP
2

REFADJ PHASE1
2

REFIN_+1.35VS_VGAP 7 19 LG1_+1.35VS_VGAP
C C
REFIN LGATE1 PRW11
2.2_0603_5%
VREF_+1.35VS_VGAP 8 18 PVCC_+1.35VS_VGAP 1 2
VREF PVCC +5VALW
PRW12 PRW13
2.2_0402_1% 383K_0402_1%
VREF_+1.35VS_VGAP 2 1 2 1 TON_+1.35VS_VGAP 9 17 PCW17
B+_+1.35VS_VGAP TON LGATE2

1
2.2U_0402_6.3V6M

OCSET/SS
RGND 10 16
0.1U_0402_25V6

PCW18

2
UGATE2
RGND PHASE2

PGOOD
4.7K_0402_1%

BOOT2
1

2
1TON_+1.35VS_VGAP_R

VSNS
2
Inside@ PCW20

GND
0_0402_5%
Inside@ PRW22

@ PRW14
0.1U_0402_25V6
REF1
2

21

11

1OCset_+1.35VS_VGAP 12

13

14

15
REFADJ
2

1.35VSDGPU_PG
Inside@

Vsense_+1.35VS_VGAP
PRW25
42.2K_0402_1%
REFADJ_+1.35VS_VGAP_R 1 2 REFADJ_+1.35VS_VGAP

www.laptoprepairsecrets.com
Inside@ PCW21
2200P_0402_50V7K
1

1
Inside@ PRW23
3.92K_0402_1%

PRW17 36.5K_0402_1%
PRW19
RBOOT
2

100_0402_1%
+1.35VSDGPU
1 2
2

2
@
PCW27
REFIN_+1.35VS_VGAP 0.1U_0402_25V6 PRW18
1 2 10K_0402_1%
1 2 +3VS
@0@ PRW20
2200P_0402_50V7K
1

0_0402_5%
Inside@ PRW24

Inside@ PCW22
25.5K_0402_1%

2 1
30 FB_VDDQ_SENSE

REF2 1.35VSDGPU_PG 27
2
2

B B

PRW17=36.5K ohm, Rocset for 31.4A

Micron & Hynix & Samesung VRAM

When,VRAM_VDD_CTL=High
Vboot=1.515V (x1.122)
When,VRAM_VDD_CTL=Low
Vboot=1.363V (x1.091)

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/02/01 Deciphered Date 2017/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+VRAM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 94 of 100
5 4 3 2 1
 A B C D E

1 1

PR1010
0_0402_5%
1VSDGPU_EN_R 1 2
1VSDGPU_EN 27

1
Current limit = 4.7A(min) PR1008 @ PC1014
0.1U_0402_16V7K

2
PR1009 1M_0402_5%
10K_0402_5%

2
2 1 Choke 1uH SH00000YG00 (Common Part)
+3VALW
(Size:3.8 x 3.8 x 1.9 mm)
(DCR:20m~25m)
27 1VSDGPU_PG
PU1002 Choke: SH00000YG00 Size:4x4x2 (Common Part)
9
1 PGND 8 Rdc=27± 20% Taiyo
FB SGND Rdc=20mohm(Typ), 25mohm(Max) Cyntec
@ PJ1001 2
PG EN
7 PL1002 Rdc=27± 20% 3L
JUMP_43X79 1UH_2.8A_30%_4X4X2_F Rdc=30± 20% Tai-Tech
1 2 VIN_1.0VSDGPUP 3 6 LX_1.0VSDGPUP 1 2
+3VALW 1 2 IN LX +1.0VSDGPUP Rdc=32± 20% Chilisin
4 5 Rdc=36mohm(Typ), Xmohm(Max) Maglayers

68P_0402_50V8J
PGND NC

1
2 2

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
Rup
1

1
PC1012
PC1013 EMI@

1
PC1009

PC1010

@ PC1011
SY8003ADFC_DFN8_2X2 PR1007 PR1011
22U_0603_6.3V6M 4.7_0603_5% 13.7K_0402_1%
2

2
2

2
FB_1.0VSDGPUP

1
EMI@
Rdown

1
FB=0.6V PC1008
Note:Iload(max)=3A 680P_0402_50V7K PR1012
20K_0402_1%

2
@ PJ1003
VFB=0.6V

2
JUMP_43X79

www.laptoprepairsecrets.com Vout=0.6V* (1+Rup/Rdown)

=0.6V* (1+13.7/20)
Vout=1.011V
+1.0VSDGPUP
1
1 2
2
+1.0VSDGPU

3 3

4 4

Security Classification
2016/11/03
Compal Secret Data
2017/06/14 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_1.0VSDGPU
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 95 of 100
A B C D E
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/11/23 Deciphered Date 2017/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 96 of 100
5 4 3 2 1
 5 4 3 2 1

D D

C C

Reserve Page
www.laptoprepairsecrets.com

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/11/23 Deciphered Date 2017/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 97 of 100
5 4 3 2 1
 5 4 3 2 1

Version change Page 1 of 2 for

list (P.I.R. List) PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

01 Design Update Solution Change 1.0 84 PQ301 change from 2N7002KW (SB000009Q80) to L2N7002SWT1G (SB00001GE00). 2019/09/18 C

02 Design Update Solution Change 1.0 94 Add location PRW28, 10K_0402_1% (SD034100280)at net 'VRAM_VDD_CTL' and pull down. 2019/09/26 C
03 Design Update Solution Change 1.0 84 PR312 change from 10_1206_5% (SD011100A80) to 10_0805_5% (SD002100A80). 2019/10/01 C
86 PC318 change from 100p_0603_50V (SE024101J80) to 100p_0402_50V (SE071101J80).
PC301 change from 1000p_0603_50V (SE025102K80) to 1000p_0402_50V (SE074102K80).
PC506,PC507 change from 10u_0603_6.3V (SE000005T80) to 10u_0402_6.3V (SE00000UD00).
D
04 Design Update Solution Change 1.0 82 PC101 change from 100p_0402_50V (SE071101J80) to 100p_0201_50V (SE00000SE00). 2019/10/01 C D

05 Design Update SDLE measure result 1.0 98 PR609 change from 24.3K_0402_1% (SD00000AT80) to 24.9K_0402_1% (SD034249280). 2019/10/07 C
Design Update SDLE measure result 1.0 90 Add location PC9101,PC9102,PC9103, 22U_0603_6.3V (SE00000M000)at net '+APU_CORE' and '+APU_CORE_SOC'. 2019/10/14 C
88 PR806 change from 52.3K_0402_1% (SD034523280) to 60.4K_0402_1% (SD034604280).
PC807 change from 270p_0402_50V (SE074271K80) to 390p_0402_50V (SE074391K80).
PC830 change from 330p_0402_50V (SE074331K80) to 390p_0402_50V (SE074391K80).
06 Design Update Solution Change 1.0 91 Change from 0 Ohm (0_0402_5%, SD028000080) to R-short as below location: 2019/10/15 C
92 PRV20,PRV34,PRV54,PRV56,PRV70,PRV145,PRV146,PRV79,PRV81,PRV84,PRV89,PRV91,PRV94,PRW9,PRW20,
84 PR315,PR317.PR321,PR334, total 19 pcs.
07 Design Update Thermal team request 1.0 83 PR210 change from 16.9K_0402_1% (SD034169280) to 21K_0402_1% (SD034210280). 2019/10/15 PreMP

08

09
C C

10

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12

13

14
www.laptoprepairsecrets.com
15

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B B

17

18

19

20

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A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2018/12/18 2019/12/18 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 98 of 100
5 4 3 2 1
 5 4 3 2 1

Version change Page 2 of 2 for

list (P.I.R. List) PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

01

02

D D

03

04

05

06

07

08

09
C C

10

11

12

13

14
www.laptoprepairsecrets.com
15

16

B B

17

18

19

20

21

22

23

24

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2018/12/18 2019/12/18 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 99 of 100
5 4 3 2 1
 A B C D E

Version change list (P.I.R. List) Page 1 of 2 for HW

Item Page Title Date Issue Description Solution Description Phase Rev.

1 8 10/03 Change source Change SA00004BV00 to SA0000BIO00 for UC64,UC65,UC66 PVT 1.0
2 9 10/03 Change source Change SA00000OH00 to SA0000BIP00 for UC4 PVT 1.0
1 1

3 10/03 Change source Change SA00003R000 to SA0000BJI00 for UV2,UV10,UV11 PVT

27 Change RV9 from 100K_0402 to 10K_0402 1.0
4 Change SA00003R000 to SA0000BJI00 for UV46 PVT 1.0
37 10/03 Change source Change SE082221J80 to SE074221K80 for CG335
5 42 10/03 Change source Change SE082221J80 to SE074221K80 for CS129,CS130 PVT 1.0
6 52 10/03 Size reduce Change CM79,CM80 from 10U_0603 to 10U_0402 PVT 1.0
7 56 10/03 Size reduce Change SE071101J80 to SE00000SE00 for CA26 (0402 -> 0201) PVT 1.0
8 58 10/03 Size reduce Change SE071101J80 to SE00000SE00 for C1265,C1266,C1279 (0402 -> 0201) PVT 1.0

9 68 10/03 Size reduce Change SE071101J80 to SE00000SE00 for CM17 (0402 -> 0201) PVT 1.0
Change source Change SA00000OH00 to SA0000BIP00 for UM5
10 78 10/03 Change source Change SE082221J80 to SE074221K80 for CG336 PVT 1.0
2 2

11 68 PCIE SSD 10/04 SSD1_PCIE_RST# path change Change UM5,RM135 to @ PVT 1.0
Change UM28 to pop
12 40 HDMI 10/14 Change footprint for colay 蓋 綠漆 Change footprint,add"-npm" on R756,R765,L2513,L2514,L2515 PVT 1.0
13 66 IEC Themal Sensor 10/23 THERMAL1_ALERT# need always PU Change RF25 from TMSIEC@ to always pop PVT 1.0

www.laptoprepairsecrets.com

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/07/24 Deciphered Date 2020/07/24 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. FH50Q M/B LA-J621P
Date: Monday, November 25, 2019 Sheet 100 of 100
A B C D E