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ECE3001-Analog Communication Systems Digital Assignment 3
ECE3001-Analog Communication Systems Digital Assignment 3
Digital Assignment 3
Name: J. Kiron
Reg No:18BEC1150 Date: 06/06/2020
The rising edges of the PWM signal coincides with the falling edge of
the sawtooth signal. When the sawtooth signal is at the minimum value
which is less than the minimum of the input signal, then the positive
input of the comparator is at higher potential which gives the
comparator output as positive. When the sawtooth signal rises and is at
the maximum value, the negative input of the comparator is at higher
potential, which will produce the comparator output to be negative.
Thus, the input signal magnitude determines the comparator output and
its potential, which then decides the width of the pulse generated at the
output. In other words, we can say that the width of the pulse generated
signal is directly proportional to the amplitude of the modulating signal.
For PWM demodulation, put a ramp at the +ve edge which will
stop at the arrival of –ve edge. The ramp will attain different
heights in each cycle since the widths are different and the
heights attained are directly proportional to the pulse width and
in turn the amplitude of the message signal. This is then passed
through a low pass filter where it will follow the envelop i.e. the
message signal, which produces the demodulated signal at the
output.
Generation of PCM
To get a pulse code modulated waveform from an analog
waveform at the transmitter end of a communications circuit,
the amplitude of the analog signal samples at regular time
intervals. The sampling rate or a number of samples per
second is several times the maximum frequency. The message
signal converted into the binary form will be usually in the
number of levels which is always to a power of 2. This process
is called quantization.
Generation of DM
Delta modulation is a Differential Pulse Code modulation
(DPCM) technique in which the difference signal is encoded
into a single bit.
Delta modulation provides a staircase approximation of the
input sampled signal where only one bit per sample is
transmitted.
This one bit is sent by comparing the present sample value
with the previous sample value and the result whether the
amplitude is to be increased or decreased is transmitted. If the
step is reduced, 0 is transmitted and if the step is increased
then 1 is transmitted.
Sample and hold circuit will sample the analog input signal
into Pulse amplitude modulated (PAM) signal.
The generated PAM signal is given as one of the inputs to the
comparator and the other input is a signal from DAC output.