Linear Integrated Circuits.

Dept of Electronics & Communication

Engg

DEPARTMENT OF ELECTRONICS AND

COMMUNICATION ENGINEERING

LINEAR INTEGRATED CIRCUITS LAB

1
 INDEX

EXPT.NO NAME OF THE EXPERIMENT PAGE NO signature

INVERTING, NON-INVERTING AND

1
DIFFERENTIAL AMPLIFIERS USING OP-AMP

INTEGRATOR AND DIFFERENTIATOR USING OP-

2
AMP.

ACTIVE LOWPASS, HIGH PASS AND BAND PASS

3
FILTER USING OP-AMP.

ASTABLE & MONOSTABLE MULTIVIBRATOR

4
USING IC 555 TIMER.

ADDITION EXPERIMENTS AND VIVA VOCE

5
QUESTIONS & ANSWERS
 INVERTING AMPLIFIER:-
CIRCUIT DIAGRAM:-

Rf

+15v

R1=10K
2 7
-
IC 741
Signal 6
Generator + 3 + 4 +
~
V in CRO
-15v
- -

TABULATION:

Theoretical Gain Practical Gain

S.No Rf (KΩ) Vin (Volts) Vout (Volts)
A = -Rf / R1 A = V0 / Vin
1. 1K
2. 10K
3. 33K
4. 100K

MODEL GRAPH:
Vin

INPUT

Time (ms)

Vout

OUTPUT

Time (ms)
 -Linear Integrated Circuits. Dept of Electronics & Communication Engg

INVERTING, NON-INVERTING AND DIFFERENTIAL AMPLIFIERS USING OP-AMP

EXP.NO: 01 DATE:
AIM:
To design the Inverting, Non-Inverting and Differential Amplifiers
using Op-amp IC741 and test their performance.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY

1. IC 741 01
1KΩ, 33KΩ EACH 01
2. RESISTORS
10KΩ, 100 KΩ. EACH 02
3. DIGITAL TRAINER KIT --- 01
4. SIGNAL GENERATOR (0-3)MHz 01
5. CATHODE RAY OSCILLOSCOPE (0-30)MHz 01
6. CONNECTING WIRES --- FEW

THEORY:
Op-amp in open-loop configuration has a very few application because
of its enormous open-loop gain. Controlled gain can be can be achieved by taking a
part of output signal to the input with the help of feedback. This is called as Closed-
Loop Configuration. The three basic types of closed-loop amplifier configuration
are: 1. Inverting amplifier.
2. Non-inverting amplifier.
3. Differential amplifier.
The entire configuration can be operated with either AC or DC input.

INVERTING AMPLIFIER:-

If the input signal is applied to the inverting terminal through an input

resistance, a part of output is feedback to the inverting terminal through feedback
resistance Rf and the non-inverting terminal grounded, then the configuration is said
to be Inverting Amplifier. It provides 1800 phase shift or polarity reversal for the
given input.

The circuit closed-loop voltage gain is Rf .

Avcl
R1

4
 Linear Integrated Circuits. Dept of Electronics & Communication
NON-INVERTING AMPLIFER:- Engg

CIRCUIT DIAGRAM:-

Rf

+15v
R1=10K2
7
-
IC 741
3 +
46
+ + CRO
-15v
Signal V~in Generator - -

TABULATION:

Vin Vout Theoretical Gain Practical Gain

S.No Rf (KΩ)
(Volts) (Volts) A = 1+(Rf / R1) A = V0 / Vin
1. 1K
2. 10K
3. 33K
4. 100K

MODEL GRAPH:

Vin

INPUT

Time (ms)

OUTPUT

Vout
Time (ms)

5
THEORY – (NON-INVERTING AMPLIFIER):-
If the input signal is given to non inverting terminal & the feedback
from output is connected to inverting terminal of an op-amp through a potential
divider network, then it is called as Non-Inverting Amplifier Configuration. It
operates in a same way as a voltage follower (unity gain buffer), except that the
output voltage is potentially divided before it is fedback to the inverting input
terminal. No phase shift or change in the circuit closed loop polarity occurs voltage

Rf
gain is Avcl1
R1

PROCEDURE-(INVERTING & NON-INVERTING AMPLIFIER):-

1. Select R1 as a constant value and choose a value of Rf.
2. Connect the circuit as per as the circuit diagram.
3. Apply the constant amplitude input voltage to the circuit.
4. Measure the output voltage amplitude for different value of Rf from CRO.
5. Calculate the practical gain for different value of Rf & compare it
with theoretical gain.
6. Practical gain & theoretical gain should be approximately equal.
7. Plot the graph of the input wave versus output wave for any one practical case.
 DIFFERENTIAL AMPLIFIER:-
CIRCUIT DIAGRAM:-
Rf=R2=100K

+15v
R1=10k
2 7
-
Signal IC 741
Generators R1=10K 3 + 4
6
+
+ R2=100K CRO
+
~
~
Vin1 Vin2 -15v
-

TABULATION:

Vin1 Vin2 Vin2 - Vin1 V0 Theoretical Gain Practical Gain

S.No
(Volts) (Volts) (Volts) (Volts) A = -Rf / R1 A=V0 / (Vin2 - Vin1)
1.
2.

3.
THEORY-(DIFFERENTIAL AMPLIFIER):-
A configuration which combines inverting & non-inverting
configuration with both input terminals are supplied with Vin1 & Vin2, then it is
called as Differential Amplifier configuration. This circuit amplifies the difference
between the two inputs. Differential amplifier with a single op-amp has the exact gain
of an inverting amplifier and it is given as

Vo Rf
AD (Using One Op-Amp) AVCL
(VV) in2
in1 R1

A differential amplifier with two op-amps has the exact gain of a non-inverting
amplifier and it is given as:

Vo 1 Rf .
AD (Using Two Op-Amps) AVCL
in1(VV) in2
R1

PROCEDURE:
1. Select the value of R1, R2, R3 & Rf such that R1=R2 and R3=Rf.
2. Connect the circuit as per as the circuit diagram.
3. Provide constant input voltage Vin1 to Non-inverting terminal of op-amp
through R1 & constant input voltage Vin2 to inverting terminal of op-amp
through R2.
4. Measure the output voltage using CRO.
5. Calculate the theoretical gain and compare it with practical gain.
6. Practical gain & theoretical gain should be approximately equal.
7. Plot the graph of the input wave versus output wave for any one practical case.

RESULT:
Thus the Inverting, Non-Inverting and Differential Amplifiers are
designed and their performance was successfully tested using op-amp IC 741.
 INTEGRATOR:-
CIRCUIT DIAGRAM:-
Cf=0.01uf

Rf=15k
+15v
R1=1.5k 2 7
- 6
Signal IC 741
Generat or
s + 3 + +
1.5K
V~in Rcomp
4 RL=10k CRO
-
-15v

TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

MODELGRAPH:
 INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.

EXP.NO: 02 DATE:
AIM:
To design an Integrator and Differentiator using op-amp IC 741 and to test their
performance.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY

1. IC 741 --- 01
100 Ω, 1.5KΩ Each 02
2. RESISTORS
10KΩ, 15KΩ Each 01
0.1μf, 0.01μf Each 01
3. CAPACITOR
0.001μf, 05
4. DIGITAL TRAINER KIT --- 01
5. SIGNAL GENERATOR (0-3)MHz 01
6. CATHODE RAY OSCILLOSCOPE (0-30)MHz 01
7. CONNECTING WIRES --- FEW
THEORY – (INTEGRATOR):-
A circuit in which the output voltage waveform is the integral of the
input voltage waveform is the integrator or integration amplifier; Such a circuit is
obtained by using basic inverting amplifier configuration, if the feed back resistor Rf
is replaced by a capacitor Cf. The Output voltage expression is given as
1 t
VO Vin dt C .
R1C o
f

The frequency of input at which the gain is 0 db is given as fb 1

2 R1 C f
The point up to which the gain is constant & maximum is called as gain limiting
frequency & given as fa 1 Where Rf is the feedback resistor used to correct
2 R f Cf
the stability & roll-off problems. Between f a & fb the circuit acts as an integrator and
it is similar to a LPF. Integrator is most commonly used in analog computers, A/D
converter & signal wave shaping circuits.
Integrator as LPF (Characteristics of integrator)
Design of integrator with a lower frequency (Break Frequency) limit of
integration at fa = 1 KHz & the frequency at which 0dB results fb = 10 KHz.
PROCEDURE:
1. From the given frequency fa & fb, the values of Rf, Cf, R1 & Rcomp are
calculated as given in the design procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Apply the sinusoidal input as the constant amplitude to the inverting terminal
of op-amp.
4. Gradually increase the frequency & observe the output amplitude.
5. Calculate the gain with respect to frequency & plot its graph.
CIRCUIT DIAGRAM:
Cf=0.005μf

Rf=1.5k
+15v
R1=100Ω C1=0.1μf 2 - 7 6
IC 741
+ +
3 +
Signal 4 R3=10K CRO
ROM=100Ω
Generators -15v
-

0
TABULATION:

1. Frequency (Input)
2. Input Voltage (Vin peak)
3. Input Time Period (tVin)
4. Output Voltage (Vout peak)
5. Output Time Period (tVo)

MODEL GRAPH:
(i) SINE WAVE INPUT
THEORY- (DIFFERENTIATOR):-
A differentiator or differentiation amplifier is a circuit which performs
the mathematical operation of differentiation; that is, the output waveform is the
derivative of the input waveform. The differentiator may be constructed from the
basic inverting amplifier if an input resistor R1 is replaced by capacitor C1. The
differentiation is very useful to find the rate at which a signal varies with time. For
maintaining the stability of differentiator, a series resistor R1 is connected with input
capacitor C1. the circuit will provide differentiation function but only over a limited
frequency range & over this range differentiator tend to oscillate (or) poor stability

R C dVin
results. The expression for output voltage is Vo f1
dt
PROCEDURE:
1. Select fa equal to the highest frequency of the input signal to be
differentiated. Calculate the component values of C1 & Rf.
2. Choose fb = 20fa & calculate the values of R1 & Cf, so that R1C1=Rf Cf.
3. Connect the components as shown in the circuit diagram.
4. Apply a sinusoidal & square wave input to the inverting terminal of op-amp
through R1 C1.
5. Observe the shape of the output signal for the given input in CRO.
6. Note down the reading and plot the graph of input versus output wave for
both cases.
(ii) SQUARE WAVE INPUT
DESIGN PROCEDURE-(INTEGRATOR):-
Design of integrator to integrate at cut-off frequency 1 KHz.
1
Take fa =
2 Rf C f

= 1KHz.
Always take Cf < μf and

Let Cf =
0.01μf
1
Rf =
2 C f fa

Rf = 15.9KΩ ≡

Rf = 15KΩ

Take fb 1
= = 10KHz.
2 R1C f

1
R1 = = 1.59KΩ.
2 fb C f

R1 ≡
1.5KΩ

Rcomp R1
= R1 // Rf ≡ R1, Assume RL = 10KΩ
Rf
= R1R f

Rcomp = 1.5KΩ

DESIGN PROCEDURE-(DIFFERENTIATOR):-
Design a differentiator to differentiate an input signal that varies in
frequency from 10Hz to 1KHz. Apply a sine wave & square wave of 2Vp-p & 1KHz
frequency & observe the output.
To find Rf & C1
Given: fa = 1KHz.
1
fa =
2 R f C1

fa = 1KHz.

Assume C1 = 0.1μf
Rf = 1.59KΩ ≡
1.5KΩ
To find R1 & Cf
Select fb = 20fa with R1 C1 = Rf Cf
1
fb = 20KHz =
2 R1C1

R1 = 79.5Ω ≡
100Ω
R1C1
Cf = = 82 X 0.1X10 6
Rf 1.5K

Cf = 0.005μf.

Rom ≡ R1 // Rf =
100Ω

SINE WAVE INPUT:

Vp-p = 2V f=1KHz
Vp = 1V,
Vin = Vp sin t
= sin (2 )(103)t
dVi
Vo = -Rf c1
n
dt

= -(1.5KΩ) (0.1μf) d
[sin [(2 )(103)t]
dt
= -(1.5KΩ) (0.1μf) (2 ) (103) cos [(2 )(103)t]
= - 0.94 cos [(2 )(103)t]

RESULT:
Thus an Integrator and Differentiator using op-amp are designed and their
 performance was successfully tested using op-amp IC 741.

LOWPASS FILTER:-
CIRCUIT DIAGRAM:-
R1=27K RF=20K

+15v
7
2 -
Signal IC 741
Generator 1.5K
3 + 46
+ + CRO
Vin ~ 0.1uf
-15v
RL=10K -

TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

MODEL GRAPH:
 ACTIVE LOWPASS, HIGH PASS AND BAND PASS FILTER USING OP-AMP.

EXP.NO: 03 DATE:
AIM:
To design an Active Lowpass and Band Pass Filter using op-amp and to test
their performance

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY

1. IC 741 --- 02
1.5 KΩ,22KΩ, 27KΩ EACH 02
2. RESISTORS
10KΩ 01
3. CAPACITORS 0.1μf, 0.01μf 01
4. DIGITAL TRAINER KIT --- 01
5. SIGNAL GENERATOR (0-3)MHz 01
6. CATHODE RAY OSCILLOSCOPE (0-30)MHz 01
7. CONNECTING WIRES --- FEW

THEORY – (ACTIVE LPF):-

A filter circuit which allows only low frequency range up to a higher

cut-off frequency fH is called as Low Pass Filter. An active filter uses transistor and
components such as resistor & capacitor for its design. An active filter offers the
following advantages over a passive filter.
1. Gain & frequency adjustment flexibility.
2. No loading problem because of high input impedance & low output impedance.
3. More economical because of variety of op-amps and absence of inductors.

From the frequency response, when f<fH; the gain is maximum lAl. When

f=f ; the gain is 70.7% of the maximum gain

A and
f when f the gain drops or
H H;
2

rolls off. The frequency range from 0 to fH is called as Passband & fH to is called
as Stopband. Out of Butterworth, chebyshev & cauer filters, Butterworth filter is
preferred because it has flat pass band as well as flat stop band (flat-flat) filter.
 CIRCUIT DIAGRAM - (HIGH PASS FILTER):-
R1=27K RF=22K

+15v
2 7
-
Signal 0.1μf IC 741
Generator
3 + 46
+ CRO
+
Vin ~ 1.5K -15v
RL=10K -

TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

MODEL GRAPH:
THEORY- (ACTIVE HPF):-
An active high pass filter is simply formed by interchanging the
frequency determining resistor and capacitor in lowpass filter. A filter circuit which
allows only high frequency range greater then a lower cut-off frequency f L is called
as HIGH PASS FILTER. From the frequency response, when f<fL; the gain
gradually increases from the lowest value. When f = fL; the gain reaches 70.7% of the

maximum gain A
and when f > fL, the gain is maximum lAl. The frequency range
2
from 0 to fL is called as Stopband & fL to is called as Passband. (This is exactly
opposite to active LPF)The order of the filter tells the roll-off rate at stop band. Order
n = 1 indicates -20dB / dec (-6db / octave); Order n = 2 indicates -40dB / dec & so on.
Higher the order of the filter, better the quality will be & complex the circuit will be.

DESIGN PROCEDURE: (ACTIVE HPF):

Design a HPF at cutoff frequency fL of 1KHZ & P.B gain of 2. Follow the same
procedure as LPF & interchange the R & C position with capacitor first & resistor in
parallel.

In high pass filter Theoretical gain is given as Vo Af ( f / f L )

1( f / f H )2
PROCEDURE - (LPF & HPF): =
Vin
1. Connect the circuit as shown in the circuit diagram.
2. Select the corresponding cut-off frequency (higher or lower) and determine the
value of C&R. select the value of R1 & Rf depending on desired passband
gain Af..
3. Apply a constant voltage input sinusoidal signal to the non-inverting terminal
of op-amp.
4. Tabulate the output voltage Vo with respect to different values of input
frequency.
5. Calculate passband gain and plot the graph of frequency versus voltage gain &
check the graph to get approximately the same characteristic as shown in the
model graph.
CIRCUIT DIAGRAM: (BANDPASS FILTER)
R1=27K RF=20K
R1=27K RF=20K

+15v
+15v
2 7
2 7
-
IC 741
Signal - 6
Generator
0.1uf
IC 741 3 + 4
6
+ 3 + 4
1.5K
+
-15v CRO
Vin ~ 1.5K -15v
0.01u
f RL=10K -

TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)

MODEL GRAPH:
THEORY – (ACTIVE BANDPASS FILTER):-

A filter which has a pass band between two cut-off frequencies fH & fL
is called as Bandpass filter. Where fH > fL BPF is basically of two types
(i) Wide band pass filter. (ii) Narrow band pass filter.
Based on figure of merit or quality factor Q, the types are classified as follows. If
Q<10, selectivity is poor & allows higher bandwidth & such BPF is called as wide
BPF.
If Q > 10, selective is more and allows only narrow bandwidth & such
BPF is called as Narrow BPF. Relationship between Q & center frequency fC is
given as

fc fc f cf H f L
Q &
BW fH fL

When frequency fL < f < fH then gain is maximum. At f < fL the gain is
gradually increasing (positive roll-off) from lower value & at f > fH the gain is
gradually decreasing (Negative roll-off) & exactly when f = fL & f = fH the gain is

A
70.7% of maximum gain .
2

PROCEDURE:
1. Select the lower and higher cut-off frequency and calculate the value of R &
C for the given frequencies.
2. Design for LPF & HPF separately and then combine the circuit by first
placing the HPF followed by a LPF (i.e) HPF in series with LPF.
3. Connect the circuit as shown in the circuit diagram.
4. Apply a constant voltage input sinusoidal signal to the non-inverting terminal
of op-amp.
5. Tabulate the output voltage Vo with respect to different values of input
frequency.
6. Calculate passband gain and plot the graph of frequency versus voltage gain &
check the graph to get approximately the same characteristic as shown in the
model graph.
 DESIGN PROCEDURE - (ACTIVE BPF):-
Design a BPF to pass a band of 1KHz to 10KHz with a passband gain of 4.
1. Select the highest cut-off frequency of LPF as fH = 10 KHz and the lowest cut-
off frequency of HPF as fL = 1 KHz.
2. Design the HPF first by taking fL = 1KHz. Assume the value of C < 1μf.
Let C = 0.1μf.
3. Calculate R from the expression.

FL = 1 1
; Therefore R1 =
2 RC 2 f LC
R=
1
;
2 (1KHz)(0.1X10 6 )
4. Then design the LPF by
R = 1.59KΩ ≡ taking fH = 10KHz. Assume the value of C < 1μf. Let
R=1.5KΩ
C = 0.01μf.

5. Calculate R from the expression fH = 1 1

; Therefore R =
2 RC 2 f HC
R= 1
;
2 (10KHz)(0.01X10 6 )

R = 1.59KΩ ≡ R=1.5KΩ

6. Calculate the values of Rf & R1 with the use of pass band

gain. Overall P.B gain
BPFof = 4 = 2 (HPF) X 2 (LPF)

Therefore for both HPF & LPF the value of Rf = R1 to obtain a individual
Rf
P.B gain of 2. Af = (1+ )
R1 = 2 (for HPF)
Rf
Af = (1+ )
R1 = 2 (for LPF)
Let Rf = R1 = 22KΩ.

7. Q of the filters is calculated as fc fc

=
B. f Hf L
W
Where fC = f H f L
is the center frequency.
8. Cascade HPF & then LPF to form BPF.
Calculate the practical gain dB using 20 log (Vo/Vin)

And Theoretical gain is Vo AfT (ff )

Vin
=
L
[1( f )2 ][1 ( f 2
) ]
fH fL
 DESIGN PROCEDURE (ACTIVE LPF):
Design a LPF at cutoff frequency fH of 1KHz with a passband gain of 2.
1. Choose the given value of fH = 1KHz.

2. Select the value of C < 1μf

1
3. Assume C = 0.1μf. Calculate R from FH =
2 RC
1
R=
2 f HC

1
R= = 1.5KΩ
2 X1X103 X 0.1 f

R = 1.5KΩ C = 0.1μf

4. Determine the value of R1 & Rf from pass band gain of the filter.

Af = 1 + Rf
= 2.
R1
Therefore Rf =R1 to select Af = 2.
Assume Rf = R1 = 22KΩ & Assume RL = 10KΩ

5. Calculate the practical gain in dB using Gain (dB)=20log (Vo/Vin);

Af
Theoretical gain is given as =
Vo 1( f / f )2
H
Vin
Af – P.B gain.
f – Input frequency.
fH – Higher cut-off frequency of LPF.

RESULT:
Thus an Active Lowpass, High pass and Band Pass Filters are designed
and tested using op-amp IC 741.
 CIRCUIT DIAGRAM - (ASTABLE):-
R=47K

+15v
0.01uf 7
2 -
IC 741
Vc + 46 R2=DRB
3 + CRO

VrefR1=10K -

TABULATION:

DESIGN VALUE OBSERVED VALUE

Amplitude
Waveforms tH tL t F tH tL t F
(volts)
(ms) (ms) (ms) (Hz) (ms) (ms) (ms) (Hz)

Output
waveform

Capacitive
waveform

MODEL GRAPH:
RC PHASE SHIFT OSCILLATOR:-
CIRCUIT DIAGRAM:-

Rf=1MΩ
+15v
R1=33K 2 - 7
IC 741
46
3 + -15v
R1//Rf
33K
+ CRO
-
C=0.1μfC=0.1μf0 C=0.1μf

R=3.3K R=3.3K R=3.3K

TABULATION:.

OBSERVED OUTPUT WAVEFORM

Design Frequency
(Hz)
Amplitude
Time period Frequency
(volts)
(ms) (Hz)

MODEL GRAPH:

Vout

OUTPUT Time (ms)

147452-Linear Integrated Circuits. Dept of Electronics & Communication Engg
PIN CONFIGURATION OF 555 TIMER IC

Features of 555 IC:-

1. The load can be connected to o/p in two ways i.e. between pin 3 & ground 1
or between pin 3 & VCC (supply)
2. 555 can be reset by applying negative pulse, otherwise reset can be connected to
+Vcc to avoid false triggering.
3. An external voltage effects threshold and trigger voltages.
4. Timing from micro seconds through hours.
5. Monostable and bistable operation
6. Adjustable duty cycle
7. Output compatible with CMOS, DTL, TTL
8. High current output sink or source 200mA
9. High temperature stability
10. Trigger and reset inputs are logic compatible.
Specifications:-
1. Operating temperature : SE 555-- -55oC to 125oC
NE 555-- 0o to 70oC
2. Supply voltage : +5V to +18V
3. Timing : μSec to Hours
4. Sink current : 200mA
5. Temperature stability : 50 PPM/oC change in temp or 0-005% /oC.

Applications:-
1. Monostable and Astable Multivibrator
2. dc-ac converters
3. Digital logic probes
4. Waveform generators
5. Analog frequency meters
6. Tachometers
7. Temperature measurement and control
8. Infrared transmitters
9. Regulator & Taxi gas alarms etc.
Block Diagram of IC 555:

Function of Various Pins of 555 IC:

Pin (1) of 555 is the ground terminal; all voltages r measured with respect to this pin.
Pin (2) of 555 is the trigger terminal, If the voltage at this terminal is held greater than
one-third of VCC, the output remains low. A negative going pulse from Vcc to less
than Vec/3 triggers the output to go high. The amplitude of the pulse should be able to
make the comparator (inside the IC) change its state. However the width of the
negative going pulse must not be greater than the width of the expected output pulse.
Pin (3) is the output terminal of IC 555. There are 2 possible output states. In the
low output state, the output resistance appearing at pin (3) is very low (approximately
10 Ω). As a result the output current will goes to zero , if the load is connected from
Pin (3) to ground , sink a current I Sink (depending upon load) if the load is connected
from Pin (3) to ground, and sinks zero current if the load is connected between +V CC
and Pin (3).
Pin (4) is the Reset terminal. When unused it is connected to +Vcc. Whenever the
potential of Pin (4) is drives below 0.4V, output is immediately forced to low state.
The reset terminal enables the timer over-ride command signals at Pin (2) of the IC.
Pin (5) is the Control Voltage terminal. This can be used to alter the reference levels
at which the time comparators change state. A resistor connected from Pin (5) to
ground can do the job. Normally 0.01μF capacitor is connected from Pin (5) to
ground. This capacitor bypasses supply noise and does not allow it affect the
threshold voltages.
Pin (6) is the threshold terminal. In both Astable as well as Monostable modes, a
capacitor is connected from Pin (6) to ground. Pin (6) monitors the voltage across the
capacitor when it charges from the supply and forces the already high O/p to Low
when the capacitor reaches +2/3 VCC.
Pin (7) is the discharge terminal. It presents an almost open circuit when the output is
high and allows the capacitor charge from the supply through an external resistor and
presents an almost short circuit when the output is low.
Pin (8) is the +Vcc terminal. 555 can operate at any supply voltage from +3 to +18V.
 CIRCUIT DIAGRAM - (ASTABLE):

6.8K +5V
HI

RA

3.3K 78 4 3
RB IC 555
5
62 1 + CRO
-Vo

Vc C=0.1μf 0.01uf

TABULATION:

DESIGN VALUE OBSERVED VALUE

Amplitude
Waveforms
(volts) tH tL t F tH tL t F
(ms) (ms) (ms) (Hz) (ms) (ms) (ms) (Hz)

Output
waveform

Capacitor
waveform
(Capacitor
voltage Vc)
147452-Linear Integrated Circuits. Dept of Electronics & Communication Engg

ASTABLE & MONOSTABLE MULTIVIBRATOR USING IC 555 TIMER.

EXP.NO: 04 DATE:
AIM:
To Design and test Astable and Monostable multivibrator using 555 timer IC.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY

1. IC 555 --- 01

2. RESISTORS 3.3KΩ,6.8KΩ,10KΩ. EACH 01

3. CAPACITORS 0.1μf, 0.01μf. EACH01

4. DIGITAL TRAINER KIT --- 01
5. SIGNAL GENERATOR (0-3)MHz 01
6. CATHODE RAY OSCILLOSCOPE (0-30)MHz 01
7. CONNECTING WIRES --- FEW

THEORY:
When the power supply VCC is connected, the external timing capacitor „C”
charges towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high
(≈VCC) as Reset R=0, Set S=1 and this combination makes Q = 0 which has
unclamped the timing capacitor „C‟.
When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the

control flip flop on that Q =1. It makes Q1 ON and capacitor „C‟ starts discharging
towards ground through RB and transistor Q1 with a time constant R BC. Current also
flows into Q1 through RA. Resistors RA and RB must be large enough to limit this
current and prevent damage to the discharge transistor Q1. The minimum value of RA
is approximately equal to VCC/0.2 where 0.2A is the maximum current through the
ON transistor Q1.
During the discharge of the timing capacitor C, as it reaches V CC/3, the lower
comparator is triggered and at this stage S=1, R=0 which turns Q =0. Now Q =0
unclamps the external timing capacitor C. The capacitor C is thus periodically
charged and discharged between 2/3 VCC and 1/3 VCC respectively. The length of
time that the output remains HIGH is the time for the capacitor to charge from 1/3 VCC
to 2/3 VCC.
The capacitor voltage for a low pass RC circuit subjected to a step input of VCC
volts is given by VC = VCC [1- exp (-t/RC)]
Total time period T = 0.69 (RA + 2 RB) C
f = 1/T = 1.44/ (RA + 2RB) C

29
Linear Integrated Circuits. Dept of Electronics & Communication
MODEL GRAPH: Engg

(a): Square wave output

(b): Capacitor voltage of Square wave output

30
DESIGN PROCEDURE:-
Design of Astable multivibrator of operation frequency = 1 KHz & duty cycle of 30%
using 555 timer IC.
Given Frequency=1000Hz
Duty cycle=30%
D= T low/T high = RB/RA+2RB*100--------------------------------------(1)
T high =0.69(RA+RB)C
T low = 0.69 RBC
From equation 1
0.30 T high = T low
0.30 * 0.69(RA+RB)C = 0.69 RBC
0.201(RA+RB)C = 0.69 RBC
0.483 RB-0.207 RA= 0
-----------------------------------------------(2)
given f=1khz we know that T=1/f
T=1ms
T= T high + T low
0.69(RA+RB)C +0.69 RBC= 1ms.
0.69(RA+RB) +0.69 RB = 1ms./C
Let C=0.1μF
0.69RA+0.69RB +0.69 RB = 1ms./0.1*10-6
------------------------------------------------
0.69RA+1.38RB = 10 4 (3)

Solving equation 2 & 3 we get

RA=6.8K
RB= 2.674K ≡3.3KΩ

Procedure:
1. Calculate the component values using the design procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Observe and note down the output waveform.
4. Measure the frequency of oscillations and duty cycle and then compare
with the given values.
5. Plot both the waveforms to the same time scale in a graph.
MONOSATBLE MULTIVIBRATOR:-
CIRCUIT DIAGRAM:-

HI

+5V
10K

78 4 3
IC 555
5
62 1 + CRO
0.1uf -Vo
Vc
Trigger
Input
0.01uf
Vin

TABULATION:

Amplitude Time period

S.No Waveforms
(volts) (ms)

1. Input waveform

2. Output waveform

Capacitive waveform
3.
(Capacitor voltage Vc)

MODEL GRAPH:
THEORY- (MONOSATBLE):-
A Monostable Multivibrator, often called a one-shot Multivibrator, is a pulse-
generating circuit in which the duration of the pulse is determined by the RC network
connected externally to the 555 timer. In a stable or stand by mode the output of the
circuit is approximately Zero or at logic-low level. When an external trigger pulse is
given, the output is forced to go high ( VCC). The time for which the output remains
high is determined by the external RC network connected to the timer. At the end of
the timing interval, the output automatically reverts back to its logic-low stable state.
The output stays low until the trigger pulse is again applied. Then the cycle repeats.
The Monostable circuit has only one stable state (output low), hence the name
Monostable. Normally the output of the Monostable Multivibrator is low.

DESIGN PROCEDURE:-

Let, RA = 10K
Out put pulse width tp = 10μs
tp=1.1RAC
C= 0.909μF
C=0.1μF

PROCEDURE:-
1. Calculate the value of R & C using design procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
4. Observe the output waveform and measure the pulse duration.
5. Theoretically calculate the pulse duration as Thigh=1.1 RAC

RESULT:
Thus the Astable and Monostable multivibrator is designed and tested using
555 timer IC
PIN DETAILS:

PIN NO. FUNCTION

1 Inverting input
2 Non Inverting input
3 Oscillator output
4 (+)CL sense
5 (-)CL sense
6 RT
7 CT
8 Ground(-ve supply voltage)
9 Compensation
10 Shutdown
11 Emitter-A
12 Collector-A
13 Collector-B
14 Emitter-B
15 Vin
16 Vref

TECHNICAL INFROMATION:

TEMPERATURE
DESCRIPTION
RANGE
SG3524N(16-pin plastic DIP) 0 C to 70 C
SG3524F(16-pin cerdip) 0 C to 70 C
SG3524D(16-pin SO) 0 C to 70 C
 VIVA-VOCE QUESTIONS AND ANSWERS
EXPT NO.1:
INVERTING, NON-INVERTING AND DIFFERENTIAL
AMPLIFIERS USING OP-AMP

1. Define operational amplifier

Ans: Op-amp is an operational amplifier capable of performing mathematical
operations such as addition, subtraction, multiplication, logarithm, anti-logarithm,
integration, differentiation etc and amplification. It is a multi stage differential
amplifier which is in wide variety of applications.

2. What is the difference between ordinary amplifier and operational amplifier?

Ans: An ordinary amplifier can only amplify the given input signal. But, an
operational amplifier can perform many mathematical operations with enormous gain.

3. What are the different types of op-amp configurations available?

Ans: Op-amp configurations are broadly subdivided into two types. They are
open-loop and Closed-loop configurations. Open loop configurations are of three
types. They are Inverting, Non-inverting and differential configuration. Closed-loop
configurations are of three types. They are Inverting, Non-inverting, buffer amplifier
and differential configuration. The differential configuration of closed-loop op-amp is
further subdivided into two types. They are configuration with one op-amp and
configuration with two op-amps.

4. Which is the basic building block of operational amplifier?

Ans: The basic building block of op-amp is differential amplifier. A
differential amplifier amplifies the difference between two input signals.
5. Mention some of the applications of op-amp.
Ans: Op-amps are mainly used in analog system design. They are used for
wide variety of applications such as mathematical operations, data acquisition
systems, process control, programmable gain amplifiers, automotive instrumentation
and control, communication ICs, radio/audio/video ICs, analog computers, A/D
converters etc.
6. Can an op-amp be used for both AC and DC Applications?
Ans: Yes. Op-amps can be used for both AC and DC applications. This is one
of the important features of an op-amp. They have the ability to process both AC and
DC input signals.

7. Why negative feedback is preferred in op-amp?

 Ans: In most of the op-amp application, negative feedback is preferred to
decrease the overall voltage gain. Open-loop gain is huge and this is minimized by
using two resistors. Input resistor and feedback resistor is used to control the gain and
thus suitable for many practical applications.
8. List out the ideal characteristics of op-amp.
Ans: The ideal characteristics of op-amp are
i) Open-loop gain must be infinite. AoL = ∞
ii) The input impedance must be infinite. Ri = ∞
iii) The output impedance must be zero. Ro = 0
iv) Common Mode Rejection Ratio must be infinite. CMRR = ∞
v) Slew rate must be infinite. dvo/dt = ∞
vi) It must not provide output when there is no input. Vo = 0; when Vi = 0.
vii) Differential mode gain must be infinite. Ad = ∞
viii) Common mode gain must be zero. Ac = 0
9. Define slew rate. What causes it? Mention the effects and methods of
minimizing Slew rate.
Ans: It is the rate at which the output voltage changes with respect to time. It tells
how fast an output of op-amp can change. Example: For a general purpose op-amp
741, the maximum slew rate is 0.5V/µs. This means, the output voltage can change a
maximum of 0.5V in 1 µs. Slew rate is a major limiting factor for op-amps operating
at high frequency.
Slew rate can also be given as the maximum current flowing through a
compensating capacitor. S.R = I/C. Op-amp with slew rate greater than 100V/µs are
termed as “High Speed Op-amps”. For special applications such as video systems, op-
amps with slew rate of 1000V/µs are available.
CAUSES OF SLEW RATE:
The worst case, or slowest slew rate, occurs at unity gain. Therefore, slew rate is
usually specified at unity gain. Slew rate depends on many factors: the amplifier gain,
Compensating capacitors, the current flowing through the compensating capacitor and
even whether the output voltage is going positive or negative.
If Vi is a sine wave, with a peak amplitude of Vp, the maximum rate of change of Vi
depends on both its frequency f and peak amplitude. It is given by 2πfVp. If this
change is larger than op-amps slew rate, the output Vo will be distorted.
If a step input is given, it is observed that above certain step amplitude the output
slope saturates at a constant value called slew rate (SR). When the frequency of a train
of square wave given to a voltage follower is constantly increased, the shape of the
output will be a triangular wave instead of square.
Methods of Minimizing Slew Rate
The minimization methods can be summarized with the use of following expression.
SR = 2πIf / gm
By increasing the frequency f.
By reducing the input stage transconductance gm.
By increasing the current I flowing through the capacitor.
Or by reducing the value of compensation capacitor Cc (which increases the
frequency)

10. What is the maximum voltage that can be given at the inputs?
Ans: The inputs must be given in such a way that the output should be less than Vsat.
11. Why op-amps cannot be used in open-loop configuration?
Ans: Op-amp in open loop configuration has enormous gain. For example the
op-amp 741 has a typical gain of 200,000 (106 dB) & op-amp OP-77 has a typical
gain of 12 million (141.6 dB). This huge gain is not necessary for most of the
application of op-amp. Since op-amp output will saturate at ±Vsat (positive and
negative saturation) which is approximately equal to ±V (Supply voltage)

12. Can a op-amp be operated using single power supply?

Ans: No. All the general purpose op-amp must be operated with two power
supplies. Since, the differential amplifier has two supply : +Vcc and – Vee, the op-
amp which is a multi stage differential amplifier stage must also have two supply
voltages. However, op-amps with single supply voltage are also used for very few
applications.

13. Define offset voltage and state its significance.

Ans: When an op-amp has no inputs given, there is a possibility of getting
output because of small voltage at input terminals. This very small voltage difference
between the two terminals of op-amp results due to the slight mismatch between the
characteristics of two transistors present in the starting stage of op-amp. If a small
voltage appears across the input terminals of op-amp, then because of the huge gain of
op-amp, the amplified output will result even when there is no input. So a voltage
must be applied by the user to cancel out the effects. The voltage that must be applied
to nullify the output voltage is called as offset voltage.

14. List the important features of op-amp 741.

Ans: Features of op-amp 741
1. No frequency compensation required.
2. Short circuit protection
3. Offset voltage null capability
4. Large common mode and differential voltage ranges
5. Low power consumption
6. No latch-up

15. Draw the block diagram of op-amp.

Ans:

16. How to construct a adder circuit using op-amp?

Ans: A two input summing amplifier may be constructed using the inverting
mode. The adder can be obtained by using either non-inverting mode or differential
amplifier. Here the inverting mode is used. So the inputs are applied through
resistors to the inverting terminal and non-inverting terminal is grounded. This is
called “virtual ground”, i.e. the voltage at that terminal is zero. The gain of this
summing amplifier is 1, any scale factor can be used for the inputs by selecting proper
external resistors.
17. List all Specifications of op-amp 741
Ans:
1. Voltage gain A = α typically 2,00,000
2. I/P resistance RL = α Ω, practically 2MΩ
3. O/P resistance R =0, practically 75Ω
4. Bandwidth = α Hz. It can be operated at any frequency
5. Common mode rejection ratio = α
(Ability of op amp to reject noise voltage)
6. Slew rate + α V/μsec
(Rate of change of O/P voltage)
7. When V1 = V2, VD=0
8. Input offset voltage (Rs ≤ 10KΩ) max 6 mv
9. Input offset current = max 200nA
10. Input bias current : 500nA
11. Input capacitance : typical value 1.4pF
12. Offset voltage adjustment range : ± 15mV
13. Input voltage range : ± 13V
14. Supply voltage rejection ratio : 150 μV/V
15. Output voltage swing: + 13V and – 13V for RL > 2KΩ
16. Output short-circuit current: 25mA
17. supply current: 28mA
18. Power consumption: 85mW
19. Transient response: rise time= 0.3 μs

18. Draw the pin configuration of op-amp 741.

Ans:

19. What is the maximum voltage that can be given at the inputs?
Ans: The inputs must be given in such a way that the output should be less than Vsat.

20. How to construct a Subtractor?

Ans: A basic differential amplifier can be used as a subtractor. Input signals
can be scaled to the desired values by selecting appropriate values for the resistors.
When this is done, the circuit is referred to as scaling amplifier. However in this
circuit all external resistors are equal in value. So the gain of amplifier is equal to
one. The output voltage Vo is equal to the voltage applied to the non-inverting
terminal minus the voltage applied to the inverting terminal; hence the circuit is called
a subtractor.
X- - - - - - X-----------X
 EXPT NO: 2
INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.
1. Express the output voltage of an Integrator.
Ans: The expression for the output voltage of an op-amp integrator is given as
t
Vo = - 1 Vin dt + C
R1C 0
f
Where R1  Input Resistance
Cf  Feedback
Capacitance Vin  Input
Voltage and
C  Constant

2. Why op-amp integrator is called as precision Integrator?

Ans: The op-amp integrator has a high degree of accuracy. And it can
precisely implement the output voltage expression. Because of this, op-amp integrator
is often called as precision integrator.

3. Mention some of the applications of integrator.

Ans: Op-amp integrator finds wide application in function generators
(Triangle and sawtooth wave generators), active filters (State variable & biquad
filters, Switched Capacitor filters), Analog to Digital Converters (Dual-slope
converters, Quantized feedback converters) and Analog controllers (PID Controllers).

4. What are the problems faced by basic ideal integrator and how can we
overcome ?
Ans: The input offset voltage Vio and the part of input current charging the
feedback capacitor Cf produces the error voltage at the output of the ideal integrator.
Therefore, in practical integrator, to reduce the error voltage at the output, a resistor
Rf is connected in parallel to Cf. This Rf, limits the low-frequency gain and hence
minimizes the variations in the output voltage. Both stability and the roll-off problems
in basic ideal integrator can be corrected by additional resistor Rf.

5. What is other name given to practical integrator?

Ans: The method of preventing saturation in integrator is to place a parallel
resistance Rf with Cf. The resulting circuit is called as lossy integrator (Practical
Integrator) which can still provide integration function. But, only over a limited
frequency range. In most applications, integrators are placed in a control loop to
avoid saturation and there is no need for Rf in such applications.

6. What is meant by negative resistance?

Ans: Negative resistance indicates the release of power. Negative resistance
can be used to neutralize unwanted ordinary resistance, as in the design of current
sources or to control the pole location, as in the design of active filters and oscillators.

7. Integrator is otherwise called as fixed frequency, variable gain LPF. True or

False?
Ans: True.
8. Give the meaning and use of Virtual ground.
Ans: If the difference input voltage is ideally zero, and non-inverting terminal
is grounded with a input signal applied to the non-inverting terminal via R1, then
voltage at the inverting terminal is approximately equal to voltage at the non-inverting
terminal. This is known as virtual ground (A terminal that is not connected to physical
ground but, assumed to be.) It is much used in closed-loop analysis of inverting
amplifier.

9. Determine the ouput for the following inputs to an integrator.

t
Ans: Since, Vo = - 1 Vin dt + C, the output of integrator for the inputs
R1C 0
f
will be Sine Wave  Clamped Cosine
Wave Cosine Wave  Negative
Sine Wave Square Wave 
Triangular Wave
Rectangle Wave  Sawtooth Wave

10. How integrator is useful in constructing Servo Amplifer?

Ans: A Servo Amplifier is constructed when an integrator is followed by an
inverting amplifier. Servo amplifiers are used where the output is a delayed response
to the input. Example: Radar (or) Position of a xy table in a manufacturing process.

11. How to convert an op-amp integrator to op-amp differentiator?

Ans: To convert a op-amp integrator to differentiator, just replace the feedback
capacitor Cf as feedback resistor Rf. And replace the input resistor R1 as input
capacitor C1 of an integrator.

12. Give the output voltage expression for an integrator.

Ans: The output voltage expression of a differentiator is given as
Vo = - Rf C1 dVin
dt
Where Rf  Feedback
Resistance C1  Input
Capacitance Vin 
Input Voltage

13. How ideal differentiator suffers from instability? How can we overcome
them?
Ans: The ideal or basic differentiator‟s circuit gain (Rf/R1) increases with
increase in frequency at a rate of +20dB/decade. This makes the circuit unstable.
Also, the impedance Xc1 decreases with increase in frequency, which makes the
circuit very susceptible to high frequency noise. When amplified, this noise can
completely override the differentiated output signal. Both stability and high frequency
noise can be corrected by addition of two components R1 and Cf. This circuit is called
as practical differentiator.
14. Can a differentiator be used as a High pass Filter?
1
Ans: Yes, at cut-off frequency of fa = .
2 f 1c1
15. What is the condition to be followed for proper differentiation?
Ans: The input signal will be differentiated properly if the time period T of the
input signal is larger than equal to RfC1. That is T ≥ RfC1.

16. How high frequency noise affects the performance of an differentiator?

Ans: Due to poor Stability (i.e) Circuit tends to oscillate and gain of the circuit
increases with an increase in frequency. So high frequency noise is amplified and is
dominant at the output.

17. Determine the output of differentiator for the following input waves.
Ans: The inputs and respective output waveform of differentiator are as
follows, Sine Wave  Negative Cosine Wave
Cosine Wave  Sine
Wave Square Wave 
Spike Wave Sawtooth Wave
 Square Wave

18. Give some important applications of differentiator.

Ans: Differentiator is most commonly used in wave shaping circuits to detect
high frequency components in an input signal and also as a rate-of-change detector in
FM modulators.

19. What is Unity Gain Frequency?

Ans: Unity-gain frequency of op-amp differentiator is the frequency at which
the gain is unity (0 dB).

20. What is UGB?

Ans: Unity Gain Bandwidth (UGB) is the bandwidth of op-amp when the
voltage gain is 1. It is also called as Closed-loop bandwidth, Gain-Bandwidth Product
or Small signal bandwidth.

X- - - - - X---------X
 EXPT NO.3 :
ACTIVE FILTER (LP, HP & BP) USING OP-AMP 741

1. What is meant by passive and active filters?

Ans: Passive filters: Uses Resistors, Capacitors and inductors as elements.
Active Filters: Uses Transistors or op-amps in addition to Resistors and Capacitors.

2. Why active filters are not suitable for high frequency applications?
Ans: Above MHZ range the op-amp open-loop gain rolls-off with increase in
frequency.

3. List some of the applications of filters.

Ans: Filters are an integral part of electronic networks and are used in
application from audio circuits to Digital Signal Processing (DSP) Systems such as
speech, audio, Video, Image processing etc.,

4. How Active filters are superior than passive filters?

Ans: Advantage of active filters over passive filters
i) Gain and frequency adjustment flexibility.
ii) No loading problem.
iii) Low Cost.

5. How Filters are classified and what are they?

Ans: Based on passband, stopband and cutoff frequency, filters are classified
into Lowpass, Highpass, Bandpass, Bandstop and Allpass filters.

6. What are poles and zeros?

Ans: Zeros are numerator and poles are denominator polynomials of the
transfer function of a filter. Poles and Zeros determine the characteristics of a filter.

7. Does a filter affect both amplitude and phase of the input signal?
Ans: Yes.

8. What is the use of bode plot?

Ans: The Bode Plots are plots of decibels and degrees versus decades (or
Octaves).
The purpose of bode plot is to represent both logarithmic and semi-logarithmic scales.

9. In what basis the order of the filter is decided?

Ans: Based on the parameter „n‟, the order of the filter is decided. n=1; First
order, n=2; Second order and so on. The parameter „n‟ decides the accuracy of the
filter primarily at the stopband (Rolloff). Higher the value of n, better the filter will be
and complex the design will be.

10. Define Bandwidth of a filter.

Ans: Bandwidth of a filter is defined as higher cutoff frequency minus lower
cutoff frequency. Or in other words it is the difference between Upper cutoff
frequency and Lower cutoff frequency. Bandwidth is expressed in HZ.
B.W = fH – fL HZ
11. What do you understand from the frequency response of filter?
Ans: There were three cases that should be noted in any filter except allpass
filter. The three cases for LPF filter for example is given as
Case i: If the input frequency fin is less than the higher cutoff frequency fH, then
magnitude of the gain is maximum and it is given as passband gain of the filter AF.
Case ii If the input frequency fin is equal to the cutoff frequency, then the gain

A
magnitude will be 70.7% of the maximum gain. That is, .
2

Case iii: If the input frequency fin is greater than the higher cutoff frequency fH, then
magnitude of the gain is maximum and it is given as passband gain of the filter AF.

12. What were the different types of BPF? Explain.

Ans: BPF is classified either as Narrowband and Wideband filter based on the
Quality factor (Figure of merit) Q. It is expressed as
fc fc
Q= = ; where fc = fhfl
fhfl B.W
If Q < 10 then it is termed as Wide bandpass filter (Poor Selectivity)
If Q > 10 then it is termed as narrow Bandpass filter (Good Selectivity)

13. How filters are classified according to their band characteristics?

Ans: Filters are classified according to their passband and stopband
characteristics. Butterworth  Flat passband and flat stopband (Flat-
Flat filter)
Chebyshev  Ripple passbad and flat
stopband Cauer  Ripple passband and
Ripple Stopband

14. How to convert a BPF to BSF?

Ans: Swap HPF-LPF series connection of BPF to LPF-HPF series connection
to achieve Bandstop filter (BSF) which is also called as BEF(Band Elimination
Filter) or Notch Filter.

15. What is the function of a allpass filter?

Ans: This filter passes all frequencies well but it provides phase shift between
input and Output voltage which is a function of frequency.
16. List the applications of BPF.
Ans: It acts as frequency selector, stereo-equalizer octave filter,
communication transmitter and receiver circuits, radio, TV broadcast receivers,
telephone, radar, space satellites and bio-medical equipment.

17. Write the way of constructing a I order Butterworth BPF.

Ans: I order Butterworth BPF can be constructed using I order Butterworth
HPF followed by I order Butterworth LPF.

18. Why inductors cannot be used with active filters?

Ans: Because, inductors are bulky due to windings and cannot be fabricated
inside an IC.

19. What is the condition for stability of a network?

Ans: All the poles in unit circle must fall on the left half of the S-plane during
mapping for Passive network (Filter) The location of the poles determines the stability
conditions for active network. All the roots must have negative real parts for a active
network (Filter). Also there are no changes in the signs of the first column of the routh
array.
20.
ACL(LPF) = Vo Af
=
Vin 1 j( f / fh)

│ ACL │ = Af / √1+ (f/fh)2 ; Ø = tan -1(f/fh)

ACL(HPF) = Vo
Vin
= Af ( 1 j( fj(/ ffl/)fl))
│ ACL │ = Af (f/fl) / √1+ (f/fl)2 ; Ø = tan -1(f/fl)

Where Af is the passband gain

Linear Integrated Circuits. Dept of Electronics & Communication
Engg
EXPT NO.4:
ASTABLE AND MONOSTABLE MODE OF IC 555 TIMER

1. Why Timer IC is numbered as 555?

Ans: The timer IC is called as 555, because the internal architecture consists of
three 5KΩ resistors.

2. What are the different operating modes of 555 Timer?

Ans: There were two operating modes of 555 Timer. It operates in Astable and
Monostable mode.

3. What are the different types of packages available for 555 Timer IC?
Ans: The packages used for 555 Timer are 8-pin mini Dual-Inline-Package
(DIP) and 8-pin Metal Can.

4. List some applications of 555 timers in both Astable mode and

Monostable Mode.
Ans: In Astable mode of operation, some of the applications of 555 Timer
were: Tone- burst oscillator, Voltage controlled frequency shifter, square wave
generator etc., In Monostable or one-shot mode, some of the applications of 555 timer
were: Water-level fill control, Touch switch, Frequency divider, missing pulse
detector and many more.

5. Define duty cycle.

Ans: Duty cycle of waveform if defined as the ration of ON time of the wave
Ton
to the total time. τ =
Ttota
l
Example: If a square wave is On for 1ms of time and if the total time is 2ms,
The duty cycle is 0.5 or in terms of percentage = 50%.

6. Express the free running frequency of oscillation and total period of

Astable mode of 555 timer.
Ans: The free running frequency of oscillation is given as
1
f= = 1.44
T and thus the total period of oscillation T is
(Ra2Rb)C
T = 0.695 (Ra+2Rb)C
Linear Integrated Circuits. Dept of Electronics & Communication
Engg
X - - - - - - X--------X