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A B C D E F G H

P25Z PG611 A00

12GB GDDR5X, 384b, 256Mx32


1
TALL DVI-D + DP + DP + HDMI/DP + DP 1

TABLE OF CONTENTS
Page Description Page Description

1 Table of Contents 26 MIOA/B INTERFACE & FRAME LOCK


2 BLOCK DIAGRAM 27 MISC: FAN, THERMAL, JTAG, GPIO, STEREO
3 PCI EXPRESS 28 MISC: ROM, STRAPS
4 MEMORY: GPU PARTITION A/B 29 MISC: XTAL, PLL
5 MEMORY: FBA PARTITION[31:0] 30 PS: 5V, PEXVDD
2 2

6 MEMORY: FBA PARTITION[63:32] 31 PS: 1V8 Rails


7 MEMORY: FBB PARTITION[31:0] 32 PS: FBVDDQ
8 MEMORY: FBB PARTITION[63:31] 33 PS: NVVDD Controller_OVR8
9 MEMORY: GPU PARTITION C/D 34 PS: NVVDD Controller_PWR-MODULE
10 MEMORY: FBC PARTITION[31:0] 35 PS: NVVDD Phase 1, 2
11 MEMORY: FBC PARTITION[63:32] 36 PS: NVVDD Phase 3, 4
12 MEMORY: FBD PARTITION[31:0] 37 PS: NVVDD Phase 5
13 MEMORY: FBD PARTITION[63:32] 38 PS: NVVDD Phase 6, 7
14 MEMORY: GPU PARTITION E/F 39 PS: Dynamic power balance phase
15 MEMORY: FBE PARTITION[31:0] 40 PS: Dynamic power balance logic
3 3

16 MEMORY: FBE PARTITION[63:32] 41 PS: Input, filtering, and Monitoring


17 MEMORY: FBF PARTITION[31:0] 42 PS: Current Sterring, Hot Unplug
18 MEMORY: FBF PARTITION[63:32] 43 PS: NVVDD ENABLE
19 GPU PWR AND GND 44 PS: GC6 MISC
20 GPU DECOUPLING 45 GEFORCE LED AND SLI LED
21 IFPAB DVI-D-DL 46 PS: NV3V3, NV12V
22 IFPE DP 47 PS: MCU
23 IFPF DP 48 MECH
24 IFPC HDMI/DP 49 VR Thermal Protection
25 IFPD DP
4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
Table of Contents
Size Project Name: Design By: Rev
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL Table of Contents P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 1 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page2: Block Diagram

Power Supply
1 1

NVVDD-PH2

Power Supply
EXT_12V 2x3 PWR 1
NVVDD-PH3
NVVDD

SLI STEREO FRAME LOCK


Power Supply
DYNAMIC NVVDD-PH4
STUFF OPTION
DP

MEM D MEM C
Power Supply
2 2

NVVDD-PH4

Power Supply
DP/HDMI

EXT_12V 2x4 PWR 2


NVVDD-PH5
MEM E MEM B
Power Supply
DYNAMIC NVVDD-PH1
GP102
FBVDDQ Power Supply
FBVDD/Q PH1&PH2
STEER
3 3

MEM F MEM A
DP

Power Supply
NVVDD-PH7
DVI-D

Power Supply
NVVDD-PH6 PEX_12V Finger

Power Supply
DP

NVVDD-PH1

4
1V8 Power Supply 4

1V8

5V
Power Supply
5V SWITCHER

FAN

Power Supply
PEX_VDD PEX_3V3 Finger
PEX_VDD OVREG
5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION> Block Diagram
PAGE DETAIL BLOCK DIAGRAM Size Project Name: Design By: Rev
Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY P25Z
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
Date: Friday, March 03, 2017 Sheet 2 of 52
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PROPERTY NOTE: This document contains information confidential and
A B C D E F G property to Galaxy Microsystems (HK) Ltd. H
A B C D E F G H

nv_cap nv_cap

Page3: PCI Express


PEX_TCLK {47}
BI
NET VOLTAGE MAX_CURRENT MIN_WIDTH
12V
3V3
CN2
C1317 C1316 C1278 CON_X16 3V3 3.0A 0.400
10uF/16V 4.7uF 0.1uF R891 0ohm
16V 16V 16V @electro_mechanic.con_pci_express(sym_1):page3_i243 GND
0.05 ohm 8.5A 0.400
20% 20% 10%
X6S X6S X7R 0402
0805 0603_LARGE 0402 B1 +12V TRST* JTAG1 B9
B2 +12V TCLK JTAG2 A5 PEX_TCLK
A2 +12V TDI JTAG3 A6 PEX_TDI GND
A3 +12V TDO JTAG4 A7 PEX_TDO

3V3
B3 +12V/RSVD TMS JTAG5 A8 NV3V3
GND 3V3
1 1
B8 +3V3
C62 C64 A9
4.7uF 0.1uF +3V3 G G

2
A10 +3V3 Q35B Q35A
6.3V 16V R898 R897 @discrete.q_fet_n_enh(sym_7):page3_i280 @discrete.q_fet_n_enh(sym_7):page3_i279
20% 10% 100k/NC 100k/NC
X6S X7R B10 +3V3AUX 5% 5%
3 D S 4 6 D S 1
Q_FET_N_ENH/NC Q_FET_N_ENH/NC
PEX_PRSNT* A1 B5 PEX_SMCLK R244 0ohm/NC I2CS_SCL_R
PRSNT1 SMCLK OUT {27} G1A
0603 0402 B17 PRSNT2 SMDAT B6 PEX_SMDAT 0402 0402 0.05 ohm R237 0ohm/NC I2CS_SDA_R
SC70_6 SC70_6 OUT {27} @digital.u_gpu_gb3c_384(sym_1):page3_i288
0402 0.05 ohm
GND 0402
PEX_CONN_B12 B12 RSVD 1/24 PCI_EXPRESS PEX_VDD
BI
Place between
B4 GND WAKE B11 BA32 NC Place near balls GPU and PS
R874 A4 BB37
0ohm/NC GND PEX_DVDD
B7 GND PEX_DVDD BC37
0.05 ohm
A12 A11 PEX_RST* PEX_RST_BUF* BD31 BC38 C933 C923 C925 C917 C86 C87 C88 C89
GND PERST OUT {47} {47} IN PEX_RST PEX_DVDD 1uF 1uF 1uF 1uF 4.7uF 4.7uF 22uF 22uF
B13 GND PEX_DVDD BC39
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
A15 GND {47}
GPU_PEX_CLKREQ* BE32 PEX_CLKREQ PEX_DVDD BC40
BI 10% 10% 10% 10% 20% 20% 10% 20%
0402 B16 GND PEX_DVDD BD37 X6S X6S X6S X6S X6S X6S X7R X6S
B18 GND REFCLK A13 PEX_REFCLK
PEX_REFCLK PEXGEN3_SIGNALS BG40 PEX_REFCLK PEX_DVDD BD38
OUT
POWER_BRAKE* A18 GND REFCLK A14 PEX_REFCLK* PEX_REFCLK PEXGEN3_SIGNALS BF40 PEX_REFCLK PEX_DVDD BD39
PEX_DVDD BD40
R875 A16 PEX_TXX0 C1202 0.22uF PEX_TX0 BJ32
0ohm/NC PERP0 PEX_TXC0 PEXGEN3_SIGNALS PEX_TXC0 PEXGEN3_SIGNALS PEX_TX0 1005_BGA 1005_BGA 0402 0402 0603 0603 0805 0805
A17 PEX_TXX0* 6.3V C1203 0.22uF PEX_TX0* BK32
0.05 ohm
PERN0 PEX_TXC0 PEXGEN3_SIGNALS PEX_TXC0 PEXGEN3_SIGNALS PEX_TX0
GND 6.3V GND
X7R X7R
PETP0 B14 PEX_RX0 PEX_RX0 PEXGEN3_SIGNALS C0402
BM32 PEX_RX0
PETN0 B15 PEX_RX0*
PEX_RX0 PEXGEN3_SIGNALS C0402 BM33 PEX_RX0 PEX_HVDD BA33
0402 END OF X1 BA34
PEX_HVDD 1V8_MAIN
2 C1184 0.22uF 2
B31 PRSNT2 PERP1 A21 PEX_TXX1 PEX_TXC1 PEXGEN3_SIGNALS PEX_TXC1
PEX_TX1 PEXGEN3_SIGNALS BH32 PEX_TX1 PEX_HVDD BA37
A19 A22 PEX_TXX1* 6.3V C1185 0.22uF PEX_TX1* BG32 BB33
RSVD PERN1 PEX_TXC1 PEXGEN3_SIGNALS PEX_TXC1 PEXGEN3_SIGNALS PEX_TX1 PEX_HVDD
PEX_RSVD4_POWER_BRAKE B30 RSVD 6.3V PEX_HVDD BB34
A32 B19 PEX_RX1 X7R X7R
BM34 BC31 C978 C985 C967 C971 C957 C1017 C70 C71 C69
RSVD PETP1 PEX_RX1 PEXGEN3_SIGNALS C0402 PEX_RX1 PEX_HVDD 1uF 1uF 1uF 1uF 4.7uF 4.7uF 10uF 10uF 22uF
PETN1 B20 PEX_RX1* PEX_RX1 PEXGEN3_SIGNALS C0402 BN34 PEX_RX1 PEX_HVDD BC32
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
A20 GND PEX_HVDD BC33
C1177 0.22uF 10% 10% 10% 10% 20% 20% 10% 10% 20%
B21 GND PERP2 A25 PEX_TXX2
PEX_TXC2 PEXGEN3_SIGNALS PEX_TXC2
PEX_TX2
PEXGEN3_SIGNALS BG33 PEX_TX2 PEX_HVDD BC34 X6S X6S X6S X6S X6S X6S X7R X7R X6S
B22 A26 PEX_TXX2* 6.3V C1178 0.22uF PEX_TX2* BF33 BC35
GND PERN2 PEX_TXC2 PEXGEN3_SIGNALS PEX_TXC2 PEXGEN3_SIGNALS PEX_TX2 PEX_HVDD
A23 GND 6.3V PEX_HVDD BC36
X7R X7R
A24 GND PETP2 B23 PEX_RX2 PEX_RX2 PEXGEN3_SIGNALS C0402
BN35 PEX_RX2 PEX_HVDD BD32
B25 GND PETN2 B24 PEX_RX2* PEX_RX2 PEXGEN3_SIGNALS C0402 BN36 PEX_RX2 PEX_HVDD BD33 1005_BGA 1005_BGA 1005_BGA 0402 0603 0603 0805 0805 0805
B26 GND PEX_HVDD BD34
A27 A29 PEX_TXX3 C1170 0.22uF PEX_TX3 BK34 BD35
GND PERP3 PEX_TXC3 PEXGEN3_SIGNALS PEX_TXC3 PEXGEN3_SIGNALS PEX_TX3 PEX_HVDD GND
A28 A30 PEX_TXX3* 6.3V C1171 0.22uF PEX_TX3* BJ34 BD36
GND PERN3 PEX_TXC3 PEXGEN3_SIGNALS PEX_TXC3 PEXGEN3_SIGNALS PEX_TX3 PEX_HVDD
B29 GND 6.3V
X7R X7R
A31 GND PETP3 B27 PEX_RX3 PEX_RX3 PEXGEN3_SIGNALS BM36 PEX_RX3
C0402
B32 GND PETN3 B28 PEX_RX3*
PEX_RX3 PEXGEN3_SIGNALS C0402 BL36 PEX_RX3
END OF X4
A35 PEX_TXX4 C1157 0.22uF PEX_TX4 BF35
PERP4 PEX_TXC4 PEXGEN3_SIGNALS PEX_TXC4 PEXGEN3_SIGNALS PEX_TX4
A36 PEX_TXX4* 6.3V C1158 0.22uF PEX_TX4* BG35
PERN4 PEX_TXC4 PEXGEN3_SIGNALS PEX_TXC4 PEXGEN3_SIGNALS PEX_TX4
GND B48 PRSNT2 6.3V
X7R X7R
A33 RSVD PETP4 B33 PEX_RX4
PEX_RX4 PEXGEN3_SIGNALS C0402
BM37 PEX_RX4
PETN4 B34 PEX_RX4* PEX_RX4 PEXGEN3_SIGNALS C0402 BL37 PEX_RX4 1V8_MAIN
A34 GND
B35 A39 PEX_TXX5 C980 0.22uF PEX_TX5 BG36
GND PERP5 PEX_TXC5 PEXGEN3_SIGNALS PEX_TXC5 PEXGEN3_SIGNALS PEX_TX5
B36 A40 PEX_TXX5* 6.3V C972 0.22uF PEX_TX5* BH36 BB35
GND PERN5 PEX_TXC5 PEXGEN3_SIGNALS PEX_TXC5 PEXGEN3_SIGNALS PEX_TX5 PEX_PLL_HVDD
A37 GND 6.3V PEX_PLL_HVDD BA35
A38 B37 PEX_RX5 X7R X7R
BN38 C956
GND PETP5 PEX_RX5 PEXGEN3_SIGNALS C0402 PEX_RX5 0.1uF
B39 GND PETN5 B38 PEX_RX5*
PEX_RX5 PEXGEN3_SIGNALS C0402 BM38 PEX_RX5 NC BB32
16V
3
B40 GND NC BC25 3
C961 0.22uF 10%
A41 GND PERP6 A43 PEX_TXX6 PEX_TXC6 PEXGEN3_SIGNALS PEX_TXC6
PEX_TX6 PEXGEN3_SIGNALS BH37 PEX_TX6 X7R
A42 A44 PEX_TXX6* 6.3V C950 0.22uF PEX_TX6* BJ37
GND PERN6 PEX_TXC6 PEXGEN3_SIGNALS PEX_TXC6 PEXGEN3_SIGNALS PEX_TX6
B43 GND 6.3V
X7R X7R
B44 GND PETP6 B41 PEX_RX6
PEX_RX6 PEXGEN3_SIGNALS BN39 PEX_RX6
C0402
A45 GND PETN6 B42 PEX_RX6* PEX_RX6 PEXGEN3_SIGNALS C0402 BN40 PEX_RX6 1005_BGA
A46 GND GND
B47 A47 PEX_TXX7 C940 0.22uF PEX_TX7 BJ38
GND PERP7 PEX_TXC7 PEXGEN3_SIGNALS PEX_TXC7 PEXGEN3_SIGNALS PEX_TX7
B49 A48 PEX_TXX7* 6.3V C934 0.22uF PEX_TX7* BK38
GND PERN7 PEX_TXC7 PEXGEN3_SIGNALS PEX_TXC7 PEXGEN3_SIGNALS PEX_TX7
A49 GND 6.3V
X7R X7R
PETP7 B45 PEX_RX7 PEX_RX7 PEXGEN3_SIGNALS C0402
BM40 PEX_RX7
PETN7 B46 PEX_RX7* PEX_RX7 PEXGEN3_SIGNALS C0402 BL40 PEX_RX7
END OF X8
A52 PEX_TXX8 C918 0.22uF PEX_TX8 BG41
GND PERP8 PEX_TXC8 PEXGEN3_SIGNALS PEX_TXC8 PEXGEN3_SIGNALS PEX_TX8
A53 PEX_TXX8* 6.3V C902 0.22uF PEX_TX8* BH41
PERN8 PEX_TXC8 PEXGEN3_SIGNALS PEX_TXC8 PEXGEN3_SIGNALS PEX_TX8
B81 PRSNT2 6.3V
X7R X7R
A50 RSVD PETP8 B50 PEX_RX8 PEX_RX8 PEXGEN3_SIGNALS BM41 PEX_RX8
C0402
B82 RSVD PETN8 B51 PEX_RX8*
PEX_RX8 PEXGEN3_SIGNALS C0402 BL41 PEX_RX8

A56 PEX_TXX9 C893 0.22uF PEX_TX9 BH42


PERP9 PEX_TXC9 PEXGEN3_SIGNALS PEX_TXC9 PEXGEN3_SIGNALS PEX_TX9
A57 PEX_TXX9* 6.3V C892 0.22uF PEX_TX9* BJ42
PERN9 PEX_TXC9 PEXGEN3_SIGNALS PEX_TXC9 PEXGEN3_SIGNALS PEX_TX9
A51 GND 6.3V
X7R X7R
B52 GND PETP9 B54 PEX_RX9
PEX_RX9 PEXGEN3_SIGNALS C0402
BN42 PEX_RX9
B53 GND PETN9 B55 PEX_RX9* PEX_RX9 PEXGEN3_SIGNALS C0402 BM42 PEX_RX9
A54 GND
A55 A60 PEX_TXX10 C889 0.22uF PEX_TX10 BJ43
GND PERP10 PEX_TXC10 PEXGEN3_SIGNALS PEX_TXC10 PEXGEN3_SIGNALS PEX_TX10
B56 A61 PEX_TXX10* 6.3V C885 0.22uF PEX_TX10* BK43
GND PERN10 PEX_TXC10 PEXGEN3_SIGNALS PEX_TXC10 PEXGEN3_SIGNALS PEX_TX10
B57 GND 6.3V
X7R X7R
A58 GND PETP10 B58 PEX_RX10 PEX_RX10 PEXGEN3_SIGNALS C0402
BN43 PEX_RX10
A59 GND PETN10 B59 PEX_RX10*
PEX_RX10 PEXGEN3_SIGNALS C0402 BN44 PEX_RX10
4
B60 GND 4
B61 A64 PEX_TXX11 C882 0.22uF PEX_TX11 BK44
GND PERP11 PEX_TXC11 PEXGEN3_SIGNALS PEX_TXC11 PEXGEN3_SIGNALS PEX_TX11
A62 A65 PEX_TXX11* 6.3V C879 0.22uF PEX_TX11* BJ44
GND PERN11 PEX_TXC11 PEXGEN3_SIGNALS PEX_TXC11 PEXGEN3_SIGNALS PEX_TX11
A63 GND 6.3V
X7R X7R
B64 GND PETP11 B62 PEX_RX11
PEX_RX11 PEXGEN3_SIGNALS BM44 PEX_RX11
C0402
B65 GND PETN11 B63 PEX_RX11* PEX_RX11 PEXGEN3_SIGNALS C0402 BM45 PEX_RX11
A66 GND NC BC30
A67 A68 PEX_TXX12 C878 0.22uF PEX_TX12 BF44 BD42
GND PERP12 PEX_TXC12 PEXGEN3_SIGNALS PEX_TXC12 PEXGEN3_SIGNALS PEX_TX12 NC
B68 A69 PEX_TXX12* 6.3V C877 0.22uF PEX_TX12* BG44
GND PERN12 PEX_TXC12 PEXGEN3_SIGNALS PEX_TXC12 PEXGEN3_SIGNALS PEX_TX12
B69 GND 6.3V
X7R X7R
A70 GND PETP12 B66 PEX_RX12 PEX_RX12 PEXGEN3_SIGNALS C0402
BM46 PEX_RX12
A71 GND PETN12 B67 PEX_RX12* PEX_RX12 PEXGEN3_SIGNALS C0402 BN46 PEX_RX12
B72 GND
B73 A72 PEX_TXX13 C876 0.22uF PEX_TX13 BG45 BB29
GND PERP13 PEX_TXC13 PEXGEN3_SIGNALS PEX_TXC13 PEXGEN3_SIGNALS PEX_TX13 NC
A74 A73 PEX_TXX13* 6.3V C875 0.22uF PEX_TX13* BH45 BB31
GND PERN13 PEX_TXC13 PEXGEN3_SIGNALS PEX_TXC13 PEXGEN3_SIGNALS PEX_TX13 NC
A75 GND 6.3V
X7R X7R
B76 GND PETP13 B70 PEX_RX13 PEX_RX13 PEXGEN3_SIGNALS BN47 PEX_RX13
C0402
B77 GND PETN13 B71 PEX_RX13*
PEX_RX13 PEXGEN3_SIGNALS C0402 BN48 PEX_RX13
A78 GND
A79 A76 PEX_TXX14 C872 0.22uF PEX_TX14 BJ46
GND PERP14 PEX_TXC14 PEXGEN3_SIGNALS PEX_TXC14 PEXGEN3_SIGNALS PEX_TX14
B80 A77 PEX_TXX14* 6.3V C866 0.22uF PEX_TX14* BJ47
GND PERN14 PEX_TXC14 PEXGEN3_SIGNALS PEX_TXC14 PEXGEN3_SIGNALS PEX_TX14
A82 GND 6.3V
X7R X7R
PETP14 B74 PEX_RX14
PEX_RX14 PEXGEN3_SIGNALS C0402
BM48 PEX_RX14
PETN14 B75 PEX_RX14* PEX_RX14 PEXGEN3_SIGNALS C0402 BM49 PEX_RX14

A80 PEX_TXX15 C865 0.22uF PEX_TX15 BK47


GND PERP15 PEX_TXC15 PEXGEN3_SIGNALS PEX_TXC15 PEXGEN3_SIGNALS PEX_TX15
A81 PEX_TXX15* 6.3V C863 0.22uF PEX_TX15* BK48
PERN15 PEX_TXC15 PEXGEN3_SIGNALS PEX_TXC15 PEXGEN3_SIGNALS PEX_TX15
6.3V 50OHM_NETCLASS1
X7R X7R R840 2.49k
PETP15 B78 PEX_RX15 PEX_RX15 PEXGEN3_SIGNALS C0402
BM50 PEX_RX15 PEX_TERMP BA36 PEX_TERMP

PETN15 B79 PEX_RX15*


PEX_RX15 PEXGEN3_SIGNALS C0402 BN50 PEX_RX15 PEX_TERMP BB36 1%

5 0402 5
END OF X16

GND

Galaxy Microsystems (HK) Ltd.


BGA_2397_P090_P085_P080_P100_450X450
Page Name:
PCI Express
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL PCI EXPRESS Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS,
N/A
FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P25Z
Date: Friday, March 03, 2017 Sheet 3 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
CON_FINGER_PEX_164
A B C D E F G H

Page4: MEMORY: GPU Partition A/B

G1B G1C
1 @digital.u_gpu_gb3c_384(sym_2):page4_i626 @digital.u_gpu_gb3c_384(sym_3):page4_i627 1

FB_DATA FB_CMD FB_DATA FB_CMD


FBA_D[63..0] 2/24 FBA FBA_CMD[31..0] FBB_D[63..0] 3/24 FBB FBB_CMD[31..0]
{5,6} BI BI {7,8} {5,6} BI OUT {7,8}
FBA_D0 AH43 FBA_D0 FBA_CMD0 AR53 FBA_CMD0 FBB_D0 F52 FBB_D0 FBB_CMD0 H53 FBB_CMD0
0 0 0 0
FBA_D1 AH46 AT52 FBA_CMD1 FBB_D1 F50 H52 FBB_CMD1
1 FBA_D1 FBA_CMD1 1 1 FBB_D1 FBB_CMD1 1
FBA_D2 AH44 FBA_D2 FBA_CMD2 AT53 FBA_CMD2 FBB_D2 F53 FBB_D2 FBB_CMD2 J51 FBB_CMD2
2 2 2 2
FBA_D3 AH45 FBA_D3 FBA_CMD3 AT51 FBA_CMD3 GDDR5X CMD Mapping FBB_D3 F51 FBB_D3 FBB_CMD3 K51 FBB_CMD3
3 3 3 3
FBA_D4 AH50 FBA_D4 FBA_CMD4 AU52 FBA_CMD4 FBB_D4 D51 FBB_D4 FBB_CMD4 K52 FBB_CMD4
4 4 CMD 0..31 32..63 4 4
FBA_D5 AH51 FBA_D5 FBA_CMD5 AU51 FBA_CMD5 FBB_D5 D53 FBB_D5 FBB_CMD5 K53 FBB_CMD5
5 5 5 5
FBA_D6 AH53 AV52 FBA_CMD6 FBB_D6 C52 L52 FBB_CMD6
6 FBA_D6 FBA_CMD6 6 6 FBB_D6 FBB_CMD6 6
CMD0 CAS*
FBA_D7 AH52 FBA_D7 FBA_CMD7 AV53 FBA_CMD7 FBB_D7 D52 FBB_D7 FBB_CMD7 M51 FBB_CMD7
7 7 CMD1 RST* 7 7
FBA_D8 AK51 FBA_D8 FBA_CMD8 AW51 FBA_CMD8 FBB_D8 H49 FBB_D8 FBB_CMD8 M53 FBB_CMD8
8 8 CMD2 RAS* 8 8
FBA_D9 AK53 FBA_D9 FBA_CMD9 AW52 FBA_CMD9 FBB_D9 J47 FBB_D9 FBB_CMD9 M52 FBB_CMD9
9 9 CMD3 A1_A9 9 9
FBA_D10 AK50 FBA_D10 FBA_CMD10 AY53 FBA_CMD10 FBB_D10 H50 FBB_D10 FBB_CMD10 N51 FBB_CMD10
10 10 CMD4 A0_A10 10 10
FBA_D11 AK52 AT48 FBA_CMD11 FBB_D11 J48 U48 FBB_CMD11
11 FBA_D11 FBA_CMD11 11 11 FBB_D11 FBB_CMD11 11
CMD5 A12_A13
FBA_D12 AK47 FBA_D12 FBA_CMD12 AT50 FBA_CMD12 FBB_D12 G51 FBB_D12 FBB_CMD12 U50 FBB_CMD12
12 12 CMD6 ABI* 12 12
FBA_D13 AJ47 FBA_D13 FBA_CMD13 AT47 FBA_CMD13 FBB_D13 G50 FBB_D13 FBB_CMD13 U47 FBB_CMD13
13 13 CMD7 A6_A11 13 13
FBA_D14 AK45 FBA_D14 FBA_CMD14 AT46 FBA_CMD14 FBB_D14 G48 FBB_D14 FBB_CMD14 U46 FBB_CMD14
14 14 CMD8 A7_A8 14 14
FBA_D15 AJ46 FBA_D15 FBA_CMD15 AT45 FBA_CMD15 FBB_D15 H51 FBB_D15 FBB_CMD15 U45 FBB_CMD15
15 15 CMD9 A4_BA2 15 15
FBA_D16 AP52 BF53 FBA_CMD16 FBB_D16 R49 W53 FBB_CMD16
16 FBA_D16 FBA_CMD16 16 16 FBB_D16 FBB_CMD16 16
CMD10 A5_BA1
FBA_D17 AP53 FBA_D17 FBA_CMD17 BF52 FBA_CMD17 FBB_D17 R50 FBB_D17 FBB_CMD17 V52 FBB_CMD17
17 17 CMD11 A3_BA3 17 17
FBA_D18 AP50 FBA_D18 FBA_CMD18 BE51 FBA_CMD18 FBB_D18 R47 FBB_D18 FBB_CMD18 V53 FBB_CMD18
18 18 CMD12 A2_BA0 18 18
FBA_D19 AP51 FBA_D19 FBA_CMD19 BD51 FBA_CMD19 FBB_D19 R48 FBB_D19 FBB_CMD19 V51 FBB_CMD19
19 19 CMD13 CKE* 19 19
FBA_D20 AP46 FBA_D20 FBA_CMD20 BD52 FBA_CMD20 FBB_D20 N49 FBB_D20 FBB_CMD20 U52 FBB_CMD20
20 20 CMD14 A14_A15 20 20
FBA_D21 AP45 BD53 FBA_CMD21 FBB_D21 M49 U51 FBB_CMD21
21 FBA_D21 FBA_CMD21 21 21 FBB_D21 FBB_CMD21 21
CMD15 WE*
FBA_D22 AP43 FBA_D22 FBA_CMD22 BC52 FBA_CMD22 FBB_D22 N47 FBB_D22 FBB_CMD22 T52 FBB_CMD22
22 22 CMD16 CAS* 22 22
FBA_D23 AP44 FBA_D23 FBA_CMD23 BB51 FBA_CMD23 FBB_D23 P47 FBB_D23 FBB_CMD23 T53 FBB_CMD23
23 23 CMD17 RST* 23 23
2
FBA_D24 AN46 FBA_D24 FBA_CMD24 BB53 FBA_CMD24 FBB_D24 R43 FBB_D24 FBB_CMD24 R51 FBB_CMD24
2
24 24 CMD18 RAS* 24 24
FBA_D25 AN47 FBA_D25 FBA_CMD25 BB52 FBA_CMD25 FBB_D25 N43 FBB_D25 FBB_CMD25 R52 FBB_CMD25
25 25 CMD19 A1_A9 25 25
FBA_D26 AM45 BA51 FBA_CMD26 FBB_D26 R44 P53 FBB_CMD26
26 FBA_D26 FBA_CMD26 26 26 FBB_D26 FBB_CMD26 26
CMD20 A0_A10
FBA_D27 AM47 FBA_D27 FBA_CMD27 AU48 FBA_CMD27 FBB_D27 P44 FBB_D27 FBB_CMD27 V48 FBB_CMD27
27 27 CMD21 A12_A13 27 27
FBA_D28 AM50 FBA_D28 FBA_CMD28 AU50 FBA_CMD28 FBB_D28 M46 FBB_D28 FBB_CMD28 V50 FBB_CMD28
28 28 CMD22 ABI* 28 28
FBA_D29 AM52 FBA_D29 FBA_CMD29 AU47 FBA_CMD29 FBB_D29 M44 FBB_D29 FBB_CMD29 V47 FBB_CMD29
29 29 CMD23 A6_A11 29 29
FBA_D30 AM51 FBA_D30 FBA_CMD30 AU46 FBA_CMD30 FBB_D30 N44 FBB_D30 FBB_CMD30 V46 FBB_CMD30
30 30 CMD24 A7_A8 30 30
FBA_D31 AM53 AU45 FBA_CMD31 FBVDDQ FBB_D31 M43 V45 FBB_CMD31 FBVDDQ
31 FBA_D31 FBA_CMD31 31 31 FBB_D31 FBB_CMD31 31
CMD25 A4_BA2
FBA_D32 BH52 FBA_D32 FBA_CMD32 AY52 FBB_D32 AF43 FBB_D32 FBB_CMD32 P51
32 CMD26 A5_BA1 32
FBA_D33 BH50 FBA_D33 FBA_CMD33 AY51 FBB_D33 AF46 FBB_D33 FBB_CMD33 P52
33 33
FBA_D34 BH53 FBA_D34 FBA_CMD34 AT49 FBA_DEBUG0 R833 60.4ohm/NC CMD27 A3_BA3 FBB_D34 AF44 FBB_D34 FBB_CMD34 U49 FBB_DEBUG0 R831 60.4ohm/NC
34 34
FBA_D35 BH51 AU49 FBA_DEBUG1 R832 60.4ohm/NC CMD28 A2_BA0 FBB_D35 AF45 V49 FBB_DEBUG1 R830 60.4ohm/NC
35 FBA_D35 FBA_CMD35 1%
35 FBB_D35 FBB_CMD35 1%
FBA_D36 CMD29 CKE*
BK51 FBA_D36 0402 1% FBB_D36 AF50 FBB_D36 0402 1%
36 CMD30 A14_A15 36
FBA_D37 BK53 FBA_D37 0402 FBB_D37 AF51 FBB_D37 0402
37 CMD31 WE* 37
FBA_D38 BL52 FBA_D38
FBB_D38 AF53 FBB_D38
38 CMD32 38
FBA_D39 BK52 FBA_D39 FBB_D39 AF52 FBB_D39
39 CMD33 39
FBA_D40 BF49 FBA_D40
FBB_D40 AD51 FBB_D40
40 CMD34 DBG0 DBG0 40
FBA_D41 BE47 FBB_D41 AD53
41 FBA_D41 41 FBB_D41
CMD35 DBG1 DBG1
FBA_D42 BF50 FBA_D42
FBB_D42 AD50 FBB_D42
42 42
FBA_D43 BE48 FBA_D43
FBB_D43 AD52 FBB_D43
43 43
FBA_D44 BG51 FBA_D44 FBA_CLK0 AT43 FBA_CLK0 FBA_CLK0 FB_CLK {5}
FBB_D44 AD47 FBB_D44 FBB_CLK0 U43 FBB_CLK0 FBB_CLK0 FB_CLK {7}
44 OUT 44 OUT
FBA_D45 BG50 FBA_D45 FBA_CLK0 AT44 FBA_CLK0* FBA_CLK0 FB_CLK {5}
FBB_D45 AE47 FBB_D45 FBB_CLK0 U44 FBB_CLK0* FBB_CLK0 FB_CLK {7}
45 OUT 45 OUT
FBA_D46 BG48 AU43 FBA_CLK1 FBB_D46 AD45 V43 FBB_CLK1
46 FBA_D46 FBA_CLK1 FBA_CLK1 FB_CLK
OUT {6} 46 FBB_D46 FBB_CLK1 FBB_CLK1 FB_CLK
OUT {8}
FBA_D47 BF51 FBA_D47 FBA_CLK1 AU44 FBA_CLK1* FBA_CLK1 FB_CLK {6}
FBB_D47 AE46 FBB_D47 FBB_CLK1 V44 FBB_CLK1* FBB_CLK1 FB_CLK {8}
47 OUT 47 OUT
FBA_D48 AW49 FBA_D48
FBB_D48 Y52 FBB_D48
48 48
FBA_D49 AW50 FBA_D49 FBB_D49 Y53 FBB_D49
49 49
FBA_D50 AW47 FBA_D50
FBB_D50 Y50 FBB_D50
50 50
FBA_D51 AW48 FBB_D51 Y51
51 FBA_D51 51 FBB_D51
FBA_D52 BA49 FBA_D52
FBB_D52 Y46 FBB_D52
52 52
FBA_D53 BB49 FBA_D53
FBB_D53 Y45 FBB_D53
53 53
3
FBA_D54 BA47 FBA_D54 FBB_D54 Y43 FBB_D54 3
54 54
FBA_D55 AY47 FBA_D55
FBB_D55 Y44 FBB_D55
55 55
FBA_D56 AW43 AK44 FBA_WCK01 FBB_D56 AA46 L49 FBB_WCK01
56 FBA_D56 FBA_WCK01 FBA_WCK01 FB_WCK
OUT {5} 56 FBB_D56 FBB_WCK01 FBB_WCK01 FB_WCK
OUT {7}
FBA_D57 BA43 FBA_D57 FBA_WCK01 AK43 FBA_WCK01* FBA_WCK01 FB_WCK {5}
FBB_D57 AA47 FBB_D57 FBB_WCK01 L50 FBB_WCK01* FBB_WCK01 FB_WCK {7}
57 OUT 57 OUT
FBA_D58 AW44 FBA_D58 FBA_WCKB01 AJ43 FBB_D58 AB45 FBB_D58 FBB_WCKB01 L47
58 58
FBA_D59 AY44 FBA_D59 FBA_WCKB01 AJ44 FBB_D59 AB47 FBB_D59 FBB_WCKB01 L48
59 59
FBA_D60 BB46 FBA_D60 FBA_WCK23 AM43 FBA_WCK23 FBA_WCK23 FB_WCK {5}
FBB_D60 AB50 FBB_D60 FBB_WCK23 K46 FBB_WCK23 FBB_WCK23 FB_WCK {7}
60 OUT 60 OUT
FBA_D61 BB44 AM44 FBA_WCK23* FBB_D61 AB52 L46 FBB_WCK23*
61 FBA_D61 FBA_WCK23 FBA_WCK23 FB_WCK
OUT {5} 61 FBB_D61 FBB_WCK23 FBB_WCK23 FB_WCK
OUT {7}
FBA_D62 BA44 FBA_D62 FBA_WCKB23 AN43 FBB_D62 AB51 FBB_D62 FBB_WCKB23 L45
62 62
FBA_D63 BB43 FBA_D63 FBA_WCKB23 AN44 FBB_D63 AB53 FBB_D63 FBB_WCKB23 L44
63 63
FB_DBI FBA_WCK45 BC49 FBA_WCK45 FBA_WCK45 FB_WCK {6} FB_DBI FBB_WCK45 AD44 FBB_WCK45 FBB_WCK45 FB_WCK {8}
OUT OUT
{5,6}
FBA_DBI[7..0] FBA_WCK45 BC50 FBA_WCK45* FBA_WCK45 FB_WCK {6} {7,8}
FBB_DBI[7..0] FBB_WCK45 AD43 FBB_WCK45* FBB_WCK45 FB_WCK {8}
IN OUT IN OUT
FBA_DBI0 AH49 BC47 FBB_DBI0 E51 AE43
0 FBA_DQM0 FBA_WCKB45 0 FBB_DQM0 FBB_WCKB45
FBA_DBI1 AK49 FBA_DQM1 FBA_WCKB45 BC48 FBB_DBI1 G53 FBB_DQM1 FBB_WCKB45 AE44
1 1
FBA_DBI2 AP47 FBA_DQM2 FBA_WCK67 BC46 FBA_WCK67
FBA_WCK67 FB_WCK {6}
FBB_DBI2 N50 FBB_DQM2 FBB_WCK67 AB43 FBB_WCK67
FBB_WCK67 FB_WCK {8}
2 OUT 2 OUT
FBA_DBI3 AM49 FBA_DQM3 FBA_WCK67 BD46 FBA_WCK67* FBA_WCK67 FB_WCK {6}
FBB_DBI3 M47 FBB_DQM3 FBB_WCK67 AB44 FBB_WCK67* FBB_WCK67 FB_WCK {8}
3 OUT 3 OUT
FBA_DBI4 BJ51 FBA_DQM4 FBA_WCKB67 BC44 FBB_DBI4 AF49 FBB_DQM4 FBB_WCKB67 AA43
4 4
FBA_DBI5 BG53 BC45 FBB_DBI5 AD49 AA44
5 FBA_DQM5 FBA_WCKB67 5 FBB_DQM5 FBB_WCKB67
FBA_DBI6 BA50 FBA_DQM6
FBB_DBI6 Y47 FBB_DQM6
6 6
FBA_DBI7 BB47 FBA_DQM7
FBB_DBI7 AB49 FBB_DQM7
7 7
FB_EDC FB_EDC
FBA_EDC[7..0] FBB_EDC[7..0]
{5,6} OUT
FBA_EDC0
{7,8} OUT
AH48 FBA_DQS_WP0
FBB_EDC0 E50 FBB_DQS_WP0
0 0
FBA_EDC1 AK48 FBA_DQS_WP1
FBB_EDC1 H48 FBB_DQS_WP1
1 1
FBA_EDC2 AP49 FBA_DQS_WP2
FBB_EDC2 R46 FBB_DQS_WP2
2 2
FBA_EDC3 AM48 FBA_DQS_WP3 FBB_EDC3 M48 FBB_DQS_WP3
3 3
FBA_EDC4 BJ50 FBA_DQS_WP4
FBB_EDC4 AF48 FBB_DQS_WP4
4 4
FBA_EDC5 BF48 AL41 FBB_EDC5 AD48 AC41 1V8_FB_PLL_REF
5 FBA_DQS_WP5 FBA_PLL_AVDD OUT {4,9,14,29} 5 FBB_DQS_WP5 FBB_PLL_AVDD IN {4,9,14,29}
FBA_EDC6 AW46 FBA_DQS_WP6 FBA_PLL_AVDD AL42 FBB_EDC6 Y49 FBB_DQS_WP6 FBB_PLL_AVDD AC42
6 6
FBA_EDC7 BB48 FBA_DQS_WP7 FBA_PLL_AVDD AL43 FBB_EDC7 AB48 FBB_DQS_WP7 FBB_PLL_AVDD AC43
7 7
4 4
C895 C898
0.1uF 0.1uF
16V 16V
10% 10%
BGA_2397_P090_P085_P080_P100_450X450 X7R BGA_2397_P090_P085_P080_P100_450X450 X7R

FBVDDQ FBVDDQ
0402 nv_res nv_res nv_res nv_res 0402
GND GND

R345 R349 R346 R351


10k 10k 10k 10k
5% 5% 5% 5%

1V8_MAIN
FBA_CMD13 FBB_CMD13
Place near GPU FBA_CMD29 FBB_CMD29
LB1 30ohm 1V8_FB_PLL_REF
FBA_CMD1 0402 0402 FBB_CMD1 0402 0402
nv_res nv_res nv_res nv_res
IND_SMD_0603 FBA_CMD17 FBB_CMD17
C83 C85 C84
22uF 4.7uF 4.7uF R348 R350 R347 R352
6.3V 6.3V 6.3V 10k 10k 10k 10k
20% 20% 20% 5% 5% 5% 5%
X6S X6S X6S

0805 0603 0603


0402 0402 0402 0402
5 GND GND 5
GND

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: GPU Partition A/B
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL MEMORY: GPU PARTITION A/B Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P25Z
Date: Friday, March 03, 2017 Sheet 4 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page5: MEMORY: FBA Partition 31..0

M11C
M11B @memory.u_mem_gddr5x_x32(sym_7):page5_i578
@memory.u_mem_gddr5x_x32(sym_5):page5_i580
FBA_CMD[31..0]
{4,6} IN
FBVDDQ
FBA_D[31..0]
1 {4} BI
FBA_CMD2 M4 RAS
Mirrored 1
2
FBA_CMD0 H4 CAS MF W12
0
M11D M11A FBA_CMD15 H11 WE add 1k to VDD
15
@memory.u_mem_gddr5x_x32(sym_2):page5_i499 @memory.u_mem_gddr5x_x32(sym_4):page5_i544 A10 VSS VDD A1
A5 VSS VDD A11
FBA_CMD6 K4 B1 A14
6 ABI VSS VDD
B14 VSS VDD A4
MIRRORED MIRRORED
FBA_CMD4 L4 A0_A10 D1 VSS VDD D10
4
x32 x16 x32 x16 FBA_CMD3 L5 A1_A9 D11 VSS VDD G1
3
FBA_D0 V4 DQ0 NC
FBA_D16 B11 DQ16 NC
FBA_CMD12 L11 A2_BA0 D14 VSS VDD G14
0 16 12
FBA_D1 V3 FBA_D17 B12 FBA_CMD11 L10 F1 H10
1 DQ1 NC 17 DQ17 NC 11 A3_BA3 VSS VDD
FBA_D2 U4 DQ2 NC
FBA_D18 C11 DQ18 NC
FBA_CMD9 J11 A4_BA2 F14 VSS VDD H5
2 18 9
FBA_D3 U3 DQ3 NC
FBA_D19 C12 DQ19 NC
FBA_CMD10 J10 A5_BA1 H1 VSS VDD J1
3 19 10
FBA_D4 P4 DQ4 NC
FBA_D20 F11 DQ20 NC
FBA_CMD7 J5 A6_A11 H14 VSS VDD J14
4 20 7
FBA_D5 P3 DQ5 NC
FBA_D21 F12 DQ21 NC
FBA_CMD8 J4 A7_A8 J12 VSS VDD L1
5 21 8
FBA_D6 N4 FBA_D22 G11 FBA_CMD5 K5 J3 L14
6 DQ6 NC 22 DQ22 NC 5 A12_A13 VSS VDD
FBA_D7 N3 DQ7 NC
FBA_D23 G12 DQ23 NC
FBA_CMD14 K12 A15_A14 K1 VSS VDD M10
7 23 14
K14 VSS VDD M5
FBA_EDC0 T3 EDC0 NC
FBA_EDC2 D12 EDC2 GND
K3 VSS VDD N1
FBA_DBI0 R3 DBI0 NC
FBA_DBI2 E12 DBI2 NC
L12 VSS VDD N14
L3 VSS VDD T10
FBA_CMD1 K2 RESET M1 VSS VDD W1
1
FBA_CMD13 M11 CKE M14 VSS VDD W11
13
FBA_D8 V11 DQ8 FBA_D24 B4 DQ24 P1 VSS VDD W14
8 24
FBA_D9 V12 DQ9
FBA_D25 B3 DQ25 {4}
FBA_CLK0 K11 CLK P14 VSS VDD W4
9 25 IN
FBA_D10 U11 FBA_D26 C4 FBA_CLK0* K10 T1
10 DQ10 26 DQ26 {4} IN CLK VSS
FBA_D11 U12 DQ11
FBA_D27 C3 DQ27 T11 VSS
11 27
FBA_D12 P11 DQ12
FBA_D28 F4 DQ28 T14 VSS VDDQ A13
12 28
2
FBA_D13 P12 DQ13 FBA_D29 F3 DQ29 V1 VSS VDDQ A2 2
13 29
FBA_D14 N11 DQ14
FBA_D30 G4 DQ30 V14 VSS VDDQ B10
14 30
FBA_D15 N12 FBA_D31 G3 W10 B5
15 DQ15 31 DQ31 VSS VDDQ
W5 VSS VDDQ C1
FBA_EDC1 T12 EDC1
FBA_EDC3 D3 EDC3 VDDQ C13
FBA_DBI1 R12 DBI1 FBA_DBI3 E3 DBI3 M2 TCK VDDQ C14
M13 TDI B13 VSSQ VDDQ C2
FBA_WCK01 T4 FBA_WCK23 D4 A12 B2 E1
{4} IN WCK01 {4} IN WCK23 TDO VSSQ VDDQ
{4}
FBA_WCK01* T5 WCK01 {4}
FBA_WCK23* D5 WCK23 H2 TMS C10 VSSQ VDDQ E11
IN IN
FBVDDQ C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
R112 E10 E4
549ohm VSSQ VDDQ
E5 VSSQ VDDQ F10
1%
F13 VSSQ VDDQ F5
{6} F2 VSSQ VDDQ G13
OUT
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
1G1D1S 3 FBA_VREFC K13 VREFC N10 VSSQ VDDQ H3
D Q12 N5 J13
0.300 0.140A VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page5_i595 R111 121ohm FBA_ZQ_1 H13 ZQ P13 VSSQ VDDQ J2
GPIO10_FBVREF_SEL 1G R106 R113 C99 P2 L13
{7,10,12,15,17,27} IN 1.33k 931ohm 820pF
1% VSSQ VDDQ
S 2 R10 VSSQ VDDQ L2
1% 1% 50V
30V
AO3416L R5 VSSQ VDDQ M12
10%
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V X7R T13 VSSQ VDDQ M3
1.2A
0.2W T2 VSSQ VDDQ N13
12V
U10 VSSQ VDDQ N2
SOT23
U5 VSSQ VDDQ P10
V13 VSSQ VDDQ P5
GND GND GND GND V2 VSSQ VDDQ R1
3 VDDQ R11 3
FBA_VREF_Q
VDDQ R13
0.300 GND VDDQ R14
VDDQ R2
VDDQ R4
VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

C1469 C285
4 1uF 1uF 4
6.3V 6.3V
10% 10%
FBVDDQ X6S X6S
CLOSE DRAM

C721 C791 C815 C823 C1281 C711 C780 C826 C804 C727 C720 C801 C767 C811
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C712 C743 C822 C738 C742 C794 C810 C725 C779 C774 C760 C747 C753 C783 C776
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S

5 FB_DBI GND FB_EDC GND 5


FBA_DBI[7..0] FBA_EDC[7..0]
{4,6} IN
FBA_DBI0
{4,6} IN
FBA_EDC0
0 0
FBA_DBI1 FBA_EDC1
1 1
FBA_DBI2 FBA_EDC2
2 2
FBA_DBI3 FBA_EDC3
3
FBA_DBI4
3
FBA_EDC4
Galaxy Microsystems (HK) Ltd.
4 4
FBA_DBI5 FBA_EDC5 Page Name:
5 5
FBA_DBI6 FBA_EDC6
6
FBA_DBI7
6
FBA_EDC7
MEMORY: FBA Partition 31..0
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL MEMORY: FBA PARTITION[31:0] Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P25Z
Date: Friday, March 03, 2017 Sheet 5 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page6: MEMORY: FBA Partition 63..32

FBA_CMD[31..0]
1 {4,5} IN M12C 1
M12B @memory.u_mem_gddr5x_x32(sym_6):page6_i522
FBA_D[63..32]
{4} BI @memory.u_mem_gddr5x_x32(sym_5):page6_i509 BGA190
BGA190
COMMON
COMMON

FBA_CMD18 H4 RAS
Normal FBVDDQ
M12D M12A 18
FBA_CMD16 M4 CAS W12 MF
@memory.u_mem_gddr5x_x32(sym_1):page6_i467 @memory.u_mem_gddr5x_x32(sym_3):page6_i497 16
BGA190 BGA190
FBA_CMD31 M11 WE add 1k to VSS
31
COMMON COMMON A10 VSS VDD A1
A5 VSS VDD A11
NORMAL NORMAL FBA_CMD22 K4 B1 A14
22 ABI VSS VDD
FBA_D32 B4 DQ0
FBA_D48 V11 DQ16 B14 VSS VDD A4
32 48
FBA_D33 B3 DQ1
FBA_D49 V12 DQ17
FBA_CMD20 J4 A0_A10 D1 VSS VDD D10
33 49 20
FBA_D34 C4 DQ2 FBA_D50 U11 DQ18 FBA_CMD19 J5 A1_A9 D11 VSS VDD G1
34 50 19
FBA_D35 C3 DQ3
FBA_D51 U12 DQ19
FBA_CMD28 J11 A2_BA0 D14 VSS VDD G14
35 51 28
FBA_D36 F4 FBA_D52 P11 FBA_CMD27 J10 F1 H10
36 DQ4 52 DQ20 27 A3_BA3 VSS VDD
FBA_D37 F3 DQ5
FBA_D53 P12 DQ21
FBA_CMD25 L11 A4_BA2 F14 VSS VDD H5
37 53 25
FBA_D38 G4 DQ6
FBA_D54 N11 DQ22
FBA_CMD26 L10 A5_BA1 H1 VSS VDD J1
38 54 26
FBA_D39 G3 DQ7 FBA_D55 N12 DQ23 FBA_CMD23 L5 A6_A11 H14 VSS VDD J14
39 55 23
FBA_CMD24 L4 A7_A8 J12 VSS VDD L1
24
FBA_EDC4 D3 FBA_EDC6 T12 FBA_CMD21 K5 J3 L14
EDC0 EDC2 21 A12_A13 VSS VDD
FBA_DBI4 E3 DBI0
FBA_DBI6 R12 DBI2
FBA_CMD30 K12 A15_A14 K1 VSS VDD M10
30
K14 VSS VDD M5
K3 VSS VDD N1
x32 x16 x32 x16 L12 VSS VDD N14
FBA_D40 B11 FBA_D56 V4 L3 T10
40 DQ8 NC 56 DQ24 NC VSS VDD
FBA_D41 B12 DQ9 NC
FBA_D57 V3 DQ25 NC
FBA_CMD17 K2 RESET M1 VSS VDD W1
41 57 17
FBA_D42 C11 DQ10 NC
FBA_D58 U4 DQ26 NC
FBA_CMD29 H11 CKE M14 VSS VDD W11
42 58 29
2
FBA_D43 C12 DQ11 NC
FBA_D59 U3 DQ27 NC
P1 VSS VDD W14 2
43 59
FBA_D44 F11 DQ12 NC
FBA_D60 P4 DQ28 NC {4}
FBA_CLK1 K11 CLK P14 VSS VDD W4
44 60 IN
FBA_D45 F12 FBA_D61 P3 FBA_CLK1* K10 T1
45 DQ13 NC 61 DQ29 NC {4} IN CLK VSS
FBA_D46 G11 DQ14 NC
FBA_D62 N4 DQ30 NC
T11 VSS
46 62
FBA_D47 G12 DQ15 NC
FBA_D63 N3 DQ31 NC
T14 VSS VDDQ A13
47 63
V1 VSS VDDQ A2
FBA_EDC5 D12 EDC1
FBA_EDC7 T3 EDC3 NC
V14 VSS VDDQ B10
GND
FBA_DBI5 E12 FBA_DBI7 R3 W10 B5
DBI1 NC DBI3 NC VSS VDDQ
W5 VSS VDDQ C1
{4}
FBA_WCK45 D4 WCK01 {4}
FBA_WCK67 T4 WCK23 VDDQ C13
IN IN
{4}
FBA_WCK45* D5 WCK01 {4}
FBA_WCK67* T5 WCK23 M2 TCK VDDQ C14
IN IN
M13 TDI B13 VSSQ VDDQ C2
A12 TDO B2 VSSQ VDDQ E1
H2 TMS C10 VSSQ VDDQ E11
C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
F2 VSSQ VDDQ G13
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
{5}
FBA_VREFC K13 VREFC N10 VSSQ VDDQ H3
IN
N5 VSSQ VDDQ J13
R107 121ohm FBA_ZQ_2 H13 ZQ P13 VSSQ VDDQ J2
C101 0402 COMMON P2 L13
820pF
1% VSSQ VDDQ
R10 VSSQ VDDQ L2
50V
R5 VSSQ VDDQ M12
10%
X7R T13 VSSQ VDDQ M3
3 0402 T2 VSSQ VDDQ N13 3
COMMON U10 VSSQ VDDQ N2
U5 VSSQ VDDQ P10
GND GND V13 VSSQ VDDQ P5
V2 VSSQ VDDQ R1
VDDQ R11
VDDQ R13
VDDQ R14
VDDQ R2
VDDQ R4
GND VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

4 4
1V8_AON
FBVDDQ
CLOSE DRAM

C805 C705 C799 C788 C787 C723 C768 C817 C773 C734 C759 C728 C713 C769
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF C1470 C268
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 1uF 1uF
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 6.3V 6.3V
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 10% 10%
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402
COMMON COMMON

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32
GND

C741 C824 C702 C809 C785 C828 C709 C758 C706 C772 C737 C770 C752 C766 C754
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBA_DBI[7..0] FBA_EDC[7..0]
{4,5} IN
FBA_DBI0
{4,5} IN
FBA_EDC0
0 0
FBA_DBI1 FBA_EDC1
1 1
FBA_DBI2 FBA_EDC2
2 2
FBA_DBI3 FBA_EDC3
3
FBA_DBI4
3
FBA_EDC4
Galaxy Microsystems (HK) Ltd.
4 4
FBA_DBI5 FBA_EDC5 Page Name:
5 5
FBA_DBI6 FBA_EDC6
6
FBA_DBI7
6
FBA_EDC7
MEMORY: FBA Partition 63..32
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL MEMORY: FBA PARTITION[63:32] Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P25Z
Date: Friday, March 03, 2017 Sheet 6 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page7: MEMORY: FBB Partition 31..0

M9C
@memory.u_mem_gddr5x_x32(sym_7):page7_i573
M9B BGA190_MIRR
FBB_D[31..0] @memory.u_mem_gddr5x_x32(sym_5):page7_i554 COMMON
FBB_CMD[31..0] FBVDDQ
1 {4} BI {4,8} IN BGA190_MIRR 1
COMMON
Mirrored
M9D M9A FBB_CMD2 M4 RAS MF W12
2
@memory.u_mem_gddr5x_x32(sym_2):page7_i510 @memory.u_mem_gddr5x_x32(sym_4):page7_i544 FBB_CMD0 H4 CAS add 1k to VDD
BGA190_MIRR 0
BGA190_MIRR
COMMON
FBB_CMD15 H11 WE A10 VSS VDD A1
COMMON 15
A5 VSS VDD A11
B1 VSS VDD A14
MIRRORED MIRRORED
FBB_CMD6 K4 ABI B14 VSS VDD A4
6
x32 x16 x32 x16 D1 VSS VDD D10
FBB_D0 V4 DQ0 NC
FBB_D16 B11 DQ16 NC
FBB_CMD4 L4 A0_A10 D11 VSS VDD G1
0 16 4
FBB_D1 V3 FBB_D17 B12 FBB_CMD3 L5 D14 G14
1 DQ1 NC 17 DQ17 NC 3 A1_A9 VSS VDD
FBB_D2 U4 DQ2 NC
FBB_D18 C11 DQ18 NC
FBB_CMD12 L11 A2_BA0 F1 VSS VDD H10
2 18 12
FBB_D3 U3 DQ3 NC
FBB_D19 C12 DQ19 NC
FBB_CMD11 L10 A3_BA3 F14 VSS VDD H5
3 19 11
FBB_D4 P4 DQ4 NC
FBB_D20 F11 DQ20 NC
FBB_CMD9 J11 A4_BA2 H1 VSS VDD J1
4 20 9
FBB_D5 P3 DQ5 NC
FBB_D21 F12 DQ21 NC
FBB_CMD10 J10 A5_BA1 H14 VSS VDD J14
5 21 10
FBB_D6 N4 FBB_D22 G11 FBB_CMD7 J5 J12 L1
6 DQ6 NC 22 DQ22 NC 7 A6_A11 VSS VDD
FBB_D7 N3 DQ7 NC
FBB_D23 G12 DQ23 NC
FBB_CMD8 J4 A7_A8 J3 VSS VDD L14
7 23 8
FBB_CMD5 K5 A12_A13 K1 VSS VDD M10
5
FBB_EDC0 T3 EDC0 NC
FBB_EDC2 D12 EDC2 GND
FBB_CMD14 K12 A15_A14 K14 VSS VDD M5
14
FBB_DBI0 R3 DBI0 NC
FBB_DBI2 E12 DBI2 NC
K3 VSS VDD N1
L12 VSS VDD N14
L3 VSS VDD T10
M1 VSS VDD W1
FBB_D8 V11 DQ8 FBB_D24 B4 DQ24 FBB_CMD1 K2 RESET M14 VSS VDD W11
8 24 1
FBB_D9 V12 DQ9
FBB_D25 B3 DQ25
FBB_CMD13 M11 CKE P1 VSS VDD W14
9 25 13
FBB_D10 U11 FBB_D26 C4 P14 W4
10 DQ10 26 DQ26 VSS VDD
FBB_D11 U12 DQ11
FBB_D27 C3 DQ27 {4}
FBB_CLK0 K11 CLK T1 VSS
11 27 IN
FBB_D12 P11 DQ12
FBB_D28 F4 DQ28 {4}
FBB_CLK0* K10 CLK T11 VSS
12 28 IN
2
FBB_D13 P12 DQ13 FBB_D29 F3 DQ29 T14 VSS VDDQ A13 2
13 29
FBB_D14 N11 DQ14
FBB_D30 G4 DQ30 V1 VSS VDDQ A2
14 30
FBB_D15 N12 FBB_D31 G3 V14 B10
15 DQ15 31 DQ31 VSS VDDQ
W10 VSS VDDQ B5
FBB_EDC1 T12 EDC1
FBB_EDC3 D3 EDC3 W5 VSS VDDQ C1
FBB_DBI1 R12 DBI1 FBB_DBI3 E3 DBI3 VDDQ C13
VDDQ C14
FBB_WCK01 T4 FBB_WCK23 D4 M2 B13 C2
{4} IN WCK01 {4} IN WCK23 TCK VSSQ VDDQ
{4}
FBB_WCK01* T5 WCK01 {4}
FBB_WCK23* D5 WCK23 M13 TDI B2 VSSQ VDDQ E1
IN IN
A12 TDO C10 VSSQ VDDQ E11
H2 TMS C5 VSSQ VDDQ E13
FBVDDQ D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
R109 E5 F10
549ohm VSSQ VDDQ
F13 VSSQ VDDQ F5
1%
0402
F2 VSSQ VDDQ G13
COMMON {8} G10 VSSQ VDDQ G2
OUT
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
1G1D1S 3 FBB_VREFC K13 VREFC N5 VSSQ VDDQ J13
D Q11 P13 J2
0.300 0.140A VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page7_i588 R108 121ohm FBB_ZQ_1 H13 ZQ P2 VSSQ VDDQ L13
GPIO10_FBVREF_SEL 1G SOT323_1G1D1S R104 R110 C98 0402 COMMON R10 L2
{5,10,12,15,17,27} IN COMMON 1.33k 931ohm 820pF
1% VSSQ VDDQ
S 2 R5 VSSQ VDDQ M12
1% 1% 50V
30V
AO3416L
0402 0402
T13 VSSQ VDDQ M3
10%
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V COMMON COMMON X7R T2 VSSQ VDDQ N13
1.2A
0.2W 0402 U10 VSSQ VDDQ N2
12V
COMMON U5 VSSQ VDDQ P10
SOT23
V13 VSSQ VDDQ P5
3
V2 VSSQ VDDQ R1 3
GND GND GND GND VDDQ R11
VDDQ R13
FBB_VREF_Q GND VDDQ R14
0.300 VDDQ R2
VDDQ R4
VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 4
C269 C1471
1uF 1uF
FBVDDQ
6.3V 6.3V
CLOSE DRAM 10% 10%
X6S X6S
0402 0402
C813 C751 C722 C790 C803 C829 C744 C718 C731 C771 C814 C765 C802 C715 COMMON COMMON
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C724 C793 C786 C755 C703 C730 C820 C827 C756 C806 C750 C761 C781 C757 C762
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBB_DBI[7..0] FBB_EDC[7..0]
{4,8} IN
FBB_DBI0
{4,8} OUT
FBB_EDC0
0 0
FBB_DBI1 FBB_EDC1
1 1
FBB_DBI2 FBB_EDC2
2 2
FBB_DBI3 FBB_EDC3
3
FBB_DBI4
3
FBB_EDC4
Galaxy Microsystems (HK) Ltd.
4 4
FBB_DBI5 FBB_EDC5 Page Name:
5 5
FBB_DBI6 FBB_EDC6
6
FBB_DBI7
6
FBB_EDC7
MEMORY: FBB Partition 31..0
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL MEMORY: FBB PARTITION[31:0] Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P25Z
Date: Friday, March 03, 2017 Sheet 7 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page8: MEMORY: FBB Partition 63..32

M10C
FBB_CMD[31..0]
{4,7} IN @memory.u_mem_gddr5x_x32(sym_6):page8_i521
M10B BGA190
FBB_D[63..32]
} 1 BI @memory.u_mem_gddr5x_x32(sym_5):page8_i509 COMMON 1
BGA190
COMMON
Normal FBVDDQ

FBB_CMD18 H4 RAS W12 MF


M10D M10A 18
FBB_CMD16 M4 CAS add 1k to VSS
@memory.u_mem_gddr5x_x32(sym_1):page8_i466 @memory.u_mem_gddr5x_x32(sym_3):page8_i496 16
FBB_CMD31 M11 A10 A1
BGA190 BGA190 31 WE VSS VDD
COMMON COMMON A5 VSS VDD A11
B1 VSS VDD A14
NORMAL NORMAL FBB_CMD22 K4 B14 A4
22 ABI VSS VDD
FBB_D32 B4 DQ0
FBB_D48 V11 DQ16 D1 VSS VDD D10
32 48
FBB_D33 B3 FBB_D49 V12 FBB_CMD20 J4 D11 G1
33 DQ1 49 DQ17 20 A0_A10 VSS VDD
FBB_D34 C4 DQ2
FBB_D50 U11 DQ18
FBB_CMD19 J5 A1_A9 D14 VSS VDD G14
34 50 19
FBB_D35 C3 DQ3
FBB_D51 U12 DQ19
FBB_CMD28 J11 A2_BA0 F1 VSS VDD H10
35 51 28
FBB_D36 F4 DQ4 FBB_D52 P11 DQ20 FBB_CMD27 J10 A3_BA3 F14 VSS VDD H5
36 52 27
FBB_D37 F3 DQ5
FBB_D53 P12 DQ21
FBB_CMD25 L11 A4_BA2 H1 VSS VDD J1
37 53 25
FBB_D38 G4 FBB_D54 N11 FBB_CMD26 L10 H14 J14
38 DQ6 54 DQ22 26 A5_BA1 VSS VDD
FBB_D39 G3 DQ7
FBB_D55 N12 DQ23
FBB_CMD23 L5 A6_A11 J12 VSS VDD L1
39 55 23
FBB_CMD24 L4 A7_A8 J3 VSS VDD L14
24
FBB_EDC4 D3 EDC0 FBB_EDC6 T12 EDC2 FBB_CMD21 K5 A12_A13 K1 VSS VDD M10
21
FBB_DBI4 E3 DBI0
FBB_DBI6 R12 DBI2
FBB_CMD30 K12 A15_A14 K14 VSS VDD M5
30
K3 VSS VDD N1
L12 VSS VDD N14
x32 x16 x32 x16 L3 VSS VDD T10
FBB_D40 B11 DQ8 NC
FBB_D56 V4 DQ24 NC
M1 VSS VDD W1
40 56
FBB_D41 B12 DQ9 NC
FBB_D57 V3 DQ25 NC
FBB_CMD17 K2 RESET M14 VSS VDD W11
41 57 17
FBB_D42 C11 FBB_D58 U4 FBB_CMD29 H11 P1 W14
42 DQ10 NC 58 DQ26 NC 29 CKE VSS VDD
FBB_D43 C12 DQ11 NC
FBB_D59 U3 DQ27 NC
P14 VSS VDD W4
43 59
FBB_D44 F11 DQ12 NC
FBB_D60 P4 DQ28 NC {4}
FBB_CLK1 K11 CLK T1 VSS
44 60 IN
2
FBB_D45 F12 DQ13 NC
FBB_D61 P3 DQ29 NC {4}
FBB_CLK1* K10 CLK T11 VSS 2
45 61 IN
FBB_D46 G11 DQ14 NC
FBB_D62 N4 DQ30 NC
T14 VSS VDDQ A13
46 62
FBB_D47 G12 FBB_D63 N3 V1 A2
47 DQ15 NC 63 DQ31 NC VSS VDDQ
V14 VSS VDDQ B10
FBB_EDC5 D12 EDC1
FBB_EDC7 T3 EDC3 NC
W10 VSS VDDQ B5
GND
FBB_DBI5 E12 DBI1 NC
FBB_DBI7 R3 DBI3 NC
W5 VSS VDDQ C1
VDDQ C13
FBB_WCK45 D4 FBB_WCK67 T4 C14
{4} IN WCK01 {4} IN WCK23 VDDQ
{4}
FBB_WCK45* D5 WCK01 {4}
FBB_WCK67* T5 WCK23 M2 TCK B13 VSSQ VDDQ C2
IN IN
M13 TDI B2 VSSQ VDDQ E1
A12 TDO C10 VSSQ VDDQ E11
H2 TMS C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
F2 VSSQ VDDQ G13
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
{7}
FBB_VREFC K13 VREFC N5 VSSQ VDDQ J13
IN
P13 VSSQ VDDQ J2
R105 121ohm FBB_ZQ_2 H13 P2 L13
C100 ZQ VSSQ VDDQ
0402 1% COMMON R10 VSSQ VDDQ L2
820pF
R5 VSSQ VDDQ M12
50V
T13 VSSQ VDDQ M3
10%
X7R T2 VSSQ VDDQ N13
0402 U10 VSSQ VDDQ N2
COMMON U5 VSSQ VDDQ P10
3
V13 VSSQ VDDQ P5 3
V2 VSSQ VDDQ R1
GND GND VDDQ R11
VDDQ R13
VDDQ R14
VDDQ R2
VDDQ R4
GND VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 4

C270 C1472
FBVDDQ
1uF 1uF
CLOSE DRAM 6.3V 6.3V
10% 10%
X6S X6S
C819 C782 C710 C707 C798 C797 C795 C763 C736 C808 C830 C719 C789 C749
0402 0402
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF COMMON COMMON
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C740 C818 C708 C732 C739 C816 C821 C778 C777 C807 C748 C775 C746 C784 C764
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBB_DBI[7..0] FBB_EDC[7..0]
{4,7} IN
FBB_DBI0
{4,7} OUT
FBB_EDC0
0 0
FBB_DBI1 FBB_EDC1
1 1
FBB_DBI2 FBB_EDC2
2
FBB_DBI3
2
FBB_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBB_DBI4 FBB_EDC4 Page Name:
4 4
FBB_DBI5 FBB_EDC5
5
FBB_DBI6
5
FBB_EDC6
Table of Contents
6 6
FBB_DBI7 FBB_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBB PARTITION[63:31] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 8 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page9: MEMORY: GPU Partition C/D

G1D G1E
1 @digital.u_gpu_gb3c_384(sym_4):page9_i601 @digital.u_gpu_gb3c_384(sym_5):page9_i602 1
BGA2397 BGA2397
COMMON COMMON
FB_DATA FB_CMD FB_DATA FB_CMD
FBC_D[63..0] 4/24 FBC FBC_CMD[31..0] FBD_D[63..0] 5/24 FBD FBD_CMD[31..0]
{10,11} BI BI {12,13} {10,11} BI OUT {12,13}
FBC_D0 L28 FBC_D0 FBC_CMD0 A35 FBC_CMD0 FBD_D0 B6 FBD_D0 FBD_CMD0 A8 FBD_CMD0
0 0 0 0
FBC_D1 H28 B36 FBC_CMD1 FBD_D1 D6 B8 FBD_CMD1
1 FBC_D1 FBC_CMD1 1 1 FBD_D1 FBD_CMD1 1
FBC_D2 K28 FBC_D2 FBC_CMD2 A36 FBC_CMD2 FBD_D2 A6 FBD_D2 FBD_CMD2 C9 FBD_CMD2
2 2 2 2
FBC_D3 J28 FBC_D3 FBC_CMD3 C36 FBC_CMD3 GDDR5X CMD Mapping FBD_D3 C6 FBD_D3 FBD_CMD3 C10 FBD_CMD3
3 3 3 3
FBC_D4 D28 FBC_D4 FBC_CMD4 B37 FBC_CMD4 FBD_D4 C4 FBD_D4 FBD_CMD4 B10 FBD_CMD4
4 4 CMD 0..31 32..63 4 4
FBC_D5 C28 FBC_D5 FBC_CMD5 C37 FBC_CMD5 FBD_D5 A4 FBD_D5 FBD_CMD5 A10 FBD_CMD5
5 5 5 5
FBC_D6 A28 B38 FBC_CMD6 FBD_D6 B3 B11 FBD_CMD6
6 FBC_D6 FBC_CMD6 6 6 FBD_D6 FBD_CMD6 6
CMD0 CAS*
FBC_D7 B28 FBC_D7 FBC_CMD7 A38 FBC_CMD7 FBD_D7 B4 FBD_D7 FBD_CMD7 C12 FBD_CMD7
7 7 CMD1 RST* 7 7
FBC_D8 C30 FBC_D8 FBC_CMD8 C39 FBC_CMD8 FBD_D8 E8 FBD_D8 FBD_CMD8 A12 FBD_CMD8
8 8 CMD2 RAS* 8 8
FBC_D9 A30 FBC_D9 FBC_CMD9 B39 FBC_CMD9 FBD_D9 G9 FBD_D9 FBD_CMD9 B12 FBD_CMD9
9 9 CMD3 A1_A9 9 9
FBC_D10 D30 FBC_D10 FBC_CMD10 A40 FBC_CMD10 FBD_D10 D8 FBD_D10 FBD_CMD10 C13 FBD_CMD10
10 10 CMD4 A0_A10 10 10
FBC_D11 B30 F36 FBC_CMD11 FBD_D11 F9 F17 FBD_CMD11
11 FBC_D11 FBC_CMD11 11 11 FBD_D11 FBD_CMD11 11
CMD5 A12_A13
FBC_D12 G30 FBC_D12 FBC_CMD12 D36 FBC_CMD12 FBD_D12 C7 FBD_D12 FBD_CMD12 D17 FBD_CMD12
12 12 CMD6 ABI* 12 12
FBC_D13 G29 FBC_D13 FBC_CMD13 G36 FBC_CMD13 FBD_D13 D7 FBD_D13 FBD_CMD13 G17 FBD_CMD13
13 13 CMD7 A6_A11 13 13
FBC_D14 J30 FBC_D14 FBC_CMD14 H36 FBC_CMD14 FBD_D14 F7 FBD_D14 FBD_CMD14 H17 FBD_CMD14
14 14 CMD8 A7_A8 14 14
FBC_D15 H29 FBC_D15 FBC_CMD15 J36 FBC_CMD15 FBD_D15 C8 FBD_D15 FBD_CMD15 J17 FBD_CMD15
15 15 CMD9 A4_BA2 15 15
FBC_D16 B34 A46 FBC_CMD16 FBD_D16 E15 A19 FBD_CMD16
16 FBC_D16 FBC_CMD16 16 16 FBD_D16 FBD_CMD16 16
CMD10 A5_BA1
FBC_D17 A34 FBC_D17 FBC_CMD17 B46 FBC_CMD17 FBD_D17 D15 FBD_D17 FBD_CMD17 B18 FBD_CMD17
17 17 CMD11 A3_BA3 17 17
FBC_D18 D34 FBC_D18 FBC_CMD18 C45 FBC_CMD18 FBD_D18 G15 FBD_D18 FBD_CMD18 A18 FBD_CMD18
18 18 CMD12 A2_BA0 18 18
FBC_D19 C34 FBC_D19 FBC_CMD19 C44 FBC_CMD19 FBD_D19 F15 FBD_D19 FBD_CMD19 C18 FBD_CMD19
19 19 CMD13 CKE* 19 19
FBC_D20 H34 FBC_D20 FBC_CMD20 B44 FBC_CMD20 FBD_D20 E13 FBD_D20 FBD_CMD20 B17 FBD_CMD20
20 20 CMD14 A14_A15 20 20
FBC_D21 J34 A44 FBC_CMD21 FBD_D21 E12 C17 FBD_CMD21
21 FBC_D21 FBC_CMD21 21 21 FBD_D21 FBD_CMD21 21
CMD15 WE*
FBC_D22 L34 FBC_D22 FBC_CMD22 B43 FBC_CMD22 FBD_D22 G13 FBD_D22 FBD_CMD22 B16 FBD_CMD22
22 22 CMD16 CAS* 22 22
FBC_D23 K34 FBC_D23 FBC_CMD23 C42 FBC_CMD23 FBD_D23 G14 FBD_D23 FBD_CMD23 A16 FBD_CMD23
23 23 CMD17 RST* 23 23
2
FBC_D24 H33 FBC_D24 FBC_CMD24 A42 FBC_CMD24 FBD_D24 L15 FBD_D24 FBD_CMD24 C15 FBD_CMD24
2
24 24 CMD18 RAS* 24 24
FBC_D25 G33 FBC_D25 FBC_CMD25 B42 FBC_CMD25 FBD_D25 L13 FBD_D25 FBD_CMD25 B15 FBD_CMD25
25 25 CMD19 A1_A9 25 25
FBC_D26 J32 C41 FBC_CMD26 FBD_D26 K15 A14 FBD_CMD26
26 FBC_D26 FBC_CMD26 26 26 FBD_D26 FBD_CMD26 26
CMD20 A0_A10
FBC_D27 G32 FBC_D27 FBC_CMD27 F37 FBC_CMD27 FBD_D27 K14 FBD_D27 FBD_CMD27 F18 FBD_CMD27
27 27 CMD21 A12_A13 27 27
FBC_D28 D32 FBC_D28 FBC_CMD28 D37 FBC_CMD28 FBD_D28 H12 FBD_D28 FBD_CMD28 D18 FBD_CMD28
28 28 CMD22 ABI* 28 28
FBC_D29 B32 FBC_D29 FBC_CMD29 G37 FBC_CMD29 FBD_D29 K12 FBD_D29 FBD_CMD29 G18 FBD_CMD29
29 29 CMD23 A6_A11 29 29
FBC_D30 C32 FBC_D30 FBC_CMD30 H37 FBC_CMD30 FBD_D30 K13 FBD_D30 FBD_CMD30 H18 FBD_CMD30
30 30 CMD24 A7_A8 30 30
FBC_D31 A32 J37 FBC_CMD31 FBVDDQ FBD_D31 L12 J18 FBD_CMD31 FBVDDQ
31 FBC_D31 FBC_CMD31 31 31 FBD_D31 FBD_CMD31 31
CMD25 A4_BA2
FBC_D32 B48 FBC_D32 FBC_CMD32 B40 FBD_D32 L26 FBD_D32 FBD_CMD32 C14
32 CMD26 A5_BA1 32
FBC_D33 D48 FBC_D33 FBC_CMD33 C40 FBD_D33 H26 FBD_D33 FBD_CMD33 B14
33 33
FBC_D34 A48 FBC_D34 FBC_CMD34 E36 FBC_DEBUG0 R841 60.4ohm/NC CMD27 A3_BA3 FBD_D34 K26 FBD_D34 FBD_CMD34 E17 FBD_DEBUG0 R847 60.4ohm/NC
34 34
FBC_D35 C48 E37 FBC_DEBUG1 0402 COMMON R839 60.4ohm/NC CMD28 A2_BA0 FBD_D35 J26 E18 FBD_DEBUG1 0402 COMMON R845 60.4ohm/NC
35 FBC_D35 FBC_CMD35 1%
35 FBD_D35 FBD_CMD35 1%
FBC_D36 CMD29 CKE*
C50 FBC_D36 0402 1% COMMON FBD_D36 D26 FBD_D36 0402 1% COMMON
36 CMD30 A14_A15 36
FBC_D37 A50 FBC_D37
FBD_D37 C26 FBD_D37
37 CMD31 WE* 37
FBC_D38 B51 FBC_D38
FBD_D38 A26 FBD_D38
38 CMD32 38
FBC_D39 B50 FBC_D39 FBD_D39 B26 FBD_D39
39 CMD33 39
FBC_D40 E46 FBC_D40
FBD_D40 C24 FBD_D40
40 CMD34 DBG0 DBG0 40
FBC_D41 G45 FBD_D41 A24
41 FBC_D41 41 FBD_D41
CMD35 DBG1 DBG1
FBC_D42 D46 FBC_D42
FBD_D42 D24 FBD_D42
42 42
FBC_D43 F45 FBC_D43
FBD_D43 B24 FBD_D43
43 43
FBC_D44 C47 FBC_D44 FBC_CLK0 L36 FBC_CLK0 FBC_CLK0 FB_CLK {10}
FBD_D44 G24 FBD_D44 FBD_CLK0 L17 FBD_CLK0 FBD_CLK0 FB_CLK {12}
44 OUT 44 OUT
FBC_D45 D47 FBC_D45 FBC_CLK0 K36 FBC_CLK0* FBC_CLK0 FB_CLK {10}
FBD_D45 G25 FBD_D45 FBD_CLK0 K17 FBD_CLK0* FBD_CLK0 FB_CLK {12}
45 OUT 45 OUT
FBC_D46 F47 L37 FBC_CLK1 FBD_D46 J24 L18 FBD_CLK1
46 FBC_D46 FBC_CLK1 FBC_CLK1 FB_CLK
OUT {11} 46 FBD_D46 FBD_CLK1 FBD_CLK1 FB_CLK
OUT {13}
FBC_D47 C46 FBC_D47 FBC_CLK1 K37 FBC_CLK1* FBC_CLK1 FB_CLK {11}
FBD_D47 H25 FBD_D47 FBD_CLK1 K18 FBD_CLK1* FBD_CLK1 FB_CLK {13}
47 OUT 47 OUT
FBC_D48 E39 FBC_D48
FBD_D48 B20 FBD_D48
48 48
FBC_D49 D39 FBC_D49 FBD_D49 A20 FBD_D49
49 49
FBC_D50 G39 FBC_D50
FBD_D50 D20 FBD_D50
50 50
FBC_D51 F39 FBD_D51 C20
51 FBC_D51 51 FBD_D51
FBC_D52 E41 FBC_D52
FBD_D52 H20 FBD_D52
52 52
FBC_D53 E42 FBC_D53
FBD_D53 J20 FBD_D53
53 53
3
FBC_D54 G41 FBC_D54 FBD_D54 L20 FBD_D54 3
54 54
FBC_D55 G40 FBC_D55
FBD_D55 K20 FBD_D55
55 55
FBC_D56 L39 K30 FBC_WCK01 FBD_D56 H21 E11 FBD_WCK01
56 FBC_D56 FBC_WCK01 FBC_WCK01 FB_WCK
OUT {10} 56 FBD_D56 FBD_WCK01 FBD_WCK01 FB_WCK
OUT {12}
FBC_D57 L41 FBC_D57 FBC_WCK01 L30 FBC_WCK01* FBC_WCK01 FB_WCK {10}
FBD_D57 G21 FBD_D57 FBD_WCK01 D11 FBD_WCK01* FBD_WCK01 FB_WCK {12}
57 OUT 57 OUT
FBC_D58 K39 FBC_D58 FBC_WCKB01 L29 FBD_D58 J22 FBD_D58 FBD_WCKB01 G11
58 58
FBC_D59 K40 FBC_D59 FBC_WCKB01 K29 FBD_D59 G22 FBD_D59 FBD_WCKB01 F11
59 59
FBC_D60 H42 FBC_D60 FBC_WCK23 L32 FBC_WCK23 FBC_WCK23 FB_WCK {10}
FBD_D60 D22 FBD_D60 FBD_WCK23 H10 FBD_WCK23 FBD_WCK23 FB_WCK {12}
60 OUT 60 OUT
FBC_D61 K42 K32 FBC_WCK23* FBD_D61 B22 H11 FBD_WCK23*
61 FBC_D61 FBC_WCK23 FBC_WCK23 FB_WCK
OUT {10} 61 FBD_D61 FBD_WCK23 FBD_WCK23 FB_WCK
OUT {12}
FBC_D62 K41 FBC_D62 FBC_WCKB23 L33 FBD_D62 C22 FBD_D62 FBD_WCKB23 J11
62 62
FBC_D63 L42 FBC_D63 FBC_WCKB23 K33 FBD_D63 A22 FBD_D63 FBD_WCKB23 K11
63 63
FB_DBI FBC_WCK45 E43 FBC_WCK45 FBC_WCK45 FB_WCK {11} FB_DBI FBD_WCK45 K24 FBD_WCK45 FBD_WCK45 FB_WCK {13}
OUT OUT
{10,11}
FBC_DBI[7..0] FBC_WCK45 D43 FBC_WCK45* FBC_WCK45 FB_WCK {11} {12,13}
FBD_DBI[7..0] FBD_WCK45 L24 FBD_WCK45* FBD_WCK45 FB_WCK {13}
IN OUT OUT OUT
FBC_DBI0 E28 G43 FBD_DBI0 C5 L25
0 FBC_DQM0 FBC_WCKB45 0 FBD_DQM0 FBD_WCKB45
FBC_DBI1 E30 FBC_DQM1 FBC_WCKB45 F43 FBD_DBI1 A7 FBD_DQM1 FBD_WCKB45 K25
1 1
FBC_DBI2 G34 FBC_DQM2 FBC_WCK67 H43 FBC_WCK67
FBC_WCK67 FB_WCK {11}
FBD_DBI2 D13 FBD_DQM2 FBD_WCK67 L22 FBD_WCK67
FBD_WCK67 FB_WCK {13}
2 OUT 2 OUT
FBC_DBI3 E32 FBC_DQM3 FBC_WCK67 H44 FBC_WCK67* FBC_WCK67 FB_WCK {11}
FBD_DBI3 G12 FBD_DQM3 FBD_WCK67 K22 FBD_WCK67* FBD_WCK67 FB_WCK {13}
3 OUT 3 OUT
FBC_DBI4 C49 FBC_DQM4 FBC_WCKB67 K43 FBD_DBI4 E26 FBD_DQM4 FBD_WCKB67 L21
4 4
FBC_DBI5 A47 J43 FBD_DBI5 E24 K21
5 FBC_DQM5 FBC_WCKB67 5 FBD_DQM5 FBD_WCKB67
FBC_DBI6 D41 FBC_DQM6
FBD_DBI6 G20 FBD_DQM6
6 6
FBC_DBI7 G42 FBC_DQM7
FBD_DBI7 E22 FBD_DQM7
7 7
FB_EDC FB_EDC
FBC_EDC[7..0] FBD_EDC[7..0]
{10,11} OUT
FBC_EDC0
{12,13} OUT
F28 FBC_DQS_WP0
FBD_EDC0 D5 FBD_DQS_WP0
0 0
FBC_EDC1 F30 FBC_DQS_WP1
FBD_EDC1 F8 FBD_DQS_WP1
1 1
FBC_EDC2 E34 FBC_DQS_WP2
FBD_EDC2 H15 FBD_DQS_WP2
2 2
FBC_EDC3 F32 FBC_DQS_WP3 FBD_EDC3 F12 FBD_DQS_WP3
3 3
FBC_EDC4 D49 FBC_DQS_WP4
FBD_EDC4 F26 FBD_DQS_WP4
4 4
FBC_EDC5 F46 L31 1V8_FB_PLL_REF FBD_EDC5 F24 L23 1V8_FB_PLL_REF
5 FBC_DQS_WP5 FBC_PLL_AVDD IN {4,9,14,29} 5 FBD_DQS_WP5 FBD_PLL_AVDD IN {4,9,14,29}
FBC_EDC6 H39 FBC_DQS_WP6 FBC_PLL_AVDD M31 FBD_EDC6 E20 FBD_DQS_WP6 FBD_PLL_AVDD M23
6 6
FBC_EDC7 F42 FBC_DQS_WP7 FBC_PLL_AVDD N31 FBD_EDC7 F22 FBD_DQS_WP7 FBD_PLL_AVDD N23
7 7
4 4
C1007 C1073
0.1uF 0.1uF
16V 16V
10% 10%
X7R X7R
0402 0402
COMMON COMMON

FBVDDQ FBVDDQ
nv_res nv_res nv_res nv_res
GND GND

R353 R355 R344 R336


10k 10k 10k 10k
5% 5% 5% 5%
0402 0402 0402 0402
COMMON COMMON COMMON COMMON
FBC_CMD13 FBD_CMD13
FBC_CMD29 FBD_CMD29

FBC_CMD1 FBD_CMD1
nv_res nv_res nv_res nv_res
FBC_CMD17 FBD_CMD17

R354 R356 R357 R358


10k 10k 10k 10k
5% 5% 5% 5%
0402 0402 0402 0402
COMMON COMMON COMMON COMMON

5 GND GND 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: GPU Partition C/D
Size Project Name: Design By: Rev
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: GPU PARTITION C/D P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 9 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page10: MEMORY: FBC Partition 31..0

M7C
M7B @memory.u_mem_gddr5x_x32(sym_7):page10_i573
@memory.u_mem_gddr5x_x32(sym_5):page10_i559 BGA190_MIRR
FBC_CMD[31..0]
FBC_D[31..0] {9,11} IN BGA190_MIRR
COMMON
COMMON FBVDDQ
{9} BI

FBC_CMD2 M4 RAS
Mirrored
2
1 M7D M7A FBC_CMD0 H4 CAS MF W12 1
0
@memory.u_mem_gddr5x_x32(sym_4):page10_i544 FBC_CMD15 H11
@memory.u_mem_gddr5x_x32(sym_2):page10_i510
15 WE add 1k to VDD
BGA190_MIRR
BGA190_MIRR
COMMON
A10 VSS VDD A1
COMMON
A5 VSS VDD A11
FBC_CMD6 K4 ABI B1 VSS VDD A14
MIRRORED MIRRORED 6
B14 VSS VDD A4
x32 x16 x32 x16 FBC_CMD4 L4 D1 D10
4 A0_A10 VSS VDD
FBC_D0 V4 DQ0 NC
FBC_D16 B11 DQ16 NC
FBC_CMD3 L5 A1_A9 D11 VSS VDD G1
0 16 3
FBC_D1 V3 DQ1 NC
FBC_D17 B12 DQ17 NC
FBC_CMD12 L11 A2_BA0 D14 VSS VDD G14
1 17 12
FBC_D2 U4 DQ2 NC
FBC_D18 C11 DQ18 NC
FBC_CMD11 L10 A3_BA3 F1 VSS VDD H10
2 18 11
FBC_D3 U3 DQ3 NC
FBC_D19 C12 DQ19 NC
FBC_CMD9 J11 A4_BA2 F14 VSS VDD H5
3 19 9
FBC_D4 P4 FBC_D20 F11 FBC_CMD10 J10 H1 J1
4 DQ4 NC 20 DQ20 NC 10 A5_BA1 VSS VDD
FBC_D5 P3 DQ5 NC
FBC_D21 F12 DQ21 NC
FBC_CMD7 J5 A6_A11 H14 VSS VDD J14
5 21 7
FBC_D6 N4 DQ6 NC
FBC_D22 G11 DQ22 NC
FBC_CMD8 J4 A7_A8 J12 VSS VDD L1
6 22 8
FBC_D7 N3 DQ7 NC
FBC_D23 G12 DQ23 NC
FBC_CMD5 K5 A12_A13 J3 VSS VDD L14
7 23 5
FBC_CMD14 K12 A15_A14 K1 VSS VDD M10
14
FBC_EDC0 T3 FBC_EDC2 D12 K14 M5
EDC0 NC EDC2 GND VSS VDD
FBC_DBI0 R3 DBI0 NC
FBC_DBI2 E12 DBI2 NC
K3 VSS VDD N1
L12 VSS VDD N14
L3 VSS VDD T10
FBC_CMD1 K2 RESET M1 VSS VDD W1
1
FBC_D8 V11 FBC_D24 B4 FBC_CMD13 M11 M14 W11
8 DQ8 24 DQ24 13 CKE VSS VDD
FBC_D9 V12 DQ9
FBC_D25 B3 DQ25 P1 VSS VDD W14
9 25
FBC_D10 U11 DQ10
FBC_D26 C4 DQ26 {9}
FBC_CLK0 K11 CLK P14 VSS VDD W4
10 26 IN
FBC_D11 U12 DQ11 FBC_D27 C3 DQ27 {9}
FBC_CLK0* K10 CLK T1 VSS
11 27 IN
FBC_D12 P11 DQ12
FBC_D28 F4 DQ28 T11 VSS
12 28
FBC_D13 P12 FBC_D29 F3 T14 A13
13 DQ13 29 DQ29 VSS VDDQ
FBC_D14 N11 DQ14
FBC_D30 G4 DQ30 V1 VSS VDDQ A2
14 30
FBC_D15 N12 DQ15
FBC_D31 G3 DQ31 V14 VSS VDDQ B10
15 31
2
W10 VSS VDDQ B5 2
FBC_EDC1 T12 EDC1
FBC_EDC3 D3 EDC3 W5 VSS VDDQ C1
FBC_DBI1 R12 FBC_DBI3 E3 C13
DBI1 DBI3 VDDQ
M2 TCK VDDQ C14
{9}
FBC_WCK01 T4 WCK01 {9}
FBC_WCK23 D4 WCK23 M13 TDI B13 VSSQ VDDQ C2
IN IN
{9}
FBC_WCK01* T5 WCK01 {9}
FBC_WCK23* D5 WCK23 A12 TDO B2 VSSQ VDDQ E1
IN IN
H2 TMS C10 VSSQ VDDQ E11
FBVDDQ C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
R78 E10 E4
549ohm VSSQ VDDQ
E5 VSSQ VDDQ F10
1%
0402
F13 VSSQ VDDQ F5
COMMON {11} F2 VSSQ VDDQ G13
OUT
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
1G1D1S 3 FBC_VREFC K13 VREFC N10 VSSQ VDDQ H3
D Q8 N5 J13
0.300 0.140A VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page10_i588 R74 121ohm FBC_ZQ_1 H13 P13 J2
SOT323_1G1D1S R75 R79 C78 ZQ VSSQ VDDQ
{5,7,12,15,17,27}
GPIO10_FBVREF_SEL 1G COMMON
0402 1% COMMON P2 VSSQ VDDQ L13
IN 1.33k 931ohm 820pF
S 2 R10 VSSQ VDDQ L2
1% 1% 50V
30V
0402 0402
R5 VSSQ VDDQ M12
10%
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V COMMON COMMON X7R T13 VSSQ VDDQ M3
1.2A
0.2W 0402 T2 VSSQ VDDQ N13
12V
AO3416L COMMON U10 VSSQ VDDQ N2
SOT23
U5 VSSQ VDDQ P10
V13 VSSQ VDDQ P5
GND GND GND GND V2 VSSQ VDDQ R1
VDDQ R11
FBC_VREF_Q
VDDQ R13
3 0.300 GND VDDQ R14 3
VDDQ R2
VDDQ R4
VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 4
C271 C272
1uF 1uF
FBVDDQ
6.3V 6.3V
CLOSE DRAM 10% 10%
X6S X6S
0402 0402
C948 C1003 C888 C1089 C1001 C890 C1000 C883 C921 C999 C1002 C982 C915 C914 COMMON COMMON
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C881 C939 C924 C1005 C937 C916 C880 C952 C886 C945 C884 C837 C838 C852 C864
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBC_DBI[7..0] FBC_EDC[7..0]
{9,11} OUT
FBC_DBI0
{9,11} OUT
FBC_EDC0
0 0
FBC_DBI1 FBC_EDC1
1 1
FBC_DBI2 FBC_EDC2
2
FBC_DBI3
2
FBC_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBC_DBI4 FBC_EDC4 Page Name:
4 4
FBC_DBI5 FBC_EDC5
5
FBC_DBI6
5
FBC_EDC6
MEMORY: FBC Partition 31..0
6 6
FBC_DBI7 FBC_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBC PARTITION[31:0] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 10 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page11: MEMORY: FBC Partition 63..32

M8C
FBC_CMD[31..0]
{9,10} IN @memory.u_mem_gddr5x_x32(sym_6):page11_i521
M8B BGA190
@memory.u_mem_gddr5x_x32(sym_5):page11_i493 COMMON
BGA190
FBC_D[63..32]
{9} BI
COMMON
Normal FBVDDQ

FBC_CMD18 H4 RAS W12 MF


18
1
FBC_CMD16 M4 CAS add 1k to VSS 1
16
FBC_CMD31 M11 A10 A1
M8D M8A 31 WE VSS VDD
A5 VSS VDD A11
@memory.u_mem_gddr5x_x32(sym_1):page11_i466 @memory.u_mem_gddr5x_x32(sym_3):page11_i498
BGA190 BGA190 B1 VSS VDD A14
COMMON COMMON FBC_CMD22 K4 ABI B14 VSS VDD A4
22
D1 VSS VDD D10
NORMAL NORMAL FBC_CMD20 J4 D11 G1
20 A0_A10 VSS VDD
FBC_D32 B4 DQ0
FBC_D48 V11 DQ16
FBC_CMD19 J5 A1_A9 D14 VSS VDD G14
32 48 19
FBC_D33 B3 DQ1
FBC_D49 V12 DQ17
FBC_CMD28 J11 A2_BA0 F1 VSS VDD H10
33 49 28
FBC_D34 C4 DQ2 FBC_D50 U11 DQ18 FBC_CMD27 J10 A3_BA3 F14 VSS VDD H5
34 50 27
FBC_D35 C3 DQ3
FBC_D51 U12 DQ19
FBC_CMD25 L11 A4_BA2 H1 VSS VDD J1
35 51 25
FBC_D36 F4 FBC_D52 P11 FBC_CMD26 L10 H14 J14
36 DQ4 52 DQ20 26 A5_BA1 VSS VDD
FBC_D37 F3 DQ5
FBC_D53 P12 DQ21
FBC_CMD23 L5 A6_A11 J12 VSS VDD L1
37 53 23
FBC_D38 G4 DQ6
FBC_D54 N11 DQ22
FBC_CMD24 L4 A7_A8 J3 VSS VDD L14
38 54 24
FBC_D39 G3 DQ7 FBC_D55 N12 DQ23 FBC_CMD21 K5 A12_A13 K1 VSS VDD M10
39 55 21
FBC_CMD30 K12 A15_A14 K14 VSS VDD M5
30
FBC_EDC4 D3 FBC_EDC6 T12 K3 N1
EDC0 EDC2 VSS VDD
FBC_DBI4 E3 DBI0
FBC_DBI6 R12 DBI2 L12 VSS VDD N14
L3 VSS VDD T10
M1 VSS VDD W1
x32 x16 x32 x16 FBC_CMD17 K2 RESET M14 VSS VDD W11
17
FBC_D40 B11 FBC_D56 V4 FBC_CMD29 H11 P1 W14
40 DQ8 NC 56 DQ24 NC 29 CKE VSS VDD
FBC_D41 B12 DQ9 NC
FBC_D57 V3 DQ25 NC
P14 VSS VDD W4
41 57
FBC_D42 C11 DQ10 NC
FBC_D58 U4 DQ26 NC {9}
FBC_CLK1 K11 CLK T1 VSS
42 58 IN
FBC_D43 C12 DQ11 NC
FBC_D59 U3 DQ27 NC {9}
FBC_CLK1* K10 CLK T11 VSS
43 59 IN
FBC_D44 F11 DQ12 NC
FBC_D60 P4 DQ28 NC
T14 VSS VDDQ A13
44 60
FBC_D45 F12 FBC_D61 P3 V1 A2
45 DQ13 NC 61 DQ29 NC VSS VDDQ
FBC_D46 G11 DQ14 NC
FBC_D62 N4 DQ30 NC
V14 VSS VDDQ B10
46 62
FBC_D47 G12 DQ15 NC
FBC_D63 N3 DQ31 NC
W10 VSS VDDQ B5
47 63
2
W5 VSS VDDQ C1 2
FBC_EDC5 D12 EDC1
FBC_EDC7 T3 EDC3 NC VDDQ C13
GND
FBC_DBI5 E12 FBC_DBI7 R3 C14
DBI1 NC DBI3 NC VDDQ
M2 TCK B13 VSSQ VDDQ C2
{9}
FBC_WCK45 D4 WCK01 {9}
FBC_WCK67 T4 WCK23 M13 TDI B2 VSSQ VDDQ E1
IN IN
{9}
FBC_WCK45* D5 WCK01 {9}
FBC_WCK67* T5 WCK23 A12 TDO C10 VSSQ VDDQ E11
IN IN
H2 TMS C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
F2 VSSQ VDDQ G13
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
{10}
FBC_VREFC K13 VREFC N5 VSSQ VDDQ J13
IN
P13 VSSQ VDDQ J2
R82 121ohm FBC_ZQ_2 H13 P2 L13
C82 ZQ VSSQ VDDQ
0402 1% COMMON R10 VSSQ VDDQ L2
820pF
R5 VSSQ VDDQ M12
50V
T13 VSSQ VDDQ M3
10%
X7R T2 VSSQ VDDQ N13
0402 U10 VSSQ VDDQ N2
COMMON U5 VSSQ VDDQ P10
V13 VSSQ VDDQ P5
V2 VSSQ VDDQ R1
GND GND VDDQ R11
VDDQ R13
VDDQ R14
3 VDDQ R2 3
VDDQ R4
GND VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

C273 C274
1uF 1uF
4 6.3V 6.3V 4
10% 10%
X6S X6S
FBVDDQ 0402 0402
COMMON COMMON
CLOSE DRAM

C849 C841 C840 C836 C868 C850 C844 C874 C851 C835 C871 C870 C839 C843
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S GND
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C846 C831 C832 C833 C873 C867 C869 C842 C834 C847 C845 C887 C983 C962 C899
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBC_DBI[7..0] FBC_EDC[7..0]
{9,10} OUT
FBC_DBI0
{9,10} OUT
FBC_EDC0
0 0
FBC_DBI1 FBC_EDC1
1 1
FBC_DBI2 FBC_EDC2
2
FBC_DBI3
2
FBC_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBC_DBI4 FBC_EDC4 Page Name:
4 4
FBC_DBI5 FBC_EDC5
5
FBC_DBI6
5
FBC_EDC6
MEMORY: FBC Partition 63..32
6 6
FBC_DBI7 FBC_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBC PARTITION[63:32] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 11 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page12: MEMORY: FBD Partition 31..0


FBD_D[31..0]
{9} BI

M5D M5A
M5C
@memory.u_mem_gddr5x_x32(sym_2):page12_i511 @memory.u_mem_gddr5x_x32(sym_4):page12_i550
BGA190_MIRR BGA190_MIRR @memory.u_mem_gddr5x_x32(sym_7):page12_i574
COMMON COMMON M5B BGA190_MIRR
@memory.u_mem_gddr5x_x32(sym_5):page12_i541 COMMON
FBD_CMD[31..0] FBVDDQ
MIRRORED MIRRORED {9,13} IN BGA190_MIRR
1
x32 x16 x32 x16
COMMON
Mirrored 1
FBD_D0 V4 DQ0 NC
FBD_D16 B11 DQ16 NC
FBD_CMD2 M4 RAS MF W12
0 16 2
FBD_D1 V3 DQ1 NC
FBD_D17 B12 DQ17 NC
FBD_CMD0 H4 CAS add 1k to VDD
1 17 0
FBD_D2 U4 DQ2 NC
FBD_D18 C11 DQ18 NC
FBD_CMD15 H11 WE A10 VSS VDD A1
2 18 15
FBD_D3 U3 DQ3 NC
FBD_D19 C12 DQ19 NC
A5 VSS VDD A11
3 19
FBD_D4 P4 FBD_D20 F11 B1 A14
4 DQ4 NC 20 DQ20 NC VSS VDD
FBD_D5 P3 DQ5 NC
FBD_D21 F12 DQ21 NC
FBD_CMD6 K4 ABI B14 VSS VDD A4
5 21 6
FBD_D6 N4 DQ6 NC
FBD_D22 G11 DQ22 NC
D1 VSS VDD D10
6 22
FBD_D7 N3 DQ7 NC
FBD_D23 G12 DQ23 NC
FBD_CMD4 L4 A0_A10 D11 VSS VDD G1
7 23 4
FBD_CMD3 L5 A1_A9 D14 VSS VDD G14
3
FBD_EDC0 T3 FBD_EDC2 D12 FBD_CMD12 L11 F1 H10
EDC0 NC EDC2 GND 12 A2_BA0 VSS VDD
FBD_DBI0 R3 DBI0 NC
FBD_DBI2 E12 DBI2 NC
FBD_CMD11 L10 A3_BA3 F14 VSS VDD H5
11
FBD_CMD9 J11 A4_BA2 H1 VSS VDD J1
9
FBD_CMD10 J10 A5_BA1 H14 VSS VDD J14
10
FBD_CMD7 J5 A6_A11 J12 VSS VDD L1
7
FBD_D8 V11 FBD_D24 B4 FBD_CMD8 J4 J3 L14
8 DQ8 24 DQ24 8 A7_A8 VSS VDD
FBD_D9 V12 DQ9
FBD_D25 B3 DQ25
FBD_CMD5 K5 A12_A13 K1 VSS VDD M10
9 25 5
FBD_D10 U11 DQ10
FBD_D26 C4 DQ26
FBD_CMD14 K12 A15_A14 K14 VSS VDD M5
10 26 14
FBD_D11 U12 DQ11 FBD_D27 C3 DQ27 K3 VSS VDD N1
11 27
FBD_D12 P11 DQ12
FBD_D28 F4 DQ28 L12 VSS VDD N14
12 28
FBD_D13 P12 FBD_D29 F3 L3 T10
13 DQ13 29 DQ29 VSS VDD
FBD_D14 N11 DQ14
FBD_D30 G4 DQ30 M1 VSS VDD W1
14 30
FBD_D15 N12 DQ15
FBD_D31 G3 DQ31
FBD_CMD1 K2 RESET M14 VSS VDD W11
15 31 1
FBD_CMD13 M11 CKE P1 VSS VDD W14
13
FBD_EDC1 T12 EDC1
FBD_EDC3 D3 EDC3 P14 VSS VDD W4
FBD_DBI1 R12 FBD_DBI3 E3 FBD_CLK0 K11 T1
DBI1 DBI3 {9} IN CLK VSS
{9}
FBD_CLK0* K10 CLK T11 VSS
IN
{9}
FBD_WCK01 T4 WCK01 {9}
FBD_WCK23 D4 WCK23 T14 VSS VDDQ A13
IN IN
2 {9}
FBD_WCK01* T5 WCK01 {9}
FBD_WCK23* D5 WCK23 V1 VSS VDDQ A2 2
IN IN
V14 VSS VDDQ B10
W10 VSS VDDQ B5
W5 VSS VDDQ C1
VDDQ C13
VDDQ C14
M2 TCK B13 VSSQ VDDQ C2
M13 TDI B2 VSSQ VDDQ E1
A12 TDO C10 VSSQ VDDQ E11
H2 TMS C5 VSSQ VDDQ E13
FBVDDQ D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
R65 E5 F10
549ohm VSSQ VDDQ
F13 VSSQ VDDQ F5
1%
0402
F2 VSSQ VDDQ G13
COMMON {13} G10 VSSQ VDDQ G2
OUT
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
1G1D1S 3 FBD_VREFC K13 VREFC N5 VSSQ VDDQ J13
D Q7 P13 J2
0.300 0.140A VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page12_i588 R61 121ohm FBD_ZQ_1 H13 P2 L13
SOT323_1G1D1S R62 R66 C74 ZQ VSSQ VDDQ
{5,7,10,15,17,27}
GPIO10_FBVREF_SEL 1G COMMON
0402 1% COMMON R10 VSSQ VDDQ L2
IN 1.33k 931ohm 820pF
S 2 R5 VSSQ VDDQ M12
1% 1% 50V
30V
AO3416L
0402 0402
T13 VSSQ VDDQ M3
10%
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V COMMON COMMON X7R T2 VSSQ VDDQ N13
1.2A
0.2W 0402 U10 VSSQ VDDQ N2
12V
COMMON U5 VSSQ VDDQ P10
SOT23
V13 VSSQ VDDQ P5
V2 VSSQ VDDQ R1
3 GND GND GND GND VDDQ R11 3
VDDQ R13
FBD_VREF_Q R14
GND VDDQ
0.300 VDDQ R2
VDDQ R4
VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 C275 C284 4
1uF 1uF
6.3V 6.3V
FBVDDQ
10% 10%
CLOSE DRAM X6S X6S
0402 0402
COMMON COMMON
C1217 C1212 C1210 C1220 C1175 C1197 C1194 C1218 C1214 C1208 C1207 C1215 C1176 C1219
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C1173 C1221 C1181 C1201 C1180 C1200 C1216 C1174 C1209 C1196 C1195 C1046 C1045 C1112 C1149
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBD_DBI[7..0] FBD_EDC[7..0]
{9,13} OUT
FBD_DBI0
{9,13} OUT
FBD_EDC0
0 0
FBD_DBI1 FBD_EDC1
1 1
FBD_DBI2 FBD_EDC2
2
FBD_DBI3
2
FBD_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBD_DBI4 FBD_EDC4 Page Name:
4 4
FBD_DBI5 FBD_EDC5
5
FBD_DBI6
5
FBD_EDC6
MEMORY: FBD Partition 31..0
6 6
FBD_DBI7 FBD_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBD PARTITION[31:0] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 12 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page13: MEMORY: FBD Partition 63..32

FBD_D[63..32]
{9} BI M6C
FBD_CMD[31..0]
{9,12} IN @memory.u_mem_gddr5x_x32(sym_6):page13_i521
M6B BGA190
1 @memory.u_mem_gddr5x_x32(sym_5):page13_i496 COMMON 1
M6D M6A BGA190

@memory.u_mem_gddr5x_x32(sym_1):page13_i466
BGA190
@memory.u_mem_gddr5x_x32(sym_3):page13_i500
BGA190
COMMON
Normal FBVDDQ

COMMON COMMON FBD_CMD18 H4 RAS W12 MF


18
FBD_CMD16 M4 CAS add 1k to VSS
NORMAL NORMAL 16
FBD_CMD31 M11 A10 A1
31 WE VSS VDD
FBD_D32 B4 DQ0
FBD_D48 V11 DQ16 A5 VSS VDD A11
32 48
FBD_D33 B3 DQ1
FBD_D49 V12 DQ17 B1 VSS VDD A14
33 49
FBD_D34 C4 DQ2 FBD_D50 U11 DQ18 FBD_CMD22 K4 ABI B14 VSS VDD A4
34 50 22
FBD_D35 C3 DQ3
FBD_D51 U12 DQ19 D1 VSS VDD D10
35 51
FBD_D36 F4 FBD_D52 P11 FBD_CMD20 J4 D11 G1
36 DQ4 52 DQ20 20 A0_A10 VSS VDD
FBD_D37 F3 DQ5
FBD_D53 P12 DQ21
FBD_CMD19 J5 A1_A9 D14 VSS VDD G14
37 53 19
FBD_D38 G4 DQ6
FBD_D54 N11 DQ22
FBD_CMD28 J11 A2_BA0 F1 VSS VDD H10
38 54 28
FBD_D39 G3 DQ7 FBD_D55 N12 DQ23 FBD_CMD27 J10 A3_BA3 F14 VSS VDD H5
39 55 27
FBD_CMD25 L11 A4_BA2 H1 VSS VDD J1
25
FBD_EDC4 D3 FBD_EDC6 T12 FBD_CMD26 L10 H14 J14
EDC0 EDC2 26 A5_BA1 VSS VDD
FBD_DBI4 E3 DBI0
FBD_DBI6 R12 DBI2
FBD_CMD23 L5 A6_A11 J12 VSS VDD L1
23
FBD_CMD24 L4 A7_A8 J3 VSS VDD L14
24
FBD_CMD21 K5 A12_A13 K1 VSS VDD M10
21
x32 x16 x32 x16 FBD_CMD30 K12 A15_A14 K14 VSS VDD M5
30
FBD_D40 B11 FBD_D56 V4 K3 N1
40 DQ8 NC 56 DQ24 NC VSS VDD
FBD_D41 B12 DQ9 NC
FBD_D57 V3 DQ25 NC
L12 VSS VDD N14
41 57
FBD_D42 C11 DQ10 NC
FBD_D58 U4 DQ26 NC
L3 VSS VDD T10
42 58
FBD_D43 C12 DQ11 NC
FBD_D59 U3 DQ27 NC
M1 VSS VDD W1
43 59
FBD_D44 F11 DQ12 NC
FBD_D60 P4 DQ28 NC
FBD_CMD17 K2 RESET M14 VSS VDD W11
44 60 17
FBD_D45 F12 FBD_D61 P3 FBD_CMD29 H11 P1 W14
45 DQ13 NC 61 DQ29 NC 29 CKE VSS VDD
FBD_D46 G11 DQ14 NC
FBD_D62 N4 DQ30 NC
P14 VSS VDD W4
46 62
FBD_D47 G12 DQ15 NC
FBD_D63 N3 DQ31 NC {9}
FBD_CLK1 K11 CLK T1 VSS
47 63 IN
2 {9}
FBD_CLK1* K10 CLK T11 VSS 2
IN
FBD_EDC5 D12 EDC1
FBD_EDC7 T3 EDC3 NC
T14 VSS VDDQ A13
GND
FBD_DBI5 E12 FBD_DBI7 R3 V1 A2
DBI1 NC DBI3 NC VSS VDDQ
V14 VSS VDDQ B10
{9}
FBD_WCK45 D4 WCK01 {9}
FBD_WCK67 T4 WCK23 W10 VSS VDDQ B5
IN IN
{9}
FBD_WCK45* D5 WCK01 {9}
FBD_WCK67* T5 WCK23 W5 VSS VDDQ C1
IN IN
VDDQ C13
VDDQ C14
M2 TCK B13 VSSQ VDDQ C2
M13 TDI B2 VSSQ VDDQ E1
A12 TDO C10 VSSQ VDDQ E11
H2 TMS C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
F2 VSSQ VDDQ G13
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
{12}
FBD_VREFC K13 VREFC N5 VSSQ VDDQ J13
IN
P13 VSSQ VDDQ J2
R69 121ohm FBD_ZQ_2 H13 P2 L13
C77 ZQ VSSQ VDDQ
0402 1% COMMON R10 VSSQ VDDQ L2
820pF
R5 VSSQ VDDQ M12
50V
T13 VSSQ VDDQ M3
10%
X7R T2 VSSQ VDDQ N13
0402 U10 VSSQ VDDQ N2
COMMON U5 VSSQ VDDQ P10
3
V13 VSSQ VDDQ P5 3
V2 VSSQ VDDQ R1
GND GND VDDQ R11
VDDQ R13
VDDQ R14
VDDQ R2
VDDQ R4
GND VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 4

FBVDDQ
CLOSE DRAM C276 C277
1uF 1uF
C1118 C1068 C1165 C1081 C1163 C1026 C1047 C1086 C1079 C1182 C1162 C1164 C1160 C1103 6.3V 6.3V
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10% 10%
X6S X6S
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
0402 0402
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
COMMON COMMON
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND
FBVDDQ FBVDDQ GND
AROUND DRAM UNDER DRAM FOR X32

C1166 C1168 C1027 C1109 C1024 C1025 C1102 C1034 C1155 C1108 C1104 C1183 C1179 C1213 C1211
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBD_DBI[7..0] FBD_EDC[7..0]
{9,12} OUT
FBD_DBI0
{9,12} OUT
FBD_EDC0
0 0
FBD_DBI1 FBD_EDC1
1 1
FBD_DBI2 FBD_EDC2
2 2
FBD_DBI3 FBD_EDC3
3
FBD_DBI4
3
FBD_EDC4
Galaxy Microsystems (HK) Ltd.
4 4
FBD_DBI5 FBD_EDC5 Page Name:
5 5
FBD_DBI6 FBD_EDC6
6
FBD_DBI7
6
FBD_EDC7
MEMORY: FBD Partition 63..32
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL MEMORY: FBD PARTITION[63:32] Custom Neston V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P25Z
Date: Friday, March 03, 2017 Sheet 13 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page14: MEMORY: GPU Partition E/F

G1F G1G
1 @digital.u_gpu_gb3c_384(sym_6):page14_i599 @digital.u_gpu_gb3c_384(sym_7):page14_i600 1
BGA2397 BGA2397
COMMON COMMON
FB_DATA FB_CMD FB_DATA FB_CMD
FBE_D[63..0] 6/24 FBE FBE_CMD[31..0] FBF_D[63..0] 7/24 FBF FBF_CMD[31..0]
{15,16} BI BI {17,18} {15,16} BI OUT {17,18}
FBE_D0 AF11 FBE_D0 FBE_CMD0 W1 FBE_CMD0 FBF_D0 BH2 FBF_D0 FBF_CMD0 BF1 FBF_CMD0
0 0 0 0
FBE_D1 AF8 V2 FBE_CMD1 FBF_D1 BH4 BF2 FBF_CMD1
1 FBE_D1 FBE_CMD1 1 1 FBF_D1 FBF_CMD1 1
FBE_D2 AF10 FBE_D2 FBE_CMD2 V1 FBE_CMD2 FBF_D2 BH1 FBF_D2 FBF_CMD2 BE3 FBF_CMD2
2 2 2 2
FBE_D3 AF9 FBE_D3 FBE_CMD3 V3 FBE_CMD3 GDDR5X CMD Mapping FBF_D3 BH3 FBF_D3 FBF_CMD3 BD3 FBF_CMD3
3 3 3 3
FBE_D4 AF4 FBE_D4 FBE_CMD4 U2 FBE_CMD4 FBF_D4 BK3 FBF_D4 FBF_CMD4 BD2 FBF_CMD4
4 4 CMD 0..31 32..63 4 4
FBE_D5 AF3 FBE_D5 FBE_CMD5 U3 FBE_CMD5 FBF_D5 BK1 FBF_D5 FBF_CMD5 BD1 FBF_CMD5
5 5 5 5
FBE_D6 AF1 T2 FBE_CMD6 FBF_D6 BL2 BC2 FBF_CMD6
6 FBE_D6 FBE_CMD6 6 6 FBF_D6 FBF_CMD6 6
CMD0 CAS*
FBE_D7 AF2 FBE_D7 FBE_CMD7 T1 FBE_CMD7 FBF_D7 BK2 FBF_D7 FBF_CMD7 BB3 FBF_CMD7
7 7 CMD1 RST* 7 7
FBE_D8 AD3 FBE_D8 FBE_CMD8 R3 FBE_CMD8 FBF_D8 BF5 FBF_D8 FBF_CMD8 BB1 FBF_CMD8
8 8 CMD2 RAS* 8 8
FBE_D9 AD1 FBE_D9 FBE_CMD9 R2 FBE_CMD9 FBF_D9 BE7 FBF_D9 FBF_CMD9 BB2 FBF_CMD9
9 9 CMD3 A1_A9 9 9
FBE_D10 AD4 FBE_D10 FBE_CMD10 P1 FBE_CMD10 FBF_D10 BF4 FBF_D10 FBF_CMD10 BA3 FBF_CMD10
10 10 CMD4 A0_A10 10 10
FBE_D11 AD2 V6 FBE_CMD11 FBF_D11 BE6 AU6 FBF_CMD11
11 FBE_D11 FBE_CMD11 11 11 FBF_D11 FBF_CMD11 11
CMD5 A12_A13
FBE_D12 AD7 FBE_D12 FBE_CMD12 V4 FBE_CMD12 FBF_D12 BG3 FBF_D12 FBF_CMD12 AU4 FBF_CMD12
12 12 CMD6 ABI* 12 12
FBE_D13 AE7 FBE_D13 FBE_CMD13 V7 FBE_CMD13 FBF_D13 BG4 FBF_D13 FBF_CMD13 AU7 FBF_CMD13
13 13 CMD7 A6_A11 13 13
FBE_D14 AD9 FBE_D14 FBE_CMD14 V8 FBE_CMD14 FBF_D14 BG6 FBF_D14 FBF_CMD14 AU8 FBF_CMD14
14 14 CMD8 A7_A8 14 14
FBE_D15 AE8 FBE_D15 FBE_CMD15 V9 FBE_CMD15 FBF_D15 BF3 FBF_D15 FBF_CMD15 AU9 FBF_CMD15
15 15 CMD9 A4_BA2 15 15
FBE_D16 Y2 H1 FBE_CMD16 FBF_D16 AW5 AR1 FBF_CMD16
16 FBE_D16 FBE_CMD16 16 16 FBF_D16 FBF_CMD16 16
CMD10 A5_BA1
FBE_D17 Y1 FBE_D17 FBE_CMD17 H2 FBE_CMD17 FBF_D17 AW4 FBF_D17 FBF_CMD17 AT2 FBF_CMD17
17 17 CMD11 A3_BA3 17 17
FBE_D18 Y4 FBE_D18 FBE_CMD18 J3 FBE_CMD18 FBF_D18 AW7 FBF_D18 FBF_CMD18 AT1 FBF_CMD18
18 18 CMD12 A2_BA0 18 18
FBE_D19 Y3 FBE_D19 FBE_CMD19 K3 FBE_CMD19 FBF_D19 AW6 FBF_D19 FBF_CMD19 AT3 FBF_CMD19
19 19 CMD13 CKE* 19 19
FBE_D20 Y8 FBE_D20 FBE_CMD20 K2 FBE_CMD20 FBF_D20 BA5 FBF_D20 FBF_CMD20 AU2 FBF_CMD20
20 20 CMD14 A14_A15 20 20
FBE_D21 Y9 K1 FBE_CMD21 FBF_D21 BB5 AU3 FBF_CMD21
21 FBE_D21 FBE_CMD21 21 21 FBF_D21 FBF_CMD21 21
CMD15 WE*
FBE_D22 Y11 FBE_D22 FBE_CMD22 L2 FBE_CMD22 FBF_D22 BA7 FBF_D22 FBF_CMD22 AV2 FBF_CMD22
22 22 CMD16 CAS* 22 22
FBE_D23 Y10 FBE_D23 FBE_CMD23 M3 FBE_CMD23 FBF_D23 AY7 FBF_D23 FBF_CMD23 AV1 FBF_CMD23
23 23 CMD17 RST* 23 23
2
FBE_D24 AA8 FBE_D24 FBE_CMD24 M1 FBE_CMD24 FBF_D24 AW11 FBF_D24 FBF_CMD24 AW3 FBF_CMD24
2
24 24 CMD18 RAS* 24 24
FBE_D25 AA7 FBE_D25 FBE_CMD25 M2 FBE_CMD25 FBF_D25 BA11 FBF_D25 FBF_CMD25 AW2 FBF_CMD25
25 25 CMD19 A1_A9 25 25
FBE_D26 AB9 N3 FBE_CMD26 FBF_D26 AW10 AY1 FBF_CMD26
26 FBE_D26 FBE_CMD26 26 26 FBF_D26 FBF_CMD26 26
CMD20 A0_A10
FBE_D27 AB7 FBE_D27 FBE_CMD27 U6 FBE_CMD27 FBF_D27 AY10 FBF_D27 FBF_CMD27 AT6 FBF_CMD27
27 27 CMD21 A12_A13 27 27
FBE_D28 AB4 FBE_D28 FBE_CMD28 U4 FBE_CMD28 FBF_D28 BB8 FBF_D28 FBF_CMD28 AT4 FBF_CMD28
28 28 CMD22 ABI* 28 28
FBE_D29 AB2 FBE_D29 FBE_CMD29 U7 FBE_CMD29 FBF_D29 BB10 FBF_D29 FBF_CMD29 AT7 FBF_CMD29
29 29 CMD23 A6_A11 29 29
FBE_D30 AB3 FBE_D30 FBE_CMD30 U8 FBE_CMD30 FBF_D30 BA10 FBF_D30 FBF_CMD30 AT8 FBF_CMD30
30 30 CMD24 A7_A8 30 30
FBE_D31 AB1 U9 FBE_CMD31 FBVDDQ FBF_D31 BB11 AT9 FBF_CMD31 FBVDDQ
31 FBE_D31 FBE_CMD31 31 31 FBF_D31 FBF_CMD31 31
CMD25 A4_BA2
FBE_D32 F2 FBE_D32 FBE_CMD32 P2 FBF_D32 AH11 FBF_D32 FBF_CMD32 AY3
32 CMD26 A5_BA1 32
FBE_D33 F4 FBE_D33 FBE_CMD33 P3 FBF_D33 AH8 FBF_D33 FBF_CMD33 AY2
33 33
FBE_D34 F1 FBE_D34 FBE_CMD34 V5 FBE_DEBUG0 R871 60.4ohm/NC CMD27 A3_BA3 FBF_D34 AH10 FBF_D34 FBF_CMD34 AU5 FBF_DEBUG0 R872 60.4ohm/NC
34 34
FBE_D35 F3 U5 FBE_DEBUG1 0402 COMMON R870 60.4ohm/NC CMD28 A2_BA0 FBF_D35 AH9 AT5 FBF_DEBUG1 0402 COMMON R873 60.4ohm/NC
35 FBE_D35 FBE_CMD35 1%
35 FBF_D35 FBF_CMD35 1%
FBE_D36 CMD29 CKE*
D3 FBE_D36 0402 1% COMMON FBF_D36 AH4 FBF_D36 0402 1% COMMON
36 CMD30 A14_A15 36
FBE_D37 D1 FBE_D37
FBF_D37 AH3 FBF_D37
37 CMD31 WE* 37
FBE_D38 C2 FBE_D38
FBF_D38 AH1 FBF_D38
38 CMD32 38
FBE_D39 D2 FBE_D39 FBF_D39 AH2 FBF_D39
39 CMD33 39
FBE_D40 H5 FBE_D40
FBF_D40 AK3 FBF_D40
40 CMD34 DBG0 DBG0 40
FBE_D41 J7 FBF_D41 AK1
41 FBE_D41 41 FBF_D41
CMD35 DBG1 DBG1
FBE_D42 H4 FBE_D42
FBF_D42 AK4 FBF_D42
42 42
FBE_D43 J6 FBE_D43
FBF_D43 AK2 FBF_D43
43 43
FBE_D44 G3 FBE_D44 FBE_CLK0 V11 FBE_CLK0 FBE_CLK0 FB_CLK {15}
FBF_D44 AK7 FBF_D44 FBF_CLK0 AU11 FBF_CLK0 FBF_CLK0 FB_CLK {17}
44 OUT 44 OUT
FBE_D45 G4 FBE_D45 FBE_CLK0 V10 FBE_CLK0* FBE_CLK0 FB_CLK {15}
FBF_D45 AJ7 FBF_D45 FBF_CLK0 AU10 FBF_CLK0* FBF_CLK0 FB_CLK {17}
45 OUT 45 OUT
FBE_D46 G6 U11 FBE_CLK1 FBF_D46 AK9 AT11 FBF_CLK1
46 FBE_D46 FBE_CLK1 FBE_CLK1 FB_CLK
OUT {16} 46 FBF_D46 FBF_CLK1 FBF_CLK1 FB_CLK
OUT {18}
FBE_D47 H3 FBE_D47 FBE_CLK1 U10 FBE_CLK1* FBE_CLK1 FB_CLK {16}
FBF_D47 AJ8 FBF_D47 FBF_CLK1 AT10 FBF_CLK1* FBF_CLK1 FB_CLK {18}
47 OUT 47 OUT
FBE_D48 R5 FBE_D48
FBF_D48 AP2 FBF_D48
48 48
FBE_D49 R4 FBE_D49 FBF_D49 AP1 FBF_D49
49 49
FBE_D50 R7 FBE_D50
FBF_D50 AP4 FBF_D50
50 50
FBE_D51 R6 FBF_D51 AP3
51 FBE_D51 51 FBF_D51
FBE_D52 N5 FBE_D52
FBF_D52 AP8 FBF_D52
52 52
FBE_D53 M5 FBE_D53
FBF_D53 AP9 FBF_D53
53 53
3
FBE_D54 N7 FBE_D54 FBF_D54 AP11 FBF_D54 3
54 54
FBE_D55 P7 FBE_D55
FBF_D55 AP10 FBF_D55
55 55
FBE_D56 R11 AD10 FBE_WCK01 FBF_D56 AN8 BC5 FBF_WCK01
56 FBE_D56 FBE_WCK01 FBE_WCK01 FB_WCK
OUT {15} 56 FBF_D56 FBF_WCK01 FBF_WCK01 FB_WCK
OUT {17}
FBE_D57 N11 FBE_D57 FBE_WCK01 AD11 FBE_WCK01* FBE_WCK01 FB_WCK {15}
FBF_D57 AN7 FBF_D57 FBF_WCK01 BC4 FBF_WCK01* FBF_WCK01 FB_WCK {17}
57 OUT 57 OUT
FBE_D58 R10 FBE_D58 FBE_WCKB01 AE11 FBF_D58 AM9 FBF_D58 FBF_WCKB01 BC7
58 58
FBE_D59 P10 FBE_D59 FBE_WCKB01 AE10 FBF_D59 AM7 FBF_D59 FBF_WCKB01 BC6
59 59
FBE_D60 M8 FBE_D60 FBE_WCK23 AB11 FBE_WCK23 FBE_WCK23 FB_WCK {15}
FBF_D60 AM4 FBF_D60 FBF_WCK23 BD8 FBF_WCK23 FBF_WCK23 FB_WCK {17}
60 OUT 60 OUT
FBE_D61 M10 AB10 FBE_WCK23* FBF_D61 AM2 BC8 FBF_WCK23*
61 FBE_D61 FBE_WCK23 FBE_WCK23 FB_WCK
OUT {15} 61 FBF_D61 FBF_WCK23 FBF_WCK23 FB_WCK
OUT {17}
FBE_D62 N10 FBE_D62 FBE_WCKB23 AA11 FBF_D62 AM3 FBF_D62 FBF_WCKB23 BC9
62 62
FBE_D63 M11 FBE_D63 FBE_WCKB23 AA10 FBF_D63 AM1 FBF_D63 FBF_WCKB23 BC10
63 63
FB_DBI FBE_WCK45 L5 FBE_WCK45 FBE_WCK45 FB_WCK {16} FB_DBI FBF_WCK45 AK10 FBF_WCK45 FBF_WCK45 FB_WCK {18}
OUT OUT
{15,16}
FBE_DBI[7..0] FBE_WCK45 L4 FBE_WCK45* FBE_WCK45 FB_WCK {16} {17,18}
FBF_DBI[7..0] FBF_WCK45 AK11 FBF_WCK45* FBF_WCK45 FB_WCK {18}
IN OUT IN OUT
FBE_DBI0 AF5 L7 FBF_DBI0 BJ3 AJ11
0 FBE_DQM0 FBE_WCKB45 0 FBF_DQM0 FBF_WCKB45
FBE_DBI1 AD5 FBE_DQM1 FBE_WCKB45 L6 FBF_DBI1 BG1 FBF_DQM1 FBF_WCKB45 AJ10
1 1
FBE_DBI2 Y7 FBE_DQM2 FBE_WCK67 L8 FBE_WCK67
FBE_WCK67 FB_WCK {16}
FBF_DBI2 BA4 FBF_DQM2 FBF_WCK67 AM11 FBF_WCK67
FBF_WCK67 FB_WCK {18}
2 OUT 2 OUT
FBE_DBI3 AB5 FBE_DQM3 FBE_WCK67 K8 FBE_WCK67* FBE_WCK67 FB_WCK {16}
FBF_DBI3 BB7 FBF_DQM3 FBF_WCK67 AM10 FBF_WCK67* FBF_WCK67 FB_WCK {18}
3 OUT 3 OUT
FBE_DBI4 E3 FBE_DQM4 FBE_WCKB67 L10 FBF_DBI4 AH5 FBF_DQM4 FBF_WCKB67 AN11
4 4
FBE_DBI5 G1 L9 FBF_DBI5 AK5 AN10
5 FBE_DQM5 FBE_WCKB67 5 FBF_DQM5 FBF_WCKB67
FBE_DBI6 N4 FBE_DQM6
FBF_DBI6 AP7 FBF_DQM6
6 6
FBE_DBI7 M7 FBE_DQM7
FBF_DBI7 AM5 FBF_DQM7
7 7
FB_EDC FB_EDC
FBE_EDC[7..0] FBF_EDC[7..0]
{15,16} OUT
FBE_EDC0
{17,18} OUT
AF6 FBE_DQS_WP0
FBF_EDC0 BJ4 FBF_DQS_WP0
0 0
FBE_EDC1 AD6 FBE_DQS_WP1
FBF_EDC1 BF6 FBF_DQS_WP1
1 1
FBE_EDC2 Y5 FBE_DQS_WP2
FBF_EDC2 AW8 FBF_DQS_WP2
2 2
FBE_EDC3 AB6 FBE_DQS_WP3 FBF_EDC3 BB6 FBF_DQS_WP3
3 3
FBE_EDC4 E4 FBE_DQS_WP4
FBF_EDC4 AH6 FBF_DQS_WP4
4 4
FBE_EDC5 H6 AC11 1V8_FB_PLL_REF FBF_EDC5 AK6 AL11 1V8_FB_PLL_REF
5 FBE_DQS_WP5 FBE_PLL_AVDD IN {4,9,14,29} 5 FBF_DQS_WP5 FBF_PLL_AVDD IN {4,9,14,29}
FBE_EDC6 R8 FBE_DQS_WP6 FBE_PLL_AVDD AC12 FBF_EDC6 AP5 FBF_DQS_WP6 FBF_PLL_AVDD AL12
6 6
FBE_EDC7 M6 FBE_DQS_WP7 FBE_PLL_AVDD AC13 FBF_EDC7 AM6 FBF_DQS_WP7 FBF_PLL_AVDD AL13
7 7
4 4
C1152 C1151
0.1uF 0.1uF
16V 16V
10% 10%
X7R X7R
0402 0402
COMMON COMMON

FBVDDQ FBVDDQ
nv_res nv_res nv_res nv_res GND
GND

R337 R359 R340 R342


10k 10k 10k 10k
5% 5% 5% 5%
0402 0402 0402 0402
COMMON COMMON COMMON COMMON
FBE_CMD13 FBF_CMD13
FBE_CMD29 FBF_CMD29

FBE_CMD1 nv_res nv_res


FBF_CMD1 nv_res nv_res
FBE_CMD17 FBF_CMD17

R338 R339 R341 R343


10k 10k 10k 10k
5% 5% 5% 5%
0402 0402 0402 0402
COMMON COMMON COMMON COMMON

5 5
GND GND

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: GPU Partition E/F
Size Project Name: Design By: Rev
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: GPU PARTITION E/F P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 14 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page15: MEMORY: FBE Partition 31..0

FBE_D[31..0] M2C
{14} BI @memory.u_mem_gddr5x_x32(sym_7):page15_i573
BGA190_MIRR

M2A COMMON
1 M2D M2B FBVDDQ
1
@memory.u_mem_gddr5x_x32(sym_2):page15_i510
BGA190_MIRR
@memory.u_mem_gddr5x_x32(sym_4):page15_i546
BGA190_MIRR FBE_CMD[31..0]
@memory.u_mem_gddr5x_x32(sym_5):page15_i571 Mirrored
COMMON COMMON {14,16} IN BGA190_MIRR
COMMON MF W12
add 1k to VDD
MIRRORED MIRRORED
FBE_CMD2 M4 RAS A10 VSS VDD A1
2
x32 x16 x32 x16 FBE_CMD0 H4 A5 A11
0 CAS VSS VDD
FBE_D0 V4 DQ0 NC
FBE_D16 B11 DQ16 NC
FBE_CMD15 H11 WE B1 VSS VDD A14
0 16 15
FBE_D1 V3 DQ1 NC
FBE_D17 B12 DQ17 NC
B14 VSS VDD A4
1 17
FBE_D2 U4 DQ2 NC
FBE_D18 C11 DQ18 NC
D1 VSS VDD D10
2 18
FBE_D3 U3 DQ3 NC
FBE_D19 C12 DQ19 NC
FBE_CMD6 K4 ABI D11 VSS VDD G1
3 19 6
FBE_D4 P4 FBE_D20 F11 D14 G14
4 DQ4 NC 20 DQ20 NC VSS VDD
FBE_D5 P3 DQ5 NC
FBE_D21 F12 DQ21 NC
FBE_CMD4 L4 A0_A10 F1 VSS VDD H10
5 21 4
FBE_D6 N4 DQ6 NC
FBE_D22 G11 DQ22 NC
FBE_CMD3 L5 A1_A9 F14 VSS VDD H5
6 22 3
FBE_D7 N3 DQ7 NC
FBE_D23 G12 DQ23 NC
FBE_CMD12 L11 A2_BA0 H1 VSS VDD J1
7 23 12
FBE_CMD11 L10 A3_BA3 H14 VSS VDD J14
11
FBE_EDC0 T3 FBE_EDC2 D12 FBE_CMD9 J11 J12 L1
EDC0 NC EDC2 GND 9 A4_BA2 VSS VDD
FBE_DBI0 R3 DBI0 NC
FBE_DBI2 E12 DBI2 NC
FBE_CMD10 J10 A5_BA1 J3 VSS VDD L14
10
FBE_CMD7 J5 A6_A11 K1 VSS VDD M10
7
FBE_CMD8 J4 A7_A8 K14 VSS VDD M5
8
FBE_CMD5 K5 A12_A13 K3 VSS VDD N1
5
FBE_D8 V11 FBE_D24 B4 FBE_CMD14 K12 L12 N14
8 DQ8 24 DQ24 14 A15_A14 VSS VDD
FBE_D9 V12 DQ9
FBE_D25 B3 DQ25 L3 VSS VDD T10
9 25
FBE_D10 U11 DQ10
FBE_D26 C4 DQ26 M1 VSS VDD W1
10 26
FBE_D11 U12 DQ11 FBE_D27 C3 DQ27 M14 VSS VDD W11
11 27
FBE_D12 P11 DQ12
FBE_D28 F4 DQ28 P1 VSS VDD W14
12 28
FBE_D13 P12 FBE_D29 F3 FBE_CMD1 K2 P14 W4
13 DQ13 29 DQ29 1 RESET VSS VDD
FBE_D14 N11 DQ14
FBE_D30 G4 DQ30
FBE_CMD13 M11 CKE T1 VSS
14 30 13
FBE_D15 N12 DQ15
FBE_D31 G3 DQ31 T11 VSS
15 31
2 {14}
FBE_CLK0 K11 CLK T14 VSS VDDQ A13 2
IN
FBE_EDC1 T12 EDC1
FBE_EDC3 D3 EDC3 {14}
FBE_CLK0* K10 CLK V1 VSS VDDQ A2
IN
FBE_DBI1 R12 FBE_DBI3 E3 V14 B10
DBI1 DBI3 VSS VDDQ
W10 VSS VDDQ B5
{14}
FBE_WCK01 T4 WCK01 {14}
FBE_WCK23 D4 WCK23 W5 VSS VDDQ C1
IN IN
{14}
FBE_WCK01* T5 WCK01 {14}
FBE_WCK23* D5 WCK23 VDDQ C13
IN IN
VDDQ C14
B13 VSSQ VDDQ C2
B2 VSSQ VDDQ E1
M2 TCK C10 VSSQ VDDQ E11
M13 TDI C5 VSSQ VDDQ E13
A12 TDO D13 VSSQ VDDQ E14
H2 TMS D2 VSSQ VDDQ E2
FBVDDQ E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
R34 F2 G13
549ohm VSSQ VDDQ
G10 VSSQ VDDQ G2
1%
0402
G5 VSSQ VDDQ H12
COMMON {16} N10 VSSQ VDDQ H3
OUT
N5 VSSQ VDDQ J13
P13 VSSQ VDDQ J2
1G1D1S 3 FBE_VREFC K13 VREFC P2 VSSQ VDDQ L13
D Q5 R10 L2
0.300 0.140A VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page15_i587 R35 121ohm FBE_ZQ_1 H13 R5 M12
SOT323_1G1D1S R39 R33 C63 ZQ VSSQ VDDQ
{5,7,10,12,17,27}
GPIO10_FBVREF_SEL 1G COMMON
0402 1% COMMON T13 VSSQ VDDQ M3
IN 1.33k 931ohm 820pF
S 2 T2 VSSQ VDDQ N13
1% 1% 50V
30V
0402 0402
U10 VSSQ VDDQ N2
10%
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V COMMON COMMON X7R U5 VSSQ VDDQ P10
1.2A
0.2W 0402 V13 VSSQ VDDQ P5
3
12V
AO3416L COMMON V2 VSSQ VDDQ R1 3
SOT23
VDDQ R11
VDDQ R13
GND GND GND GND GND VDDQ R14
VDDQ R2
FBE_VREF_Q
VDDQ R4
0.300 VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 4

C278 C279
FBVDDQ
1uF 1uF
CLOSE DRAM 6.3V 6.3V
10% 10%
X6S X6S
C1338 C1327 C1230 C1276 C1300 C1249 C1240 C1320 C1244 C1238 C1288 C1275 C1270 C1255
0402 0402
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF COMMON COMMON
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C1302 C1345 C1342 C1258 C1241 C1280 C1333 C1229 C1307 C1313 C1254 C1287 C1232 C1292 C1328
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBE_DBI[7..0] FBE_EDC[7..0]
{14,16} IN
FBE_DBI0
{14,16} IN
FBE_EDC0
0 0
FBE_DBI1 FBE_EDC1
1 1
FBE_DBI2 FBE_EDC2
2
FBE_DBI3
2
FBE_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBE_DBI4 FBE_EDC4 Page Name:
4 4
FBE_DBI5 FBE_EDC5
5
FBE_DBI6
5
FBE_EDC6
MEMORY: FBE Partition 31..0
6 6
FBE_DBI7 FBE_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBE PARTITION[31:0] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 15 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page16: MEMORY: FBE Partition 63..32

FBE_D[63..32]
{14} BI M1C
FBE_CMD[31..0]
{14,15} IN @memory.u_mem_gddr5x_x32(sym_6):page16_i522
1 M1B BGA190 1
@memory.u_mem_gddr5x_x32(sym_5):page16_i495 COMMON
M1D M1A BGA190

@memory.u_mem_gddr5x_x32(sym_1):page16_i467
BGA190
@memory.u_mem_gddr5x_x32(sym_3):page16_i501
BGA190
COMMON
Normal FBVDDQ

COMMON COMMON FBE_CMD18 H4 RAS W12 MF


18
FBE_CMD16 M4
NORMAL NORMAL 16 CAS add 1k to VSS
FBE_CMD31 M11 WE A10 VSS VDD A1
31
FBE_D32 B4 DQ0
FBE_D48 V11 DQ16 A5 VSS VDD A11
32 48
FBE_D33 B3 DQ1 FBE_D49 V12 DQ17 B1 VSS VDD A14
33 49
FBE_D34 C4 DQ2
FBE_D50 U11 DQ18
FBE_CMD22 K4 ABI B14 VSS VDD A4
34 50 22
FBE_D35 C3 FBE_D51 U12 D1 D10
35 DQ3 51 DQ19 VSS VDD
FBE_D36 F4 DQ4
FBE_D52 P11 DQ20
FBE_CMD20 J4 A0_A10 D11 VSS VDD G1
36 52 20
FBE_D37 F3 DQ5
FBE_D53 P12 DQ21
FBE_CMD19 J5 A1_A9 D14 VSS VDD G14
37 53 19
FBE_D38 G4 DQ6 FBE_D54 N11 DQ22 FBE_CMD28 J11 A2_BA0 F1 VSS VDD H10
38 54 28
FBE_D39 G3 DQ7
FBE_D55 N12 DQ23
FBE_CMD27 J10 A3_BA3 F14 VSS VDD H5
39 55 27
FBE_CMD25 L11 H1 J1
25 A4_BA2 VSS VDD
FBE_EDC4 D3 EDC0
FBE_EDC6 T12 EDC2
FBE_CMD26 L10 A5_BA1 H14 VSS VDD J14
26
FBE_DBI4 E3 DBI0
FBE_DBI6 R12 DBI2
FBE_CMD23 L5 A6_A11 J12 VSS VDD L1
23
FBE_CMD24 L4 A7_A8 J3 VSS VDD L14
24
FBE_CMD21 K5 A12_A13 K1 VSS VDD M10
21
x32 x16 x32 x16 FBE_CMD30 K12 K14 M5
30 A15_A14 VSS VDD
FBE_D40 B11 DQ8 NC
FBE_D56 V4 DQ24 NC
K3 VSS VDD N1
40 56
FBE_D41 B12 DQ9 NC
FBE_D57 V3 DQ25 NC
L12 VSS VDD N14
41 57
FBE_D42 C11 DQ10 NC
FBE_D58 U4 DQ26 NC
L3 VSS VDD T10
42 58
FBE_D43 C12 DQ11 NC
FBE_D59 U3 DQ27 NC
M1 VSS VDD W1
43 59
FBE_D44 F11 FBE_D60 P4 FBE_CMD17 K2 M14 W11
44 DQ12 NC 60 DQ28 NC 17 RESET VSS VDD
FBE_D45 F12 DQ13 NC
FBE_D61 P3 DQ29 NC
FBE_CMD29 H11 CKE P1 VSS VDD W14
45 61 29
FBE_D46 G11 DQ14 NC
FBE_D62 N4 DQ30 NC
P14 VSS VDD W4
46 62
2
FBE_D47 G12 DQ15 NC
FBE_D63 N3 DQ31 NC {14}
FBE_CLK1 K11 CLK T1 VSS 2
47 63 IN
{14}
FBE_CLK1* K10 CLK T11 VSS
IN
FBE_EDC5 D12 FBE_EDC7 T3 T14 A13
EDC1 GND EDC3 NC VSS VDDQ
FBE_DBI5 E12 DBI1 NC
FBE_DBI7 R3 DBI3 NC
V1 VSS VDDQ A2
V14 VSS VDDQ B10
{14}
FBE_WCK45 D4 WCK01 {14}
FBE_WCK67 T4 WCK23 W10 VSS VDDQ B5
IN IN
{14}
FBE_WCK45* D5 WCK01 {14}
FBE_WCK67* T5 WCK23 W5 VSS VDDQ C1
IN IN
VDDQ C13
VDDQ C14
M2 TCK B13 VSSQ VDDQ C2
M13 TDI B2 VSSQ VDDQ E1
A12 TDO C10 VSSQ VDDQ E11
H2 TMS C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
F2 VSSQ VDDQ G13
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
FBE_VREFC K13 N5 J13
{15} IN VREFC VSSQ VDDQ
P13 VSSQ VDDQ J2
R38 121ohm FBE_ZQ_2 H13 P2 L13
C61 ZQ VSSQ VDDQ
0402 1% COMMON R10 VSSQ VDDQ L2
820pF
R5 VSSQ VDDQ M12
50V
T13 VSSQ VDDQ M3
10%
X7R T2 VSSQ VDDQ N13
0402 U10 VSSQ VDDQ N2
3
COMMON U5 VSSQ VDDQ P10 3
V13 VSSQ VDDQ P5
V2 VSSQ VDDQ R1
GND GND VDDQ R11
VDDQ R13
VDDQ R14
VDDQ R2
VDDQ R4
GND VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON

4 4
C280 C281
1uF 1uF
FBVDDQ
6.3V 6.3V
CLOSE DRAM 10% 10%
X6S X6S
0402 0402
C1247 C1337 C1231 C1272 C1293 C1284 C1312 C1277 C1266 C1237 C1261 C1269 C1253 C1311 COMMON COMMON
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32

C1228 C1332 C1250 C1341 C1306 C1315 C1234 C1299 C1263 C1246 C1331 C1297 C1265 C1283 C1314
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBE_DBI[7..0] FBE_EDC[7..0]
{14,15} IN
FBE_DBI0
{14,15} IN
FBE_EDC0
0 0
FBE_DBI1 FBE_EDC1
1 1
FBE_DBI2 FBE_EDC2
2
FBE_DBI3
2
FBE_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBE_DBI4 FBE_EDC4 Page Name:
4 4
FBE_DBI5 FBE_EDC5
5
FBE_DBI6
5
FBE_EDC6
MEMORY: FBE Partition 63..32
6 6
FBE_DBI7 FBE_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBE PARTITION[63:32] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 16 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page17: MEMORY: FBF Partition 31..0

FBF_D[31..0]
{14} BI

M4D M4A
@memory.u_mem_gddr5x_x32(sym_2):page17_i510 @memory.u_mem_gddr5x_x32(sym_4):page17_i549
BGA190_MIRR BGA190_MIRR
1 COMMON COMMON M4C 1
M4B @memory.u_mem_gddr5x_x32(sym_7):page17_i573
MIRRORED MIRRORED @memory.u_mem_gddr5x_x32(sym_5):page17_i540 BGA190_MIRR
FBF_CMD[31..0]
{14,18} IN BGA190_MIRR
COMMON
x32 x16 x32 x16 COMMON FBVDDQ
FBF_D0 V4 FBF_D16 B11
0
FBF_D1 V3
DQ0
DQ1
NC
NC
16
FBF_D17 B12
DQ16
DQ17
NC
NC
FBF_CMD2 M4 RAS
Mirrored
1 17 2
FBF_D2 U4 DQ2 NC
FBF_D18 C11 DQ18 NC
FBF_CMD0 H4 CAS MF W12
2 18 0
FBF_D3 U3 DQ3 NC
FBF_D19 C12 DQ19 NC
FBF_CMD15 H11 WE add 1k to VDD
3 19 15
FBF_D4 P4 DQ4 NC
FBF_D20 F11 DQ20 NC
A10 VSS VDD A1
4 20
FBF_D5 P3 DQ5 NC
FBF_D21 F12 DQ21 NC
A5 VSS VDD A11
5 21
FBF_D6 N4 FBF_D22 G11 FBF_CMD6 K4 B1 A14
6 DQ6 NC 22 DQ22 NC 6 ABI VSS VDD
FBF_D7 N3 DQ7 NC
FBF_D23 G12 DQ23 NC
B14 VSS VDD A4
7 23
FBF_CMD4 L4 A0_A10 D1 VSS VDD D10
4
FBF_EDC0 T3 EDC0 NC
FBF_EDC2 D12 EDC2 GND
FBF_CMD3 L5 A1_A9 D11 VSS VDD G1
3
FBF_DBI0 R3 DBI0 NC
FBF_DBI2 E12 DBI2 NC
FBF_CMD12 L11 A2_BA0 D14 VSS VDD G14
12
FBF_CMD11 L10 F1 H10
11 A3_BA3 VSS VDD
FBF_CMD9 J11 A4_BA2 F14 VSS VDD H5
9
FBF_CMD10 J10 A5_BA1 H1 VSS VDD J1
10
FBF_D8 V11 DQ8 FBF_D24 B4 DQ24 FBF_CMD7 J5 A6_A11 H14 VSS VDD J14
8 24 7
FBF_D9 V12 DQ9
FBF_D25 B3 DQ25
FBF_CMD8 J4 A7_A8 J12 VSS VDD L1
9 25 8
FBF_D10 U11 FBF_D26 C4 FBF_CMD5 K5 J3 L14
10 DQ10 26 DQ26 5 A12_A13 VSS VDD
FBF_D11 U12 DQ11
FBF_D27 C3 DQ27
FBF_CMD14 K12 A15_A14 K1 VSS VDD M10
11 27 14
FBF_D12 P11 DQ12
FBF_D28 F4 DQ28 K14 VSS VDD M5
12 28
FBF_D13 P12 DQ13 FBF_D29 F3 DQ29 K3 VSS VDD N1
13 29
FBF_D14 N11 DQ14
FBF_D30 G4 DQ30 L12 VSS VDD N14
14 30
FBF_D15 N12 FBF_D31 G3 L3 T10
15 DQ15 31 DQ31 VSS VDD
FBF_CMD1 K2 RESET M1 VSS VDD W1
1
FBF_EDC1 T12 EDC1
FBF_EDC3 D3 EDC3
FBF_CMD13 M11 CKE M14 VSS VDD W11
13
2
FBF_DBI1 R12 DBI1 FBF_DBI3 E3 DBI3 P1 VSS VDD W14 2
{14}
FBF_CLK0 K11 CLK P14 VSS VDD W4
IN
FBF_WCK01 T4 FBF_WCK23 D4 FBF_CLK0* K10 T1
{14} IN WCK01 {14} IN WCK23 {14} IN CLK VSS
{14}
FBF_WCK01* T5 WCK01 {14}
FBF_WCK23* D5 WCK23 T11 VSS
IN IN
T14 VSS VDDQ A13
V1 VSS VDDQ A2
V14 VSS VDDQ B10
W10 VSS VDDQ B5
W5 VSS VDDQ C1
VDDQ C13
M2 TCK VDDQ C14
M13 TDI B13 VSSQ VDDQ C2
A12 TDO B2 VSSQ VDDQ E1
H2 TMS C10 VSSQ VDDQ E11
FBVDDQ C5 VSSQ VDDQ E13
D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
R30 E10 E4
549ohm VSSQ VDDQ
E5 VSSQ VDDQ F10
1%
0402
F13 VSSQ VDDQ F5
COMMON {18} F2 VSSQ VDDQ G13
OUT
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
1G1D1S 3 FBF_VREFC K13 VREFC N10 VSSQ VDDQ H3
D Q6 N5 J13
0.300 0.140A VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page17_i587 R37 121ohm FBF_ZQ_1 H13 ZQ P13 VSSQ VDDQ J2
GPIO10_FBVREF_SEL 1G SOT323_1G1D1S R32 R31 C60 0402 COMMON P2 L13
{5,7,10,12,15,27} IN COMMON 1.33k 931ohm 820pF
1% VSSQ VDDQ
S 2 R10 VSSQ VDDQ L2
1% 1% 50V
30V
AO3416L
0402 0402
R5 VSSQ VDDQ M12
10%
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V COMMON COMMON X7R T13 VSSQ VDDQ M3
3
1.2A
0.2W 0402 T2 VSSQ VDDQ N13 3
12V
COMMON U10 VSSQ VDDQ N2
SOT23
U5 VSSQ VDDQ P10
V13 VSSQ VDDQ P5
GND GND GND GND V2 VSSQ VDDQ R1
VDDQ R11
FBF_VREF_Q
VDDQ R13
0.300 GND VDDQ R14
VDDQ R2
VDDQ R4
VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

4 4
1V8_AON
FBVDDQ
CLOSE DRAM

C1289 C1235 C1242 C1301 C1323 C1322 C1336 C1245 C1282 C1343 C1296 C1248 C1252 C1260
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF C1473 C282
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 1uF 1uF
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 6.3V 6.3V
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 10% 10%
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402
COMMON COMMON

FBVDDQ FBVDDQ GND


AROUND DRAM UNDER DRAM FOR X32
GND

C1259 C1344 C1303 C1243 C1326 C1227 C1340 C1310 C1262 C1291 C1324 C1329 C1274 C1268 C1285
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBF_DBI[7..0] FBF_EDC[7..0]
{14,18} IN
FBF_DBI0
{14,18} OUT
FBF_EDC0
0 0
FBF_DBI1 FBF_EDC1
1 1
FBF_DBI2 FBF_EDC2
2
FBF_DBI3
2
FBF_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBF_DBI4 FBF_EDC4 Page Name:
4 4
FBF_DBI5 FBF_EDC5
5
FBF_DBI6
5
FBF_EDC6
MEMORY: FBF Partition 31..0
6 6
FBF_DBI7 FBF_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBF PARTITION[31:0] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 17 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page18: MEMORY: FBF Partition 63..32

1 1
M3C
FBF_CMD[31..0] @memory.u_mem_gddr5x_x32(sym_6):page18_i521
{14,17} IN BGA190
FBF_D[63..32]
{14} BI M3B COMMON
@memory.u_mem_gddr5x_x32(sym_5):page18_i493
BGA190
COMMON
Normal FBVDDQ

W12 MF
M3D M3A FBF_CMD18 H4 RAS add 1k to VSS
@memory.u_mem_gddr5x_x32(sym_1):page18_i466 @memory.u_mem_gddr5x_x32(sym_3):page18_i498 18
BGA190 BGA190
FBF_CMD16 M4 CAS A10 VSS VDD A1
16
COMMON COMMON FBF_CMD31 M11 A5 A11
31 WE VSS VDD
B1 VSS VDD A14
NORMAL NORMAL B14 A4
VSS VDD
FBF_D32 B4 DQ0 FBF_D48 V11 DQ16 FBF_CMD22 K4 ABI D1 VSS VDD D10
32 48 22
FBF_D33 B3 DQ1
FBF_D49 V12 DQ17 D11 VSS VDD G1
33 49
FBF_D34 C4 FBF_D50 U11 FBF_CMD20 J4 D14 G14
34 DQ2 50 DQ18 20 A0_A10 VSS VDD
FBF_D35 C3 DQ3
FBF_D51 U12 DQ19
FBF_CMD19 J5 A1_A9 F1 VSS VDD H10
35 51 19
FBF_D36 F4 DQ4
FBF_D52 P11 DQ20
FBF_CMD28 J11 A2_BA0 F14 VSS VDD H5
36 52 28
FBF_D37 F3 DQ5 FBF_D53 P12 DQ21 FBF_CMD27 J10 A3_BA3 H1 VSS VDD J1
37 53 27
FBF_D38 G4 DQ6
FBF_D54 N11 DQ22
FBF_CMD25 L11 A4_BA2 H14 VSS VDD J14
38 54 25
FBF_D39 G3 FBF_D55 N12 FBF_CMD26 L10 J12 L1
39 DQ7 55 DQ23 26 A5_BA1 VSS VDD
FBF_CMD23 L5 A6_A11 J3 VSS VDD L14
23
FBF_EDC4 D3 EDC0
FBF_EDC6 T12 EDC2
FBF_CMD24 L4 A7_A8 K1 VSS VDD M10
24
FBF_DBI4 E3 DBI0 FBF_DBI6 R12 DBI2 FBF_CMD21 K5 A12_A13 K14 VSS VDD M5
21
FBF_CMD30 K12 A15_A14 K3 VSS VDD N1
30
L12 VSS VDD N14
x32 x16 x32 x16 L3 VSS VDD T10
FBF_D40 B11 DQ8 NC
FBF_D56 V4 DQ24 NC
M1 VSS VDD W1
40 56
2
FBF_D41 B12 DQ9 NC
FBF_D57 V3 DQ25 NC
M14 VSS VDD W11 2
41 57
FBF_D42 C11 DQ10 NC
FBF_D58 U4 DQ26 NC
FBF_CMD17 K2 RESET P1 VSS VDD W14
42 58 17
FBF_D43 C12 FBF_D59 U3 FBF_CMD29 H11 P14 W4
43 DQ11 NC 59 DQ27 NC 29 CKE VSS VDD
FBF_D44 F11 DQ12 NC
FBF_D60 P4 DQ28 NC
T1 VSS
44 60
FBF_D45 F12 DQ13 NC
FBF_D61 P3 DQ29 NC {14}
FBF_CLK1 K11 CLK T11 VSS
45 61 IN
FBF_D46 G11 DQ14 NC
FBF_D62 N4 DQ30 NC {14}
FBF_CLK1* K10 CLK T14 VSS VDDQ A13
46 62 IN
FBF_D47 G12 DQ15 NC
FBF_D63 N3 DQ31 NC
V1 VSS VDDQ A2
47 63
V14 VSS VDDQ B10
FBF_EDC5 D12 EDC1
FBF_EDC7 T3 EDC3 NC
W10 VSS VDDQ B5
GND
FBF_DBI5 E12 DBI1 NC
FBF_DBI7 R3 DBI3 NC
W5 VSS VDDQ C1
VDDQ C13
{14}
FBF_WCK45 D4 WCK01 {14}
FBF_WCK67 T4 WCK23 VDDQ C14
IN IN
FBF_WCK45* D5 FBF_WCK67* T5 B13 C2
{14} IN WCK01 {14} IN WCK23 VSSQ VDDQ
M2 TCK B2 VSSQ VDDQ E1
M13 TDI C10 VSSQ VDDQ E11
A12 TDO C5 VSSQ VDDQ E13
H2 TMS D13 VSSQ VDDQ E14
D2 VSSQ VDDQ E2
E10 VSSQ VDDQ E4
E5 VSSQ VDDQ F10
F13 VSSQ VDDQ F5
F2 VSSQ VDDQ G13
G10 VSSQ VDDQ G2
G5 VSSQ VDDQ H12
N10 VSSQ VDDQ H3
N5 VSSQ VDDQ J13
{17}
FBF_VREFC K13 VREFC P13 VSSQ VDDQ J2
IN
P2 VSSQ VDDQ L13
R36 121ohm FBF_ZQ_2 H13 R10 L2
C59 ZQ VSSQ VDDQ
0402 1% COMMON R5 VSSQ VDDQ M12
820pF
3
T13 VSSQ VDDQ M3 3
50V
T2 VSSQ VDDQ N13
10%
X7R U10 VSSQ VDDQ N2
0402 U5 VSSQ VDDQ P10
COMMON V13 VSSQ VDDQ P5
V2 VSSQ VDDQ R1
VDDQ R11
GND GND VDDQ R13
VDDQ R14
VDDQ R2
VDDQ R4
GND VDDQ U1
VDDQ U13
VDDQ U14
VDDQ U2
VDDQ V10
VDDQ V5
VDDQ W13
VDDQ W2
1V8_AON

VPP A3
VPP W3

1V8_AON
4 4

FBVDDQ
CLOSE DRAM
C283 C1474
C1325 C1286 C1298 C1251 C1319 C1257 C1295 C1279 C1335 C1334 C1330 C1256 C1308 C1321 1uF 1uF
10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 6.3V 6.3V
4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10% 10%
20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% X6S X6S
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 0402 0402
0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 COMMON COMMON
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

FBVDDQ FBVDDQ GND GND


AROUND DRAM UNDER DRAM FOR X32

C1239 C1233 C1339 C1226 C1236 C1294 C1225 C1267 C1309 C1273 C1305 C1290 C1264 C1271 C1318
22uF 22uF 22uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 FB_DBI GND FB_EDC GND 5


FBF_DBI[7..0] FBF_EDC[7..0]
{14,17} IN
FBF_DBI0
{14,17} OUT
FBF_EDC0
0 0
FBF_DBI1 FBF_EDC1
1 1
FBF_DBI2 FBF_EDC2
2
FBF_DBI3
2
FBF_EDC3
Galaxy Microsystems (HK) Ltd.
3 3
FBF_DBI4 FBF_EDC4 Page Name:
4 4
FBF_DBI5 FBF_EDC5
5
FBF_DBI6
5
FBF_EDC6
MEMORY: FBF Partition 63..32
6 6
FBF_DBI7 FBF_EDC7 Size Project Name: Design By: Rev
7 7 ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom Neston V10
PAGE DETAIL MEMORY: FBF PARTITION[63:32] P25Z
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, March 03, 2017 Sheet 18 of 52
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page19: GPU PWR and GND


G1H G1I G1J G1K G1L
@digital.u_gpu_gb3c_384(sym_20):page19_i52 @digital.u_gpu_gb3c_384(sym_21):page19_i49 @digital.u_gpu_gb3c_384(sym_22):page19_i50 @digital.u_gpu_gb3c_384(sym_23):page19_i51 @digital.u_gpu_gb3c_384(sym_19):page19_i53 G1M
BGA2397 BGA2397 BGA2397 BGA2397 NVVDD BGA2397 NVVDD
COMMON @digital.u_gpu_gb3c_384(sym_18):page19_i54
COMMON COMMON COMMON COMMON FBVDDQ FBVDDQ
BGA2397
COMMON
20/24 GND 21/24 GND 22/24 GND 23/24 GND 19/24 VDD/VDDS
18/24 FBVDDQ/FB MISC
A11 GND GND AE4 AL2 GND GND AT18 BD5 GND GND BJ40 D45 GND GND H40 AA18 VDD VDD AM33
A15 GND GND AE42 AL21 GND GND AT20 BD50 GND GND BJ41 D50 GND GND H41 AA20 VDD VDD AM35 AA13 FBVDDQ FBVDDQ N17
A2 GND GND AE45 AL23 GND GND AT22 BD6 GND GND BJ45 D9 GND GND H45 AA24 VDD VDD AN18 AA41 FBVDDQ FBVDDQ N18
1
A23 GND GND AE48 AL25 GND GND AT24 BD7 GND GND BJ48 E10 GND GND H46 AA26 VDD VDD AN20 AB13 FBVDDQ FBVDDQ N19 1
A27 GND GND AE49 AL27 GND GND AT26 BD9 GND GND BJ49 E14 GND GND H47 AA28 VDD VDD AN24 AB41 FBVDDQ FBVDDQ N20
A3 GND GND AE5 AL29 GND GND AT28 BE12 GND GND BJ5 E16 GND GND H7 AA30 VDD VDD AN26 AD13 FBVDDQ FBVDDQ N21
A31 GND GND AE50 AL3 GND GND AT30 BE15 GND GND BJ52 E19 GND GND H8 AA34 VDD VDD AN28 AD41 FBVDDQ FBVDDQ N22
A39 GND GND AE51 AL31 GND GND AT32 BE18 GND GND BJ7 E2 GND GND H9 AA36 VDD VDD AN30 AE13 FBVDDQ FBVDDQ N24
A43 GND GND AE52 AL33 GND GND AT34 BE2 GND GND BJ9 E21 GND GND J10 AB19 VDD VDD AN34 AE41 FBVDDQ FBVDDQ N25
A51 GND GND AE6 AL35 GND GND AT36 BE21 GND GND BK13 E23 GND GND J12 AB21 VDD VDD AN36 AF13 FBVDDQ FBVDDQ N26
A52 GND GND AE9 AL37 GND GND AT42 BE22 GND GND BK27 E25 GND GND J13 AB23 VDD VDD AP17 AF41 FBVDDQ FBVDDQ N28
AA12 GND GND AF12 AL4 GND GND AU12 BE23 GND GND BK29 E27 GND GND J14 AB25 VDD VDD AP19 AH13 FBVDDQ FBVDDQ N29
AA17 GND GND AF18 AL44 GND GND AU17 BE24 GND GND BK31 E29 GND GND J15 AB27 VDD VDD AP23 AH41 FBVDDQ FBVDDQ N30
AA19 GND GND AF20 AL45 GND GND AU19 BE25 GND GND BK33 E31 GND GND J2 AB29 VDD VDD AP25 AJ13 FBVDDQ FBVDDQ N32
AA2 GND GND AF22 AL46 GND GND AU21 BE26 GND GND BK35 E33 GND GND J21 AB31 VDD VDD AP29 AJ41 FBVDDQ FBVDDQ N33
AA21 GND GND AF24 AL47 GND GND AU23 BE29 GND GND BK36 E35 GND GND J23 AB33 VDD VDD AP31 AK13 FBVDDQ FBVDDQ N34
AA23 GND GND AF26 AL48 GND GND AU25 BE33 GND GND BK37 E38 GND GND J25 AB35 VDD VDD AP35 AK41 FBVDDQ FBVDDQ N35
AA25 GND GND AF28 AL49 GND GND AU29 BE34 GND GND BK39 E40 GND GND J29 AC20 VDD VDD AP37 AM13 FBVDDQ FBVDDQ N36
AA27 GND GND AF30 AL5 GND GND AU31 BE36 GND GND BK4 E44 GND GND J31 AC22 VDD VDD AR18 AM41 FBVDDQ FBVDDQ N37
AA29 GND GND AF32 AL50 GND GND AU33 BE37 GND GND BK40 E45 GND GND J33 AC26 VDD VDD AR20 AN13 FBVDDQ FBVDDQ N38
AA3 GND GND AF34 AL51 GND GND AU35 BE4 GND GND BK41 E47 GND GND J39 AC28 VDD VDD AR22 AN41 FBVDDQ FBVDDQ N39
AA31 GND GND AF36 AL52 GND GND AU37 BE40 GND GND BK42 E48 GND GND J4 AC32 VDD VDD AR24 AP13 FBVDDQ FBVDDQ R41
AA33 GND GND AF42 AL53 GND GND AU42 BE41 GND GND BK45 E49 GND GND J40 AC34 VDD VDD AR26 AP41 FBVDDQ FBVDDQ T13
AA35 GND GND AF47 AL6 GND GND AV10 BE42 GND GND BK46 E5 GND GND J41 AD17 VDD VDD AR28 AR13 FBVDDQ FBVDDQ U13
AA37 GND GND AF7 AL7 GND GND AV3 BE43 GND GND BK49 E52 GND GND J42 AD19 VDD VDD AR30 AR41 FBVDDQ FBVDDQ U41
AA4 GND GND AG1 AL8 GND GND AV4 BE44 GND GND BK50 E6 GND GND J44 AD21 VDD VDD AR32 AT13 FBVDDQ FBVDDQ V13
AA42 GND GND AG10 AL9 GND GND AV42 BE45 GND GND BL1 E7 GND GND J45 AD23 VDD VDD AR34 AU13 FBVDDQ FBVDDQ V41
AA45 GND GND AG11 AM12 GND GND AV43 BE46 GND GND BL10 E9 GND GND J46 AD27 VDD VDD AR36 AU41 FBVDDQ FBVDDQ W13
AA48 GND GND AG19 AM18 GND GND AV44 BE49 GND GND BL12 F10 GND GND J49 AD31 VDD VDD AT17 AV41 FBVDDQ FBVDDQ W41
AA49 GND GND AG2 AM20 GND GND AV46 BE5 GND GND BL17 F13 GND GND J5 AD33 VDD VDD AT21 AW13 FBVDDQ FBVDDQ Y13
AA5 GND GND AG21 AM22 GND GND AV47 BE50 GND GND BL20 F14 GND GND J50 AD35 VDD VDD AT23 AW41 FBVDDQ FBVDDQ Y41 FBVDDQ
* Connect Probe_XXXX to
AA50 GND GND AG23 AM24 GND GND AV49 BE52 GND GND BL22 F20 GND GND J52 AD37 VDD VDD AT27 N15 FBVDDQ Pwr/Gnd in Production Cards
2
AA51 GND GND AG25 AM26 GND GND AV5 BE8 GND GND BL23 F21 GND GND J8 AE18 VDD VDD AT31 TPs for E-boards 2
AA52 GND GND AG27 AM28 GND GND AV50 BE9 GND GND BL24 F23 GND GND J9 AE22 VDD VDD AT33 PROBE_FBVDDQ R13
AA6 GND GND AG29 AM30 GND GND AV51 BF10 GND GND BL27 F25 GND GND K10 AE24 VDD VDD AT37
AA9 GND GND AG3 AM32 GND GND AV7 BF12 GND GND BL29 F29 GND GND K16 AE26 VDD VDD AU20 PROBE_FB_GND R12 GND
AB12 GND GND AG31 AM34 GND GND AV8 BF16 GND GND BL3 F31 GND GND K19 AE28 VDD VDD AU22
AB18 GND GND AG33 AM36 GND GND AW1 BF20 GND GND BL32 F33 GND GND K23 AE30 VDD VDD AU26 FB_VREF AT41
AB20 GND GND AG35 AM42 GND GND AW12 BF23 GND GND BL33 F34 GND GND K27 AE32 VDD VDD AU27
AB22 GND GND AG4 AM46 GND GND AW42 BF24 GND GND BL34 F40 GND GND K31 AE36 VDD VDD AU28 FBVDDQ_SENSE BC41 FBVDDQ_SENSE_GPU
{32}
OUT
AB24 GND GND AG43 AM8 GND GND AW45 BF27 GND GND BL35 F41 GND GND K35 AF17 VDD VDD AU32 FBVDDQ_SENSE 85DIFF_NETCLASS1
AB26 GND GND AG44 AN12 GND GND AW53 BF28 GND GND BL38 F44 GND GND K38 AF19 VDD VDD AU34 FBVDDQ
AB28 GND GND AG46 AN17 GND GND AW9 BF29 GND GND BL39 F48 GND GND K4 AF23 VDD VDD U20
AB30 AG47 AN19 AY11 BF32 BL42 F49 K44 AF25 U22 R836 0ohm FBVDDQ_SENSE_RTN
GND GND GND GND GND GND GND GND VDD VDD OUT {32}
AB32 GND GND AG49 AN2 GND GND AY4 BF34 GND GND BL43 F5 GND GND K45 AF29 VDD VDD U26 0402 0.05 ohm FBVDDQ_SENSE 85DIFF_NETCLASS1
AB34 AG5 AN21 AY43 BF36 BL44 F6 K47 AF31 U27 R835 40.2ohm FB_CAL_PD_VDDQ BD41
GND GND GND GND GND GND GND GND VDD VDD FB_CAL_PD_VDDQ COMMON
AB36 GND GND AG50 AN23 GND GND AY45 BF37 GND GND BL45 G10 GND GND K48 AF35 VDD VDD U28 0402 1% COMMON
AB42 GND GND AG51 AN25 GND GND AY46 BF38 GND GND BL46 G16 GND GND K49 AF37 VDD VDD U32 R834 40.2ohm FB_CAL_PU_GND BD43 FB_CAL_PU_GND GND
AB46 GND GND AG52 AN27 GND GND AY48 BF41 GND GND BL47 G19 GND GND K5 AG18 VDD VDD U34 0402 1% COMMON
AB8 GND GND AG53 AN29 GND GND AY49 BF42 GND GND BL48 G2 GND GND K50 AG20 VDD VDD V17 R837 60.4ohm FB_CAL_TERM_GND BC42 FB_CAL_TERM_GND
AC1 GND GND AG7 AN3 GND GND AY5 BF43 GND GND BL49 G23 GND GND K6 AG22 VDD VDD V21 0402 1% COMMON
AC10 GND GND AG8 AN31 GND GND AY50 BF45 GND GND BL5 G26 GND GND K7 AG26 VDD VDD V23
AC17 GND GND AH12 AN33 GND GND AY6 BF46 GND GND BL50 G27 GND GND K9 AG28 VDD VDD V27
AC19 GND GND AH18 AN35 GND GND AY8 BF47 GND GND BL51 G28 GND GND L1 AG32 VDD VDD V31
AC2 GND GND AH20 AN37 GND GND AY9 BF7 GND GND BL53 G31 GND GND L11 AG34 VDD VDD V33 GND
AC21 AH22 AN4 B1 BF8 BM1 G35 L14 AG36 V37 NVVDD
GND GND GND GND GND GND GND GND VDD VDD
AC23 GND GND AH24 AN42 GND GND B13 BG12 GND GND BM19 G38 GND GND L19 AH17 VDD
AC25 GND GND AH26 AN45 GND GND B19 BG13 GND GND BM2 G44 GND GND L27 AH19 VDD VDDS AA22
AC27 GND GND AH28 AN48 GND GND B2 BG2 GND GND BM29 G46 GND GND L3 AH23 VDD VDDS AA32
AC29 GND GND AH30 AN49 GND GND B21 BG23 GND GND BM31 G47 GND GND L35 AH25 VDD VDDS AB17
AC3 GND GND AH32 AN5 GND GND B23 BG29 GND GND BM35 G49 GND GND L38 AH29 VDD VDDS AB37
AC31 GND GND AH34 AN50 GND GND B25 BG31 GND GND BM39 G5 GND GND L40 AH31 VDD VDDS AC18
3
AC33 GND GND AH36 AN51 GND GND B27 BG34 GND GND BM43 G52 GND GND L43 AH35 VDD VDDS AC24 3
AC35 GND GND AH42 AN52 GND GND B29 BG37 GND GND BM47 G7 GND GND L51 AH37 VDD VDDS AC30
AC37 GND GND AH47 AN6 GND GND B31 BG38 GND GND BM51 G8 GND GND L53 AJ18 VDD VDDS AC36
AC4 GND GND AH7 AN9 GND GND B33 BG39 GND GND BM52 H13 GND GND M15 AJ22 VDD VDDS AD25
AC44 GND GND AJ12 AP12 GND GND B35 BG42 GND GND BM53 H14 GND GND M17 AJ24 VDD VDDS AD29
AC45 GND GND AJ17 AP18 GND GND B41 BG43 GND GND BM6 H16 GND GND M18 AJ26 VDD VDDS AE20
AC46 GND GND AJ19 AP20 GND GND B45 BG46 GND GND BM7 H19 GND GND M19 AJ28 VDD VDDS AE34
AC47 GND GND AJ2 AP22 GND GND B47 BG47 GND GND BN11 H22 GND GND M20 AJ30 VDD VDDS AF21
AC48 GND GND AJ21 AP24 GND GND B49 BG49 GND GND BN2 H23 GND GND M21 AJ32 VDD VDDS AF27
AC49 GND GND AJ23 AP26 GND GND B5 BG5 GND GND BN3 H24 GND GND M22 AJ36 VDD VDDS AF33
AC5 GND GND AJ25 AP28 GND GND B52 BG52 GND GND BN32 H27 GND GND M24 AK17 VDD VDDS AG17
AC50 GND GND AJ27 AP30 GND GND B53 BG7 GND GND BN51 H30 GND GND M25 AK19 VDD VDDS AG24
AC51 GND GND AJ29 AP32 GND GND B7 BH10 GND GND BN52 H31 GND GND M26 AK21 VDD VDDS AG30
AC52 GND GND AJ3 AP34 GND GND B9 BH12 GND GND C1 H32 GND GND M28 AK23 VDD VDDS AG37
AC53 GND GND AJ31 AP36 GND GND BA2 BH15 GND GND C11 H35 GND GND M29 AK27 VDD VDDS AH21
AC6 GND GND AJ33 AP42 GND GND BA23 BH18 GND GND C16 H38 GND GND M30 AK31 VDD VDDS AH27
AC7 GND GND AJ35 AP48 GND GND BA45 BH21 GND GND C19 M36 GND GND M32 AK33 VDD VDDS AH33
G1N
AC8 GND GND AJ37 AP6 GND GND BA46 BH23 GND GND C21 M37 GND GND M33 AK35 VDD VDDS AJ20 1V8_MAIN 1V8_MAIN
@digital.u_gpu_gb3c_384(sym_24):page19_i55
AC9 GND GND AJ4 AR10 GND GND BA48 BH25 GND GND C23 M38 GND GND M34 AK37 VDD VDDS AJ34 BGA2397
AD12 GND GND AJ42 AR11 GND GND BA52 BH26 GND GND C25 M39 GND GND M35 AL20 VDD VDDS AK25 COMMON
AD18 GND GND AJ45 AR12 GND GND BA6 BH29 GND GND C27 M4 GND GND N46 AL22 VDD VDDS AK29 24/24 1V8/NC
AD20 GND GND AJ48 AR17 GND GND BA8 BH30 GND GND C29 M45 GND GND N48 AL26 VDD VDDS AL18
AD22 GND GND AJ49 AR19 GND GND BA9 BH31 GND GND C3 M50 GND GND N52 AL28 VDD VDDS AL24 BA15 VDD18 VDD18 BC12
AD24 GND GND AJ5 AR2 GND GND BB23 BH33 GND GND C31 M9 GND GND N6 AL32 VDD VDDS AL30 BA16 VDD18 VDD18 BC13
AD26 AJ50 AR21 BB4 BH34 C33 N2 N8 AL34 AL36 BA17 BC14 1V8_AON
GND GND GND GND GND GND GND GND VDD VDDS VDD18 VDD18
AD28 GND GND AJ51 AR23 GND GND BB45 BH39 GND GND C35 N45 GND GND N9 AM19 VDD VDDS AM17 BB15 VDD18 VDD18 BC17
AD30 GND GND AJ52 AR25 GND GND BB50 BH40 GND GND C38 P48 GND GND P11 AM21 VDD VDDS AM37 BB16 VDD18
AD32 GND GND AJ6 AR27 GND GND BB9 BH43 GND GND C43 R45 GND GND P4 AM23 VDD VDDS AN22 BB17 VDD18 1V8_AON BA18
AD34 GND GND AJ9 AR29 GND GND BC1 BH44 GND GND C51 R53 GND GND P43 AM25 VDD VDDS AN32 1V8_AON BB18
AD36 GND GND AK12 AR3 GND GND BC11 BH46 GND GND C53 R9 GND GND P45 AM27 VDD VDDS AP21
4
AD42 GND GND AK18 AR31 GND GND BC23 BH47 GND GND D10 T10 GND GND P46 AM29 VDD VDDS AP27 4
AD46 GND GND AK20 AR33 GND GND BC28 BH48 GND GND D12 T11 GND GND P49 AM31 VDD VDDS AP33
AD8 GND GND AK22 AR35 GND GND BC29 BH49 GND GND D14 T12 GND GND P5 W18 VDD VDDS AT19
AE12 GND GND AK24 AR37 GND GND BC3 BH5 GND GND D16 T3 GND GND P50 W20 VDD VDDS AT25 BF30 NC NC BE30
AE17 GND GND AK26 AR4 GND GND BC43 BH6 GND GND D19 T4 GND GND P6 W22 VDD VDDS AT29 BF39 NC NC BE31
AE19 GND GND AK28 AR42 GND GND BC51 BH9 GND GND D21 T44 GND GND P8 W24 VDD VDDS AT35 BG30 NC NC BE39
AE2 GND GND AK30 AR43 GND GND BC53 BJ12 GND GND D23 Y36 GND GND P9 W26 VDD VDDS AU18
AE21 GND GND AK32 AR44 GND GND BD10 BJ2 GND GND D25 Y42 GND GND R1 W28 VDD VDDS AU24
AE23 GND GND AK34 AR46 GND GND BD12 BJ22 GND GND D27 V34 GND GND R42 W30 VDD VDDS AU30
AE25 GND GND AK36 AR47 GND GND BD23 BJ23 GND GND D29 V36 GND GND Y48 W32 VDD VDDS AU36
AE27 GND GND AK42 AR49 GND GND BD29 BJ24 GND GND D31 V42 GND GND Y6 W34 VDD VDDS U18
AE29 GND GND AK46 AR5 GND GND BD30 BJ28 GND GND D33 W10 GND GND V26 W36 VDD VDDS U24
AE3 GND GND AK8 AR50 GND GND BD4 BJ29 GND GND D35 W11 GND GND V28 Y17 VDD VDDS U30
AE31 GND GND AL1 AR51 GND GND BD44 BJ31 GND GND D38 BC21 GND GND V30 Y19 VDD VDDS U36
AE33 GND GND AL10 AR52 GND GND BD45 BJ33 GND GND D4 BH17 GND GND V32 Y23 VDD VDDS V19
AE35 GND GND AL17 AR7 GND GND BD47 BJ35 GND GND D40 Y25 VDD VDDS V25
AE37 GND GND AL19 AR8 GND GND BD48 BJ36 GND GND D42 Y29 VDD VDDS V29
W12 GND GND W35 AT12 GND GND BD49 BJ39 GND GND D44 Y31 VDD VDDS V35
W17 GND GND W37 W50 GND GND T46 U33 GND GND T7 Y35 VDD VDDS Y21
W19 GND GND W4 W51 GND GND T47 U35 GND GND T8 Y37 VDD VDDS Y27
W2 GND GND W42 W52 GND GND T49 U37 GND GND U12 VDDS Y33
W21 GND GND W43 W7 GND GND T5 U42 GND GND U17 GND
W23 GND GND W44 W8 GND GND T50 V12 GND GND U19
W25 W46 Y12 Y26 V18 U21 BA39 GPU_NVVDD_SENSE_GPU R335 0ohm GPU_NVVDD_SENSE
GND GND GND GND GND GND VDD_SENSE 85DIFF_NETCLASS1
OUT {34}
W27 W47 Y18 Y28 V20 U23 BA38 GPU_NVVDD_FBRTN_GPU 04020.05 ohm COMMON R333 0ohm GPU_NVVDD_FBRTN
GND GND GND GND GND GND GND_SENSE 85DIFF_NETCLASS1 OUT {34}
W29 GND GND W49 Y20 GND GND Y30 V22 GND GND U25 04020.05 ohm COMMON
W3 W5 Y22 Y32 V24 U29 BB39 GPU_NVVDDS_SENSE_GPU R334 0ohm/NC
GND GND GND GND GND GND VDDS_SENSE 85DIFF_NETCLASS1
W31 GND GND W33 Y24 GND GND Y34 T51 GND GND U31 GNDS_SENSE BB38 85DIFF_NETCLASS1
GPU_NVVDDS_FBRTN_GPU 04020.05 ohm COMMON R332 0ohm/NC
04020.05 ohm COMMON

5 5

GND GND GND GND GND GND GND GND

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL GPU PWR AND GND
GPU PWR and GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 19 of 52

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Page20: GPU Decoupling

FBVDDQ NVVDD
FBVDDQ NVVDD

NVVDD NVVDD 2 X 22UF


NVVDD
Partition A 2 X 10UF, 6 X 1UF 2 X 470UF C1101 C935 C1062
22uF/NC 22uF
C968 C1058 560uF
1 6.3V 6.3V 1
C908 C909 C910 C905 C906 C907 C859 C862 560uF 560uF
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF X6S X6S
NVVDD 5V@105degC
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V
5V@105degC 5V@105degC TA-Polymer
TA-Polymer TA-Polymer 1.7A@-3.1degC,100KHz
X6S X6S X6S X6S X6S X6S X6S X6S 0.035ohm
1.7A@-3.1degC,100KHz 1.7A@-3.1degC,100KHz C963
0.035ohm 0.035ohm
0805 0805
560uF
5 X 4.7UF GND
0402 0402 0402 0402 0402 0402 0603 0603 CAP_SMD_7343
GND
CAP_SMD_7343 CAP_SMD_7343 5V@105degC

Partition B 2 X 10UF, 6 X 1UF GND TA-Polymer


1.7A@-3.1degC,100KHz C1004 C1069 C1116 C959 C1020 Co-layout with other MLCC
GND 0.035ohm 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF
6.3V 6.3V 6.3V 6.3V 6.3V
C912 C901 C911 C903 C896 C904 C861 C860 4 X 22UF
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF X6S X6S X6S X6S X6S
CAP_SMD_7343
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V
C960 C1065 C1077 C973
X6S X6S X6S X6S X6S X6S X6S X6S 22uF 22uF 22uF 22uF
GND 0603 0603 0603 0603 0603
6.3V 6.3V 6.3V 6.3V

X6S X6S X6S X6S 22 X 1UF GND


0402 0402 0402 0402 0402 0402 0603 0603
Co-layout with other MLCC C1105 C1028 C1013 C1099 C1050 C1122 C1031 C1032
Partition C 2 X 10UF, 6 X 1UF GND
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF/NC
0805 0805 0805 0805
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

GND X6S X6S X6S X6S X6S X6S X6S X6S


C936 C981 C958 C919 C1006 C897 C949 C920
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 11 X 4.7UF
2 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 2

X6S X6S X6S X6S X6S X6S X6S X6S 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
C1070 C1115 C1113 C1033 C1114 C1072 C1018 C1071 C974 C944 C1117 C988 C1075 C932 C1126 C1009 C1042 C991 C955
4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF/NC 4.7uF 4.7uF 4.7uF 1uF 1uF/NC 1uF 1uF 1uF 1uF 1uF 1uF
GND
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

0402 0402 0402 0402 0402 0402 0603 0603 X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S

Partition D 2 X 10UF, 6 X 1UF GND

0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
C1043 C947 C964 C1060 C1092 C931
C1091 C1061 C1078 C1021 C1041 C1107 C1082 C1161 1uF 1uF 1uF/NC 1uF/NC 1uF 1uF
GND GND
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 58 X 1UF
X6S X6S X6S X6S X6S X6S
X6S X6S X6S X6S X6S X6S X6S X6S

C1012 C1014 C1121 C1022 C1100 C984 C1127 C1049 C1110 C1098
1uF 1uF 1uF 1uF 1uF/NC 1uF 1uF 1uF 1uF 1uF
1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
0402 0402 0402 0402 0402 0402 0603 0603
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S GND
Partition E 2 X 10UF, 6 X 1UF GND

1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
C1143 C1144 C1141 C1142 C1140 C1145 C1189 C1199
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF C1035 C1096 C987 C995 C1054 C969 C1063 C1029 C975 C970
GND
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 1uF 1uF 1uF/NC 1uF 1uF 1uF/NC 1uF/NC 1uF 1uF/NC 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
X6S X6S X6S X6S X6S X6S X6S X6S
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S

3 3

0402 0402 0402 0402 0402 0402 0603 0603


1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
Partition F 2 X 10UF, 6 X 1UF GND
C926 C1048 C951 C1097 C929 C977 C1030 C927 C1059 C990 1V8_MAIN
GND
1uF/NC 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF/NC 1uF

C1139 C1137 C1153 C1136 C1138 C1135 C1191 C1188


6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
3 X 4.7UF, 3 X 1UF,7 X 0.1UF 1V8_MAIN
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S

6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V C1008 C1133 C1159 C1167
4.7uF 1uF 0.1uF 0.1uF
X6S X6S X6S X6S X6S X6S X6S X6S
6.3V 6.3V 16V 16V
1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
X6S X6S X7R X7R
C1094 C1123 C1015 C992 C966 C1051 C1074 C946 C1119 C1067
GND
1uF 1uF 1uF 1uF 1uF 1uF 1uF/NC 1uF/NC 1uF 1uF/NC
0402 0402 0402 0402 0402 0402 0603 0603
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

GND X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 0603 0402 0402 0402

GND
Place close to GPU 6 X 10UF
1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
C938 C998 C1147 C1169
C1129 C1124 C1125 C965 C930 C953 C954 C989 C976 C928 4.7uF 1uF 0.1uF 0.1uF
GND
C858 C857 C900 C1132 C1186 C1192 1uF 1uF 1uF 1uF/NC 1uF 1uF/NC 1uF/NC 1uF 1uF/NC 1uF 6.3V 6.3V 16V 16V
10uF 10uF 10uF 10uF 10uF 10uF 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
X6S X6S X7R X7R
4V 4V 4V 4V 4V 4V
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
X6S X6S X6S X6S X6S X6S

0603 0402 0402 0402


4 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 4
0603 0603 0603 0603 0603 0603 GND
C1087 C941 C1131 C922 C1090 C1055 C1052 C1120
GND
1uF 1uF 1uF/NC 1uF 1uF/NC 1uF/NC 1uF/NC 1uF
Place close to GPU 14 x 22UF GND
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V C997 C986 C1150 C1134 C1130
4.7uF 1uF 0.1uF 0.1uF 0.1uF
X6S X6S X6S X6S X6S X6S X6S X6S
6.3V 6.3V 16V 16V 16V
C856 C848 C891 C1148 C1187 C1198 C1190
22uF 22uF 22uF 22uF 22uF 22uF 22uF X6S X6S X7R X7R X7R

4V 4V 4V 4V 4V 4V 4V
1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA 1005_BGA
X6S X6S X6S X6S X6S X6S X6S
Additional MLCCs: 8 X 22UF, CO-LAYOUT WITH POSCAPs GND 0603 0402 0402 0402 1005_BGA

GND
0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE
C1084 C942 C1038 C943 C994 C993 C1085 C1039
22uF/NC 22uF/NC 22uF/NC 22uF/NC 22uF/NC 22uF/NC 22uF/NC 22uF/NC

1V8_AON
GND 1V8_AON
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1 X 4.7UF, 1 X 1UF,2 X 0.1UF
X6S X6S X6S X6S X6S X6S X6S X6S

C853 C854 C979 C1095 C855 C1193 C1205 C73 C72 C1106 C1111
22uF 22uF 22uF 22uF 22uF 22uF 22uF 4.7uF 1uF 0.1uF 0.1uF
0805 0805 0805 0805 0805 0805 0805 0805
4V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 16V 16V

X6S X6S X6S X6S X6S X6S X6S GND X6S X6S X7R X7R

0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603_LARGE 0603 0402 1005_BGA 1005_BGA

5 GND GND 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL GPU DECOUPLING
GPU Decoupling
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 20 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page21: IFPAB DVI-D-DL


2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.3A
SOT23_1G1D1S
0.8A DDC_5V
INS17503771
COMMON

1
G
60V
0.35W
20V
1G1D1S

2
S

D
L2N7002LT1G D2
Q10 @discrete.d_3pin_ac(sym_1):page21_i176
3 0.1A

3
100V D_3PIN_AC/NC
1 SOT23 1
COMMON
R24 R22
3V3_PROT
10k 2.2k

1
G1O 3V3_PROT
5% 5%
@digital.u_gpu_gb3c_384(sym_9):page21_i186 0402 0402
BGA2397 COMMON COMMON DDC_5V nv_cap DDC_5V
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
COMMON 0.3A
GND
SOT23_1G1D1S
9/24 IFPAB 0.8A
INS17503924
COMMON DDC_5V
R20 R15

1
G
60V

10k 0.35W
20V 2.2k
DVI-DL DVI/HDMI DP 1G1D1S
5% 5% C1397

D
L2N7002LT1G
0402 0402 4.7nF

2
COMMON Q9 COMMON D3
16V
SDA SDA IFPA_AUX BJ30 IFPA_AUX_SDA
@discrete.d_3pin_ac(sym_1):page21_i182 10%

3
SCL SCL IFPA_AUX BK30 IFPA_AUX_SCL 3 0.1A X7R
100V D_3PIN_AC/NC
0402
SOT23
COMMON
COMMON 25 SHIELD1
R842 1k IFPAB_RSET BH28 BD28 IFPA_TXC* C1357 0.1uF 26 SHIELD2
IFPAB_RSET TXC TXC IFPA_L3 DVI_HDMI_SIGNALS

1
0402 COMMON BE28 IFPA_TXC C1356 0.1uF COMMON 27 SHIELD3
1%
TXC TXC IFPA_L3 DVI_HDMI_SIGNALS
COMMON GND 28 SHIELD4

BD27 IFPA_L0* C1364 0.1uF IFPAB_TXD0_C* 17 TX0-


GND TXD0 TXD0 IFPA_L2 DVI_HDMI_SIGNALS GND J6
GPU_PLLVDD_XS_SP BC26 BD26 IFPA_L0 C1365 0.1uF COMMON IFPAB_TXD0_C 18 TX0+
{22,24,29} IN IFPAB_PLLVDD TXD0 TXD0 IFPA_L2 DVI_HDMI_SIGNALS INS9811581
BC27 IFPAB_PLLVDD COMMON IFPAB_TXD1_C* 9 TX1-
C1040 IFPAB_TXD1_C 10 TX1+
17 9 1 DVI_D_TALL_SHLD
0.1uF C1352 0.1uF DVI_D_TALL_SHLD
TXD1 TXD1 IFPA_L1 BF26 IFPA_L1* DVI_HDMI_SIGNALS
IFPAB_TXD2_C* 1 TX2-
16V
BG26 IFPA_L1 C1353 0.1uF COMMON IFPAB_TXD2_C 2 TX2+ COMMON
10% TXD1 TXD1 IFPA_L1 DVI_HDMI_SIGNALS
X7R
COMMON 3 SHLD24
0402 11 SHLD13
COMMON BJ26 IFPA_L2* C1354 0.1uF 19 SHLD05
2 TXD2 TXD2 IFPA_L0 DVI_HDMI_SIGNALS 2
IFPAB TXD2 TXD2 IFPA_L0 BJ27 IFPA_L2 DVI_HDMI_SIGNALS
C1355 0.1uF COMMON IFPAB_TXD3_C* 12 TX3-
COMMON IFPAB_TXD3_C 13 TX3+
IFPAB_TXD4_C* 4 TX4-
PEX_VDD GND SDA IFPB_AUX BG28 IFPAB_TXD4_C 5 TX4+
SCL IFPB_AUX BG27 IFPAB_TXD5_C* 20 TX5-
IFPAB_TXD5_C 21 TX5+
BA24 IFP_IOVDD
IFP_AUX_SCL_DVI 6 DDCC
BA22 IFP_IOVDD TXC IFPB_L3 BL28 IFP_AUX_SDA_DVI 7 DDCD
C1053 C1010 C1023 C1064 BA21 BK28 14 VDDC
4.7uF 1uF 0.1uF 0.1uF IFP_IOVDD TXC IFPB_L3
15 GND
6.3V 6.3V 16V 16V
BA25 IFP_IOVDD 22 SHLDC
20% 10% 10% 10% C1358 0.1uF
X6S X6S X7R X7R BA26 IFP_IOVDD TXD3 TXD0 IFPB_L2 BK26 IFPB_L2*
DVI_HDMI_SIGNALS
IFPAB_TXC_C* 24 TXC-
BA27 BL26 IFPB_L2 C1359 0.1uF COMMON IFPAB_TXC_C 23 TXC+
0603 0402 0402 0402 IFP_IOVDD TXD3 TXD0 IFPB_L2 DVI_HDMI_SIGNALS
COMMON COMMON COMMON COMMON COMMON 8 VSYNC
DVIA_HPD_C 16 HPD
BN26 IFPB_L1* C1351 0.1uF 24 16 8
1005_BGA 1005_BGA 1005_BGA TXD4 TXD1 IFPB_L1 DVI_HDMI_SIGNALS
BM26 IFPB_L1 C1350 0.1uF COMMON
TXD4 TXD1 IFPB_L1 DVI_HDMI_SIGNALS
COMMON
Near the GPU GND

BN27 IFPB_L0* C1361 0.1uF


A, B share the filter Close the GPU TXD5 TXD2 IFPB_L0 DVI_HDMI_SIGNALS
C1362 0.1uF
TXD5 TXD2 IFPB_L0 BM27 IFPB_L0 DVI_HDMI_SIGNALS COMMON
COMMON

NC BL8 29 SHIELD5
NC BM28 30 SHIELD6
31 SHIELD7
32 SHIELD8
33 SHIELD9
3 3
NV3V3

R975
GND
10k
1%
0402
COMMON
GPIO14_IFPA_HPD
{27} OUT
3 1B1C1E
Q559 C
1 B DVIA_HPD_R_Q
@discrete.q_npn(sym_1):page21_i125 R992 100k DVIA_HPD_R R963 0ohm
SOT23_1B1C1E
0402 5% COMMON 06030.05 ohm COMMON
COMMON
2 E
R993 C1399 C1378
100k 220pF 220pF/NC
MMBT2222A-7-F
5% 50V 50V
0402 5% 5%
COMMON C0G C0G
GND 0402 0402
COMMON COMMON

GND GND GND

499ohm R926
COMMON 1% 0402
499ohm R927
COMMON 1% 0402
499ohm R912
COMMON 1% 0402
499ohm R913
4 4
COMMON 1% 0402
499ohm R914
COMMON 1% 0402
499ohm R915
COMMON 1% 0402
499ohm R923
COMMON 1% 0402
499ohm R918
COMMON 1% 0402
499ohm R908
COMMON 1% 0402
499ohm R909
COMMON 1% 0402
499ohm R919
COMMON 1% 0402
499ohm R920
COMMON 1% 0402
NV3V3 499ohm R917
COMMON 1% 0402

1G1D1S 3 IFPAB_TERM_CM 499ohm R916


D Q550 COMMON 0402
0.010 1%
@discrete.q_fet_n_enh(sym_2):page21_i100
SOT23_1G1D1S
1G COMMON
S 2
60V
L2N7002LT1G
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W
20V

5 5

GND

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL IFPAB DVI-D-DL
IFPAB DVI-D-DL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 21 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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Page22: IFPE DP
DP_PWR2

R1010
100k
C1406 0.1uF

2
5%
IFPE_AUX_C 90DIFF_NETCLASS1 90DIFF_NETCLASS1 0402 D520
0402 16V
C1424
COMMON @discrete.d_3pin_ac(sym_1):page22_i220
X7R COMMON 0.1uF/NC
10% 3 0.1A
100V 16V
NV12V
SOT23 10%
IFPE_AUX_BYP* D S COMMON X7R
1
S D 3 2[Q_AUX_FET2*_DP] 0402 NV3V3
1
R1027

1
[Q_AUX_FET2*_DP]2 3 COMMON COMMON
SOT23_1G1D1S 10k
COMMON G INS17493456 5% R980
SOT23_1G1D1S
G Q28 D_3PIN_AC/NC
INS17493423
Q4
0402 10k
GND GND COMMON

1
5%
3 1B1C1E
L2N7002LT1G L2N7002LT1G C 0402

1
IFPE_MODE Q574
L2N7002LT1G COMMON

L2N7002LT1G
1 B DPE_MODE*
@discrete.q_npn(sym_1):page22_i226 3 1B1C1E
C

1
SOT23_1B1C1E
COMMON
Q542
Q30 Q29 2 E 1 B DPE_MODE_R
@discrete.q_npn(sym_1):page22_i236 R900 10k
INS17493674 G G INS17493583 SOT23_1B1C1E
0402 COMMON
SOT23_1G1D1S SOT23_1G1D1S COMMON 5%

2
COMMON2 3 3 2COMMON D519 MMBT2222A-7-F 2 E
[Q_AUX_FET2*_DP] [Q_AUX_FET2*_DP] C1426
@discrete.d_3pin_ac(sym_1):page22_i212
10nF
S D IFPE_AUX_BYP D S 3 0.1A MMBT2222A-7-F
100V 25V
R1009 SOT23 10%
COMMON X7R
100k
0402

1
C1407 0.1uF 5%
COMMON
IFPE_AUX_C 90DIFF_NETCLASS1 90DIFF_NETCLASS1 0402 GND GND
0402 16V COMMON
X7R COMMON
10% D_3PIN_AC/NC

R989 R991
RECEPTACLE DP_PWR2
100k 100k
GND GND GND DPORT_26P_0_7MM
5% 5%
0402 0402 COMMON J3 SHIELD6 21
COMMON COMMON SHIELD5 23
G1P C1405 C11
SHIELD4 25
@digital.u_gpu_gb3c_384(sym_12):page22_i264 0.1uF/NC 10uF/NC
BGA2397
16V 6.3V
COMMON
PWR 20 10% 10%
12/24 IFPE GND GND 20 X7R X7R
PWR_RET 19
2 DVI/HDMI DP 19
0402 0805
2
18 HPD 18
COMMON COMMON

17
R843 1k IFPEF_RSET BK22 BL18 IFPE_AUX* IFPE_AUX_C* 17 AUXN GND 16
IFPEF_RSET SDA IFPE_AUX IFPE_AUX_C 16
0402 1% COMMON
SCL IFPE_AUX BL19 IFPE_AUX IFPE_AUX_C
IFPE_AUX_C 15 AUXP 15
CEC 14 DPE_CEC
14 GND
MODE 13 DPE_MODE_C
13
BD22 IFPE_L3* C9 0.1uF IFPE_L3_C* 12 LANE_3N
TXC IFPE_L3 IFPE_L3 DP_SIGNALS IFPE_L3 DP_SIGNALS 12
BD21 IFPE_L3 C8 0.1uF COMMON IFPE_L3_C 10 LANE_3P GND 11
GND
TXC IFPE_L3 IFPE_L3 DP_SIGNALS IFPE_L3 DP_SIGNALS 11
R990 R901
COMMON
C6 0.1uF 10 5.1M/NC 1M
{21,24,29}
GPU_PLLVDD_XS_SP BC22 IFPEF_PLLVDD IFPE_L2 BF21 IFPE_L2* IFPE_L2 DP_SIGNALS
IFPE_L2_C* IFPE_L2 DP_SIGNALS 9 LANE_2N
IN TXD0 BG21 IFPE_L2 C5 0.1uF COMMON IFPE_L2_C 7 LANE_2P
9
GND 8 5% 5%
TXD0 IFPE_L2 IFPE_L2 DP_SIGNALS IFPE_L2 DP_SIGNALS 8 0402 0402
COMMON COMMON COMMON
C1066 BK21 IFPE_L1* C4 0.1uF IFPE_L1_C* 6 LANE_1N
7

0.1uF TXD1 IFPE_L1 IFPE_L1 DP_SIGNALS IFPE_L1 DP_SIGNALS 6


BJ21 IFPE_L1 C3 0.1uF COMMON IFPE_L1_C 4 LANE_1P GND 5
16V TXD1 IFPE_L1 IFPE_L1 DP_SIGNALS IFPE_L1 DP_SIGNALS 5
COMMON
IFPE
10% 4
BH22 IFPE_L0* C2 0.1uF IFPE_L0_C* 3 LANE_0N
X7R
TXD2 IFPE_L0 IFPE_L0 DP_SIGNALS IFPE_L0 DP_SIGNALS 3 GND GND
BG22 IFPE_L0 C1 0.1uF COMMON IFPE_L0_C 1 LANE_0P GND 2
0402 IFPE_L0 IFPE_L0 DP_SIGNALS IFPE_L0 DP_SIGNALS
COMMON TXD2 COMMON
2

PEX_VDD SHIELD3 22
GND SHIELD2 24
SHIELD1 26

27
BB25 IFP_IOVDD
BB26 IFP_IOVDD
C1011 C996 C1036
DPORT_26P_0_7MM GND
4.7uF 1uF 0.1uF
6.3V 6.3V 16V
20% 10% 10%
3 X6S X6S X7R 3
0603 0402 0402
COMMON COMMON COMMON NV3V3

1005_BGA 1005_BGA
Near the GPU R1030
GND
10k
E, F share the filter Close the GPU 5%
0402
COMMON

GPIO18_IFPE_HPD 3
Hotplug Detection
{27} OUT C
1B1C1E
Q575
1 B DP_E_HPD_R_Q
@discrete.q_npn(sym_1):page22_i127 R1023 100k DP_E_HPD_R R1013 0ohm DP_E_HPD_C
SOT23_1B1C1E
0402 5% COMMON 0603 0.05 ohm COMMON
COMMON
2 E
C1418 C1412
R1024 220pF/NC 220pF
MMBT2222A-7-F
100k 50V 50V
5% 5% 5%
0402 C0G C0G
GND COMMON 0402 0402
COMMON COMMON

GND GND GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL IFPE DP
IFPE DP
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 22 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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A B C D E F G H

Page23: IFPF DP
DP_PWR2

R998
100k
C1401 0.1uF

2
5%
IFPF_AUX_C 90DIFF_NETCLASS1 90DIFF_NETCLASS1 0402 D518
0402 16V
C1410
COMMON @discrete.d_3pin_ac(sym_1):page23_i92
0.1uF/NC
10% 3 0.1A
X7R 100V 16V
COMMON
NV12V
SOT23 10%
IFPF_AUX_BYP* D S COMMON X7R
1
S D 3 2[Q_AUX_FET2*_DP] 0402 NV3V3
1
R1016

1
[Q_AUX_FET2*_DP]2 3 COMMON COMMON
SOT23_1G1D1S 10k
COMMON G INS17494312 5% R1019
SOT23_1G1D1S
G Q32 D_3PIN_AC/NC
INS17494291
Q31
0402 10k
GND GND COMMON

1
5%
3 1B1C1E
L2N7002LT1G L2N7002LT1G C 0402

1
IFPF_MODE Q566
L2N7002LT1G COMMON

L2N7002LT1G
1B DPF_MODE*
@discrete.q_npn(sym_1):page23_i79 3 1B1C1E
C

1
SOT23_1B1C1E
COMMON
Q569
Q34 Q33 2 E 1 B DPF_MODE_R
@discrete.q_npn(sym_1):page23_i77 R1032 10k
INS17494354 G G INS17494333 SOT23_1B1C1E
0402 COMMON
SOT23_1G1D1S SOT23_1G1D1S COMMON 5%

2
COMMON2 3 3 2COMMON D517 MMBT2222A-7-F 2 E
[Q_AUX_FET2*_DP] [Q_AUX_FET2*_DP] C1413
@discrete.d_3pin_ac(sym_1):page23_i94 SOT23
10nF
S D IFPF_AUX_BYP D S 3 0.1A MMBT2222A-7-F
100V 25V
SOT23
R997 SOT23 10%
COMMON X7R
100k
0402

1
C1400 0.1uF 5%
COMMON
IFPF_AUX_C 90DIFF_NETCLASS1 90DIFF_NETCLASS1 0402 GND GND
0402 16V COMMON
10% D_3PIN_AC/NC
X7R
R965 R966 COMMON
RECEPTACLE DP_PWR2
100k 100k
GND GND GND DPORT_26P_0_7MM
5% 5%
0402 0402 COMMON J4 SHIELD6 21
COMMON COMMON SHIELD5 23
G1Q C1414 C41
SHIELD4 25
@digital.u_gpu_gb3c_384(sym_8):page23_i152 0.1uF/NC 10uF/NC
BGA2397
16V 6.3V
COMMON
PWR 20 10% 10%
8/24 IFPF GND GND 20 X7R X7R
PEX_VDD PWR_RET 19
2 DVI/HDMI DP 19
0402 0805
2
18 HPD 18
COMMON COMMON

17
BB28 BM18 IFPF_AUX* IFPF_AUX_C* 17 AUXN GND 16
IFP_IOVDD SDA IFPF_AUX IFPF_AUX_C 16
BB27 IFP_IOVDD SCL IFPF_AUX BM17 IFPF_AUX IFPF_AUX_C
IFPF_AUX_C 15 AUXP 15
CEC 14 DPF_CEC
14 GND
MODE 13 DPF_MODE_C
C1019 BN18 IFPF_L3* C37 0.1uF IFPF_L3_C* 12 LANE_3N
13

0.1uF TXC IFPF_L3 IFPF_L3 DP_SIGNALS IFPF_L3 DP_SIGNALS 12


BN19 IFPF_L3 C38 0.1uF COMMON IFPF_L3_C 10 LANE_3P GND 11
16V TXC IFPF_L3 IFPF_L3 DP_SIGNALS IFPF_L3 DP_SIGNALS 11
R1034 R1029
COMMON
10% C46 0.1uF 10 5.1M/NC 1M
X7R IFPF_L2 BM20 IFPF_L2* IFPF_L2 DP_SIGNALS
IFPF_L2_C* IFPF_L2 DP_SIGNALS 9 LANE_2N
TXD0
IFPF
9
BN20 IFPF_L2 C47 0.1uF COMMON IFPF_L2_C 7 LANE_2P GND 8 5% 5%
0402
TXD0 IFPF_L2 IFPF_L2 DP_SIGNALS IFPF_L2 DP_SIGNALS 8 0402 0402
COMMON COMMON
7 COMMON COMMON
BK20 IFPF_L1* C42 0.1uF IFPF_L1_C* 6 LANE_1N
TXD1 IFPF_L1 IFPF_L1 DP_SIGNALS IFPF_L1 DP_SIGNALS 6
BJ20 IFPF_L1 C43 0.1uF COMMON IFPF_L1_C 4 LANE_1P GND 5
1005_BGA TXD1 IFPF_L1 IFPF_L1 DP_SIGNALS IFPF_L1 DP_SIGNALS 5
GND COMMON
4
BM21 IFPF_L0* C44 0.1uF IFPF_L0_C* 3 LANE_0N
TXD2 IFPF_L0 IFPF_L0 DP_SIGNALS IFPF_L0 DP_SIGNALS 3 GND GND
BL21 IFPF_L0 C45 0.1uF COMMON IFPF_L0_C 1 LANE_0P GND 2
Close the GPU TXD2 IFPF_L0 IFPF_L0 DP_SIGNALS IFPF_L0 DP_SIGNALS 2
COMMON
1

SHIELD3 22
SHIELD2 24
SHIELD1 26

27
DPORT_26P_0_7MM GND

3 3
NV3V3

R1020
10k
5%
0402
COMMON

GPIO24_IFPF_HPD 3
Hotplug Detection
{27} OUT C
1B1C1E
Q571
1 B DP_F_HPD_R_Q
@discrete.q_npn(sym_1):page23_i116 R1036 100k DP_F_HPD_R R1018 0ohm DP_F_HPD_C
SOT23_1B1C1E
0402 5% COMMON 0603 0.05 ohm COMMON
COMMON
2 E
C1428 C1416
R1035 220pF/NC 220pF
MMBT2222A-7-F
100k 50V 50V
SOT23
5% 5% 5%
0402 C0G C0G
GND COMMON 0402 0402
COMMON COMMON

GND GND GND

4 4

Fused DP_PWR

DP-SKU
U5 DP_PWR2
3V3
@analog.u_sw_pwr_tps2031(sym_1):page23_i136
SO8
COMMON
2 IN OUT 8 0.400 3.3V
3 IN OUT 7 C51 C52
6 R28 C56 C33
OUT 10k 0.1uF 10uF 330uF 330uF
C55
0.1uF 5% 16V 6.3V COMMON COMMON
4 EN 0402 20% 20%
16V 10% 10%
COMMON X7R X7R 6.3V@85degC 6.3V@85degC
10%
X7R 5 OC* GND 1 0402 0805 TA-Polymer TA-Polymer
COMMON COMMON 0.975A@105degC,100KHz 0.975A@105degC,100KHz
0402
0.015ohm 0.015ohm
COMMON
SMD_7343 SMD_7343

GND GND GND GND GND GND

5 GND 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL IFPF DP
IFPF DP
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 23 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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A B C D E F G H

Page24: IFPC HDMI 2.0/DP


3V3_PROT 3V3_PROT NV12V
IFPC_MODE_Q* NV3V3

DP_PWR DDC_5V DP-SKU ONLY


R931 ALL DP C1346 R921

1
L2N7002LT1G
10k DP
R978 0ohm/NC 10nF R941 10k/NC R933
Q39 Q41
HDMI 1% INS17494951 G L2N7002LT1G/NC G INS17495177 25V 0ohm 1% 10k/NC
0.05 ohm
HDMI 10% 0.05 ohm 1%
2 3 3 2 0402 R938 0ohm/NC
X7R
FOR ESD DIODES [Q_AUX_FET2*_DP] [Q_AUX_FET2*_DP]
0.05 ohm
HDMI
0402 S D I2CW_SDA_Q D S 0402 90DIFF_NETCLASS1
0402

1
0402 0402 3 1B1C1E
0402
1
IFPC_ESD R902 Q543 C
100k/NC SOT23 SOT23 R962 R988 1B IFPC_MODE*
@discrete.q_npn(sym_1):page24_i262 3 1B1C1E
DP 5% HDMI
R907 0ohm IFPC_ESD 2k 100k/NC C
GND Q551
C1398 HDMI 5% 5%
2 E 1B DPC_MODE_R
@discrete.q_npn(sym_1):page24_i268
0.05 ohm DP_PWR
0.1uF/NC C1348 0.1uF/NC
0402 DDC_5V

2
16V 0402 16V D513 D514 MMBT2222A-7-F/NC 2 E
10%
10%
@discrete.d_3pin_ac(sym_1):page24_i218
0402
@discrete.d_3pin_ac(sym_1):page24_i220
0402DP SOT23
X7R
X7R DP
3 3 R940
GND 0.1A 0.1A MMBT2222A-7-F/NC
0402 100V 100V 10k/NC
GND SOT23
0402 1%
3V3_PROT GND
D_3PIN_AC/NC R950
2k

1
ALL DP

1
L2N7002LT1G D_3PIN_AC/NC
R935 Q40 Q50 HDMI 5% 0402
GND
10k INS17495064 G L2N7002LT1G/NC G INS17495349
DDC_5V
Place near ESD diodes HDMI 1%
2 3 3 2 GND GND
[Q_AUX_FET2*_DP] [Q_AUX_FET2*_DP] 0402
SOT23 SOT23
S D I2CW_SCL_Q D S C1417 100pF
90DIFF_NETCLASS1 90DIFF_NETCLASS1 90DIFF_NETCLASS1
0402 RECEPTACLE
50V
R910 5% HDMI
G1R 100k/NC SOT23 SOT23 R979 C0G
@digital.u_gpu_gb3c_384(sym_10):page24_i286 DP 5% HDMI
R911 0ohm 100k/NC 0402
J5
5%
20 SHIELD1
0.05 ohm GND
10/24 IFPC C1366 0.1uF/NC DP
21 SHIELD2
0402
0402 16V
1k R844 IFPC_RSET BK24 10% 0402 19 HP_DET
IFPCD_RSET DVI/HDMI DP 19
1%
X7R DP
18 +5V
0402 DDC/CEC_GND 18
0402 GND GND 17 17
BK19 IFPC_AUX* I2CW_SDA_R_Q 16 SDA
SDA IFPC_AUX 16
BJ19 IFPC_AUX I2CW_SCL_R_Q 15 SCL
2 GND SCL IFPC_AUX 15 2
GPU_PLLVDD_XS_SP BC24 14 RESERVED
{21,22,29} IN IFPCD_PLLVDD 14
13 CEC
13
BG24 IFPC_TXC* C1389 0.1uF IFPC_TXC_C1* R1001 6.04ohm IFPC_TXC_RC* 12 CK-
C1057 TXC IFPC_L3 IFPC_TXC_R 95DIFF_NETCLASS1 12
BH24 IFPC_TXC C1390 0.1uF IFPC_TXC_C1 11 CK_SHIELD
0.1uF TXC IFPC_L3 IFPC_TXC_R 95DIFF_NETCLASS1 1%
11
R1002 6.04ohm IFPC_TXC_RC 10 CK+
0402
IFPC
10
16V
BK25 IFPC_TXD0* C1391
04020.1uF IFPC_TXD0_C1* 9 D0-
10% TXD0 IFPC_L2 IFPC_TXD0_R 95DIFF_NETCLASS1 1%
9
BJ25 IFPC_TXD0 C1392
04020.1uF IFPC_TXD0_C1 R1003 6.04ohm IFPC_TXD0_RC* 8 D0_SHIELD
X7R TXD0 IFPC_L2 IFPC_TXD0_R 95DIFF_NETCLASS1 0402 8
1% 7 D0+
7
BG25 IFPC_TXD1* C1393
04020.1uF IFPC_TXD1_C1* R1004 6.04ohm IFPC_TXD0_RC 6 D1-
TXD1 IFPC_L1 IFPC_TXD1_R 95DIFF_NETCLASS1 0402 6
0402 BF25 IFPC_TXD1 C1394
04020.1uF IFPC_TXD1_C1 5 D1_SHIELD
GND TXD1 IFPC_L1 IFPC_TXD1_R 95DIFF_NETCLASS1 1%
5
R1005 6.04ohm IFPC_TXD1_RC* 4 D1+
0402 4
BD25 IFPC_TXD2* C1395
04020.1uF IFPC_TXD2_C1* 3 D2-
TXD2 IFPC_L0 IFPC_TXD2_R 95DIFF_NETCLASS1 1%
3
PEX_VDD BD24 IFPC_TXD2 C1396
04020.1uF IFPC_TXD2_C1 R1006 6.04ohm IFPC_TXD1_RC 2 D2 _SHIELD
TXD2 IFPC_L0 IFPC_TXD2_R 95DIFF_NETCLASS1 0402 2
1% 1 D2+
1
NV3V3 0402 R1007
0402 6.04ohm IFPC_TXD2_RC*

BB21 0402 22 SHIELD3


IFP_IOVDD 1%
BA28 R1008 6.04ohm IFPC_TXD2_RC 23 SHIELD4
IFP_IOVDD 0402
C1016 C1080 C1056 R1028
1%
4.7uF 1uF 0.1uF 10k
0402
6.3V 6.3V 16V 1%
20% 10% 10%
X6S X6S X7R
3 1B1C1E
0402Q570 C HDMI_C_HPD_R_Q R1033 100k HDMI_C_HPD_R R1015 0ohm HDMI_C_HPD_C
BGA_2397_P090_P085_P080_P100_450X450
0603 0402 1B
@discrete.q_npn(sym_1):page24_i190 5% 0.05 ohm GND
C1421 C1415 HDMI
1005_BGA 0402 0603
R1038 220pF/NC 220pF
Near the GPU 2 E
GPIO27_IFPC_HPD 100k 50V 50V
GND {27} OUT 5% 5%
5%
C, D share the filter Close the GPU MMBT2222A-7-F C0G C0G
SOT23
3 3
0402 0402 0402
GND GND GND
GND

R974 R973 R972 R971 R970 R969 R968 R967


499ohm 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm
1% 1% 1% 1% 1% 1% 1% 1%

NV3V3

3 HDMI_PD_1 LB511 600ohm IFPC_TERM_BEAD_1


0402 0402 0402 0402 0402 0402 0402 0402
DP FOR QUADRO
1G1D1S 0.010
D Q3
@discrete.q_fet_n_enh(sym_2):page24_i147 LB510IND_SMD_0402
600ohm IFPC_TERM_BEAD_2

1G DP_PWR
S 2 LB509IND_SMD_0402
600ohm IFPC_TERM_BEAD_3

60V
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
LB508IND_SMD_0402
600ohm IFPC_TERM_BEAD_4
RECEPTACLE
0.8A C13 C1409
0.35W DPORT_26P_0_7MM 22uF/NC 0.1uF/NC
20V
LB507IND_SMD_0402
600ohm IFPC_TERM_BEAD_5 J2 SHIELD6 21
L2N7002LT1G 6.3V 16V
SHIELD5 23
SOT23 LB506IND_SMD_0402
600ohm 20% 10%
IFPC_TERM_BEAD_6 SHIELD4 25 X6S X7R
GND
LB505IND_SMD_0402
600ohm IFPC_TERM_BEAD_7
4 PWR 20 4
0805 0402
20
LB504IND_SMD_0402
600ohm IFPC_TERM_BEAD_8 PWR_RET 19
19
18 HPD 18
IND_SMD_0402 17 GND
I2CW_SDA_R_Q 17 AUXN GND 16
16
I2CW_SCL_R_Q 15 AUXP 15
CEC 14 DPC_CEC
14
MODE 13 DPC_MODE_C
13
IFPC_TXC* C1379 0.1uF/NC IFPC_L3_C* 12 LANE_3N
95DIFF_NETCLASS1 DP_SIGNALS 12
IFPC_TXC C1380 0.1uF/NC IFPC_L3_C 10 LANE_3P GND 11
95DIFF_NETCLASS1 DP_SIGNALS 11
R1000 R982
C1381 10 5.1M/NC 1M/NC
IFPC_TXD0*
95DIFF_NETCLASS1 04020.1uF/NC IFPC_L2_C*
DP_SIGNALS 9 LANE_2N 9
IFPC_TXD0 C1382
04020.1uF/NC IFPC_L2_C 7 LANE_2P GND 8 5% 5%
95DIFF_NETCLASS1 DP_SIGNALS 8
7
IFPC_TXD1* C1383
04020.1uF/NC IFPC_L1_C* 6 LANE_1N
95DIFF_NETCLASS1 DP_SIGNALS 6
IFPC_TXD1 C1384
04020.1uF/NC IFPC_L1_C 4 LANE_1P GND 5 0402 0402
95DIFF_NETCLASS1 DP_SIGNALS 5

4
IFPC_TXD2* C1385
04020.1uF/NC IFPC_L0_C* 3 LANE_0N
95DIFF_NETCLASS1 DP_SIGNALS 3
IFPC_TXD2 C1386
04020.1uF/NC IFPC_L0_C 1 LANE_0P GND 2
95DIFF_NETCLASS1 DP_SIGNALS 2

1 GND GND
0402
0402
SHIELD3 22
SHIELD2 24
SHIELD1 26

27
CON_DISPLAYPORT/NC

DPORT_26P_0_7MM
5 5
GND

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL IFPC HDMI/DP
IFPC HDMI 2.0/DP
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 24 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page25: IFPD DP
DP_PWR

R984
100k
C1387 0.1uF

2
5%
IFPD_AUX 90DIFF_NETCLASS1 90DIFF_NETCLASS1 D516
16V
C1404
@discrete.d_3pin_ac(sym_1):page25_i197
0.1uF/NC
10% 3 0.1A
X7R 0402 100V 16V
NV12V
0402 10%
IFPD_AUX_BYP* D S X7R
1
S D 90DIFF_NETCLASS1 3 2[Q_AUX_FET2*_DP] NV3V3
1
R957

1
[Q_AUX_FET2*_DP]2 3
0402 10k
G INS17497366 1% R987
G Q52 D_3PIN_AC/NC
INS17497345
Q51 L2N7002LT1G 10k
GND GND

1
1%
IFPD_MODE 3 1B1C1E
L2N7002LT1G SOT23 C

1
0402 Q558
1B DPD_MODE*
@discrete.q_npn(sym_1):page25_i203 3
L2N7002LT1G 1B1C1E
C

1
L2N7002LT1G 0402Q557
Q54
SOT23
Q53 2 E 1 B DP_MODE_R
@discrete.q_npn(sym_1):page25_i211 R983 10k
INS17497408 G SOT23G
INS17497387
1%

2
2 3 3 2 D515 MMBT2222A-7-F 2 E 0402
[Q_AUX_FET2*_DP] [Q_AUX_FET2*_DP] C1403
@discrete.d_3pin_ac(sym_1):page25_i194 SOT23
10nF
S D IFPD_AUX_BYP D S 3 0.1A MMBT2222A-7-F
100V 25V
90DIFF_NETCLASS1 SOT23
R985 10%
100k X7R

1
C1402 0.1uF 5%
IFPD_AUX
SOT23 90DIFF_NETCLASS1 90DIFF_NETCLASS1 GND GND
16V 0402
10%
SOT23 D_3PIN_AC/NC
X7R 0402
R959 R977 0402
RECEPTACLE DP_PWR
100k 100k SOT23
GND GND GND DPORT_26P_0_7MM
5% 5%
J1 SHIELD6 21
G1S SHIELD5 23
@digital.u_gpu_gb3c_384(sym_11):page25_i231
SHIELD4 25 C7 C1408
0402 0402 10uF/NC 0.1uF/NC
6.3V 16V
11/24 IFPD 10% 10%
PWR 20
GND GND 20 X7R X7R
BA29 PWR_RET 19
2 NC
NC DVI/HDMI DP 19 2
DP_D_HPD_C 18 HPD 18
0805 0402
17
BH20 IFPD_AUX* IFPD_AUX_C* 17 AUXN GND 16
SDA IFPD_AUX IFPD_AUX 16
SCL IFPD_AUX BG20 IFPD_AUX IFPD_AUX_C IFPD_AUX 15 AUXP 15
BA31 CEC 14 DP_CEC
NC
NC 14 GND
MODE 13 DP_MODE_C
13
BN22 IFPD_L3* C21 0.1uF IFPD_L3_C* 12 LANE_3N
TXC IFPD_L3 IFPD_L3 DP_SIGNALS IFPD_L3 DP_SIGNALS 12
BM22 IFPD_L3 C22 0.1uF IFPD_L3_C 10 LANE_3P GND 11
TXC IFPD_L3 IFPD_L3 DP_SIGNALS IFPD_L3 DP_SIGNALS 11
R1011 R986
5.1M/NC 1M
IFPD
10
BN23 IFPD_L2* C18
04020.1uF IFPD_L2_C* 9 LANE_2N
TXD0 IFPD_L2 IFPD_L2 DP_SIGNALS IFPD_L2 DP_SIGNALS 9
BM23 IFPD_L2 C19
04020.1uF IFPD_L2_C 7 LANE_2P GND 8 5% 5%
TXD0 IFPD_L2 IFPD_L2 DP_SIGNALS IFPD_L2 DP_SIGNALS 8

7
BN24 IFPD_L1* C14
04020.1uF IFPD_L1_C* 6 LANE_1N
TXD1 IFPD_L1 IFPD_L1 DP_SIGNALS IFPD_L1 DP_SIGNALS 6
BM24 IFPD_L1 C15
04020.1uF IFPD_L1_C 4 LANE_1P GND 5 0402 0402
TXD1 IFPD_L1 IFPD_L1 DP_SIGNALS IFPD_L1 DP_SIGNALS 5

4
PEX_VDD BL25 IFPD_L0* C16
04020.1uF IFPD_L0_C* 3 LANE_0N
TXD2 IFPD_L0 IFPD_L0 DP_SIGNALS IFPD_L0 DP_SIGNALS 3 GND GND
BM25 IFPD_L0 C17
04020.1uF IFPD_L0_C 1 LANE_0P GND 2
TXD2 IFPD_L0 IFPD_L0 DP_SIGNALS IFPD_L0 DP_SIGNALS 2

1
0402
BB24 IFP_IOVDD 0402
BB22 IFP_IOVDD SHIELD3 22
SHIELD2 24
C1044 SHIELD1 26
0.1uF

27
16V
10%
X7R
DPORT_26P_0_7MM GND
BGA_2397_P090_P085_P080_P100_450X450

3 1005_BGA
GND 3

Close the GPU NV3V3

R995
10k
1%

GPIO17_IFPD_HPD 0402 3
Hotplug Detection
{27} OUT C
1B1C1E
Q567
1B
@discrete.q_npn(sym_1):page25_i158 DP_D_HPD_R_Q R1022 100k DP_D_HPD_R R1017 0ohm
5% 0.05 ohm
2 E 0402 0603
C1420 C1419
R1014 220pF/NC 220pF
MMBT2222A-7-F
100k 50V 50V
SOT23
5% 5% 5%
C0G C0G
GND

0402 0402 0402

GND GND GND

4 4

Fused DP_PWR

DP-SKU
U1 DP_PWR
3V3
@analog.u_sw_pwr_tps2031(sym_1):page25_i139

1.0A 3.3V
2 IN OUT 8 0.400
3 IN OUT 7 C12 C23
6 R996 C20 C10
OUT 10k 0.1uF 10uF 330uF 330uF
C24
0.1uF 5% 16V 6.3V
4 EN 20% 20%
16V 10% 10%
X7R X7R 6.3V@85degC 6.3V@85degC
10%
X7R 5 OC* GND 1 TA-Polymer TA-Polymer
0402 0.975A@105degC,100KHz 0.975A@105degC,100KHz
0.015ohm 0.015ohm
0402 0805
0402
GND GND GND GND GND
CAP_SMD_7343 GND
CAP_SMD_7343
SO08_048X038
5 GND 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL IFPD DP
IFPD DP
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 25 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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A B C D E F G H

Page26: MIOA/B Interface and FRAME LOCK


CN1B
INS9814870
MIO_SIGNALS
MIOA_D[11..0] NONPHY_DUAL_6GND
COMMON
G1U
@digital.u_gpu_gb3c_384(sym_13):page26_i156
SLI_B - EMI SHIELD
BGA2397 2/2
1V8_MAIN COMMON C2 C7 SLI_LED
DR<0> SLI_LED
MIOA_D0

0 IN {26,48}
13/24 MIOA MIOA_D1
D4 DR<1>
1
1
MIOA_D2
C4 DR<2> GND D3 1
2
MIOAD0 BM3 MIOA_D0 MIOA_D3
C5 DR<3> GND D7
BN4
0 3
D6 D11 C1304
MIOAD1 DR<4> GND
MIOA_D1

1 0.1uF/NC
MIOAD2 BM4 MIOA_D2 MIOA_D5
C6 DR<5> GND C3
R856 BL4
2 5
C8 C11 16V
1k MIOAD3 3
MIOA_D3

6
MIOA_D6
DR<6> GND 10%
MIOAD4 BL6 MIOA_D4
D9 DR<7> X7R
1% 4
0402 MIOAD5 BN6 MIOA_D5 MIOA_D8
D10 DR<8> 0402
5 8
COMMON MIOAD6 BK5 MIOA_D6 MIOA_D9
C10 DR<9> COMMON
6 9
MIOAD7 BK6 MIOA_D7 MIOA_D10
D12 DR<10> GND
7 1V8_AON 10
MIOAD8 BJ6 MIOA_D8 MIOA_D11
C12 DR<11>
8 11
MIOAD9 BH7 MIOA_D9
C13 DR<12>
9
MIOAD10 BK7 MIOA_D10
D5 DR<13>
10
R865 49.9ohm MIOA_CAL_PD_VDDQ 0.305 BM5 MIOACAL_PD_VDDQ MIOAD11 BN7 MIOA_D11
C9 DR<14>
GND
0402 COMMON
11 R19
1%
R863 49.9ohm 2.2k
MIOA_CAL_PU_GND 0.305 BM8 MIOACAL_PU_GND MIOA_D4
D13 DR_CMD
5% 4
0402 1% COMMON
0402
D8 DR_CLK
COMMON
MIOA_D7
C1 RASTER_SYNC GND 5
7
MIOA_VREF 0.305 BL9 MIOA_VREF D1 SWAP_RDY GND 6
GND GPIO23_RASTER_SYNC1 R732 33ohm MIOA_RASTER_SYNC1
GND 4
{26,27} BI
0402 5% COMMON D2 EXT_REFCLK
GPIO22_SWAPRDY_IN
{26,27} BI
C1172 R861
0.1uF 1k MIOA_CON_CLKIN GND
MIOA_CTL3 BN8 MIOA_CTL3 MIO_SIGNALS
16V 1%
0402 MIOA_HS BH8 MIOA_HSYNC MIO_SIGNALS
10%
X7R COMMON MIOA_VS BJ8 MIOA_VSYNC
MIO_SIGNALS
BK8 MIOA_DE R371
0402 MIOA_DE MIO_SIGNALS
0ohm
COMMON
0.05 ohm
2 0402 2
COMMON
MIOA_CLKOUT BL7 MIOA_CLKOUT
MIO_SIGNALS
GND NC BN28
MIOA_CLKIN BG8 MIOA_CLKIN
MIO_SIGNALS

3 3

CN1A
G1T INS9814676
MIO_SIGNALS
@digital.u_gpu_gb3c_384(sym_14):page26_i157 MIOB_D[11..0] NONPHY_DUAL_6GND
BGA2397
1V8_MAIN COMMON COMMON

14/24 MIOB SLI - EMI SHIELD


1/2
MIOBD0 BE10 MIOB_D0 MIOB_D0
A2 DR<0> SLI_LED A7 SLI_LED
{26,48}
0 0 IN
MIOBD1 BF11 MIOB_D1 MIOB_D1
B4 DR<1>
1 1
MIOBD2 BG10 MIOB_D2 MIOB_D2
A4 DR<2> GND B3
2 2
MIOBD3 BH11 MIOB_D3 MIOB_D3
A5 DR<3> GND B7
R852 BJ10 MIOB_D4
3 3
B6 B11 C1377
MIOBD4 DR<4> GND
1k 4 0.1uF/NC
MIOBD5 BL11 MIOB_D5 MIOB_D5
A6 DR<5> GND A3
1% 5 5 16V
0402 MIOBD6 BM11 MIOB_D6 MIOB_D6
A8 DR<6> GND A11
6 6 10%
COMMON MIOBD7 BK11 MIOB_D7 B9 DR<7> X7R
7
MIOBD8 BJ11 MIOB_D8 MIOB_D8
B10 DR<8> 0402
8 8
MIOBD9 BG11 MIOB_D9 MIOB_D9
A10 DR<9> COMMON
9 9
MIOBD10 BE11 MIOB_D10 MIOB_D10
B12 DR<10>
GND
10 10
R855 49.9ohm MIOB_CAL_PD_VDDQ BM9 MIOBD11 BD11 MIOB_D11 A12
0.305 MIOBCAL_PD_VDDQ DR<11>
MIOB_D11

11 11
4
0402 1% COMMON A13 DR<12> 4
R854 49.9ohm MIOB_CAL_PU_GND BK9 B5
0.305 MIOBCAL_PU_GND DR<13>
0402 1% COMMON A9 DR<14> GND

MIOB_D4
B13 DR_CMD
4
MIOB_VREF 0.305 BN12 MIOB_VREF B8 DR_CLK
GND
MIOB_D7
A1 RSTR_SYNC GND 1
7
B1 SWAP_RDY GND 2
GND 3
B2 EXT_REFCLK
MIOB_CTL3 BK12 MIOB_CTL3 MIO_SIGNALS
MIOB_HS BF9 MIOB_HSYNC
MIO_SIGNALS
C1156 R853 BK10 MIOB_VSYNC
0.1uF 1k MIOB_VS MIO_SIGNALS
MIOB_DE BM12 MIOB_DE
MIO_SIGNALS
MIOB_CON_CLKIN GND
16V 1%
10% 0402 R1311
X7R COMMON
0ohm
0402
0.05 ohm
COMMON
MIOB_CLKOUT BM10 MIOB_CLKOUT MIO_SIGNALS 0402
COMMON
MIOB_CLKIN BG9 MIOB_CLKIN MIO_SIGNALS

GND

GPIO21_RASTER_SYNC0 R960 33ohm GPIO21_RASTER_SYNC0_R


{27} BI
0402 5% COMMON

GPIO22_SWAPRDY_IN R18 0ohm MIOB_SWAPRDY_FL_INT2


{26,27} BI
04020.05 ohm COMMON
5 5
GPIO23_RASTER_SYNC1 R1313 33ohm/NC
{26,27} BI
0402 5% COMMON

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL MIOA/B INTERFACE & FRAME LOCK
MIOA/B Interface and FRAME LOCK
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 26 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page27: MISC1: Fan, Thermal, JTAG, GPIO, STEREO NV3V3 NV3V3

R640 R304
10k/NC 10k
5% 5%
0402 0402
DNI COMMON

1 1

THERM_OVERT*
OUT {28,45,46}

NV3V3

1V8_AON

R964
2 10k/NC 2
5%
0402
COMMON
R254 R247 R319 R318 R252 R251
2.2k 2.2k 2.2k 2.2k 2.2k 2.2k
5% 5% 5% 5% 5% 5%
G1V 0402 0402 0402 0402 0402 0402
@digital.u_gpu_gb3c_384(sym_15):page27_i180 COMMON COMMON COMMON COMMON COMMON COMMON
BGA2397
COMMON

15/24 MISC1

I2CS_SCL BF19 I2CS_SCL R274 33ohm I2CS_SCL_R


R259 33ohm IN {3}
I2CS_SDA BG19 I2CS_SDA 0402 5% COMMON I2CS_SDA_R
{3}
BI
0402 5% COMMON
BA30 TS_VREF
BB30 BC18 I2CC_SCL R851 33ohm I2CC_SCL_R
TS_VREF I2CC_SCL OUT {32,34,44,47,50}
I2CC_SDA BD18 I2CC_SDA 0402 5% COMMON R846 33ohm I2CC_SDA_R
BI {32,34,44,47,50}
THERM_DN 0402 5% COMMON

C1206 BE14 BC19 I2CB_SCL R253 33ohm I2CB_SCL_R


2.2nF/NC THERMDN I2CB_SCL OUT {32,34,47,50}
BD19 I2CB_SDA 0402 COMMON R250 33ohm I2CB_SDA_R
16V
I2CB_SDA 5%
BI {32,34,47,50}
BF14 THERMDP 0402 5% COMMON
10%
X7R
0402 THERM_DP GPIO9_THERM_ALERT*
DNI
IN {44}
OUT {5,7,10,12,15,17}
GPIO0 BJ17 GPIO0_NVVDD_PWMVID
{34}
OUT
GPIO1 BK17 GPIO1_NVAPI {34}
PLACE NEAR U505 IN
GPIO2 BJ18 GPIO2_NVAPI {34} nv_cap
BK18 GPIO3_NVAPI
IN R899
GPIO3 IN {34} 10k
GPIO4 BG18 GPIO4_NVAPI NV3V3
3 IN {34} 5% NV3V3 NV3V3 12V_F 3
GPIO5 BG17 GPIO5_NVAPI {34} 0402
12V_PEX8_F1
IN
GPIO6 BE17 GPIO6_NVVDD_PSI*
{45} COMMON
OUT
GPIO7 BL16 GPIO7_SLI_LED_DIM
{48}
BL30 BJ15 GPIO8_FBVDD_SEL
OUT R283 C107 R291 D4 R282 R273
JTAG_TCK GPIO8 OUT {32} 10k 10uF 1k 0ohm/NC 0ohm

3
BL31 JTAG_TMS GPIO9 BG15 GPIO9_THERM_ALERT* @discrete.d_3pin_cc(sym_2):page27_i93
5% 6.3V 5% 0.05 ohm 0.05 ohm
BM30 JTAG_TDI GPIO10 BL15 GPIO10_FBVREF_SEL
0402 0402
30V
0805 0805
10% 0.2A
BN30 JTAG_TDO GPIO11 BF17 GPIO11_LOGO_LED_POWER_BRAKE
{46,48} GND COMMON X7R COMMON COMMON DNI
BI SOT23
JTAG_TRST* BN31 JTAG_TRST GPIO12 BD17 GPIO12_LOW_PERF*
{32,45} 0805 COMMON nv_cap FAN

2
IN
GPIO13 BK16 GPIO13_FAN_TACH COMMON BAT54C R0402 +0.05R

GPIO14 BM16 GPIO14_IFPA_HPD R0805 GPIO16_FAN_PWM R637 0/NC FAN_PWM 1 J11


IN {21}
BF31 NVJTAG_SEL GPIO15 BM15 GPIO15_YL {31,46} GND NO STUFF 2 @electro_mechanic.hdr_1x4(sym_1):page27_i114
BI MALE
GPIO16 BK15 GPIO16_FAN_PWM 0.635 FAN_PWR 3 2.0MM
R886 R884 BN15 GPIO17_IFPD_HPD 4 VERTICAL
10k 10k/NC GPIO17 IN {25} R292 C369 C223 C222
GPIO18 BN16 GPIO18_IFPE_HPD
{22}
NORM
5% 5% IN 10k/NC 1000pF 0.1uF 1uF/NC COMMON
0402 0402 GPIO19 BG16 GPIO19_VID 50OHM_NETCLASS1 {34}
OUT 5% 16V 50V 25V
COMMON COMMON GPIO20 BF18 GPIO20_RGB {31,46,50} 0402
BI 10% 10% 10%
GPIO21 BD15 GPIO21_RASTER_SYNC0 50OHM_NETCLASS1 {26} DNI X5R X7R X7R
BI
GPIO22 BC16 GPIO22_SWAPRDY_IN 50OHM_NETCLASS1 {26} 0603 0402 0603
BI
GPIO23 BF15 GPIO23_RASTER_SYNC1 50OHM_NETCLASS1 {26}
COMMON COMMON COMMON
BI
GPIO24 BD16 GPIO24_IFPF_HPD
{23}
IN
GPIO25 BD13 GPIO25_DYN_BAL1 R0603
GND GND GPIO26 BF22 GPIO26_DYN_BAL2 5V
GPIO27 BK23 GPIO27_IFPC_HPD
{24} GND
IN
GPIO28 BN10 GPIO28_OC_WARN
{44}
IN
GPIO29 BD20 GPIO29_RGB {31,46,50}
BI
GPIO30 BE20 GPIO30_SWAPRDY_OUT 50OHM_NETCLASS1 C496
1UF/10V,X5R
R798 82.5K C0402
R0402 5% COMMON

4
K65K:R786=65K 4
K15K:R786=82.5K GND

8
VCC
R561 0 4
R0402
RESET
+0.05R
R958 R850
100k/NC 100k/NC Circuit
5% 5%

1G1D1S 3
0402
COMMON
0402
COMMON 7 J18
1 4
D Q36 DISCH
@discrete.q_fet_n_enh(sym_2):page27_i25 GPIO16_FAN_PWM R549 0 GPIO16_FAN_PWM_BU 1
1G SOT23_1G1D1S R302 R588 R639 R225 R1118 4.7K R0402
1
COMMON 10k 10k/NC 1k 1k 2 5
S 2 Q_FET_N_ENH/NC R0402 5% COMMON FAN_PWM R548 +0.05R 0 FAN_PWM_BU 2
20V
5% 5% 5% 5%
K65K:R812=14K R0402 2
0402 0402 0402 0402
6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V DNI COMMON COMMON K15K:R812=4.7K 6 3 FAN_PWM_555 R555 +0.05R 0 FAN_PWM_555_BU 3
R267 6.5A
1.4W
NV3V3 THRES OUT R0402 12V_F 3
1k/NC 3 6

4
5
6
8V
+0.05R
5%
0402
CON3

4
5
6
COMMON
R296 6-pin OC Button Connector
2 10K
TRIG
R0402
GND GND INPUT_BU {44}
C247 OUT
1000PF
16V
5
10% CONT
5

GND
X7R 5
C0402
COMMON C386
103PF
U20

1
16V
GND 10%
LM555CM
X7R SOP8_1_27MM_3_8MM
C0402
COMMON
Galaxy Microsystems (HK) Ltd.
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MISC1: Fan, Thermal, JTAG, GPIO, STEREO
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY GND Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 27 of 52

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Page28: MISC2: ROM, Straps

STRAP2 STRAP1 STRAP0 RAMCFG[4:0]

L L L 00000 GROUP0 GROUP1 GROUP2

L H L 00010
1 1
L H H 00011

H H L 00110

H H H 00111

ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] 1:ENABLE 0:DISABLE

1V8_AON 1V8_AON
L L L 1111 DEFAULT SOR0/1/2/3 ENABLE 1V8_AON

L L H 1110
R858 R860 R862 R23 R12 R9 R869 R867 R848
L H L 1101 100k/NC 100k 100k/NC 100k/NC 100k/NC 100k/NC 100k 100k/NC 100k/NC
1% 1% 1% 1% 1% 1% 1% 1% 1%
0402 0402 0402 0402 0402 0402 0402 0402 0402
L H H 1100 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

STRAP0 ROM_SI STRAP3

H L L 1011
STRAP1 ROM_SO STRAP4

H L H 1010
2 STRAP2 ROM_SCLK STRAP5
2

H H L 1001
R857 R859 R864 R17 R11 R7 R868 R866 R849
100k 100k/NC 100k 100k 100k 100k 100k/NC 100k 100k
H H H 1000 1% 1% 1% 1% 1% 1% 1% 1% 1%
0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
L L M 0111

L M L 0110

GND
L M H 0101 GND GND

L H M 0100

H L M 0011

H M L 0010

H M H 0001

H H M 0000
3 3

1V8_AON
STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE
1V8_AON
M H H 1 1 1 1
R10
G1W 10k U3
M H L 1 1 1 0 @digital.u_gpu_gb3c_384(sym_17):page28_i85 5% @memory.u_mem_fl_ser_512kx8(sym_1):page28_i82
BGA2397 0402 SO_8
COMMON COMMON
COMMON
M L H 1 1 0 1 17/24 MISC2 7 HOLD* VCC 8
3 WP*/NC
BM13 ROM_CS* 1 C29
ROM_CS CS* 0.1uF
M L L 1 1 0 0 R14 100ohm 16V
ROM_SI BN14 ROM_SI ROM_SI_R 5 DIO 10%
ROM_SO BM14 ROM_SO 0402 5% COMMON 2 DO X7R
STRAP0 BG14 BL13 ROM_SCLK R16 100ohm ROM_SCLK_R 6 4
L H M 1 0 1 1 STRAP0 ROM_SCLK CLK GND 0402
STRAP1 BH14 STRAP1 0402 5% COMMON COMMON
STRAP2 BJ14 STRAP2
STRAP3 BL14
L M H 1 0 1 0 STRAP3
STRAP4 BK14 STRAP4
STRAP5 BC15 STRAP5 SO08_048X038
L M L 1 0 0 1 GND
OVERT BJ16 THERM_OVERT*
{27,45,46}
OUT

L L M 1 0 0 0 BUFRST BD14
W25Q40EWSNIG

4 4
H H H 0 1 1 1

H H L 0 1 1 0

H L H 0 1 0 1

H L L 0 1 0 0

L H H 0 0 1 1

L H L 0 0 1 0

L L H 0 0 0 1 DEFAULT

L L L 0 0 0 0

H=High :Tied to 1.8V 1:SMB_ALT_ADDR ENABLE 1:PCIE_CFG LOW POWER


M=Middle:Tied to 0.9V 0:SMB_ALT_ADDR DISABLE 0:PCIE_CFG HIGH POWER
5 L=Low :Tied to 0V 5
1:DEVID_SEL REBRAND 1:VGA_DEVICE ENABLE
0:DEVID_SEL ORIGNAL 0:VGA_DEVICE DISABLE

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL MISC: ROM, STRAPS
MISC2: ROM, Straps
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 28 of 52

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Page29: MISC2: XTAL. PLL

1 1

1V8_MAIN

Place near GPU


L2 30ohm GPU_PLLVDD_XS_SP
OUT {21,22,24,29}
BEAD_0603 COMMON
C80 C1083
2 22uF 4.7uF 2
6.3V 6.3V
20% 20%
X6S X6S
0805 0603
COMMON COMMON

GND

G1X
@digital.u_gpu_gb3c_384(sym_16):page43_i55
BGA2397
COMMON

16/24 XTAL_PLL

BA19 XS_PLLVDD VID_PLLVDD BA20 GPU_PLLVDD_XS_SP


{21,22,24,29}
IN
BB19 XS_PLLVDD VID_PLLVDD BB20
C913 C1128 C1146 C1093
0.1uF 0.1uF 0.1uF 0.1uF
T41 GPCPLL_AVDD0 SP_PLLVDD BC20
16V 16V 16V 16V
T42 GPCPLL_AVDD0
10% 10% 10% 10%
3 X7R X7R X7R X7R T43 GPCPLL_AVDD0 3
C1076
0402 0402 0402 0402
0.1uF C1088
COMMON COMMON COMMON COMMON L16 GPCPLL_AVDD1 16V 0.1uF
M16 GPCPLL_AVDD1 10% 16V
1005_BGA N16 GPCPLL_AVDD1 X7R 10%
0402 X7R
GND AV11 GPCPLL_AVDD2 COMMON 0402
AV12 GPCPLL_AVDD2 COMMON
AV13 GPCPLL_AVDD2 1005_BGA
GND 1005_BGA
GND
1V8_FB_PLL_REF AG41 FB_REFPLL_AVDD0
{4,9,14} IN
AG42 FB_REFPLL_AVDD0
C1037 C1154 C894
0.1uF 0.1uF 0.1uF
M27 FB_REFPLL_AVDD1
16V 16V 16V
N27 FB_REFPLL_AVDD1
10% 10% 10%
X7R X7R X7R
0402 0402 0402 AG12 FB_REFPLL_AVDD2 1V8_AON
COMMON COMMON COMMON AG13 FB_REFPLL_AVDD2
1V8_AON

R883 10k BE13 XTALSSIN XTALOUTBUFF BF13 XTALOUTBUFF R882 100k


GND 0402 5% COMMON 0402 5% COMMON
BJ13 XTALIN XTALOUT BH13

X
T
A
L
S
S
I
N
_
G
P
U
R877
100k
Y501 5%
R876 INS9901678 0402
10k SMD_60X35
COMMON SmartFan Strap Table
27MHz 50OHM_NETCLASS1
5%
COMMON
0402 R881 XTALOUTBUFF Inverted
4 COMMON 4
XTALSSIN_RC 10k STRAP VALUE Voltage SmartFan PWM %
XTALIN 1 3 XTALOUT
5%
0402
4 2 GND
C1222
COMMON
18pF C1224 C1223 0 0V GPIO DISABLED
50V 22pF XTAL_4P_S 22pF
5% 50V Y502 50V 1 0.9V 33% PWM
C0G 5% INS9901712 5%
0402 C0G C0G
SMD_60X35 3 1.8V 66% PWM
COMMON 0402 0402
27MHz/NC
COMMON COMMON COMMON

GND GND GND 1 3


4 2 GND

XTAL_4P_6X3_5MM

GND GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL MISC: XTAL, PLL
MISC2: XTAL. PLL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 29 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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A B C D E F G H

Page30: PS: 5V, PEX_VDD

3V3_F 12V_F

PEX_VDD

D512

1
@discrete.d_3pin_cc(sym_3):page29_i325
1 30V R814 R812 R813 1
5.1ohm 5.1ohm 5.1ohm

PEX PLL Switcher


0.2A
SOT23 1% 1% 1%
BAT54C
COMMON 0805 0805 0805

3
COMMON COMMON COMMON

C649 1uF PS_PEX_DSH_DR


0805LP 16V
5V 3V3_F 20% 7
D
X6S R821 6 PS_PEX_DSCH_QR
COMMON 2k
GND 5
5%
0603
2
COMMON 1G5D2S 1
R819 R820 Q535
0ohm 0ohm/NC @discrete.q_fet_n_enh(sym_19):page29_i340
0.05 ohm 0.05 ohm DFN06
0402 0402
3V3_F PS_PEX_DSH_QC 3 COMMON
COMMON DNI 1G1D1S 3 4
D Q532 8 PB600BA
@discrete.q_fet_n_enh(sym_2):page29_i296 C645 S DFET_SMD_020X020_B
30V
SOT323_1G1D1S 10uF/NC
{34,46,47}
PS_NVVDD_PGOOD 1G COMMON
9A
12mohm@10V / 17.5mohm@4.5V / 0mohm@2.5V
C733 R827 IN
S 2 16V 27A
1.7W
1uF C717 10k/NC 20% 20V
30V X6S
6.3V 10uF/NC 5% C735 C103 C106 0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V 0805LP
10% 6.3V 0402 0.1uF 10uF 10uF 1.2A
COMMON
X7R COMMON 0.2W GND
20% 16V 6.3V 6.3V R828 12V
0603 X6S 10% 10% 10% 100k RJU003N03
COMMON 0805LP U526 X7R X7R X7R
5% SOT323
COMMON @power_supply.u_openvreg_type0(sym_1):page29_i317
0402 0805 0805
0402
UP1728QDDA-0.6V COMMON COMMON COMMON GND
DNI
GND GND DFN10 GND
COMMON
2 2
{47}
PEX_OVREG_PGOOD 9 PGOOD VIN 3
OUT
GND PEX_OVREG_BOOT_R
OpenVReg
PS_PEXVDD_EN R114 0ohm PEX_OVREG_EN 10
IN {46} EN/FS
04020.05 ohm COMMON 8 PEX_OVREG_BOOT R829 0ohm/NC C796 10nF/NC
BOOT/NC
04020.05 ohm COMMON 0402 25V PEX_VDD
PEX_OVREG_VCC 2 VCC
10%
X7R
SW 6 COMMON
7 PEX_OVREG_SW L3 1uH
C102 SW
GND 4 SMD_5X5 COMMON
0.1uF/NC PEX_OVREG_FB 1 FB GND 5 COIL_5_4X6mm
16V
11 C91 C92 C90 C288 C289
10% THERM 0.1uF 22uF 22uF 22uF 22uF
X7R
R826 R838 16V 6.3V 6.3V 6.3V 6.3V
0402
COMMON
100ohm 0ohm 10% 20% 20% 20% 20%
X7R X6S X6S X6S X6S
0.05 ohm 0.05 ohm
0402 0805 0805 0805 0805
CCP STUFF R826 FOR LOCAL SENSE 0402 0402
COMMON COMMON COMMON COMMON COMMON
Vout = Vref * (1+Rtop/Rbot) C745 1nF RCP
GND COMMON
GND PEX_OVREG_FB_RC R825 0ohm
0402 16V 04020.05 ohm COMMON
STUFF R838 FOR REMOTE SENSE
1.008 = 0.6 * (1+6.81K/10K) 10%
X7R
COMMON

R824 6.81k PEX_FB_SENSE GND


0402 1% COMMON

R822 R183
R2 10k 0/NC R1
1% +0.05R
0402 R0805
COMMON COMMON

3 3

GND
3V3_F

R329 1k 12V_F 12V_PEX8_F1


0402 5% COMMON
C263
1nF R1127 R184
50V 0ohm/NC 0
10% 0.05 ohm +0.05R
X7R R0805
R0805
0402
COMMON

C501 C252
GND
0.1uF 10uF
16V 16V
10% 20%
X7R X6S U27
0402 0805 @power_supply.u_swreg_sot23_8hv(sym_1):page29_i257
COMMON COMMON RT7296-0.807V PS_5V_SW_BOOT PS_5V_SW_BOOT_R
SOT23_8
COMMON R321 0ohm
GND GND 2 VIN BOOT 5 0402 5% COMMON
C254
5V F501
0.1uF
PS_5V_ENABLE 6 EN/FSYNC 0.75A/NC DDC_5V
16V
1206
nv_cap nv_cap nv_cap
10% COMMON
PS_5V_SW_VCC PS_5V_SW_PHASE PS_5V_DDC 0.3A
X7R
7 VCC SW 3 0402 L15 4.7uH 2D1 1 1
@discrete.d_schottky(sym_3):page29_i290 2 0.400 5V
COMMON SMD_5X5 COMMON
4 0.100 4
C262 C260 R330 PS_5V_SW_ISET
SOD-123
POLYSWITCH
0.100 COIL_5_4X6mm 40V
0.1uF 0.1uF 100k C248 C249 C251 C1423
1 MOD/PG PS_5V_SW_FB 3A
16V 16V 1% 22uF 22uF 0.1uF COMMON 220pF C1459 C1460 C264
3V3_F PS_5V_SW_FB_R
STUFF IF USING MP1494SGJ 10% 10% 0402
R323 16.5k 6.3V 6.3V 16V D_SCHOTTKY/NC 50V 10uF 10uF 10uF
5V X7R X7R COMMON 4 GND FB 8
0402 COMMON PS_5V_SW_FB_SENSE
20% 20% 10% U6 5% 6.3V 6.3V 6.3V
0402 0402 1% X6S X6S X7R C0G
R313 R326 COMMON COMMON C261 15pF @power_supply.u_power_sw(sym_7):page29_i330 20% 20% 10%
0805 0805 0402 SOT23_5B 0402 X6S X6S X7R
4.99k/NC 10k COMMON COMMON COMMON
0402 50V COMMON 0805LP 0805LP 0805
1% 5% 2%
GND GND COMMON COMMON COMMON
0402 0402 R328 C0G
R331 40.2k R312 0ohm 5 IN 1
COMMON COMMON
11.3k/NC COMMON OUT
0402 1 % COMMON 04020.05 ohm COMMON
PS_1V8_AON_EN R320 0ohm 1% R327 DDC_5V_SW_ENABLE1

OUT {31,46,49} 0402 7.68k R58 0ohm


0402 COMMON COMMON GND 4 EN GND
1% R316 0ohm/NC
0.05 ohm 04020.05 ohm COMMON
R317 0402
COMMON 04020.05 ohm COMMON
10k/NC
2 GND OC* 3
5%
0402
COMMON GND
GND
GND APL3511CBI-TRG

GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: 5V, PEXVDD
PS: 5V, PEX_VDD
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 30 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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A B C D E F G H

Page31: PS: 1V8 Rails

1 1

5V 12V_F 12V_PEX8_F1

R943 R944 R176


0ohm/NC 0ohm/NC 0
0.05 ohm 0.05 ohm +0.05R
12V_F 12V_PEX8_F1
0402 R0603
R0603 U2
COMMON
@power_supply.u_swreg_aoz1237(sym_1):page40_i383
R1126 R179
AOZ1267QI-01
C1374 QFN4X4
0ohm/NC 0
1uF COMMON 0.05 ohm +0.05R
16V R0805
R0805
COMMON COMMON
10% PS_1V8_MAIN_APW8713_AIN
X6S VIN 8
0402 7 AIN VIN 9
COMMON VIN 22
R942 PS_1V8_MAIN_APW8713_VCC 24 C30 C32 C31
0ohm/NC VIN PS_1V8_MAIN_APW8713_TON 0.1uF 10uF 10uF
GND 21 VCC
0.05 ohm R6 130k 16V 16V 16V
0402 TON 6
10% 10% 10%
COMMON PS_1V8_MAIN_APW8713_BST 0402 1% COMMON
2 R947 X7R X7R X7R 2
0402 0805 0805
10k C35 0.1uF
BST 20 R13 0ohm COMMON COMMON COMMON
5%
04020.05 ohm COMMON 0402 16V
0402
10%
COMMON PS_1V8_MAIN_APW8713_BSTR
C1372 PS_1V8_MAIN_APW8713_PGOOD 1 X7R
1uF PGOOD COMMON
GND R928 0ohm
R948 16V
1206 COMMON
0.05 ohm
4.99k 10% R955
X6S
PS_1V8_MAIN_APW8713_PFM
SW 10
1% 10k R946 10k/NC R929 0ohm
0402
0402 3 PFM* SW 11
5%
COMMON
COMMON
0402
0402 5% COMMON SW 16 0.300 1V8_AON 1206 0.05 ohm COMMON 1V8_MAIN
COMMON SW 17 0.300 1.8V
PS_1V8_AON_PGOOD 18
GND SW PS_1V8_MAIN_APW8713_PHASE 5A 3.0A
R953 0ohm 25 L1 1uH
OUT {31,49} SW 0.300
04020.05 ohm COMMON PS_1V8_MAIN_APW8713_EN 7_6X7_6 COMMON
2 C1369
EN IND_NONRKO_SMD_076X076
1nF PS_1V8_MAIN_APW8713_RJ C1363 C1367
GND GND
50V R8 49.9k C28 2.2nF 22uF 22uF

@discrete.q_fet_n_enh(sym_5):page40_i378
C40
5
10%
0402 COMMON 0402 16V
C34 C48 C53 C39 6.3V 6.3V

LFPAK
FB X7R 1%
22uF 22uF 22uF 22uF 330uF 20% 20%

COMMON
PS_1V8_MAIN_APW8713_SS 10%

Q547

130V
0402

DFN3X3
X6S X6S
R930

PS_1V8_MAIN_APW8713_SNUB
COMMON

2
3
R922 0ohm X7R 6.3V 6.3V 6.3V 6.3V
{30,46,49}
PS_1V8_AON_EN 23 SS COMMON
+10%/-35% 0805LP 0805LP
IN 1ohm COMMON 20% 20% 20% 20%
COMMON COMMON
0402 COMMON
0.05 ohm 2.5V@105degC
X6S X6S X6S X6S
5% C27 AL-Polymer
0805 0805 0805 0805 032-0563-000

S
C1375 C25 1206 100pF C26 680pF 3A@105degC,100KHz
PGND 12 COMMON
COMMON COMMON COMMON COMMON
0.1uF 2.2nF 25V 0.009ohm
13 0402 16V Q_FET_N_ENH/NC

4G
16V 50V
PGND 10% SMD_7343
4 AGND PGND 14 X7R
10%
GND
10% 10% X7R
X7R X7R PGND 15 0402
COMMON CO-PLACE CAPS
0402 0402 PGND 19 GND COMMON R3 12.7k 12V_F
COMMON COMMON 0402 1% COMMON GND
PS_1V8_MAIN_GS9238_R
PS_1V8_MAIN_APW8713_FB
GND R4 0ohm
3 R5 R180 R949 R904 3
04020.05 ohm COMMON
10k 0/NC 10k/NC 10k/NC
1% +0.05R 5% 5%
GND

PS_1V8_MAIN_FET_Q
0402 R0805 0402 0402
GND COMMON COMMON COMMON COMMON
1G1D1S 3 PS_1V8_MAIN_FET_RC
D Q541
@discrete.q_fet_n_enh(sym_2):page40_i370
1G SOT323_1G1D1S C1347 R903
COMMON 22nF/NC 100k/NC
12V_F 12V_PEX8_F1 GND S 2
3 C1376 50V 5%
1G1D1S 30V
D 1nF/NC 10% 0402
Q553 0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
X7R COMMON
R1041 R177 50V 1.2A
@discrete.q_fet_n_enh(sym_2):page40_i366 0.2W 0603
0ohm/NC 0/NC R661 0/NC SOT323_1G1D1S 10%
{27,46} GPIO15_YL 1G COMMON
12V
X7R Q_FET_N_ENH/NC
COMMON
0.05 ohm +0.05R IN
R0805
S 2 0402
R0805 R0402 C1373 COMMON
30V
R662 0/NC 0.1uF/NC Q_FET_N_ENH/NC 0.3A
{27,46,50} GPIO20_RGB 1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
IN 25V 1.2A
0.2W
C36 C49 GPIO29_RGB R664
R0402 0/NC 10% 12V

0.1uF/NC 22uF/NC {27,46,50} IN X7R


0603
16V 16V R0402 DNI
10% 20%
X7R X6S U4
0402 0805 @power_supply.u_swreg_sot23_8hv(sym_1):page40_i303 GND GND
COMMON COMMON RT7296FGJ8F/NC PS_1V8_SW_BOOT PS_1V8_SW_BOOT_R
SOT23_8
COMMON R21 4.7ohm/NC Please route 1V8_AON local sense closed to Q75_PIN5
1V8_AON
GND GND 2 VIN BOOT 5 0402 5% COMMON
C50 PS_1V8_SW_FB_R1
0.1uF/NC R29 0ohm/NC
6 EN/FSYNC
16V
04020.05 ohm COMMON
10%
4 PS_1V8_SW_VCC X7R PS_1V8_MAIN_APW8713_PHASE 4
7 VCC SW 3 0402
COMMON
C1360 C1349 R906 PS_1V8_SW_ISET 0.300
0.1uF/NC 0.1uF/NC 100k/NC
1 MOD/PG PS_1V8_SW_FB
16V 16V 1%
10% 10% 0402
4 GND R25 82.5k/NC C54 15pF/NC
X7R X7R COMMON FB 8
0402 0402 0402 1% COMMON 0402 50V
3V3_F COMMON COMMON 2%
PS_1V8_SW_FB_R2 C0G
COMMON
GND GND R27 12.7k/NC
R934 R905 0402 COMMON
1%
10k/NC 11.3k/NC
5% 1% R26 R182
0402 0402 10k/NC 0/NC
COMMON COMMON
PS_1V8_AON_PGOOD 1% +0.05R
0402 R0805
R936 0ohm/NC
OUT {31,49} COMMON COMMON
0402 COMMON

0.05 ohm
C1370
GND
0.1uF/NC
GND
16V
10%
X7R
0402
COMMON

GND

5 5
1.8 = 0.8 * (1+18.7K/15K)

Vout = Vref * (1+Rtop/Rbot)

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: 1V8 Rails
PS: 1V8 Rails
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 31 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
FBVDDQ

NETNAME MAX_CURRENT MIN_LINE_WIDTH VOLTAGE

Page32: PS: FBVDD


R1380 0ohm

R0402

12V_F

R1333
10k/NC

3
R0402 PS_FBVDD_EN*
1B1C1E

B1
C Q48
PS_FBVDD_ENE_IN
FBVDD Power Supply 35A@1.04V
MMDT3904/NC
SOT23
FBVDD Enable 5V
E 2

3 C1502
1B1C1E
C Q47 10nF/NC R1352
PS_FBVDD_EN B1 16V
MMDT3904/NC VCC_NV_PWM 2.2R
{47} IN
SOT23
X7R
E 2 VCC_NV_PWM
GND 12V_F
R1332 C1501 R1358 For 3 Active Phase R0603 U708
2.74k/NC 0.1uF/NC
R0402
0ohm/NC
RT8813:R922=10K R1364 D=Positive Duty Cycle of PWM VID 1 8 FBVDDQ_FB_S
16V 2.2ohm 2.2R VCC OUT
GND R1377 UP1642:R922=5.6K
0ohm R1350 499 C376 R1349 2 7
X7R
GND
~300KHz A = (R4+R5)/(R3+R4+R5) 0.1UF R1351
R0402 10K/NC BUS_S NC
R0402 91K for UP1642 R0603
R0402
R0603 3 6
500K for RT8813 10K FOR RT8813 B = R3+R4+R5 R0402
GND NCC
R0402 R0402 ONSEMI NCP81172:external 5V C0402 4
I2C_SDA_R 5
C1519 RichtekRT8811: 5V Internal regulated
U709 SDA SCL
GND GND
1uF/NC UP1641: 5V Internal regulated
UP9509 Vout = Vref * A * (D*(R2//B)/(R1+R2//B)+(R1//B)/(R2+R1//B)) UP1804A
C1204 R118 Frequency Selection 16V BCD:AP3598: C1522 SOT23_8P

1V8_AON NV3V3 1uF 300k X5R


ANPEC:APW8732 1uF Vmin = Vout(D=0);Vmax = Vout(D=1)
16V
OPENVREG Vboot = Vref * A * B/(R2+B)
X5R
X7R C0603
R1322 R86 16V R0402 GND PS_FB_VCC 15 VCC PVCC 21 PS_FB_PVCC Vstb = Vref * A * (Rstb//B)/(R2+Rstb//B)
10k 10k/NC C0402 C0603

GND R1340 GND {27,34,44,47,50} I2CC_SCL_R R805 0/NC R0402 I2C_SCL_R


IN
39.2k/NC C1517 {27,34,44,47,50} I2CC_SDA_R R1347 0/NC R0402
IN
GPIO8_FBVDD_SEL R96 0ohm/NC R0402 R0402 0.1uF/NC
{27} IN
HGATE1 2
PS_FB_DRVH1 I2CB_SCL_R R1348 0 R0402
BI {33} {27,34,47,50} IN
R0402 {27,34,47,50} I2CB_SDA_R R1346 0 R0402
IN
3V3_F 12V_F R0402 X7R FBVDD Control
FBVDDQ
R100 16V
9 BOOT1 1
NV3V3 1V8_AON PS_FB_FREQ PS_FB_BOOT1
10k/NC FS BI {33}
C0402

1V8_AON NV3V3 PHASE1 24 PS_FB_PH1


BI {33}
D32 GND
R1103 R1104 R1105 R1106 R1378 R1379
2

LGATE1 23
INS9931200 PS_FB_DRVL1
15ohm 15ohm 15ohm 15ohm 15ohm 15ohm R1336 R1361 BI {33}
30V
1V8_AON R0402
NV3V3 R1337 R1374
0.2A 1% 1% 1% 1% 1% 1%
10K/NC 10K 10k 10k/NC
SOT23 0805 0805 0805 0805 0805 0805
R0402 R0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON GND
3

R1334 R87 C1521 0.1uF/NC R1353 100 ohm


BAT54C R0805 R0805 R0805 R0805 R0805 R0805 R0402 R0402
GND PS_FB_PGOOD16 PGOOD
C1485 1uF 12.4k 10k/NC GND
PS_FBVDD_D PS_FBVDD_DIS_QR 16V C0402 R0402

0603 16V
SOT23
3 EN
X7R
20%
D 7
X5R R1102 6
COMMON 2k R1101 0ohm
GND C0603 5 R0402 R0402 4 PSI HGATE2 17 PS_FB_DRVH2
{33}
5% BI
R1369 0ohm FBVDDQ_SENSE_RTN
2
0603 R76 IN {19}
COMMON 1G5D2S 1 DFET_SMD_020X020_B R0402 PS_FBVDD_VID 5 VID
R0402
10k/NC R1381 0ohm/NC
Q129
{52} PS_FBVDD_VREF
BOOT2 18 PS_FB_BOOT2
{33}
IN BI
R0603 INS9931422 PS_FB_VREF_R2 787Ω
DFN06 R1357 0ohm R1360 787
PS_FBVDD_DIS 3 COMMON PS_FB_VREF_RSTB PS_FB_VREF
R0402 8 VREF PHASE2 19 PS_FB_PH2
{33}
1G1D1S 3 4 30V
R0402 R0402
R2
BI C1531 Remote Sense
D R3 C1520 1uF 1nF
Q128 8 9A
12mohm@10V / 17.5mohm@4.5V / 0mohm@2.5V
R0402
SENSE_GND LGATE2 20 PS_FB_DRVL2
{33}
INS9931046 C1486 S 27A (R_BOOT) C0402 6.3V
BI 50V
1.7W
SOT23_1G1D1S 10uF/NC R1339
PS_FBVDD_EN 1G COMMON
20V
C_VREF X7R
16V PB600BA 200 X5R
S 2 GND
20%
60V X5R 7 REFIN
0.3A
0603 PS_FB_REFADJ_R1 C0402 R1372 0ohm FBVDDQ_SENSE_GPU
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V

R1356 0ohm R1359 20k IN {19}


0.8A
0.35W
COMMON
GND
R0402 PS_FB_REFADJ 6 REFADJ
20V
C0603 GPIO12_LOW_PERF* {27,45}
R0402 R0402
SOT23 OUT
R0402 R1 GNDSNS 10
PS_FB_REFIN R1=(R_REFADJ)(R831+R200)
R1345 11 R1370 0 FBVDDQ_FB_S C1514 R73 100ohm
GND GND VSNS
1k/NC R0402 50pF/NC FBVDDQ
50V
Co-Layout 12 PS_FB_COMP
R0402

COMP X7R
R4
R0402
R1355 R1338 For 3 Active Phase C0402
C1503 2k R1373 499
0/NC 10K FOR RT8813 R0402 14 TALERT GND
4.7nF R0805 R1368 2k PS_FB_SENSE_R
PS_FB_SENSE
25V R0402 R1321 30k/NC R0402
R0805
VCC_NV_PWM R0402
X7R

PS_FB_TSNS 13 C1526 150pF/NC PS_FB_COMP_C


TSNS
C0402 C1516 50V C0402 R1367 270 ohm PS_FB_SENSE_RC C1532 820pF
C1518 50pF/NC C0402
50V
4.7nF/NC 50V C0G R1366 0ohm/NC
22 GND R0402
C_REFIN 25V R0402
X7R CHANGE BOM X7R

25 R1376
12V_PEX8_F1 X7R THERM/GND CHANGE BOM
0ohm
VCC_NV_PWM qfn24p_0_5mm_ep C0402 R1363 12k R0402 PS_FB_COMP_RC C1528 10nF
C0402 16V
R381/R382 FOR UP9510+UP1962 GND R0402
X7R

C0402
R381 0ohm/NC R1365
CHANGE BOM
0ohm
1 2 CHANGE BOM

12V_F R0805 C1515 R0402


R210 50pF/NC
R382 0ohm/NC
50V
1 2 1k/NC
NTC For 2 Phase X7R
R1323 R1326 R0805
0 0/NC SENSE_GND
U532 R0402 GND
C0402 12V_PEX8_F3
R0603 ADJ_VR=1.25V
R0603 VCC_NV_PWM
GOI,IGOI,TO263

FBVDD=1.6V@40A
SOT223
For 3 Active Phase GND
5V_VIN_FN 3 2 GND
IN OUT
4
TAB
R1344 499 C1507 C1508 C1509 C1511 C1533 C1573 C1574
GND/ADJ

C1487 C1492 R1324 C1490 C1488 C1491 R0402 0.1uF 10uF 10uF 10uF 10uF 10uF 10uF
10uF 0.1UF 124 10UF/6.3V 4.7UF 0.1UF R1343 R1354 16V 16V 16V 16V 16V 16V 16V
16V 16V Rt 6.3V 6.3V 16V 1K 2.2
10K FOR RT8813
X7R X5R X5R X5R X5R X5R X5R
1

X5R X7R X5R X5R X7R LFPAK D 5


R0402 C0805 C0603 C0402 Q580
5V_ADJ_DR MDU1514 C0603 C1206 C1206 C1206 C1206 C1206 C1206
C0805 C0402 R0402 R0402 R1341 0ohm PS_FB_DRVH3_R 4G
Rb 0.125 S 1 30V
R1325 2 38A
R0603 0.014R@4.5V,0.009R@10V
383 R201 2.2ohm C1534 0.1uF R1362
R0402 3 100A
3.5W@25C GND
100k/NC +/-20V
GND 16V

GND R0603 DFN55X6_1_27MM


X7R
FBVDDQ
Vref=1.256V C0603
Vo_Typ=1.256*(1+383/124)+60uA*383=5.13V R0402

PS_FB_PH3 L502 0.220uH


GND
U533 uP1909 LFPAK D 5 DIP_COIL_11_3X6_8MM
Q579 C1512 C1505 C1523 C1529 C1530 C1527
2200pF 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
U9_UG3 1 8 MDU1511
1200uF + +
UGATE PHASE PS_FB_DRVL3 4G C1510 50V 6.3V 6.3V 6.3V 6.3V
1nF/NC
S 1 30V X7R X5R X5R X5R X5R C1525 C1524
50V
FBVDDQ U9_BOOT32 7 2 86.3A
0.005R@4.5V,0.0034R@10V 2.5V 470UF/2V 470UF/2V
BOOT EN R1342 C1506 3 100A
OCCAP
49.9k/NC 1nF/NC
3.5W@25C X7R
3.6A@105C
GND
+/-20V
PS_FB_RC3
C0402 C0805 C0805 C0805 C0805
50V 0.010R C2818 C2818
R1320 0ohm U9_PWM 3 6 DFN55X6_1_27MM
PWM VCC C0402 R589 DIP_ECAPD8MM
X7R 1ohm
R0402 R0402

4 5 GND
+ + + + + + + + + + GND GND1 LGATE C0402 GND GND
R1371 R1206
10K/NC
C1577 C1576 C1498 C1495 C1496 C1493 C1499 C1494 C1497 C1500 DFN08_P050_020X020_TI047X024 GND GND

9
470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V C1513
1uF
R0402 16V
GND
C2818 C2818 C2818 C2818 C2818 C2818 C2818 C2818 C2818 C2818
X5R

C0603

GND GND
GND C1489 GND
C0402
R1375 0ohm/NC
1uF/NC
X7R
16V U531
R0402
VCC_NV_PWM R1327
4 1 U9_BOOT3
VCC BOOT
2.2/NC
R1328 1K/NC R0402 3 8 U9_UG3
EN UGATE
GND
R0402 2 7 PS_FB_PH3 SENSE_GND
PWM PHASE
C1504
1uF/NC
6 5 PS_FB_DRVL3
GND LGATE

NC
16V C0603

U9_PWM uP1962S/NC dfn08_0_5mm_3x3mm

9
GND

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: FBVDDQ
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 32 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
Page33: PS_ FBVDDQ_PHASE1-2

12V_F 12V_PEX8_F3
J19(1-2PIN:PCE-12V,2-3PIN:8P-F3)

Iripple= 6.84A @ 36A, 1.05V

3
R1388 R1390 R1386 R1387 Iripple= 9.6A @ 51A, 1.05V

3
0/NC 0/NC 0/NC 0/NC

2
+0.05R +0.05R +0.05R +0.05R

2
R0805 R0805 J19 R0805 R0805

CON3
dip_head1x3_2mm C1552
C1538 C1539 C1540 C1542
0.1uF 10uF 10uF 10uF 270UF
16V 16V 16V 16V COMMON
10% 10% 10% 10% 20%
X7R X5R X5R X5R 2.5V
LFPAK D 5 C0603 C1206 C1206 C1206 OSCON
Q581 COMMON
0603 COMMON
1206 COMMON
1206 COMMON
1206
6.1A
0.007R
MDU1514
PS_FB_DRVH1 R1393 0ohm PS_FB_DRVH1_R 4G DIP_ECAPD8MM
{32} BI COMMON
0.125 0402
0.05 ohm COMMONR0603 0.125 S 1 30V Co-Layout two caps
2 38A
0.014R@4.5V,0.009R@10V

3 100A
3.5W@25C GND
R1384 +/-20V

PS_FB_BOOT1 R1392 2.2ohm PS_FB_BOOT1_R C1557 0.1uF 100k/NC


DFN55X6_1_27MM FBVDDQ
{32} BI 1%
0.125 0402
0.05 ohm COMMONR0603 0.125 16V C0603
0402
0402

FBVDD=1.6V@40A
10% R0402
COMMON
X7R
COMMON
PS_FB_PH1 L505 0.220uH
{32} BI
COMMON
5 C1547 C1554
LFPAK D 2200pF DIP_COIL_11_3X6_8MM C1551
Q582
50V 10UF/6.3V 1200uF
MDU1511
PS_FB_DRVL1 4G C1544 10% 6.3V
{32} BI COMMON 1nF/NC X7R 20% 20%
0.125 S 1 30V
C0402
X5R 2.5V
50V
2 86.3A
0.005R@4.5V,0.0034R@10V
COMMON
0402 C0805 OCCAP
C1536 3 100A 10%
PS_FB_RC1 COMMON 3.6A@105C
3.5W@25C X7R 0805
1nF/NC +/-20V
C0402
0.010R
R1382 50V DFN55X6_1_27MM R1383 DIP_ECAPD8MM
OCP SETTING 13K 10%
COMMON
0402
1ohm
X7R
NCP81172: 49.9K disable OCP 1% C0402 5%
0402 1206
COMMON
COMMON
0402 R1206
COMMON
Close to PWM R0402 GND GND

GND GND

GND
GND
12V_PEX8_F3

C1553
C1537 C1541 C1543 C1546 C1549 C1575
0.1uF 10uF 10uF 10uF 10uF 10uF 270UF
16V 16V 16V 16V 16V 16V COMMON
10% 10% 10% 10% 10% 10% 20%
X7R X5R X5R X5R X5R X5R 2.5V
LFPAK D 5 OSCON
Q583 COMMON
0603 COMMON
1206 COMMON
1206 COMMON
1206 COMMON
1206 COMMON
1206
6.1A
0.007R
MDU1514 C0603 C1206 C1206 C1206 C1206 C1206
PS_FB_DRVH2 R1394 0ohm PS_FB_DRVH2_R 4G
{32} BI COMMON
0.125 0402
0.05 ohm COMMONR0603 0.125 S 1 30V
DIP_ECAPD8MM
2 38A
0.014R@4.5V,0.009R@10V

3 100A
3.5W@25C
R1385 +/-20V
GND
PS_FB_BOOT2 R1389 2.2ohm PS_FB_BOOT2_R C1556 0.1uF 100k/NC DFN55X6_1_27MM
{32} BI
R06030.125 1 %R0402
0.125 0402
0.05 ohm COMMON 16V C0603
0402
0402

FBVDD=1.6V@40A
10%
COMMON
X7R

PS_FB_PH2
COMMON
L506 0.220uH Co-Layout
{32} BI
COMMON
LFPAK D 5 DIP_COIL_11_3X6_8MM
C1555
Q584 C1548 C1550
2200pF 10uF 1200uF
MDU1511
50V 6.3V
{32}
PS_FB_DRVL2 4G COMMON 20%
BI
S 1 C1545 10% 20%
0.125 30V X7R X5R 2.5V
1nF/NC
OCP SETTING 2 86.3A
0.005R@4.5V,0.0034R@10V
C0402 OCCAP
R1391 C1535 3 100A 50V COMMON COMMON 3.6A@105C
3.5W@25C 0402 0805
40.2k/NC 1nF/NC +/-20V 10%
C0805
0.010R
DIP_ECAPD8MM
Close to PWM X7R
1% 50V
R0402 DFN55X6_1_27MM C0402 PS_FB_RC2
0402 10%
COMMON
0402
COMMON X7R
C0402
COMMON R601
0402
GND GND 1ohm
5%
R1206
1206
GND COMMON GND
GND

GND

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: FBVDDQ
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 33 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
Page34: PS: NVVDD Controller_OVR8

SW1
1 6

ON
PS_NVVDD_PWM8 {42} PS_NVVDD_EN NVVDD_EN_IN
OUT
2 1 6 5
PS_NVVDD_PWM7 3 2 5 4
{41}
OUT 3 4
PS_NVVDD_PWM6 sop6_1_27mm
OUT {40}
sop6_1_27mm
PS_NVVDD_PWM5
OUT {39} SW

3V3_F PS_NVVDD_PWM4 {38}


OUT

1 VID Table R1439 0


R0603
IR3595_VCC PS_NVVDD_PWM3
OUT {37}

PS_NVVDD_PWM2 {36}
GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 VOUT
PS_NVVDD_PWM1
OUT
Debug Only PWM
OUT {35}
VID_5 VID_4 VID_3 VID_2 VID_1 C1560 C1561
0.1UF 1UF J16

0 0 0 0 0 1.2125V 0
NVVDD_EN_IN R1411 NVVDD_EN_C 4
X7R X5R {27,32,47,50} I2CB_SCL_R R260 0 R0402 R0402 I2C_SCL 3 N/A
IN
0 0 0 0 1 1.2000V
C0402 C0402
{27,32,47,50} I2CB_SDA_R R262 0 I2C_SDA 2 2.0MM
IN MALE
R0402 1
C1558 C1559 dip_head1x4_2mm_90
0 0 0 1 0 1.1875V 10pF 10pF dip_head1x4_2mm_90
GND R263 R0402 0/NC
50V 50V
HDR_1X4_2.00mm 90 DEGREE DIP
0 0 0 1 1 1.1750V {27,32,44,47,50} IN
I2CC_SCL_R
{27,32,44,47,50} IN
I2CC_SDA_R R264 0/NC
R0402 C0402 C0402
0 0 1 0 0 1.1625V
GND
R1431 10K 1%
R0402
0 0 1 0 1 1.1500V
GND 3V3_F 3V3_F
0 0 1 1 0 1.1375V
GND GND
0 0 1 1 1

RCSP

RCSM
1.1250V

0 1 0 0 0 1.1125V
R1438 R226
0 1 0 0 1 1.1000V Diff pair 4.7K/NC 4.7K/NC
R0402
R0402
0 1 0 1 0 1.0875V 5%
U710 5%

42

41

40

39

38

37

36

35

34

33

32

31

30

29
0 1 0 1 1 1.0750V

VCC
ISEN8/ISEN1_L2

RCSP_L2

RCSM_L2

VSEN_L2

VRTN_L2

PWM8/PWM1_L2

PWM7/PWM2_L2

PWM6

PWM5

PWM4

PWM3

PWM2

PWM1
0 1 1 0 0 1.0625V {42} IN
PS_NVVDD_IOUT8 C119100pF/NC C0402 X7R
R137 2.49K
0 1 1 0 1 1.0500V {42} PS_NVVDD_IRTN8 R128 0 R0402 1% 43 28
IN
R0402 IRTN8/IRTN1_L2 VGD
C58 100pF/NC C0402 X7R 44 27 3V3_F
0 1 1 1 0 1.0375V {41} IN
PS_NVVDD_IOUT7
ISEN7/ISEN2_L2 SM_CLK
R115 2.49K R277 845
0 1 1 1 1 1.0250V {41} PS_NVVDD_IRTN7 R130 0 R0402 1% 45 26 R0402
IN
R0402 IRTN7/IRTN2_L2 SM_DIO 3V3_F
1 0 0 0 0 1.0125V {39} PS_NVVDD_IOUT5 C1562 100pF/NC C0402 X7R 46 25 R187 4.7K C1572 0.01UF R269
IN
R1418 2.49K ISEN5 ALERT# R0402 C0402 4.7K
1 0 0 0 1 1.0000V {39} PS_NVVDD_IRTN5 R132 0 R0402 1% 47 24 ADDR R0402
IN
R0402 IRTN5 ADDR_PROT GND
1 0 0 1 0 0.9875V {38} PS_NVVDD_IOUT4 C287 100pF/NC C0402 X7R 48 23 NVVDD_EN_IN R178 0/NC PS_NVVDD_EN {46}
IN
R1420 2.49K ISEN4 EN_L1 R0402
IN
3V3_F
1 0 0 1 1 0.9750V {38} PS_NVVDD_IRTN4 R134 0 R0402 1% 49 22 VR_HOT# R276 4.7K
IN
R0402 IRTN4 VR_HOT# R0402

1 0 1 0 0 0.9625V {37} PS_NVVDD_IOUT3 C1563 100pF/NC C0402 X7R 50 IR3595 21 R1423 0ohm R0402 H_VID7
IN
R1421 2.49K ISEN3 VID7/nVPSI# R1422 0ohm/NC GPIO0_NVVDD_PWMVID
1 0 1 0 1 0.9500V {37} PS_NVVDD_IRTN3 R138 0 R0402 1% 51 20 R1424 0ohm R0402 H_VID6 R0402
IN
R0402 IRTN3 VID6/nVPWM
1 0 1 1 0 0.9375V {36} PS_NVVDD_IOUT2 C1564 100pF/NC C0402 X7R 52 19 R1425 0ohm R0402 H_VID5
IN
R266 2.49K ISEN2 VID5
1 0 1 1 1 0.9250V {36} PS_NVVDD_IRTN2 R139 0 R0402 1% 53 18 R1426 0ohm R0402 H_VID4
IN
R0402 IRTN2 VID4
1 1 0 0 0 0.9125V {35} PS_NVVDD_IOUT1 C1565 100pF/NC C0402 X7R 54 17 R1427 0ohm R0402 H_VID3
IN
R133 2.49K ISEN1 VID3
1 1 0 0 1 0.9000V {35} PS_NVVDD_IRTN1 R1414 0 R0402 1% 55 16 R1428 0ohm R0402 H_VID2
IN
R0402 IRTN1 QFN56P_0_4MM_7X7MM_EP VID2
1 1 0 1 0 0.8875V PS_NVVDD_IOUT6 C1566 100pF/NC C0402 X7R 1 15 R1429 0ohm R0402 H_VID1

Vauxsen/Tsen2
{40} IN
R1412 2.49K ISEN6 VID1
1 1 0 1 1 0.8750V PS_NVVDD_IRTN6 R1415 0 R0402 1% R1430 0ohm R0402 H_VID0

RCSM_L1
{40}

RCSP_L1

VRDY_L2

VRDY_L1
VSEN_L1

VRTN_L1

VIN_SNS
IN
R0402 57
GND_TH

EN_L2
IRTN6

Tsen1

CFILT
1 1 1 0 0 0.8625V NC 1V8_AON

VID0
NC
1 1 1 0 1 0.8500V

56

10

11

12

13

14
GND 3V3_F
1 1 1 1 0 0.8375V

1 1 1 1 1 0.8250V

CFILT
VRDY_L2

2
EN_L2_D R1432 R0402
L00
O
D2
A
IH
L
N
:R
E

2
4.7K 12V_F R1400
Vin sense R1433 13K/NC R1404 R249 R248 R1403 R1402 R169 R1401
..
m1
OO
MH
::
21
1
44
=
1
.
5
K
,,
C
1
5
55
=
1
5
0P
P
FF
.
IRTN R1413 10 R0402 1K/NC
m
M
R
2
=
8
0
0
R
C
1
5
=
6
8
0
R0402 1% 12V_PEX8_F1 1K 1K 1K/NC 1K/NC 1K/NC 1K/NC 1K R0402

1
SOFT START (VR11) R1437 R1436 13K R0402 R0402 R0402 R0402 R0402 R0402 R0402 H_VID0 R1442 0ohm R0402 GPIO0_NVVDD_PWMVID
{27}

1
IN
CO-LAYOUT GPU1_CORE_RCSP C1569 1K R0402

1. Ramp 0V to 1.10V in ~2mS 4.7UF R0402


3V3_F H_VID1 R1395 0ohm R0402 GPIO1_NVAPI IN {27}
2. Hold at 1.10V for 170uS C286 C1567 C1570 0.01UF
3. Read VID 4.7uF R228 R1410 Close to PWM. 150pF X5R R261 1K R0402 H_VID2 R1396 0ohm R0402 GPIO2_NVAPI IN {27}
4. VID set to 0.9V during GPIO tri-state 4.53K/NC 4.53K C0603 C0402
VID[5:1]=11001 to set 0.9V 1% 1% NPO C0402 GND PS_NVVDD_PGOOD H_VID3 R1397 0ohm R0402 GPIO3_NVAPI
X7R R0603 R0805
OUT {30,46,47} IN {27}
C0603
GPU1_CORE_RCSM H_VID4 R1398 0ohm R0402 GPIO4_NVAPI
GND GND IN {27}
P-STATE VOLTAGES Tsen1 R268 PS_NVVDD_TOUT1 H_VID5 R1399 0ohm R0402 GPIO5_NVAPI
IN {35,36,37,38,39,40,41,42} IN {27}
6.49K
FR
O
F
E2
S
:1
T

1. P0 at 1.05V to 1.15V (depending on VB) R1435 R0402 H_VID6 R1443 0ohm R0402 VID 6_NVAPI
2. P8/P12 at 0.80V R119 0/NCR0805 3V3_F C210 10K
7R
00
=2
01
0
R
,
R1
1
94
4
===4
2
0,
K
,OO5
FFF,
O
F
ST
E
T==S
=
1
0
04
/
22
0
=501
5
M
V
.
R270 4.7K/4 0.01UF 1% H_VID7 R1444 0ohm R0402 GPIO19_VID
7R
=2
01
0
R
,
R1
94
4
K,
F
EEF
S
1
0
0
/2
==0
M
V
.

OFFSET R0402

NPO
7R
07
=2
01
0
R
R,
,
91
K1
2
F

2
S
T
1
0
/1
0

5
M
V
.

1%
1.5K R0402

R170 OFFSET_BUF R1405 R1406 R1407 R1408 R255 R256 R1409 R258
0
=
0
0
R
R
9
=
.
K
O
F
E
T
=
0
/
.
5
=
6
6
M
V

R0402 C0402

1K/NC 1K/NC 1K 1K 1K 1K 1K/NC 1K


NVVDD GND R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402

1
GND DR_5V
R1416
100 R167
0/NC
R0402 R0402 R271
5.76K/4/1 GND
GPU_NVVDD_SENSE R1419 0 V_SENSE 1% R0402
{19} IN
R0402

Vaux_sense VID 6_NVAPI


C1571 3
1G1D1S
3300PF D Q46
Close to GPU 50V
R1434 C1568 AO3416L
SOT23
1K/4/1 0.01UF {27} IN
GPIO19_VID 1G
C0402 1% S 2
R0402 NPO 60V
C0402 0.26A@25C
3R
GPU_NVVDD_FBRTN R658 0 G_SENSE 0.31A

{19} IN
R0402
0.3W@25C
+/-20V

R1417 GND
100
GND
R0402

GND

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: NVVDD Controller_OVR8
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 34 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page35: PS: NVVDD Phase 1 & 2

12V_F 12V_PEX8_F1

1
R1448 R1446 R1449 R380

3
0ohm/NC 0ohm/NC 0ohm/NC 0ohm/NC

2
1 0.05 ohm 0.05 ohm 0.05 ohm 0.05 ohm 1
0805 0805 0805 0805

2
COMMON COMMON J20 COMMON COMMON
R0805 R0805 R0805 R0805

2
CON3
dip_head1x3_2mm

1
CE21 + J17(1-2PIN:PCE-12V,2-3PIN:8P-F1)
C1832 C1833 C1834 270UF/16V
0.22UF/16V 10UF/16V 10UF/16V 16V

2
C0603 C1206 C1206

Phase 1
DIP_ECAPD8MM

GND
GND GND

L507 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U711

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
SW10 14
24 SW9
NC 13
2 SW8 R525 2
PS_NVVDD_TOUT1 25
{34,36,37,38,39,40,41,42} 12 CE10
OUT TOUT_FLT SW7 C291 C290 C294 C292 C297 C298 C293 C296 C295 C299 DIP_ECAPD8MM 51---DUMMY LOAD
DR_5V
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 5%
{34} PS_NVVDD_IOUT1 R1445 20.4K 26 + 1200UF/2V
IN
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
NO STUFF
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
DUMMY LOAD
GND LGND SW3 7 R0603

PWM1 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
30 SW1 GND

LGATE1
LGATE2
PS_NVVDD_IRTN1

BOOST
PGND1
{34} IN REFIN GND GND GND GND GND GND GND GND GND GND GND

TGND
VDRV
VCC
C432

4
31

5
32

3
IR3550_PQFN6X6mm 0.22UF
16V
10%
C0603
X5R
COMMON

C468
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON NVVDD

GND GND

3V3_F
3 3

R407
0 C487 C486 C480 C488 C483 C484 C491 C482 C481 C485
12V_PEX8_F1
5% 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
R0402
U28
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
COMMONIR3599 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
{34} PS_NVVDD_PWM1 1 8 PWM1 C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
IN
2 PWM_IN PWM1 7 PWM2
3 V1P8 PWM2 6 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND

VCC PWM3

1
4 5
Function PWM4 CE22 + C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
SOP8_2X2_H_0_85MM C1835 C1837 C1836 270UF/16V
9

0.22UF/16V 10UF/16V 10UF/16V 16V

2
C438 C437 C0603 C1206 C1206 GND GND GND GND GND GND GND GND GND GND

Phase 2
0.22UF 0.22UF
16V 16V DIP_ECAPD8MM
10% 10%
C0603 C0603
X5R X5R
COMMON COMMON
GND GND GND

GND GND GND


L508 1 2 0.15uH

Function=0 --> Quad mode DIP_COIL_11_3X6_8MM NVVDD


Function=1 --> Doubler mode
23
22

21
20

19

18

17

16

U25
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2

IR3555 6x6
4
15 4
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 C301 C300 C304 C302 C307 C308 C303 C306 C305 C309
TOUT_FLT SW7 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
PS_NVVDD_IOUT1R1447 20.4K 26
R0402 IOUT 11
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
27 SW6 10
ZCD_EN SW5 9 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
28 SW4 8
GND LGND SW3 7 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM2 29 SW2
PWM 6
PS_NVVDD_IRTN1 30 SW1 GND GND GND GND GND GND GND GND GND GND
LGATE1
LGATE2

BOOST
PGND1

REFIN
TGND
VDRV
VCC

C435
1

4
31

5
32

IR3550_PQFN6X6mm 0.22UF
16V
10%
C0603
X5R
COMMON

C469
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603
X5R
COMMON

5 5
GND GND

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: NVVDD Controller_PWR-MODULE
PS: NVVDD CONTROLLER_PWR-MODULE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 35 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page36: PS: NVVDD Phase 3 & 4


12V_PEX8_F1

1
CE23 +
C1838 C1840 C1839 270UF/16V
0.22UF/16V 10UF/16V 10UF/16V 16V
1 1

2
C0603 C1206 C1206

Phase 3 DIP_ECAPD8MM

GND
GND GND

L22 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U29

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13 CE7
PS_NVVDD_TOUT1 25 SW8 12 C311 C310 C314 C312 C317 C318 C313 C316 C315 C319 DIP_ECAPD8MM
{34,35,37,38,39,40,41,42} 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
OUT TOUT_FLT SW7 + 1200UF/2V
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
{34} PS_NVVDD_IOUT2 R1450 20.4K26
IN
R0402 IOUT 11
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
27 SW6 10
ZCD_EN SW5 9 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
28 SW4 8
GND LGND SW3 7 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM3 29 SW2
2 PWM 2
6
30 SW1 GND GND GND GND GND GND GND GND GND GND GND

LGATE1
LGATE2
PS_NVVDD_IRTN2

BOOST
PGND1
{34} IN REFIN

TGND
VDRV
VCC
IR3550_PQFN6X6mm C436

4
31

5
32

3
0.22UF
16V
10%
C0603
X5R
COMMON

C474
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON

GND GND NVVDD

3V3_F

12V_PEX8_F1
R408
0
5% C477 C476 C453 C478 C466 C467 C479 C465 C460 C475
U30
R0402 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
COMMONIR3599
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
3 {34} PS_NVVDD_PWM2 1 8 PWM3 3
IN PWM_IN PWM1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%

1
2 7 PWM4 C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
3 V1P8 PWM2 6 CE24 +
GND

4 VCC PWM3 5 C1841 C1843 C1842 270UF/16V COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
Function PWM4 0.22UF/16V 10UF/16V 10UF/16V 16V

2
C0603 C1206 C1206
C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
9

C440 C439 DIP_ECAPD8MM

0.22UF 0.22UF GND GND GND GND GND GND GND GND GND GND
SOP8_2X2_H_0_85MM
16V 16V
10% 10% GND
C0603 C0603 GND GND
X5R X5R
COMMON COMMON

GND GND GND L509 1 2 0.15uH

Phase 4 DIP_COIL_11_3X6_8MM NVVDD


23
22

21
20

19

18

17

16

Function=0 --> Quad mode U712


Function=1 --> Doubler mode
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2

IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE9
TOUT_FLT SW7 C321 C320 C324 C322 C327 C328 C323 C326 C325 C329 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT2R281 20.4K26 + 1200UF/2V
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
4 SW4 2 4
28 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM4 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN2 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm C441
1

4
31

5
32

0.22UF
16V
10%
C0603
X5R
COMMON

C489
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON

GND GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: NVVDD Phase 1, 2
PS: NVVDD Phase 1,2
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 36 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page37: PS: NVVDD Phase 5 & 6


12V_PEX8_F1

1
CE25 +
270UF/16V
C1850 C1852 C1851 16V
1 1

2
0.22UF/16V 10UF/16V 10UF/16V
C0603 C1206 C1206
DIP_ECAPD8MM

GND GND GND

Phase 5 L510 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U33

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE11
{34,35,36,38,39,40,41,42}
OUT TOUT_FLT SW7 C331 C330 C334 C332 C337 C338 C333 C336 C335 C339 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
{34} PS_NVVDD_IOUT3 R1451 20.4K 26 + 1200UF/2V
IN
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
SW4 2
28 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM5 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
2 PWM 2
6
30 SW1

LGATE1
LGATE2
PS_NVVDD_IRTN3

BOOST
PGND1
{34} IN REFIN GND GND GND GND GND GND GND GND GND GND GND

TGND
VDRV
VCC
IR3550_PQFN6X6mm

4
31

5
32

3
C442
0.22UF
16V
10%
C0603
X5R
COMMON
C470
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603 NVVDD
X5R
COMMON

GND GND

+ + + + + + + +

C1849 C1847 C1848 C1845 C580 C1844 C1846 C563


3V3_F 12V_PEX8_F1 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V

R410 C2818 C2818 C2818 C2818 C2818 C2818 C2818 C2818


0
5%
3 R0402
U31 3
COMMONIR3599
{34} PS_NVVDD_PWM3 1 8 PWM5 GND
IN
2 PWM_IN PWM1 7 PWM6 C1853 C1855 C1854
3 V1P8 PWM2 6 0.22UF/16V 10UF/16V 10UF/16V
GND

4 VCC PWM3 5 C0603 C1206 C1206


Function PWM4
9

C448
0.22UF
16V
10%
C444
0.22UF
16V
10%
SOP8_2X2_H_0_85MM Phase 6 GND GND
GND

C0603 C0603
X5R X5R
COMMON COMMON

L25 1 2 0.15uH

GND GND GND DIP_COIL_11_3X6_8MM NVVDD


23
22

21
20

19

18

17

16

U32
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2

Function=0 --> Quad mode IR3555 6x6


Function=1 --> Doubler mode 15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12
TOUT_FLT SW7 C341 C340 C344 C342 C347 C348 C343 C346 C345 C349
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT3R1452 20.4K26
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
4 SW4 4
28 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM6 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN3 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm
1

4
31

5
32

C445
0.22UF
16V
10%
C0603
X5R
COMMON
C490
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603
X5R
COMMON

GND GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: NVVDD Phase 3, 4
PS: NVVDD Phase 3,4
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 37 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page38: PS: NVVDD Phase 7 & 8

12V_PEX8_F2

1
1 CE27 + 1
C1865 C1867 C1866 270UF/16V
0.22UF/16V 10UF/16V 10UF/16V 16V

2
C0603 C1206 C1206

Phase 7 GND GND


DIP_ECAPD8MM

GND

L27 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U39

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE46
{34,35,36,37,39,40,41,42}
OUT TOUT_FLT SW7 C351 C350 C354 C352 C365 C366 C353 C356 C355 C367 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
{34} PS_NVVDD_IOUT4 R1453 20.4K26 + 1200UF/2V
IN
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
SW4 2
28 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
2 SW2 2
PWM7 29 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
30 SW1

LGATE1
LGATE2
PS_NVVDD_IRTN4

BOOST
PGND1
{34} IN REFIN GND GND GND GND GND GND GND GND GND GND GND

TGND
VDRV
VCC
IR3550_PQFN6X6mm

4
31

5
32

3
C443
0.22UF
16V
10%
C0603
X5R
COMMON
C471
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603
X5R
COMMON

GND GND

NVVDD
3V3_F 12V_PEX8_F2

R411
0
3 5% 3
R0402
U40

1
COMMONIR3599 + + + + + + + +
{34} PS_NVVDD_PWM4 1 8 PWM7 CE28 +
IN
2 PWM_IN PWM1 7 PWM8 C1856 C1858 C1857 270UF/16V C1863 C1862 C1864 C1860 C579 C1859 C1861 C562
3 V1P8 PWM2 6 0.22UF/16V 10UF/16V 10UF/16V 16V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V
GND

VCC PWM3

2
4 5 C0603 C1206 C1206
Function PWM4
DIP_ECAPD8MM C2818 C2818 C2818 C2818 C2818 C2818 C2818 C2818
9

C455 C454 GND


0.22UF 0.22UF GND GND
SOP8_2X2_H_0_85MM

Phase 8
16V 16V
10% 10% GND
C0603 C0603
X5R X5R
COMMON COMMON

L29 1 2 0.15uH

GND GND GND DIP_COIL_11_3X6_8MM NVVDD


23
22

21
20

19

18

17

16 U36
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
Function=0 --> Quad mode IR3555 6x6
Function=1 --> Doubler mode 15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12
TOUT_FLT SW7 C357 C368 C360 C358 C363 C364 C359 C362 C361 C370
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT4 R1454 20.4K26
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
4 ZCD_EN SW5 C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G 4
9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM8 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN4 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm
1

4
31

5
32

C447
0.22UF
16V
10%
C0603
X5R
COMMON
C514
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603
X5R
COMMON

GND GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: NVVDD Phase 5
PS: NVVDD Phase 5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 38 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page39: PS: NVVDD Phase 9 & 10

12V_PEX8_F2

1
1 1
CE26 +
C1868 C1870 C1869 270UF/16V
0.22UF/16V 10UF/16V 10UF/16V 16V

2
C0603 C1206 C1206

Phase 9 GND GND


DIP_ECAPD8MM

GND

L28 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U43

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE36
{34,35,36,37,38,40,41,42}
OUT TOUT_FLT SW7 C389 C388 C392 C390 C395 C396 C391 C394 C393 C400 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
{34} PS_NVVDD_IOUT5 R1455 20.4K 26 + 1200UF/2V
IN
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
2 GND LGND SW3 2
7
PWM9 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
30 SW1

LGATE1
LGATE2
PS_NVVDD_IRTN5

BOOST
PGND1
{34} IN REFIN GND GND GND GND GND GND GND GND GND GND GND

TGND
VDRV
VCC
IR3550_PQFN6X6mm

4
31

5
32

3
C458
0.22UF
16V
10%
C0603
X5R
COMMON
C472
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON
NVVDD

GND GND

3V3_F 12V_PEX8_F2
C495 C494 C450 C449 C429 C451 C433 C434 C452 C431 C430 C446
4.7UF 4.7UF 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
R412 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
3 0 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 3
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
5%
R0402
U44

1
COMMONIR3599 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

{34} PS_NVVDD_PWM5 1 8 PWM9 CE33 +


IN
2 PWM_IN PWM1 7 PWM10 C1871 C1873 C1872 270UF/16V C0603 C0603 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
3 V1P8 PWM2 6 0.22UF/16V 10UF/16V 10UF/16V 16V
GND

VCC PWM3

2
4 5 C0603 C1206 C1206
Function PWM4 GND GND GND GND GND GND GND GND GND GND GND GND
DIP_ECAPD8MM
9

C457 C456 GND

Phase 10
0.22UF 0.22UF GND GND
SOP8_2X2_H_0_85MM
16V 16V
10% 10%
C0603 C0603
X5R X5R
COMMON COMMON

L30 1 2 0.15uH

GND GND GND DIP_COIL_11_3X6_8MM NVVDD


23
22

21
20

19

18

17

16

U41
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2

Function=0 --> Quad mode IR3555 6x6


Function=1 --> Doubler mode 15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12
TOUT_FLT SW7 C371 C401 C379 C377 C382 C383 C378 C381 C380 C387
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT5R285 20.4K 26
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
4 SW6 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 4
27 10 C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM10 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN5 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm C459
1

4
31

5
32

0.22UF
16V
10%
C0603
X5R
COMMON

C523
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON

GND GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: NVVDD Phase 6, 7
PS:NVVDD Phase 6,7
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 39 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page40: PS: NVVDD Phase 11 & 12

12V_PEX8_F2

C1877 C1879 C1878


0.22UF/16V 10UF/16V 10UF/16V
C0603 C1206 C1206
1 1

Phase 11 GND GND GND

L33 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U47

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE43
{34,35,36,37,38,39,41,42}
OUT TOUT_FLT SW7 C415 C414 C418 C416 C421 C422 C417 C420 C419 C426 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
{34} PS_NVVDD_IOUT6 R286 20.4K 26 + 1200UF/2V
IN
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM11 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
30 SW1

LGATE1
LGATE2
PS_NVVDD_IRTN6

BOOST
PGND1
2 {34} 2
IN REFIN GND GND GND GND GND GND GND GND GND GND GND

TGND
VDRV
VCC
IR3550_PQFN6X6mm

4
31

5
32

3
C463
0.22UF
16V
10%
C0603
X5R
COMMON
C473
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON NVVDD

GND GND

3V3_F

12V_PEX8_F2 C493 C492 C424 C423 C397 C425 C410 C411 C428 C399 C398 C412
4.7UF 4.7UF 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
R415 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
0 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
5%
R0402
U45
COMMONIR3599 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

1
{34} PS_NVVDD_PWM6 1 8 PWM11
IN
2 PWM_IN PWM1 7 PWM12 CE34
3 V1P8 PWM2 + C0603 C0603 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
3
3 6 C1874 C1876 C1875 270UF/16V
GND

4 VCC PWM3 5 0.22UF/16V 10UF/16V 10UF/16V 16V


Function PWM4

2
C0603 C1206 C1206 GND GND GND GND GND GND GND GND GND GND GND GND
9

DIP_ECAPD8MM
C462 C461
0.22UF 0.22UF GND
SOP8_2X2_H_0_85MM
16V 16V GND GND
10% 10%
C0603 C0603
X5R X5R
COMMON COMMON

GND GND GND


Phase 12 L32 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD
23
22

21
20

19

18

17

16 U46
Function=0 --> Quad mode
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
Function=1 --> Doubler mode IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE44
TOUT_FLT SW7 C402 C427 C405 C403 C408 C409 C404 C407 C406 C413 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT6 R287 20.4K 26 + 1200UF/2V
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
4 SW2 4
PWM12 29 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN6 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm C464
1

4
31

5
32

0.22UF
16V
10%
C0603
X5R
COMMON

C1880
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603
X5R
COMMON

GND GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: Dynamic power balance phase
PS: Dynamic Power Balance Phases
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 40 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
4
1
-
P
S
:
N
V
V
D
D
P
h
a
s
e
1
3
,
1
4
12V_PEX8_F3

C1889 C1891 C1890


0.22UF/16V 10UF/16V 10UF/16V
C0603 C1206 C1206

Phase 13 GND GND GND

L35 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U50

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE12
{34,35,36,37,38,39,40,42}
OUT TOUT_FLT SW7 C516 C515 C519 C517 C525 C526 C518 C521 C520 C527 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
{34} PS_NVVDD_IOUT7 R278 20.4K 26 + 1200UF/2V
IN
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM13 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
30 SW1

LGATE1
LGATE2
PS_NVVDD_IRTN7

BOOST
PGND1
{34} IN REFIN GND GND GND GND GND GND GND GND GND GND GND

TGND
VDRV
VCC
IR3550_PQFN6X6mm

4
31

5
32

3
C530
0.22UF
16V
10%
C0603
X5R
COMMON
C528
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON

GND GND

12V_PEX8_F3
3V3_F

R418
0

1
5%
R0402
U48
COMMONIR3599 CE58 +
{34} PS_NVVDD_PWM7 1 8 PWM13 C1886 C1888 C1887 270UF/16V
IN
2 PWM_IN PWM1 7 PWM14 0.22UF/16V 10UF/16V 10UF/16V 16V
V1P8 PWM2

2
3 6 C0603 C1206 C1206
GND

4 VCC PWM3 5
Function PWM4 DIP_ECAPD8MM
9

GND
C513 C511 GND GND
0.22UF 0.22UF
SOP8_2X2_H_0_85MM
16V 16V
10% 10%

Phase 14
C0603 C0603
X5R X5R
COMMON COMMON
L34 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD
23
22

21
20

19

18

17

16
GND GND GND U49
Function=0 --> Quad mode
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2

Function=1 --> Doubler mode IR3555 6x6


15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12 CE13
TOUT_FLT SW7 C497 C529 C500 C498 C508 C509 C499 C505 C504 C510 DIP_ECAPD8MM
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT7R279 20.4K 26 + 1200UF/2V
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM14 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN7 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm
1

4
31

5
32

C533
0.22UF
16V
10%
C0603
X5R
COMMON
C532
1UF
16V
10%
Width=30mil CAP Close to PIN C0603
X5R
COMMON

GND GND

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: NVVDD Phase 13,14
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 41 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
4
2
-
P
S
:
N
V
V
D
D
P
h
a
s
e
1
5
,
1
6
12V_PEX8_F3

1
CE64 +
C1895 C1897 C1896 270UF/16V
0.22UF/16V 10UF/16V 10UF/16V 16V

2
C0603 C1206 C1206

Phase 15 DIP_ECAPD8MM

GND
GND GND

L37 1 2 0.15uH

DIP_COIL_11_3X6_8MM NVVDD

23
22

21
20

19

18

17

16
U53

VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2
IR3555 6x6
15
DR_5V SW10 14
24 SW9
NC 13 CE14
PS_NVVDD_TOUT1 25 SW8 12 C555 C554 C559 C556 C566 C568 C557 C561 C560 C569 DIP_ECAPD8MM
{34,35,36,37,38,39,40,41} 4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
OUT TOUT_FLT SW7 + 1200UF/2V
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
{34} PS_NVVDD_IOUT8 R284 20.4K26
IN
R0402 IOUT 11
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
27 SW6 10
ZCD_EN SW5 9 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
28 SW4 8
GND LGND SW3 7 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM15 29 SW2
PWM 6
30 SW1 GND GND GND GND GND GND GND GND GND GND GND

LGATE1
LGATE2
PS_NVVDD_IRTN8

BOOST
PGND1
{34} IN REFIN

TGND
VDRV
VCC
IR3550_PQFN6X6mm C550

4
31

5
32

3
0.22UF
16V
10%
C0603
X5R
COMMON

C549
Width=30mil CAP Close to PIN 1UF
16V NVVDD
10%
C0603
X5R
COMMON

GND GND

+ + + + + + + +

C1434 C1432 C1433 C1431 C581 C573 C565 C564


3V3_F 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V 470UF/2V
12V_PEX8_F3

R421 C2818 C2818 C2818 C2818 C2818 C2818 C2818 C2818


0
5%
R0402
U51
COMMONIR3599

1
{34} PS_NVVDD_PWM8 1 8 PWM15 GND
IN
2 PWM_IN PWM1 7 PWM16 CE66
V1P8 PWM2 +
3 6 C1892 C1894 C1893 270UF/16V
GND

4 VCC PWM3 5 0.22UF/16V 10UF/16V 10UF/16V 16V


Function PWM4

2
C0603 C1206 C1206
9

DIP_ECAPD8MM
C548 C547
0.22UF 0.22UF GND
SOP8_2X2_H_0_85MM
16V 16V GND GND
10% 10%
C0603 C0603
X5R X5R
COMMON COMMON

L36 1 2 0.15uH

Phase 16
GND GND GND
DIP_COIL_11_3X6_8MM NVVDD
23
22

21
20

19

18

17

16

U52
Function=0 --> Quad mode
VIN6
VIN5

VIN4
VIN3

VIN2

VIN1

PGND3

PGND2

Function=1 --> Doubler mode IR3555 6x6


15
DR_5V SW10 14
24 SW9
NC 13
PS_NVVDD_TOUT1 25 SW8 12
TOUT_FLT SW7 C534 C571 C537 C535 C544 C545 C536 C541 C538 C546
4.7UF 4.7UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
PS_NVVDD_IOUT8R288 20.4K 26
R0402 IOUT 11 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V

27 SW6 10
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C0G C0G C0G C0G C0G C0G C0G C0G C0G C0G
ZCD_EN SW5 9
28 SW4 8 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND LGND SW3 7
PWM16 29 SW2 C0603 C0603 C0805 C0805 C0805 C0805 C0805 C0805 C0805 C0805
PWM 6
PS_NVVDD_IRTN8 30 SW1
LGATE1
LGATE2

BOOST
PGND1

REFIN GND GND GND GND GND GND GND GND GND GND
TGND
VDRV
VCC

IR3550_PQFN6X6mm
1

4
31

5
32

C553
0.22UF
16V
10%
C0603
X5R
COMMON
C551
1UF
16V
Width=30mil CAP Close to PIN 10%
C0603
X5R
COMMON

GND GND

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: NVVDD Phase 15,16
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 42 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page43: PS: DR5V SWITCHER

1 1

2 2

DEFAULT IS 12V_F DR_5V


12V_PEX8_F1 12V_F
DR5V SWITCHER
3A
L26 3.3uH M 4.1A 0.400
COIL_5_4X6mm COMMON
R171 R1457 C372
0 0/NC 0.1UF/NC C373 C375 C384 C171 C170 C172
+0.05R +0.05R U713 16V 10UF/16V 4.7UF/16V 0.1UF/16V 10UF/16V 4.7UF/16V 0.1UF/16V
R0603 R0603 10% 16V 16V 16V 16V 16V 16V
COMMON COMMON SOP8_1_27MM_3_8MM X7R 20% 20% 10% 20% 20% 10%
COMMON C0402 X5R X5R X7R X5R X5R X7R
2 D71 2 LX 7
DR_5V_VIN_D DR_5V_PHASE COMMON C0805 C0603
VIN C0805 C0603 C0402
COMMON COMMON COMMON COMMON COMMON COMMON
DIODE_SMD_SMA
40V
6 EN LX 8 GND
3A
C227 C244
C0402
COMMON 10UF 0.1UF DR_5V_FB_RC
3 MBRA340T3 3.0A 12V_D_SCHOTTKY 16V 16V C374 47PF R198 0 3
1 PGND FB 4
DR_5V_ADJ
10% 10%
X5R X7R 3 AGND COMP 5
DR_5V_COMP C0402 50V R0402+0.05R COMMON GND GND
5%
C0805 C0402
COMMON COMMON APW7142-0.8V R173 C0G
24.9K COMMON

1% R199 Rt 66.5K DR_5V_FB_R R200 0


C1881 R0402
COMMON R0402 1% COMMON R0402+0.05R COMMON
82PF
50V DR_5V_COMP_R
Co-Layout
5% C385
GND C0G
R1456 10K DR_5V_EN 1500PF R197
DR_5V_VIN_DN C0402 R216 Vout = 0.8 * (1 + (R1/R2))
COMMON
50V 12.1K 0/NC
R0402 5% COMMON
10% 1% R0805
GND X7R R0402 Rb +0.05R 6.12V = 0.8 * (1 + (66.5K/12.1K))
C0402 COMMON R0805 VOUT=5.19V
COMMON

GND
GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: Dynamic power balance logic
PS: Dynamic Power Balance Logic
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 43 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
J23
12V_F
Alternate

Page44: PS: Inputs, Filtering, and Monitoring PEX_12V INPUT - 66W DIP_HEAD1X2_2MM
DIP_HEAD1X2_2MM
PEX 3V3 INPUT - 10W

1
2
12V <VOLTAGE> 12V
RES_04_SMD_064X032_RKO PLACE 0603 10UF FOOTPRINT
5.5A 5.5A
L21 0.470uH ON TOP OF 0805 FOOTPRINT
12V_IN_R
0.400 0.400 3V3 nv_cap nv_cap 3V3_F
RS1 0.005ohm COIL_2_77MM_S 3.3V
1 3A
C507 C506 C174 C208 Alternate

1
CE29 2 3V3 L501 1uH 0.400
0.1uF 1uF 10uF/16V 10uF/16V
+ 5 3 SMD_045_041 COMMON
16V 16V 25V 16V
270UF/16V S Q44 COIL_2_77MM_S
10% 10% 10% 20% C689 C105 C726 C714 C704
X7R X5R X5R D MDU3603 X5R 0.1uF 10uF 1uF 1uF 0.1uF

2
0402 0603 C1206
DFN55X6_1_27MM
G C1206 LB503 220ohm/NC
16V 6.3V 6.3V 6.3V 16V
COMMON COMMON COMMON INPUT_BU R1460 0 COMMON BEAD_0805 COMMON

4
10% 10% 10% 10% 10%
DIP_ECAPD8MM R0805+0.05R LB501 220ohm/NC
DFN55X6_1_27MM X7R X7R X7R X6S X7R
R0402 R0603 R0805 0402 BEAD_0805 COMMON 0805 0603 0402 0402
COMMON LB502 220ohm/NC COMMON DNI COMMON COMMON

GND Q45 BEAD_0805 COMMON


MDU3603 GND
DFN55X6_1_27MM 1
2
5 3 GND GND
S
D DFN55X6_1_27MM
G

4
12V_PEX8_F3

3V3_F
J17 dip_powercon_8p_19X21MM

MALE J26
PCI_Express Power
COMMON 4.2MM
C255 place caps close to INA3221 90
9 DIP_HEAD1X2_2MM
0.1uF U26 INA3221_VIN1P R301 20ohm 12V_INP DIP_HEAD1X2_2MM 12V
@digital.u_pwrmtr_ina3221(sym_1):page38_i99

1
2
16V
0402 1 % COMMON 10 6.25A 12V
10% QFN16 C250 R298 665k RES_04_SMD_064X032_RKO 0.406
X7R 10uF/16V GND TRUE 6.25A
COMMON
0402 1 % COMMON 1 12V 12V_PEX8_VIN3 0.406 12V 6.25A L31 0.470uH 0.406

12
0402
COMMON
6.3V
2 12V RS4 0.005ohm COIL_2_77MM_SCOMMON
VIN1P 10%
4 VS X7R
3 12V
4 C572 C575 C576
GND 0805
R366 0 R300 20ohm 0.1UF 1UF 10uF/16V
{27,32,34,47,50} I2CC_SCL_R R0402 I2CC_SCL_R_M1 6 SCL COMMON INA3221_VIN1N 12V_INN 6 Q37
IN 16V 16V 16V
I2CC_SDA_R R367 0 R0402 I2CC_SDA_R_M1 7 SDA VIN1N 11 0402 1 % COMMON MDU3603
{27,32,34,47,50}

5
BI 10% 10% 20%
X7R X5R X5R 1
DFN55X6_1_27MM
5 INA3221_VIN2P R310 20ohm 12V_PEX8_1_INP 2 C578
A0 C0402 C0603 C1206
10uF/16V
0402 1 % COMMON
D503 COMMON COMMON COMMON 5 3
C253 R314 665k 1 current through choke 16V
10uF/16V GND S 20%
VIN2P 15 0402 1 % COMMON 3 D X5R
6.3V
3V3_F GND 2 G C1206
10%
GND COMMON
X7R

4
0805 D_3PIN_CC/NC

INS1691615230V0.2ASOT23 COMMON
14 COMMON INA3221_VIN2N R308 20ohm 12V_PEX8_1_INN
GND Q38
R306 VIN2N
0402 1 % COMMON MDU3603
10k DFN55X6_1_27MM
1
DFN55X6_1_27MM GND
5% R324 20ohm
0402
INA3221_VIN3P 12V_PEX8_2_INP 2
DNI 0402 1 % COMMON INPUT_PEX8_DT3* {45} 5 3
PS_PCIE_GOOD R373 0 R0402 PS_PCIE_GOOD_M1 10 2 C257 R322 665k OUT
{46} OUT PV VIN3P 10uF/16V GND R638
S
13 TC 0402 1 % COMMON D
0ohm 6.3V
{45}
INA3221_LOW_PERF* INA3221_VPU 16 VPU 0ohm/NC G
IN 10%
04020.05 ohmCOMMON INPUT_BU R289 0
X7R

4
R315 1 R0805+0.05R NO STUFF
VIN3N 0805
COMMON INA3221_VIN3N R325 20ohm 12V_PEX8_2_INN INPUT_PEX8_FDT3* R0805
R0603 OUT
0402 1 % COMMON
DFN55X6_1_27MM

WARN 8 INA3221_WARN R299 0ohm/NC OC_CRIT*


OUT {46}
3 GND 04020.05 ohmDNI
GPIO9_THERM_ALERT_R*
TP PAD CRIT
R307 0ohm/NC GPIO28_OC_WARN
{27}

9
OUT
04020.05 ohmDNI

I2C Address:(1000 000b)


R303 0ohm/NC
GND 04020.05 ohmDNI 3V3_F

R305 0ohm/NC GPIO9_THERM_ALERT*


OUT {27}
04020.05 ohmCOMMON
R1280 0ohm C198 place caps close to INA3221
0.1UF U54
04020.05 ohmCOMMON
16V
10% QFN16P_80X80
X7R
R311 12V_INP_E12 R297 12V_PEX8_3_INP
0/NC DNI R0402 20
C0402
COMMON R0402 12 C190
+0.05R 10uF/16V
PEX6 INPUT 1 - 2x3 PCIE CON 75W COMMON 4 VS VIN1P
16V
R374
0402 1 %
665k
COMMON
GND
GND
10%
I2CC_SCL_R R364 0 R0402 I2CC_SCL_R_M2 6 SCL X5R
I2CC_SDA_R R365 0 R0402 I2CC_SDA_R_M2 7 SDA VIN1N 11 C0805
COMMON 12V_INN_E12 R309 12V_PEX8_3_INN
5 A0
R0402 20
R362 0
WARN AND CRIT ARE PULLED-UP TO 3.3V ON GPIO PAGE R0402+0.05R COMMON

MALE
R361 VIN2P 15
J13 4.2MM I2C Address:(1000 000b) R363 0/NC 0/NC
COMMON J21 R0402+0.05R COMMON R0402
+0.05R
PCI_Express Power 90 COMMON
9 14
PEX8 INPUT 1 - 2x4 PCIE CON 150W DIP_HEAD1X2_2MM
DIP_HEAD1X2_2MM
12V_PEX8_F1 VIN2N

1
2
10 PS_PCIE_GOOD R293 0
RES_04_SMD_064X032_RKO R0402+0.05R COMMON
TRUE
1 12V 12V_PEX8_VIN1 0.010 12V 6.25A L19 0.470uH GND
2 12V RS2 0.005ohm COIL_2_77MM_S INA3221_PV_E12 10 2
NC VIN3P
3 12V 1 C207 13
10UF NC
4 2 INA3221_LOW_PERF* R290 0 INA3221_VPU_E12 16 NC
16V
6 5 3 R0402+0.05R COMMON
D501 20%
1
S Q24 X5R VIN3N
8

1 C203 C206 C1885 D MDU3603 C1206


0.1UF 1UF 10uF/16V
3 DFN55X6_1_27MM
G COMMON
16V 16V 16V R1458 0
2 INPUT_BU
4
10% 10% 20%
R0805+0.05R 8 INA3221_WARN_M2
WARN R372 0ohm/NC OC_CRIT*
X7R X5R X5R DFN55X6_1_27MM
D_3PIN_CC/NC C0402 C0603 C1206 R0805 3 GND 04020.05 ohmDNI
INS1685484230V0.2ASOT23COMMON

GPIO9_THERM_ALERT_R*_M2
dip_powercon_8p_19X21MM COMMON COMMON COMMON 17 PAD CRIT 9
Q22 GND R370 0ohm/NC GPIO28_OC_WARN
GND MDU3603 04020.05 ohmDNI
DFN55X6_1_27MM 1
2 R369 0ohm/NC
GND 5 3 GND 04020.05 ohmDNI
S
R632 INPUT_PEX8_DT1* 0.008 12V_PEX8_1_INP D R368 0ohm/NC GPIO9_THERM_ALERT*
OUT {45}
0ohm/NC G 04020.05 ohmCOMMON
INPUT_PEX8_FDT1* DFN55X6_1_27MM 12V_F 12V_PEX8_F1 5V_LED R1282 0ohm
4

OUT
12V_PEX8_1_INN 04020.05 ohmCOMMON

PLACE ON NORTH SIDE 0.05 ohm R174 R175 R181 LED2


R0603
0/NC 0 0/NC
J15 J22
+0.05R +0.05R +0.05R
MALE 2 R40 1.62K R0603 LEDR1_OUT
PCI_Express Power
COMMON 4.2MM DIP_HEAD1X2_2MM
R0603 R0603 R0603 Red BI {50}
COMMON COMMON COMMON
90
9 DIP_HEAD1X2_2MM LED_VIN 1 3 R41 1.47K R0603 LEDG1_OUT
LED+ Green {50}
1
2

BI

10
PEX8 INPUT 2 - 2x4 PCIE CON 150W 12V_PEX8_F2
4 R42 1.47K R0603 LEDB1_OUT
12V {50}
RES_04_SMD_064X032_RKO L1 Blue BI
TRUE 15A
1 12V 12V_PEX8_VIN2 0.010 <VOLTAGE>12.5A L511 0.470uH
2 12V RS3 0.005ohm
3 12V Q42 COIL_2_77MM_S 18-038T-RGB
4 C1882 C1883 C1884 MDU3603 C230 LED4P_1PX1PMM
0.1UF 1UF 10uF/16V 10UF
6 DFN55X6_1_27MM 1 L1/L2 CO LAYOUT
16V 16V 25V 16V
2 L1 STUFFED FOR DESKTOP
8

10% 10% 10% 20%


X7R X5R X5R
5 3 L2 STUFFED FOR 2x4 EAST CONNECTOR STUFFED
X5R
C0402 C0603 C1206 S C1206
D502 COMMON COMMON COMMON COMMON
LED3
D
1 G
3 {27} INPUT_BU R1459 0 2 R43 1.62K R0603 LEDR1_OUT
dip_powercon_8p_19X21MM Red
4

IN
2 R0805+0.05R
R0805 1 3 R44 1.47K R0603 LEDG1_OUT
D_3PIN_CC/NC Q43 LED+ Green
GND GND DFN55X6_1_27MM GND
INS1685600830V0.2ASOT23 COMMON

MDU3603 4 R45 1.47K R0603 LEDB1_OUT


DFN55X6_1_27MM 1 Blue
2
5 3
18-038T-RGB
S
D LED4P_1PX1PMM
INPUT_PEX8_DT2* 0.008
{45}
G
R634 OUT LED4
4

0ohm/NC
2 R49 1.62K R0603 LEDR1_OUT
INPUT_PEX8_FDT2* Red
OUT DFN55X6_1_27MM
1 3 R51 1.47K R0603 LEDG1_OUT
0.05 ohm
R0603 12V_PEX8_2_INP LED+ Green
4 R50 1.47K R0603 LEDB1_OUT
12V_PEX8_2_INN Blue

18-038T-RGB
LED4P_1PX1PMM

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: Inputs, Filtering, and Monitoring
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 44 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page45: PS: 12V Current Steering & Hot Unplug Detect


D510
QUADRO/TESLA:
INPUT_PEX8_DT1_R* 2 INS16917105

12V CURRENT STEERING (UNDER POWER BOOT): 1


3 30V
0.2A
SOT23

GUIDES CURRENT FROM PEX EDGE TO PEX 8 PIN INPUT AREA COMMON

INPUT8_EN_HPD
BAT54C
1G1D1S 3 THERM_OVERT*
{27,28,45,46}
D Q521
OUT
R @discrete.q_fet_n_enh(sym_2):page44_i3
For OpenVreg Type4 + Phase Doubler, 2 phase PSI mode SOT23_1G1D1S
INPUT_PEX8_DT2_R* R631 0ohm/NC R620 10k INPUT8_HOT_UNPLUG_DT_R 1G
1 COMMON 1
12V_PEX8_F1 04020.05 ohm COMMON 0402 1% COMMON S 2
Stuff for QUADRO/TESLA 60V
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W

D506 20V

C220 4.7uF L2N7002LT1G


@discrete.d_3pin_cc(sym_1):page44_i34 3V3_F

INPUT8_HOT_UNPLUG_DT
0805 25V 30V
10% 0.2A
R148 X7R
3 D SOT23
3W@25C
COMMON COMMON
INPUT_PEX8_DT1_R* 1k R554 100k R560 20k PEX_STEER_N 2 -72A
0.035R@-4.5V; 0.02R@-10V; 2
0402 COMMON 0402 COMMON 1 N/A
3 BAT54C R611
5% 5% -30V
0402R149 S 10k
4 INPUT_PEX8_DT3_R* 1
1%
INPUT_PEX8_DT2_R* 1k/NC 1G1D1S 3 PEX_STEER_R
G 0402
D Q512 Q503 3
COMMON 1B1C1E
0402 @discrete.q_fet_n_enh(sym_2):page44_i64 5 C Q517
R150 SOT23_1G1D1S Stuff for DT DESKTOP (6PIN NORTH + 8 PIN NORTH): STUFF D, UNSTUFF R
1G COMMON
D
DFN55X6_1_27MM
1B1C1E 3 INPUT8_HOT_UNPLUG_Q B1 @discrete.q_npn(sym_1):page44_i5
INPUT_PEX8_DT3_R* 1k/NC S 2 INPUT8_HOT_UNPLUG_R C Q516 SOT23_1B1C1E
12V COMMON
R569 10k B1 QUADRO (8 PIN EAST ONLY): UNSTUFF D, STUFF R
60V
L2N7002LT1G 12V_PEX8_STEER_C MDU3603 @discrete.q_npn(sym_1):page44_i10 E 2
0402 0.3A SOT23_1B1C1E
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V 0402 1% COMMON
COMMON
0.8A C512 C524 E 2 TESLA (8 PIN EAST ONLY): UNSTUFF D, STUFF R
0.35W MMBT2222A-7-F
20V 1uF 0.1uF
SOT23
SOT23 25V 16V
MMBT2222A-7-F
10% 10%
X7R X7R SOT23
0603 0402
COMMON COMMON

12V_F C221 4.7uF 12V_PEX_STEER_N


GND GND GND GND
0805 25V D 5 INPUT_EN_HPD_Q
10% Q504
2 X7R 2
COMMON
R551 100k R553 20k 4G
0402 5% COMMON 0402 5% COMMON
S 1 -30V

2 N/A
0.035R@-4.5V; 0.02R@-10V;

3 -72A
3W@25C

1G1D1S 3
DFN55X6_1_27MM D Q514
MDU3603 @discrete.q_fet_n_enh(sym_2):page44_i6
R568 1k SOT23_1G1D1S
12V_PEX_STEER_R
{27,28,45,46}
THERM_OVERT* INPUT_NVVDD_EN_HPD 1G COMMON
IN
0402 1% COMMON S 2 60V

1G1D1S 3 0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
D Q513 0.8A
0.35W

@discrete.q_fet_n_enh(sym_2):page44_i67 C522 20V

SOT23_1G1D1S 0.1uF L2N7002LT1G


1G COMMON
16V
S 2 GND
10%
60V
L2N7002LT1G
X7R
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V 0402
0.8A
0.35W
COMMON
20V

SOT23
GND

GND
3V3_F
PEX 6 INPUT CONNECTOR IS NOT LOADED
R520 PEX6 IN PEX8 CONNECTOR Present
PEX 6 INPUT DETECT MUST BE DISABLED 1k
1%
PEX 8 INPUT DETECT MUST BE USED TO CONTROL STEERING 0402
COMMON

3 PEX Input - Under Power Boot Controls GPIO12_LOW_PERF* GPU SPEED


3
INPUT_PEX8_DT1* R513 1k INPUT_PEX8_DT1_R*
{44} IN
0402 1% COMMON 3V3_F
C503 0 Slow
0.1uF
NO STUFF R1 16V R559 1 Normal
10% 2.2k
NO STUFF R2 X7R
5%
0402
0402
NO STUFF C3 COMMON
COMMON

3V3_F 1G1D1S 3 INA3221_LOW_PERF*


{44}
D Q511
OUT
GND
INS16862143
R511 INPUT_PEX8_DT1_R* 1G SOT23_1G1D1S
1k COMMON
PEX 8 Input Present S 2
1%
60V
0402 0.3A
COMMON 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W 3V3_F
INPUT_PEX8_DT2* R506 1k INPUT_PEX8_DT2_R* 20V

{44} IN L2N7002LT1G
0402 1% COMMON
C502 SOT23
0.1uF R550
16V 10k
10%
GND
1%
X7R 0402
0402 3
LOWPWR_MODE_Q1 R580 1k/NCGPIO6_NVVDD_PSI*
COMMON 1G1D1S
D OUT {27}
COMMON Q515 0402 1% COMMON
3V3_F @discrete.q_fet_n_enh(sym_2):page44_i17
SOT323_1G1D1S
GND 1G1D1S 3 1G1D1S 3 LOWPWR_MODE 1G COMMON
D Q510 D Q509 S 2
R512 @discrete.q_fet_n_enh(sym_2):page44_i48 @discrete.q_fet_n_enh(sym_2):page44_i21 30V
1k SOT23_1G1D1S SOT323_1G1D1S R571
4
INPUT_PEX8_DT2_R* 1G COMMON 1G COMMON
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
4
1% 100k/NC
GeFORCE: 0402
S 2 S 2 1.2A
0.2W
5% 12V
COMMON 60V 30V
0402 RJU003N03/NC
PEX 6 INPUT CONNECTOR IS LOADED
0.3A 0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V 1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V COMMON
INPUT_PEX8_DT3* R507 1k INPUT_PEX8_DT3_R* 0.8A 1.2A SOT323
{44} IN
0.35W 0.2W GND
PEX 6 INPUT DETECT MUST BE USED TO CONTROL STEERING
20V 12V
0402 1% COMMON
C582 L2N7002LT1G RJU003N03
0.1uF SOT23 SOT323
16V
10%
GND GND
X7R GND
0402 1V8_AON
STUFF R1 COMMON
1G1D1S 3
D Q506
R552
STUFF R2 GND INS16916986
SOT23_1G1D1S 2.2k
INPUT_PEX8_DT3_R* 1G COMMON
5%
STUFF C3 S 2 0402
60V COMMON
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W
20V
1G1D1S 3 GPIO12_LOW_PERF*
{27,32}
L2N7002LT1G D Q507
OUT
SOT23 @discrete.q_fet_n_enh(sym_2):page44_i91
SOT323_1G1D1S
1G COMMON
GND S 2
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V

RJU003N03
SOT323
GND
5 5
A 2 x 4 auxiliary power connector plug from the power supply unit must not use the 75 W sense
coding (Sense1=Open and Sense0=Ground) to avoid end-user confusion.

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: Current Sterring, Hot Unplug
PS: 12V Current Steering & Hot Unplug Detect
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 45 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page46: PS: NVVDD ENABLE,VOUT LED

NV3V3 NV3V3 1V8_AON NV3V3 NVVDD ENABLE


High Priority D509
R649 R650 R635 R659
1 Protection Event 10k 10k/NC 70V 10k/NC 10k
3V3_SEQ
1
5% 5% 70mA 5% 5% R1302 0ohm/NC
0402 0402 0402 0402
1V8_AON 3V3_SEQ 3V3_F
SOT323
COMMON COMMON COMMON COMMON 04020.05 ohm COMMON
COMMON
OC_CRIT* R648 0ohm OC_CRIT_D 1
{44} IN R622 R617
0402 COMMON
0.05 ohm 3
PS_PCIE_GOOD R647 0ohm INPUT_EXT_PRSNT_D 0ohm/NC 0ohm/NC R1301 0ohm/NC
{44} 2 NV3V3
IN 0.05 ohm 0.05 ohm
0402 COMMON
0.05 ohm 04020.05 ohm COMMON
0402 0402
@discrete.d_3pin_aa(sym_1):page45_i74 3V3_F 3V3_F 3V3_F
COMMON COMMON
NV3V3 R641 10k BAS70-06W SOT323 D508 BUFFER_VCC_R 3V3_F
0402 5% COMMON @discrete.d_3pin_aa(sym_1):page45_i91
R645 10k 70V C540 0.1uF/NC
NV3V3
0402 COMMON
70mA
0402 16V
GND R890 R1084
5%
SOT323
10% R896 150ohm R815 150ohm
COMMON 150ohm 330ohm

5
MCU_THERMAL_ALERT R642 0ohm/NC X7R 1% 1%
{52} MCU_THERMAL_ALERT_EN 1 U503
COMMON R0402 R0402
IN 1% 1%
04020.05 ohm COMMON 3 PS1_NVVDD_EN_PROT 1 R0402 COMMON R0402 COMMON
THERM_OVERT* R636 0ohm OVERT_3V3NV_PGODD 2 4 PS1_NVVDD_EN_IN R630 0 PS_NVVDD_EN FBVDDQ PEX_VDD
IN {27,28,45} OUT {34} COMMON COMMON
04020.05 ohm COMMON 2 SC70-5 0402 5% COMMON NVVDD
BAS70-06W SOT323 C531 R613
COMMON
10nF 10k/NC
@logic.u_and_2in(sym_1):page45_i86 D12 D802

3
U_AND_2IN/NC 25V 5% R889 R1083
D11 Blue Blue
R629 10% 0402 R895 100ohm LED_0603 100ohm LED_0603
X7R COMMON Blue
100k/NC 100ohm LED_0603 1% 1%
GND 0402 R0402
D10 R0402
5% 1%
Under power boot protect 0402
COMMON
R0402 COMMON 3 Blue 3V3 COMMON 3
3 C Q576 LED_0603 C Q578
12V_F COMMON COMMON GPU_V DDR_V PCI_V
C Q587 B1 MMBT3904A B1 MMBT3904A
12V_PEX8_F2 GND GND
12V_PEX8_F1 R1310 0ohm B1 MMBT3904A SOT23 SOT23
COMMON COMMON
R663 04020.05 ohm COMMON SOT23 E 2 E 2
R683 10k COMMON
E 2
10k 5%
2
R1081
0402 1B1C1E 3 2
10k 5% C Q57
0402 COMMON GND
COMMON
COMMON 1B1C1E 3 12V_PEX_Q B1 MMBT2222A GND
0402 C
5% Q56 SOT23 GND GND
1B1C1E 3 12V_PEX_R_DIV B1 MMBT2222A E 2 GND
C Q55 SOT23
12V_PEX_2R_DIV B1 MMBT2222A E 2
SOT23 R682 C543
C1429 1k 10nF
R508 E 2
10nF 5% 25V
1k
16V 0402 10%
0402
COMMON COMMON X7R
10%
1% 0402
X7R
0402 COMMON
COMMON GND
GND GND GND GND 3V3_F DR_5V
GND GND DR_5V
3V3_F
R892 R893
5V
0ohm 750ohm
1% 1%
R1092 R0402 R0603
R667
GPIO15_YL 0/NC NV3V3 1V8_MAIN COMMON COMMON
IN 150ohm R888
R0402 D507 1% R887 1.8K
12V_PEX8_F1
R665 0/NC R668 R932 R0402 1.8K 1%
50} GPIO20_RGB 1V8_AON COMMON
IN 10k/NC 70V 10k/NC 1% R0603
R0603 COMMON
R666 0/NC 5% 70mA 5%
50} GPIO29_RGB R0402
0402 0402 COMMON D5
IN SOT323
COMMON COMMON COMMON Blue 12V
R669 0/NC 1 R894 60V
LED_0603
R0402 D803 0.3A DR_5V
R1091 10K
3 1V8_MAIN_PGOOD
{49} Blue 5V
2R@10V
0.8A
OUT 100ohm 1%
PS_1V8_AON_EN R0402
{30,31,49} 2 LED_0603
R0402
0.35W
+/-20V
IN 1%
3 R0402 COMMON
1G1D1S 3 D9 3
3 S Q586
@discrete.d_3pin_aa(sym_1):page45_i101
COMMON 1V8 D8 Blue
BAS70-06W/NC C Q585 LED_0603
Blue 2N7002
B1 SOT23
SOT323 MMBT3904A LED_0603 1G SOT23
SOT23
COMMON
D 2
E 2

GND
GND GND
GND

PEXVDD ENABLE

NV3V3

R1308
10k
5%
0402
COMMON

PS_NVVDD_PGOOD R721 0ohm PS_PEXVDD_EN


IN {30,34,47} OUT {30}
0402 0.05 ohm COMMON
4 4

3V3
POWER BRAKE
R190
NV3V3
10k/NC
5%
0402
5

COMMON U18
IN POWER_BRAKE*{3} 1 INS16886489
4 GPIO11_LOGO_LED_POWER_BRAKE {27,48}
OUT
2 SC70-5
COMMON
R189
0ohm/NC
3

0.05 ohm
0402
COMMON
U_AND_2IN/NC

5 GND 5

GND

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: NVVDD ENABLE
PS: NVVDD ENABLE, VOUT LED
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 46 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page47: GC6 MISC,SN EEPROM


Accept 3V3 Logic
R1440 0ohm/NC

R0402
1V8_AON
PEX_RST# LOGIC 3V3_F

C577 0.1uF
PEX_CLKREQ* R213
10k
0402 16V
10%
5% X7R
1 0402 COMMON GND 1

5
COMMON U511
R1441 0ohm/NC PEX_RST_MCU* 1 @logic.u_and_2in(sym_1):page46_i36
4 PEX_RST_BUF* PEX_RST_BUF* {3}
OUT
{3} PEX_RST* R0402 2 SC70-5
IN R727
COMMON
3V3 NV3V3 NL17SZ08DFT2G 100k

3
5%
0402
COMMON
R879 RJU003N03/NC R885 SC70_5
GND
10k/NC 10k/NC
(DEPENDS ON I2C BUS PULL UP VOLTAGE)

SOT323_1G1D1S
5% 5%
0402 0402
(TO SELECT 3.3V OR 5V)

@discrete.q_fet_n_enh(sym_2):page46_i6
GND

COMMON
COMMON COMMON
PEX_CONN_B12 R878 0ohm/NC GPU_PEX_CLKREQ* 3V3_F

Q540
{3} BI BI {3}

2
04020.05 ohm COMMON

S
PEX_TCLK R880 0ohm/NC PEX_CLKREQ_CONN*
{3} BI
SOT323 R1051
04020.05 ohm COMMON

1G
0

1G1D1S
5%
R0805
COMMON
NV3V3
3.3V
D800
1 2

C1430 R1049
30VR
SM_SOD123 10K
0.1UF 0.5A
COMMON
COMMON 5%
2 X7R R0402 2
16V COMMON
C0402
10%
U800

8
GND
EEPROMA0 1 5

VCC
EEPROMA1 2 A0 SDA R1050
J24 A1 100K
EEPROMA2 3
4 VCC_3V3 A2 5%
R0402
3 I2C_CLK 6 COMMON
2 I2C_DATA SCL
GPU_EVENT*

GND
1 GND1 7
WP
VERTICAL

4
5 pin 90 Degree Connector
COMMON FT24C02A-USR
MALE
2.0MM
dip_head1x4_2mm_90
HDR_1X4_2.00mm 90 DEGREE DIP
GND GND
GND
EXTERNAL PROGRAMMING HEARDER

R1047 R1048
2.2K 2.2K
5% 5%
R0402 R0402
COMMON COMMON

R961 0
R0603 COMMON
3 3

FBVDD/Q ENABLE R1043


R0603 +0.05R
0/NC I2CC_SCL_R
COMMON
OUT {27,32,34,44,50}

R1042 0 R1044 0/NC I2CC_SDA_R


BI {27,32,34,44,50}
R0603 COMMON R0603 +0.05R COMMON

R1045 0 I2CB_SCL_R
OUT {27,32,34,50}
R0603 +0.05R COMMON

TEST HOLES VCC_3V3


R1052 R1046 0 I2CB_SDA_R
NV3V3 BI {27,32,34,50}
3V3_F 0/NC R0603 +0.05R COMMON

5%
VCC_3V3 COMMON EEPROMA1
R0402
4 R1309 R789 4
I2C_DATA I2C_CLK
10k/NC 10k/NC
5% 5%
GND R1053
0402 0402
COMMON COMMON 0
5%
VCC_3V3
PS_NVVDD_PGOOD R774 0ohm PS_FBVDD_EN COMMON R1056
{30,34,46} IN OUT {32} R0402
04020.05 ohm COMMON 0
5%
PEX_OVREG_PGOOD R784 0ohm/NC COMMON EEPROMA2
{30} IN R0402
04020.05 ohm COMMON GND

R1057
0/NC
5%
COMMON
R0402

VCC_3V3
R1054 GND
0/NC
5%
COMMON EEPROMA0
R0402

4
R1055
0

VCC_3V3
I2C_DATA

I2C_CLK
GND
5%
5
TP5 COMMON
5
R0402

Test4P_SN Test4P_SN GND

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL PS: GC6 MISC
GC6 MISC,SN EEPROM
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 47 of 52

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Page48:GEFORCE LED & SLI LED

1 1

LED HEADER(GEFORCE ONLY) 12V_F

1 J7
2

@electro_mechanic.hdr_1x2(sym_1):page47_i77
MALE
2.5MM
0
LED NORM
COMMON
NV3V3
DIP_FAN_2P

R214
10k R614 R596 R572 R584
5% 1k 1k 680ohm 680ohm/NC
0402 5% 5% 5% 5%
COMMON 0805 0805 0603 0603
COMMON COMMON COMMON COMMON
3 LED_Q*
D Q524
@discrete.q_fet_n_enh(sym_2):page47_i70
GPIO11_LOGO_LED_POWER_BRAKE SOT23_1G1D1S
R633 1k LED_ON 1G
{27,46} IN COMMON
0402 1% COMMON S 2 AO3416L

2 1G1D1S 2
60V
C539 0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.1uF 0.8A
0.35W
16V 20V

10%
X7R
0402 GND
COMMON

GND

3 3

SLI LED (GEFORCE ONLY)


1V8_AON NV3V3

R994 R981 12V_F


3.3k 3.3k/NC
5% 5%
0402 0402

18mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V


COMMON COMMON

R976 10k
0402 COMMON
R1031 R2
1%
44.2ohm 44.2ohm
1% 1%
12V_F 12V_F

INS16875532
4 0603 0603 4
1V8_AON COMMON COMMON

R954 R951 Q2

COMMON
-10.8A
24.9k 24.9k

3.4W
-80A

-30V

DFN3X3
25V
SLI_LED_R SLI_LED
OUT {26}

3
2
1

5
1% 1%
0402 0402
1B1C1E 3 COMMON COMMON

D
S
C Q563 GPIO7_LED_Q
GPIO7_SLI_LED_DIM B1 @discrete.q_npn(sym_1):page47_i17 3 3 MDV3605 R925

4 G
{27} IN SOT23_1B1C1E
1G1D1S
D
1G1D1S
D 0ohm/NC
COMMON
Q556 Q552 L2N7002LT1G
0.05 ohm
E 2 @discrete.q_fet_n_enh(sym_2):page47_i19 @discrete.q_fet_n_enh(sym_2):page47_i39

1G4D3S
SOT323_1G1D1S SOT23_1G1D1S 0402 STUFF FOR QUADRO
1G COMMON 1G COMMON
SLI_LED_Q COMMON
MMBT2222A-7-F S 2 S 2GPIO7_LED_Q_N 3
RJU003N03FRA 30V 300mA Q548 D DFET_SMD_032X033
SOT23 30V 1G1D1S
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V SOT23 @discrete.q_fet_n_enh(sym_2):page47_i36
1.2A SOT323_1G1D1S G1
0.2W COMMON
12V
GND 2 S
SOT323
30V GND
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V

PJC138K
GND
SOT323

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL GEFORCE LED AND SLI LED
GEFORCE LED & SLI LED
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 48 of 52

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Page49:NV3V3, NV12V

12V_F

NV12V
1 1
C1467 R1
4.7nF 316ohm
16V 5% C1411
10% 0402 0.1uF
12V
X7R 1.25W 16V
0402 S -12A
-1000mohm@10V / 100mohm@4.5V / 135mohm@2.5V 10%
0402 G 2 -3A
X7R
1G1D1S 3 R1037 2.49k PS_PG_IOVDD_Q* 1
-20V
0402 3V3_F 3V3_PROT
D Q573 0402 5% 0402 D SOT23_1G1D1S
@discrete.q_fet_n_enh(sym_2):page48_i109
0402 @discrete.q_fet_p_enh(sym_2):page48_i92
1V8_MAIN_PGOOD R1026 0ohm/NC PS_PG_IOVDD_R2 1G SOT323_1G1D1S Q13
{46} IN
0402
GND
04020.05 ohm S 2 1G1D1S EMFA0P02J 1G1D1S 3
D Q568
0402 30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
@discrete.q_fet_n_enh(sym_2):page48_i144
SOT23 R1025 100ohm PS_PG_NV12V_Q2 SOT23_1G1D1S
1.2A
0.2W PS_PG_NV12V_Q2 1G
C1425 12V
0805 S 2
5% 60V
10k SOT323 0.3A
GND 0805 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
16V RJU003N03GZT106 0.8A
0.35W
10% 20V C1427 3V3_F
X7R NV3V3
L2N7002LT1G/NC 0.1uF
0402
SOT23 16V
10% R1039
X7R 0ohm/NC
0402 0402
0.05 ohm
0603
GND DISCHARGE
0402 R0603
R1012
GND
100ohm/NC
5%
2 0603 2

3
PS_PG_NV12V_Q2 0603
Q26 Q27

D
[Q_AUX_FET2*_DP] [Q_AUX_FET2*_DP]
R1021 INS17052865 INS17052885
PS_PG_IOVDD* 1 1

G
0ohm R999

S
0.05 ohm C1422 0ohm
0402 0.1uF/NC

2
SOT23 SOT23 0.05 ohm
16V 0603
L2N7002LT1G L2N7002LT1G/NC
10%
0402
X7R
0402 0603
GND GND

0402
GND

12V_F 12V_F 3V3_F


3 3
NV3V3
R956 0ohm/NC
04020.05 ohm
R924
0402
10k R945
5% 10k
0402 5%
0402 1G1D1S 3
3V3_F D Q554
0402 @discrete.q_fet_n_enh(sym_2):page48_i158
SOT23_1G1D1S

3
PS_NV3V3_Q2
0402 1G
Q23 S 2

D
60V
0.3A
[Q_AUX_FET2*_DP]
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
INS17053213 C1371
3 1 0.8A

G
1G1D1S 0.35W
D 0.1uF/NC
5

U528 Q546 20V

S
PS_1V8_AON_PGOOD 1 @discrete.q_fet_n_enh(sym_2):page48_i116
16V SOT23 C1388
{31} 0.1uF

2
IN
4 PS_NV3V3_R1 1G SOT323_1G1D1S SOT23
10% L2N7002LT1G
X7R
PS_1V8_AON_EN 16V
{30,31,46} 2 SC70-5 S 2 L2N7002LT1G 0402
IN 10%
30V
X7R
0.3A
@logic.u_and_2in(sym_1):page48_i135 1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V 0402
3

1.2A
0.2W 0402
M74VHC1GT08DFT2G 12V
GND GND
SC70_5 SOT323
0402
RJU003N03GZT106
GND GND

GND

R939
100ohm
4 5% 4
0603

DISCHARGE
0603

3
PS_NV3V3_R2
Q25

D
[Q_AUX_FET2*_DP]
INS17053233
PS_NV3V3_Q1 1

S
C1368
0.1uF/NC

2
SOT23
16V
10% L2N7002LT1G
X7R
0402

GND
0402
GND

5 5

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PAGE DETAIL PS: NV3V3, NV12V
NV3V3, NV12V
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 49 of 52

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
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A

Page50: PS_ RGB LED,LCD LED


1 10 12V_LED 5V_LED 3V3_F
2 LED0 SCL 9
3 LED1 SDA 8 5V_LED 3V3_F
4 LED2 NC2 7
5 INIT NC1 6 R1143 R1141 R1142

GND
3V3_F VCC NC NC/0 NC/0 10k/NC/0
LEDB1_OUT R1139 R1140
U702 AW2013DNR NEW ADD U702 0805 0805 0805 0/NC 10k/NC/0
R771

11
1
R1075 R1077 R1088 R1087 C179 10k 0805 0805
R0805 R0805 R0805 R1128

3
NC/10K NC/10K 0ohm 10K/NC 0.1uF 12k/NC 0402
R0402 R0402 R0402 R0402 16V Q59
3V3_F R0805 R0805 R1129

D
1

2
LCM 0ohm R0402 R0805 0805 R772 1k [Q_AUX_FET2*_DP] 12k/NC
X7R
INS17705184
LEDB1_OUT OUT {44}
C0402 R1114 I2CB_SDA_R R0402 1

G
GND SOT23_1G1D1S
J28 R1117 BI {27,32,34,47,50} R769

3
R0805 0805

S
GND 0402
10k
C0402 4 VCC_3V3_LCD R0805 0ohm 0ohm R0402 GND Q58

D
R1144

3
3 SCL_R_LCD R1113 I2CB_SCL_R
{27,32,34,47,50} 0402
R770 1k [Q_AUX_FET2*_DP]
INS17705164
Q_FET_N_ENH NEW ADD R1107
OUT 10k
2 SDA_R_LCD LED_B 1 Q64

G
SOT23_1G1D1S R0402 GND

D
1 GND1 0ohm/NC R0402 R1145 1k [Q_AUX_FET2*_DP]

S
0402 0402 INS17705287
C189

1
R1060 R1115 R0402 1

G
I2CC_SCL_R SOT23_1G1D1S
4.7uF OUT {27,32,34,44,47,50} C181

1
R1059 0ohm 0ohm/NC R0402 Q_FET_N_ENH

S
VERTICAL 0402
5 pin 90 Degree Connector 16V 0.1uF
R1058 0ohm COMMON R1116 I2CC_SDA_R BI {27,32,34,44,47,50} R0402 GND R0402
R1135

2
MALE 16V
R1108 0ohm 2.0MM X5R
0ohm AO3416L

2
0ohm CON_WAFER232_004_TH_ST_P020 0603 ONBAORD_GPIO R0402 X7R

2
0805 R0603
0603 GND C0402
0805 GND GND
0805 R0402 GND R0402
R0402 R0402 C0402 GND
R1099 R0402
0ohm LED_R LED_G LED_B
0603
LEDG1_OUT

12V_LED R1147
R0402 10k

3
12V_PEX8_F1
0402
Q61 LEDG1_OUT

D
R1078 [Q_AUX_FET2*_DP]
OUT {44}
R1148 1k INS17705227
0ohm R0402 1

G
SOT23_1G1D1S
R937

3
R0805

S
0402
10k

3
12V_F Q60

2
R1146 1k [Q_AUX_FET2*_DP] Q_FET_N_ENH Q65

D
2 R1080 0402 INS17705207
LED_G 1 [Q_AUX_FET2*_DP]

G
SOT23_1G1D1S R0402 INS17705307
0ohm/NC 1

G
0402 SOT23_1G1D1S
R0805 R0402

S
2
5V 5V_LED Q_FET_N_ENH

2
R0402 GND AO3416L
R1079
0ohm/NC
R0805
GND
0ohm R0402 3V3 GND
RGB_SDA R1110 I2CB_SDA_R BI {27,32,34,47,50}
0ohm R0402
RGB_SCL R1109 I2CB_SCL_R LEDR1_OUT
OUT {27,32,34,47,50} R1093
1G1D1S 3
NC/10K D R1137
0ohm/NC R0402 Q49
10k
R1111 I2CC_SCL_R
OUT {27,32,34,44,47,50}
R1095 0 OHM/NC R1094 1K/NC 2N7002/NC LEDR1_OUT OUT {44}
SOT23

3
0ohm/NC R0402 ONBAORD_GPIO 1G COMMON 0402
C81

1
R1112 I2CC_SDA_R S 2 Q62

D
BI {27,32,34,44,47,50} R0402 0.1UF/NC [Q_AUX_FET2*_DP]
60V R1138 1k
16V INS17705247

3
0.26A@25C
R0402 1

G
12V_LED 5V_LED 3V3_F 3R SOT23_1G1D1S
10% R1136

3
0.31A
Q66

S
R0402 R0402

D
X7R 0.3W@25C 0402
10k

2
3V3_F
+/-20V
Q63 [Q_AUX_FET2*_DP]
5V_LED C0402

D
INS17705327

2
COMMON R1070 1k [Q_AUX_FET2*_DP] Q_FET_N_ENH 1

G
GND SOT23_1G1D1S
0402 INS17705267
R1076 R1073 R1074 LED_R 1

S
G
SOT23_1G1D1S R0402
NC/0 NC/0 10k/NC/0

S
GND 0402

2
LEDB1 R1071 R1072 R0402 AO3416L

2
0805 0805 0805 0/NC 10k/NC/0 Q_FET_N_ENH
R767
R0402 GND
10k 0805 0805
R0805 R0805 R0805 R1124
3

12k/NC
3 0402
Q14 R0805 R0805 R1125 GND
D

R0805 0805 R768 1k [Q_AUX_FET2*_DP] 12k/NC LEDB1


INS17701232 OUT GND
R0402 1
G

SOT23_1G1D1S
R765
3

R0805 0805
S

0402
10k
GND Q13
D

R1085
2

3
R766 1k [Q_AUX_FET2*_DP] Q_FET_N_ENH
0402 INS17701198 10k
LED_B 1 Q19
G

SOT23_1G1D1S R0402 GND

D
R1086 1k [Q_AUX_FET2*_DP]
S

0402 0402 INS17701370


R0402 1

G
SOT23_1G1D1S
C178
2

1
Q_FET_N_ENH

S
0402
R0402 0.1uF
R0402 GND
R1098

2
16V
0ohm AO3416L
ONBAORD_GPIO R0402 X7R

2
C0402
GND GND 5V_LED 12V_LED
5V_LED 12V_LED
R0402
C0402 GND
R1097 0ohm R1082
GPIO20_RGB R1123 0/NC
OUT {27,31,46}
LEDG1 NC/0 R1130
R1122 0805 0ohm
R1090 R1096 0805 0ohm R0805
10k R0402
0 OHM/NC GPIO29_RGB R0805 R0805
OUT {27,31,46}
3

R0805
0402
Q16 LEDG1
D

OUT C193 C194

1
R1100 1k [Q_AUX_FET2*_DP]
INS17701310 C191 C192 0.1uF 10uF/16V

1
R0402 1
G

SOT23_1G1D1S R0402
R823 0.1uF 10uF/16V
3

16V 16V
S

0402
10k

3
16V 16V
Q15 SS LED
D

X7R X5R
2

2
R952 1k [Q_AUX_FET2*_DP] Q_FET_N_ENH Q20 BKT-LED C0402 0805

D
X7R X5R 4-pin GPU fansink
4 0402 INS17701284

2
LED_G 1 [Q_AUX_FET2*_DP] C0402
G

SOT23_1G1D1S R0402 4-pin GPU fansink C0402 0805


INS17701390
1 C0402 PWM 1 J25 R0805
S

G
0402 SOT23_1G1D1S
R0402 R1119 PWM 1 J27 R0805 LEDR1_OUT R1131 0ohm R0402 TACH2 INS17704817

S
5V_LED 12V_LED GND
MALE
2

Q_FET_N_ENH LEDR1_OUT 0ohm R0402 TACH2 INS17704960


GND LEDG1_OUT R1132 0ohm 12V 3 2.0MM
MALE

2
R0402 GND AO3416L LEDG1_OUT R1120 0ohm 12V 3 2.0MM LEDB1_OUT R0402 0ohm GND4 VERTICAL
R1069 LEDB1_OUT R0402 0ohm R0402 GND4 VERTICAL R1133 R0402 GPU

NC/0 R1121 GPU


CON_WAFER232_004_TH_ST_P020
R1068
0805 CON_WAFER232_004_TH_ST_P020 HDR_1X4
GND 0ohm
R0805 HDR_1X4
GND
R0805

LEDR1
C176 C177
1

1
R1063 0.1uF 10uF/16V
10k 16V 16V
LEDR1 OUT
3

0402
FAN LED X7R X5R
2

Q17 C0402 0805


D

4-pin GPU fansink


R1064 1k [Q_AUX_FET2*_DP] C0402
INS17701330

3
R0402 1 PWM 1 J14 R0805
G

SOT23_1G1D1S
R1061
3

LEDR1 R1065 0ohm R0402 TACH2 INS17700629 Q21


S

GND

D
0402
10k Q18 12V 3
MALE
[Q_AUX_FET2*_DP]
LEDG1R1066 0ohm
D

2.0MM INS17701410
2

R1062 1k [Q_AUX_FET2*_DP] Q_FET_N_ENH LEDB1R0402 0ohm GND4 VERTICAL 1

G
SOT23_1G1D1S
0402 INS17701350
LED_R 1 R1067 R0402 GPU

S
G

SOT23_1G1D1S R0402
S

0402
CON_WAFER232_004_TH_ST_P020

2
R0402 AO3416L
HDR_1X4
2

Q_FET_N_ENH
R0402 GND

5
GND
GND Galaxy Microsystems (HK) Ltd.
Page Name:
RGB LED,LCD LED
Size Project Name: Design By: Rev
Custom Neston V10
P25Z
Date: Friday, March 03, 2017 Sheet 50 of 52
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page51: Mechanical: Bracket/Thermal Solution

1 1

BKT2 BKT3

HOLE125AAA
Brackets: HOLE125AAA
2 2
1 1

GND GND
MECH. MOUNTING TOP

MECH. MOUNTING TOP

NVVDD FBVDDQ PEX_VDD 5V GND DR_5V 1V8_AON


BRACKET BRACKET

3 3

1
1

1
GPU_V DDR_V PCI_V 5V GND DR_5V 1V8

TP_OCT2MM_DIPTP_OCT2MM_DIPTP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP

GPU Stiffner

MEC7
BOARD STIFFENER INS16897109
8PIN
8 connected mounting pins
1
2
3
4
5
6
7
8

HSN_SAV_GF100GPU_T_AL_1
STIFFENER
4 4

GND

5 5

Galaxy Microsystems (HK) Ltd.


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PAGE DETAIL MECH
Mechanical: Bracket/Thermal Solution
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
Custom Neston V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P25Z
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Friday, March 03, 2017 Sheet 51 of 52

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A B C D E F G H

Page52: VR THERMAL PROTECTION

1 1

2 2

PS_FBVDD_VREF 3V3_F

{32} IN

R147 51.1ohm/NC
R155 0603 COMMON
1%
0ohm/NC
0.05 ohm R146 51.1ohm/NC
0402
COMMON 0603 1% COMMON

RT4
1k_B25/100=0K/NC
50% C185
0402 R145 1uF/NC
COMMON
PS_THERMAL_R1
1k/NC 6.3V
RT3 1% 10%
1k_B25/100=0K/NC 0402 U14 X6S

2
COMMON @power_supply.u_shntreg_tl431(sym_2):page51_i30
0402

PS_THERMAL_ADJ
50%
0402
1 1.24V/NC COMMON
SOT23
COMMON
PS_THERMAL_R2 R143 SOT23
COMMON
RT5 1.62k/NC

3
GND
1k_B25/100=0K/NC 1% NV3V3
50% 0402
PS_THERMAL_VREF COMMON 3V3_F
0402
COMMON
PS_THERMAL_R3
RT2
3 1k_B25/100=0K/NC 3
50% R1040 C570 3V3_F C542 R654
GND
0402 64.9k/NC 1uF/NC 47nF/NC 10k/NC R652
COMMON
PS_THERMAL_R4 1% 6.3V 16V 5% 10k/NC R644
RT6 0402 10% R722 10% 0402
E 5% 10k/NC
COMMON X6S X7R COMMON
1k_B25/100=0K/NC 10k/NC 0402 5%
0402 0402 2 COMMON 0402
50% 5%
COMMON COMMON B Q526 COMMON
0402 0402
R681 3.3k/NC 1 COMMON
COMMON COMMON C SOT323_1B1C1E

2
PS_THERMAL_R5 V-
GND
PS_TSENSE_IN GND 0402 5% COMMON @discrete.q_pnp(sym_1):page51_i42
RT7 1 3

COMP_THERM_ALERT_INV
COMP_THERM_ALERT
1k_B25/100=0K/NC MCU_THERMAL_ALERT
PS_TCOMP_VREF 4 1B1C1E
THERM_ALERT_PNP_RQ
1G1D1S 3 {46}
50%
3 V+ D Q525
OUT
0402 C574
COMMON
COMMON 3 1G1D1S Q_PNP/NC
THERM_ALERT_PNP @discrete.q_fet_n_enh(sym_2):page51_i44
4.7nF/NC
PS_THERMAL_R6 @analog.u_comp(sym_3):page51_i24
SC70_5
Q528B D 1G SOT323_1G1D1S
COMMON

5
16V
U508 @discrete.q_fet_n_enh(sym_2):page51_i38
THERM_ALERT_PNP_R S 2
RT8 10% R752 SOT363 G5 R674 1.02k/NC 30V
1k_B25/100=0K/NC X7R 10k/NC COMMON
0402 3V3_F 4 S 0402 1 % COMMON
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
50%
COMMON
1% U_COMP/NC 1.2A
0.2W
0402 0402 C552 R653 12V
PS_THERMAL_R7
COMMON COMMON Q_FET_N_ENH/NC
47nF/NC 10k/NC Q_FET_N_ENH/NC
RT9 16V 5%
GND
1k_B25/100=0K/NC C567 10% 0402
X7R COMMON
50% C586 R755 1uF/NC
1G1D1S 6 0402
0402 4.7nF/NC 10k/NC 6.3V D
COMMON Q528A COMMON
16V 1% 10%
PS_THERMAL_R8 @discrete.q_fet_n_enh(sym_2):page51_i17
10% 0402 X6S
SOT363
X7R COMMON 0402 2G COMMON
RT10 COMMON S 1
0402
1k_B25/100=0K/NC COMMON
50% R697 C558
Q_FET_N_ENH/NC GND
0402 100k/NC 1uF/NC
4 COMMON GND GND GND 4
1% 6.3V
0402 10%
COMMON
R646 0ohm/NC
X6S
0402 04020.05 ohm COMMON
COMMON

GND GND STUFF FOR BYPASSING THE LATCHED CIRCUIT

GND

5 5

Galaxy Microsystems (HK) Ltd.


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ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL VR Thermal Protection
VR THERMAL PROTECTION
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
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