LTC1157

3.3V Dual Micropower

High-Side/Low-Side MOSFET Driver
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FEATURES DESCRIPTIO
■ Allows Lowest Drop 3.3V Supply Switching The LTC1157 dual 3.3V micropower MOSFET gate driver
■ Operates on 3.3V or 5V Nominal Supplies makes it possible to switch either supply or ground
■ 3 Microamps Standby Current reference loads through a low RDS(ON) N-channel switch
■ 80 Microamps ON Current (N-channel switches are required at 3.3V because P-
■ Drives Low Cost N-Channel Power MOSFETs channel MOSFETs do not have guaranteed RDS(ON) with
■ No External Charge Pump Components VGS ≤ 3.3V). The LTC1157 internal charge pump boosts
■ Controlled Switching ON and OFF Times the gate drive voltage 5.4V above the positive rail (8.7V
■ Compatible with 3.3V and 5V Logic Families above ground), fully enhancing a logic level N-channel
■ Available in 8-Pin SOIC switch for 3.3V high-side applications and a standard N-
channel switch for 3.3V low-side applications. The gate
UO drive voltage at 5V is typically 8.8V above supply (13.8V
APPLICATI S above ground), so standard N-channel MOSFET switches
■ Notebook Computer Power Management can be used for both high-side and low-side applications.
■ Palmtop Computer Power Management Micropower operation, with 3µA standby current and
■ P-Channel Switch Replacement 80µA operating current, makes the LTC1157 well suited
■ Battery Charging and Management for battery-powered applications.
■ Mixed 5V and 3.3V Supply Switching
■ Stepper Motor and DC Motor Control The LTC1157 is available in both 8-pin DIP and SOIC.
■ Cellular Telephones and Beepers

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TYPICAL APPLICATI
Ultra Low Voltage Drop 3.3V Dual High-Side Switch Gate Voltage Above Supply
12
GATE VOLTAGE – SUPPLY VOLTAGE (V)

3.3V
10
+
10µF
8

VS 6
(8.7V)
IN1 G1 IRLR024
3.3V
LOGIC LTC1157 4
(8.7V) 3.3V
IN2 G2 IRLR024 LOAD
GND 2
3.3V
LOAD
LTC1157 • TA01
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
LTC1157 • TA02

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LTC1157
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ABSOLUTE AXI U RATI GS
Supply Voltage ........................................... – 0.3V to 7V Operating Temperature Range
Any Input Voltage ............. (VS + 0.3V) to (GND – 0.3V) LTC1157C............................................... 0°C to 70°C
Any Output Voltage ............. (VS + 12V) to (GND – 0.3V) Storage Temperature Range ................ – 65°C to 150°C
Current (Any Pin)................................................. 50mA Lead Temperature (Soldering, 10 sec)................. 300°C

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PACKAGE/ORDER I FOR ATIO
TOP VIEW ORDER PART TOP VIEW ORDER PART
NUMBER NUMBER
NC 1 8 NC NC 1 8 NC
GATE 1 2 7 GATE 2 GATE 1 2 7 GATE 2
GND 3 6 VS
LTC1157CN8 GND 3 6 VS
LTC1157CS8
IN1 4 5 IN2 IN1 4 5 IN2

N8 PACKAGE S8 PACKAGE
S8 PART MARKING
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SO

TJMAX = 100°C, θJA = 130°C/ W TJMAX = 100°C, θJA = 150°C/ W 1157

ELECTRICAL CHARACTERISTICS VS = 2.7V to 5.5V, TA = 25°C, unless otherwise noted.

LTC1157C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IQ Quiescent Current OFF VS = 3.3V, VIN1 = VIN2 = 0V (Note 1) 3 10 µA
Quiescent Current ON VS = 3.3V, VIN = 3.3V (Note 2) 80 160 µA
VS = 5V, VIN = 5V (Note 2) 180 400 µA
VINH Input High Voltage ● 70% × VS V
VINL Input Low Voltage ● 15% × VS V
IIN Input Current 0V ≤ VIN ≤ VS ● ±1 µA
CIN Input Capacitance 5 pF
VGATE – VS Gate Voltage Above Supply VS = 3V ● 4.0 4.7 6.5 V
VS = 3.3V ● 4.5 5.4 7.0 V
VS = 5V ● 7.5 8.8 12.0 V
tON Turn-ON Time VS = 3.3V, CGATE = 1000pF
Time for VGATE > VS + 1V 30 130 300 µs
Time for VGATE > VS + 2V 75 240 750 µs
VS = 5V, CGATE = 1000pF
Time for VGATE > VS + 1V 30 85 300 µs
Time for VGATE > VS + 2V 75 230 750 µs
tOFF Turn-OFF Time VS = 3.3V, CGATE = 1000pF
Time for VGATE < 0.5V 10 36 60 µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 0.5V 10 31 60 µs

The ● denotes specifications which apply over the full operating

temperature range.
Note 1: Quiescent current OFF is for both channels in OFF condition.
Note 2: Quiescent current ON is per driver and is measured independently.

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 LTC1157
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TYPICAL PERFOR A CE CHARACTERISTICS

Standby Supply Current Supply Current per Driver ON Gate Voltage Above Supply
12 600 12
VIN1 = VIN2 = 0V ONE INPUT = ON

GATE VOLTAGE – SUPPLY VOLTAGE (V)

TA = 25°C OTHER INPUT = OFF
10 500 10
TA = 25°C
SUPPLY CURRENT (µA)

SUPPLY CURRENT (µA)

8 400 8

6 300 6

4 200 4

2 100 2

0 0 0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
LTC1157 • TPC01 LTC1157 • TPC02 LTC1157 • TPC03

Input Threshold Voltage Turn-ON Time Turn-OFF Time

3.0 1000 60
TA = 25°C CGATE = 1000pF CGATE = 1000pF
TIME FOR VGATE < 0.5V
INPUT THRESHOLD VOLTAGE (V)

2.5 800 50

TURN-OFF TIME (µs)

TURN-ON TIME (µs)

2.0 600 40

1.5 400 30
VGS = 2V VGS = 5V
1.0 300 20

0.5 200 10
VGS = 1V

0 0 0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
LTC1157 • TPC04 LTC1157 • TPC05 LTC1157 • TPC06

Standby Supply Current Supply Current per Driver ON Gate Drive Current
12 300 1000
TA = 25°C

10 250
GATE DRIVE CURRENT (µA)

100
SUPPLY CURRENT (µA)

SUPPLY CURRENT (µA)

8 200
VS = 5V
VS = 5V
6 150 10
VS = 5V
4 100
VS = 3.3V VS = 3.3V
VS = 3.3V 1
2 50

0 0 0.1
0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70 0 2 4 6 8 10
TEMPERATURE (˚C) TEMPERATURE (˚C) GATE VOLTAGE ABOVE SUPPLY (V)
LTC1157 • TPC07 LTC1157 • TPC08 LTC1157 • TPC09

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LTC1157
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PI FU CTIO S
Input Pins: The LTC1157 input pins are active high and
activate the charge pump circuitry when switched ON. The
LTC1157 logic inputs are high impedance CMOS gates
with ESD protection diodes to ground and supply and
therefore should not be forced beyond the power supply
rails.
Gate Drive Pins: The gate drive pin is either driven to
ground when the switch is turned OFF or driven above the
supply rail when the switch is turned ON. This pin is a
relatively high impedance when driven above the rail (the
equivalent of a few hundred kΩ). Care should be taken to
minimize any loading of this pin by parasitic resistance to
ground or supply.
Supply Pin: The supply pin of the LTC1157 should never
be forced below ground as this may result in permanent
damage to the device. A 300Ω resistor should be inserted
in series with the ground pin if negative supply voltage
transients are anticipated.

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OPERATIO
The LTC1157 is a dual micropower MOSFET driver de-
signed specifically for operation at 3.3V and 5V and
includes the following functional blocks:
3.3V Logic Compatible Inputs
The LTC1157 inputs have been designed to accommodate
a wide range of 3.3V and 5V logic families. Approximately
50mV of hysteresis is provided to ensure clean switching.
An ultra low standby current voltage regulator provides
continuous bias for the logic-to-CMOS converter. The
logic-to-CMOS converter output enables the rest of the
circuitry. In this way the power consumption is kept to an
absolute minimum in the standby mode.
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
internal charge pump circuit which generates a gate volt-
age substantially higher than the power supply voltage.
The charge pump capacitors are included on-chip and
therefore no external components are required to generate
the gate drive.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions.

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BLOCK DIAGRA (One Channel)

VS

LOW STANDBY HIGH

CHARGE
CURRENT FREQUENCY GATE
PUMP
REGULATOR OSCILLATOR

GATE
LOGIC-TO-CMOS VOLTAGE
INPUT DISCHARGE
CONVERTER REGULATOR
LOGIC
LTC1157 • BD

GND

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 LTC1157
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APPLICATIO S I FOR ATIO
MOSFET Selection Obviously, this is too much current for the regulator (or
The LTC1157 is designed to operate with both standard output capacitor) to supply and the output will glitch by as
and logic level N-channel MOSFET switches. The choice of much as a few volts.
switch is determined primarily by the operating supply The start-up current can be substantially reduced by
voltage. limiting the slew rate at the gate of an N-channel switch as
shown in Figure 1. The gate drive output of the LTC1157
Logic Level MOSFET Switches at 3.3V
Logic level switches should be used with the LTC1157 VIN LT1129-3.3
3.3V

when powered from 2.7V to 4V. Although there is some +

3.3µF
variation among manufacturers, logic level MOSFET
switches are typically rated with VGS = 4V with a maximum R1 R2
continuous VGS rating of ±10V. RDS(ON) and maximum VS 100k 1k
ON/0FF IN1 G1 MTD3055EL
VDS ratings are similar to standard MOSFETs and there is 1/2 LTC1157
generally little price differential. Logic level MOSFETs are +
GND C1 CLOAD 3.3V
frequently designated by an “L” and are usually available 0.1µF 100µF LOAD
in surface mount packaging. Some logic level MOSFETs
are rated up to ±15V and can be used in applications which LTC1157 • TA02

require operation over the entire 2.7V to 5.5V range.

Standard MOSFET Switches at 5V
Standard N-channel MOSFET switches should be used
with the LTC1157 when powered from 4V to 5.5V supply
as the built-in charge pump produces ample gate drive to
fully enhance these switches when powered from a 5V
nominal supply. Standard N-channel MOSFET switches
are rated with VGS = 10V and are generally restricted to a
maximum of ±20V.
Powering Large Capacitive Loads
Electrical subsystems in portable battery-powered equip-
ment are typically bypassed with large filter capacitors to
reduce supply transients and supply induced glitching. If
not properly powered however, these capacitors may
themselves become the source of supply glitching.
For example, if a 100µF capacitor is powered through a
switch with a slew rate of 0.1V/µs, the current during start-
up is:
ISTART = C(dV/dt)
= (100 × 10 – 6) (1 × 10 5)
= 10A
Figure 1. Powering a Large Capacitive Load
is passed through a simple RC network, R1 and C1, which
substantially slows the slew rate of the MOSFET gate to
approximately 1.5 × 10 – 4 V/µs. Since the MOSFET is
operating as a source follower, the slew rate at the source
is essentially the same as that at the gate, reducing the
start-up current to approximately 15mA which is easily
managed by the system regulator. R2 is required to
eliminate the possibility of parasitic MOSFET oscillations
during switch transitions. Also, it is good practice to
isolate the gates of paralleled MOSFETs with 1k resistors
to decrease the possibility of interaction between switches.
Reverse Battery Protection
The LTC1157 can be protected against reverse battery
conditions by connecting a 300Ω resistor in series with
the ground pin. The resistor limits the supply current to
less than 12mA with – 3.6V applied. Since the LTC1157
draws very little current while in normal operation, the
drop across the ground resistor is minimal. The 3.3V µP
(or control logic) can be protected by adding 10k resistors
in series with the input pins.

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LTC1157
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TYPICAL APPLICATIO S
Ultra Low Drop 3 to 4 Cell Dual High-Side Switch

+
3 TO 4
CELL 0.47µF
BATTERY Si9956DY
PACK
7,8 5,6
VS
2
IN1 G1
CONTROL
LOGIC LTC1157
OR µP 1 4 3
IN2 G2
GND
LOAD LOAD

LTC1157 • TA03

Mixed 5V and 3.3V Dual High-Side Switch

5V
+ 3.3V
10µF
6.3V

RFD16N05SM MTD10N05E
+ 10µF
VS 51k 4V
IN1 G1
CONTROL
LOGIC LTC1157
51k
OR µP IN2 G2
GND
5V 3.3V
LOAD LOAD

LTC1157 • TA04

Mixed 3.3V and 12V High- and Low-Side Switching

3.3V
+ 12V
10µF
4V
+ 10µF
IRLR024
VS 12V 16V
IN1 G1 LOAD
CONTROL
LOGIC LTC1157
30k
OR µP IN2 G2 MTD3055EL
GND
3.3V
LOAD

LTC1157 • TA05

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 LTC1157
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TYPICAL APPLICATIO S
Ultra Low Voltage Drop Battery Switch with Reverse Battery
Protection, Ramped Output and 3µA Standby Current

5,6,7,8
1 3 SWITCHED (RAMPED)
+ BATTERY
3 TO 4 Si9956DY
0.47µF
CELL 2 4
BATTERY
PACK + 100µF
VS 6.3V
IN1 G1
CONTROL
LOGIC LTC1157 100k 1k
OR µP IN2 G2
GND

0.1µF
300Ω

LTC1157 • TA06

Generating 3.3V and 5V from a 3.3V or 5V Source

(Automatic Switching)

1 7,8
3.3V OR 5V 5V/150mA

2
3 5,6
1M 1M

4 Si9956DY
VS
IN1 G1 7,8 1
3.3V/150mA
LTC1157
2
IN2 G2
5,6 3
GND
2N7002
4 Si9956DY

120µF/10V MBRS12OT3
*20µH

1 2 3
+
1M 2N7002
ILIM VIN SW1 *20µH
6 4 39Ω
+ AO SW2 ZTX869-M1
180µF 174k 140k
LT1111
6V 7 8 1% 1%
SET FB
GND 105k + 100µF
430k 47Ω
5 1% 6V
LTC1157 • TA07

*CTX20-3 COILTRONICS

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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1157
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TYPICAL APPLICATIO S
3.3V Ultra Low Voltage Drop Regulator with Optional Reverse
Battery Protection and 3µA Standby Current

Q1 Q2
IRLR024* IRLR024

+ +
3 TO 4 C1
CELL 10µF
BATTERY
PACK

VS
3.3V/1A
IN1 G1 1 3
CONTROL R5
LTC1157 C2 R3
LOGIC 100k 330pF 3.3k
OR µP IN2 G2 LT1431 8
GND + C3
5 6 220µF
R1 R2 R4
300Ω* 680Ω 10k

LTC1157 • TA08

*OPTIONAL REVERSE BATTERY PROTECTION. ADD R1 IN SERIES WITH THE

GROUND LEAD AND ADD Q1 IN SERIES WITH THE BATTERY AS SHOWN.

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PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.

N Package
8-Lead Plastic DIP 0.400
(10.160)
0.300 – 0.320 0.045 – 0.065 0.130 ± 0.005 MAX
(7.620 – 8.128) (1.143 – 1.651) (3.302 ± 0.127)
8 7 6 5

0.065
0.250 ± 0.010
(1.651)
0.009 – 0.015 TYP (6.350 ± 0.254)
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.025 0.045 ± 0.015 MIN (0.508) 1 2 3 4
0.325 –0.015

( )
(1.143 ± 0.381) MIN
+0.635
8.255
–0.381 0.100 ± 0.010 0.018 ± 0.003
(2.540 ± 0.254) (0.457 ± 0.076) N8 0392

S Package
8-Lead SOIC 0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020 7
× 45° 0.053 – 0.069 8 6 5
(0.254 – 0.508)
(1.346 – 1.752)
0.008 – 0.010 0.004 – 0.010
(0.203 – 0.254) (0.101 – 0.254)

0.228 – 0.244 0.150 – 0.157

0.016 – 0.050 (5.791 – 6.197) (3.810 – 3.988)
0°– 8° TYP 0.014 – 0.019 0.050
0.406 – 1.270
(0.355 – 0.483) (1.270)
BSC

SO8 0392

1 2 3 4

LT/GP 0193 10K REV 0

Linear Technology Corporation
8 1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1993