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EE-110 Circuit Analysis and Design

Fall 2018

Week 1, 2, 3

EE-110: Circuit Analysis and Design

Instructor : Engr. Ali Raza


ealiraza1@gmail.com

Department of Electrical Electronics and Communication Engineering


UET Lahore Faisalabad Campus
Introduction
❑ Zero-state response = response of the system from
input only (zero initial conditions)
❑ Zero-Input response = response of the system from
initial conditions only (no input).
❑ Forced response = Long-term steady state response
of a circuit to any independent sources present
❑ Natural response = Short-lived transient response of
a circuit to a sudden change in its condition

© Ali, 2018 EE 110 Circuit Analysis and Design 2


Second Order Circuits
❑ Two classical forms of second order circuits are
❑ Series RLC Circuit
❑ Parallel RLC Circuits

❑ These two circuits help to understand other


complex circuits

© Ali, 2018 EE 110 Circuit Analysis and Design 3


Seris RLC Circuits

© Ali, 2018 EE 110 Circuit Analysis and Design 4


Example
❑ A series RLC circuit has a C =0.25 μF and L= 1 H. Find the roots of
the characteristic equation for RT =8.5 kΩ, 4kΩ, and 1 kΩ.

© Ali, 2018 EE 110 Circuit Analysis and Design 5


Example
❑ The circuit of Figure 7–36 has C =0.25 μF and L= 1 H. The switch has
been open for a long time and is closed at t = 0. Find the capacitor
voltage for t ≥ 0 for (a) R= 8.5 kΩ, (b) R= 4 kΩ, and (c) R= 1 kΩ. The
initial conditions are I0 = 0 and V0 = 15 V.

© Ali, 2018 EE 110 Circuit Analysis and Design 6


Example
❑ In a series RLC circuit the zero-input voltage across the 1-μF
capacitor is vC(t) = 10e−1000tsin 2000t V t ≥ 0
a) Find the circuit characteristic equation.
b) Find R and L.
c) Find iL(t) for t ≥ 0.
d) Find the initial values of the state variables.

© Ali, 2018 EE 110 Circuit Analysis and Design 7


Parallel RLC Circuits

© Ali, 2018 EE 110 Circuit Analysis and Design 8


Example
❑ In a parallel RLC circuit RT = 500 Ω, C =1 μF, L=0.2H. The initial
conditions are I0 = 50mA and V0 = 0. Find the zero-input response of
inductor current, resistor current, and capacitor voltage.

© Ali, 2018 EE 110 Circuit Analysis and Design 9


Parallel RLC Example
❑ The switch in Figure 7–40 has been open for a long time and is
closed at t =0.
❑ Find the initial conditions at t =0.
❑ Find the inductor current for t ≥ 0.
❑ Find the capacitor voltage and current through the switch for t ≥ 0.

© Ali, 2018 EE 110 Circuit Analysis and Design 10


Second Order Circuit Step Response
❑ Problem Statement: Find the response for t ≥ 0. Note that initial
energy stored in the inductor and capacitor may or may not be
zero!

© Ali, 2018 EE 110 Circuit Analysis and Design 11


Example
❑ The series RLC circuit in Figure is driven by a step function and is in
the zero state at t = 0. Find the capacitor voltage for t ≥ 0, when VA
=10V, R=1 kΩ, C =0.5 μF, and L= 2H.

© Ali, 2018 EE 110 Circuit Analysis and Design 12


Example
❑ The circuit in Figure 7–45 is in the zero state. Find the current
through the resistor for t ≥ 0.

© Ali, 2018 EE 110 Circuit Analysis and Design 13


Example
❑ Design a series RLC circuit whose zero-state step response is

where VA is the amplitude of the step function input.

© Ali, 2018 EE 110 Circuit Analysis and Design 14


Example
❑ Design a parallel RLC circuit with ζ=0.5 and ω0 = 25 krad/s.

© Ali, 2018 EE 110 Circuit Analysis and Design 15


Sinusoids and Phasors
Chapter 8

EE 110 Circuit Analysis and Design 16


Sinusoids and Phasors

❑ Phasor is a complex number representing the amplitude and phase


angle of a sinusoidal voltage or current

❑ This phasor concept is used to analyze the circuits in sinusoidal


steady state

© Ali, 2018 EE 110 Circuit Analysis and Design 17


Sinusoids and Phasors
To find phasor from sinusoidal signal…

© Ali, 2018 EE 110 Circuit Analysis and Design 18


Sinusoids and Phasors
❑ To find sinusoidal signal from phasor, just multiply with ejwt

© Ali, 2018 EE 110 Circuit Analysis and Design 19


Example
❑ Convert the following sinusoids to phasors in polar and rectangular
form

© Ali, 2018 EE 110 Circuit Analysis and Design 20


Example
❑ Convert the following phasors to sinusoids

© Ali, 2018 EE 110 Circuit Analysis and Design 21


Properties of Phasors
❑ Additive Property.
❑ The phasor representing a sum of sinusoids of the same frequency
is obtained by adding the phasor representations of the component
sinusoids.

© Ali, 2018 EE 110 Circuit Analysis and Design 22


Properties of Phasors
❑ Derivative Property.
❑ relate the phasor representing a sinusoid to the phasor
representing its derivative.

© Ali, 2018 EE 110 Circuit Analysis and Design 23


Example
❑ Construct the phasors for the following signals.

❑ Use the additive property of phasors and the phasors found in (a) to
find υ(t) = υ1(t) + υ2(t)

© Ali, 2018 EE 110 Circuit Analysis and Design 24


Example
❑ Use the derivative property of phasors to find the time derivative of
υ(t) = 15 cos(200t−30) V.

© Ali, 2018 EE 110 Circuit Analysis and Design 25


Example
❑ Convert the following phasors into sinusoidal waveforms.

❑ Use phasor addition to find the sinusoidal


waveform υ3(t) = υ1(t) + υ2(t).

© Ali, 2018 EE 110 Circuit Analysis and Design 26


Phasor Circuit Analysis
❑ In the steady state, for the voltages and currents with the same
frequency as driving source
❑ KVL.

❑ Same will be true for the KCL

© Ali, 2018 EE 110 Circuit Analysis and Design 27


v-i characteristics of elements

© Ali, 2018 EE 110 Circuit Analysis and Design 28


Impedance
❑ Impedance is the proportionality constant relating phasor voltage
and phasor current in linear

© Ali, 2018 EE 110 Circuit Analysis and Design 29


Frequency effect on Impedance

© Ali, 2018 EE 110 Circuit Analysis and Design 30


Example
❑ The circuit in Figure 8–11(a) is operating in the sinusoidal steady
state with i(t) = 4 cos(5000t)A. Find the steady-state voltage v(t).

© Ali, 2018 EE 110 Circuit Analysis and Design 31


Basic Phasor circuit analysis and design
❑ The analysis begins in the time domain with a linear circuit
operating in the sinusoidal steady state and involves three major
steps.
1. The circuit is transformed into the phasor domain by representing the input
and response sinusoids as phasors and the passive circuit elements by their
impedances.
2. Standard algebraic circuit analysis techniques are applied to solve the
phasor-domain circuit for the desired unknown phasor responses.
3. The phasor responses are inverse transformed back into time-domain
sinusoids to obtain the response waveforms.

© Ali, 2018 EE 110 Circuit Analysis and Design 32


Series Equivalence and Voltage Division

© Ali, 2018 EE 110 Circuit Analysis and Design 33


Example
❑ The circuit in Figure 8–15(a) is operating in the sinusoidal steady
state with υS(t) = 35 cos 1000t V.
❑ (a) Transform the circuit into the phasor domain.
❑ (b) Solve for the phasor current I.
❑ (c) Solve for the phasor voltage across each element.
❑ (d) Find the waveforms corresponding to the phasors found in (b)
and (c).

© Ali, 2018 EE 110 Circuit Analysis and Design 34


Example
❑ Design the voltage divider in Figure 8–16(a) so that an input υs = 15
cos 2000t V produces a steady-state output υO(t) = 2 sin 2000t V.

© Ali, 2018 EE 110 Circuit Analysis and Design 35


Parallel Equivalence and Current Division

© Ali, 2018 EE 110 Circuit Analysis and Design 36


Example
❑ The circuit in Figure 8–21(a) is operating in the sinusoidal steady
state with iS(t) = 50 cos 2000t mA.
❑ (a) Transform the circuit into the phasor domain.
❑ (b) Solve for the phasor voltage V.
❑ (c) Solve for the phasor current through each element.
❑ (d) Find the waveforms corresponding to the phasors found in (b)
and (c).

© Ali, 2018 EE 110 Circuit Analysis and Design 37


Homework

❑Solve Example 8.8, 8.11 and 8.12

❑Also practice all the exercises related to


topics.

© Ali, 2018 EE 110 Circuit Analysis and Design 38


Circuit theorems with phasors
❑ Proportionality.
❑ This property states that phasor output responses are proportional to the
input phasor

❑ where X is the input phasor, Y is the output phasor, and K is the


proportionality constant.

© Ali, 2018 EE 110 Circuit Analysis and Design 39


Proportionality
❑ Unit output response
❑ Unit output method in the phasor domain, we assume that the output is a
unit phasor Y=1<0

❑ Once we have the constant K, we can find the output for any input
or the input required to produce any specified output.

© Ali, 2018 EE 110 Circuit Analysis and Design 40


Example
❑ Use the unit output method to find the input impedance, current I1,
output voltage VC, and current I3 of the circuit in Figure 8–30 for VS
=10<0 V.

© Ali, 2018 EE 110 Circuit Analysis and Design 41


Superposition
❑ When the input sources have the same frequency, we can find the
phasor response due to each source acting alone and obtain the
total response by adding the individual phasors.
❑ With different frequency sources, the phasor response for each
source must be changed into waveforms and then superposition
applied in the time domain.
❑ In other words, the superposition principle always applies in the
time domain. It also applies in the phasor domain when all
independent sources have the same frequency.

© Ali, 2018 EE 110 Circuit Analysis and Design 42


Example
❑ Use superposition to find the steady-state voltage υR(t) in Figure 8–
32 for R=20 Ω, L1 =2mH,L2 =6mH, C =20 μF, υS1 > = 100 cos 5000t
V, and υS2 =120 cos(5000t + 30) V. Validate your answer using
Multisim.

© Ali, 2018 EE 110 Circuit Analysis and Design 43


Example
❑ Use superposition to find the steady-state current i(t) in Figure 8–35
for R= 10 kΩ,L= 200mH,υS1 = 24 cos 20,000t V, and υS2 = 8
cos(60,000t + 30) V.

© Ali, 2018 EE 110 Circuit Analysis and Design 44


Thevenin and Norton Equivalent Circuits
❑ we can determine a
Thevenin or Norton
equivalent by finding any
two of the following
quantities:
❑ The open-circuit voltage VOC,
❑ The short-circuit current ISC,
❑ Impedance ZT looking back
into the source circuit with
all independent sources
turned off.

© Ali, 2018 EE 110 Circuit Analysis and Design 45


Example
❑ The Thévenin circuit in Figure 8–41(a) is operating in the phasor
domain. If VT = 120<30 V and ZT = 100 − j50 Ω, perform a source
transformation resulting in the Norton circuit of Figure 8–41(b).

© Ali, 2018 EE 110 Circuit Analysis and Design 46


Example
❑ The circuit of Figure 8–42 is in the phasor domain. Find the
Thévenin equivalent circuit that the load ZL sees. Then design a load
ZL so that 10<−90 V are delivered across it.

© Ali, 2018 EE 110 Circuit Analysis and Design 47


Example
❑ Both sources in Figure 8–43(a) operate at a frequency of ω = 5000
rad/s. Find the steady-state voltage υR(t) using source
transformations.

© Ali, 2018 EE 110 Circuit Analysis and Design 48


Example
❑ For the circuit shown in Figure 8–46(a), design an interface that
converts an input voltage of VS =90<0 V into an output of VO
=63.6<−45 V. The circuit is operating at 1000 rad/s. Validate your
design using Multisim.

© Ali, 2018 EE 110 Circuit Analysis and Design 49


General Circuit Analysis with Phasors

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General Circuit Analysis with Phasors

© Ali, 2018 EE 110 Circuit Analysis and Design 51


Example
❑ The circuit in Figure 8–49(a) is operating in the sinusoidal steady
state. Convert the circuit into the phasor domain and find the
phasor voltages at nodes A and B.

© Ali, 2018 EE 110 Circuit Analysis and Design 52


Example
❑ Use node-voltage analysis to determine the phasor input–output
relationship of the OP AMP circuit in Figure 8–53.

© Ali, 2018 EE 110 Circuit Analysis and Design 53


Example
❑ The circuit in Figure 8–57 is an equivalent circuit of an ac induction
motor. The current IS is called the stator current, IR the rotor
current, and IM the magnetizing current. Use the mesh-current
method to solve for the branch currents IS, IR, and IM.

© Ali, 2018 EE 110 Circuit Analysis and Design 54


Example
❑ Use the mesh-current method to solve for output voltage V2 and
input impedance ZIN of the circuit in Figure 8–59.

© Ali, 2018 EE 110 Circuit Analysis and Design 55


Homework
❑ Solve example 8.20, 8.21, 8.22, 8.23, 8.25, 8.26, 8.29, 8.30, 8.32,
8.34

© Ali, 2018 EE 110 Circuit Analysis and Design 56


Energy and Power
❑ In the sinusoidal steady state, ac power is transferred from sources
to various loads.
❑ Hence, we need to understand how to adjust the load to extract the
maximum power from the rest of the circuit
❑ In the sinusoidal steady state the current through a resistor can be
expressed as iR(t) = IA cos(ωt). The instantaneous power delivered to
the resistor is

© Ali, 2018 EE 110 Circuit Analysis and Design 57


Energy and Power

© Ali, 2018 EE 110 Circuit Analysis and Design 58


Energy and Power
❑ In the sinusoidal steady state the current through a inductor can be
expressed as iL(t) = IA cos(ωt). The energy stored is

© Ali, 2018 EE 110 Circuit Analysis and Design 59


Energy and Power
❑ In the sinusoidal steady state the voltage across a capacitor is υC(t)
=VA cos(ωt). The energy stored in the element is

© Ali, 2018 EE 110 Circuit Analysis and Design 60


Average Power
❑ The average power in the sinusoidal steady state is defined as

❑ The average value of any sinusoid is zero since the areas under
alternate cycles cancel. Hence, the average power delivered to an
inductor or capacitor is zero:

© Ali, 2018 EE 110 Circuit Analysis and Design 61


Average Power
❑ The resistor power has both a sinusoidal ac component and a
constant dc component .

❑ The average value of the ac component is zero, but the dc


component yields

© Ali, 2018 EE 110 Circuit Analysis and Design 62


Example
❑ Find the average power delivered to the load to the right of the
interface in Figure 8–67.

© Ali, 2018 EE 110 Circuit Analysis and Design 63


Maximum Power

© Ali, 2018 EE 110 Circuit Analysis and Design 64


Maximum Power
❑ When the source and load reactances cancel out, the expression for
average power reduces to

❑ In summary, to obtain maximum power transfer in the sinusoidal


steady state, we select conjugate matching

© Ali, 2018 EE 110 Circuit Analysis and Design 65


Example
❑ Calculate the average power delivered to the load in the circuit
shown in Figure 8–70(a) for υS(t) = 5 cos 106t V, R= 200 Ω,
RL=200Ω, and C = 0.01 μF.
❑ Calculate the maximum average power available at the interface
and specify the load required to draw the maximum power.

© Ali, 2018 EE 110 Circuit Analysis and Design 66


Practice
❑ Solve Example 8.42, Exercise 8.43

© Ali, 2018 EE 110 Circuit Analysis and Design 67


Chapter 9

Laplace Transform

© Ali, 2018 EE 110 Circuit Analysis and Design 69


Transformation
❑ A mathematical transformation is to change the form of
data without altering its meaning
❑ e.g. decimal to binary conversion

❑ In engineering circuit analysis, transformations are used to


obtain alternative representations of circuits that can be
quite useful
❑ Fourier transformation, the Z-transformation, and the Laplace
transformation

© Ali, 2018 EE 110 Circuit Analysis and Design 70


Why Laplace Transform

© Ali, 2018 EE 110 Circuit Analysis and Design 71


Laplace Transform
❑ Symbolically, we represent the Laplace transformation as

❑ The transformation operation involves two domains:


❑ the time domain f(t)
❑ the complex frequency domain F(s)

❑ The symbol s stands for the complex frequency variable, s = σ + jω,


where σ =Re{s} is the real part and ω = Im{s} is the imaginary part
© Ali, 2018 EE 110 Circuit Analysis and Design 72
Laplace Transform
❑ LT is defined by the integral

❑ υ(t) has units V and V(s) has a unit (V-s)


❑ i(t) has units A and I(s) has a unit (A-s)

© Ali, 2018 EE 110 Circuit Analysis and Design 73


Example
❑ Show that the Laplace transform of the unit step function f (t)=u(t) is F(s)
= 1/s.
❑ Find the Laplace transform of υ(t) = −7 u(t) V.

❑ Show that the Laplace transform f (t) = e−αt u(t) is F(s) = 1/(s + α).
❑ Find the Laplace transform of υ(t) = 8e−5tu(t) V.

❑ Show that the Laplace transform of the impulse function f (t)=δ(t) is


F(s)=1.
❑ Find the Laplace transform of i(t)=0.5 δ(t) A.

© Ali, 2018 EE 110 Circuit Analysis and Design 74


Inverse Laplace Transform
❑ Inverse process is represented as

❑ Formal evaluation of the complex inversion integral is not necessary


because of the uniqueness property of the Laplace transformation

© Ali, 2018 EE 110 Circuit Analysis and Design 75


Basic Properties
❑ The linearity property of the Laplace transformation states that

❑ Inverse transformation is also a linear operation, so it follows that

© Ali, 2018 EE 110 Circuit Analysis and Design 76


Examples
❑ Solve Example 9.4, exercise 9.6

❑ Show that the Laplace transform of the sinusoid f(t)=A[sin(βt)]u(t) is


F(s) = Aβ/(s2 + β2).
❑ Transform the sinusoid i(t) = 100[sin(200t)]u(t)mA into the Laplace
domain.

© Ali, 2018 EE 110 Circuit Analysis and Design 77


Integration Property
❑ In the time domain, the i−υ relationships for capacitors and
inductors involve integration and differentiation.
❑ So, it is important to establish the s-domain equivalents of these
mathematical operations.

© Ali, 2018 EE 110 Circuit Analysis and Design 78


Example
❑ Show that the Laplace transform of the ramp function r(t) = tu(t) is
1/s2.

❑ Solve Exercise 9.7, 9.8

© Ali, 2018 EE 110 Circuit Analysis and Design 79


Differentiation Property

Time-domain differentiation of a
waveform f (t) is accomplished in
the s domain by the algebraic
process of multiplying the
transform F(s) by s and subtracting
the constant f(0−). Note that the
constant f (0−) is the value of f (t) at
t =0− just prior to t =0.
© Ali, 2018 EE 110 Circuit Analysis and Design 80
Differentiation Property
❑ The s-domain equivalent of a second derivative is obtained by
repetition. We first define a waveform g(t) as

© Ali, 2018 EE 110 Circuit Analysis and Design 81


Example
❑ Show that the Laplace transform of f(t) = [cosβt]u(t) is
F(s)=s/(s2+β2).

❑ Solve Exercise 9.9 and 9.10

© Ali, 2018 EE 110 Circuit Analysis and Design 82


Translation Property
❑ The s-domain translation property of the Laplace transformation is

❑ This theorem states that multiplying f (t) by e−αt is equivalent to


replacing s by s + α

© Ali, 2018 EE 110 Circuit Analysis and Design 83


Translation Property

© Ali, 2018 EE 110 Circuit Analysis and Design 84


Translation Property
❑ The time-domain translation property of the Laplace
transformation is

❑ This theorem states that multiplying F(s) by e−αs is equivalent to


replacing t by t - α

© Ali, 2018 EE 110 Circuit Analysis and Design 85


Basic Laplace Transformation Properties

© Ali, 2018 EE 110 Circuit Analysis and Design 86


Basic Laplace Transform Pairs

© Ali, 2018 EE 110 Circuit Analysis and Design 87


Example
❑ Find the Laplace transform of the waveform

❑ Solve Exercise 9.11, 9.12, 9.13 and 9.14

© Ali, 2018 EE 110 Circuit Analysis and Design 88


Pole-Zero Diagrams
❑ The transforms for signals are ratios of polynomials in the complex
frequency variable s.
❑ If numerator and denominator polynomials are expressed in
factored form, then F(s) is written as

❑ where the constant K = bm/an is called the scale factor.

© Ali, 2018 EE 110 Circuit Analysis and Design 89


Pole-Zero Diagrams
❑ The roots of the numerator and denominator polynomials, together
with the scale factor K, uniquely define a transform F(s)
❑ The denominator roots are called poles because for s=pi(i= 1,2,…,n)
the denominator vanishes and F(s) becomes infinite
❑ The roots of the numerator polynomial are called zeros because the
transform F(s) vanishes for s = zi(i = 1,2,…,m).
❑ Collectively, the poles and zeros are called critical frequencies
because they are values of s at which F(s) does dramatic things, like
vanish or become indeterminant.

© Ali, 2018 EE 110 Circuit Analysis and Design 90


Pole-Zero Diagrams
❑ In frequency domain, we describe signals in terms of poles and
zeroes. The pole locations in such plots are indicated by an X and
the zeros by an O.
❑ The pole-zero diagram is the s-domain representation of the signal,
just as a plot of the waveform versus time depicts the signal in the t
domain
❑ e−αtu(t) is F(s) = 1/(s + α)
❑ [Ae−αt]cos βtu(t),
❑ tu(t), F(s)=1/s2

© Ali, 2018 EE 110 Circuit Analysis and Design 91


Example
❑ Find the poles and zeros of the waveform

❑ Solve exercise 9.15, 9.16 and example 9.10

© Ali, 2018 EE 110 Circuit Analysis and Design 92


Inverse Laplace Transform
❑ The inverse transformation converts a transform F(s) into the
corresponding waveform f(t)
❑ Function can be expressed as rational function in polynomials

❑ If there are more finite poles than finite zeros (n >m), then F(s) is
called a proper rational function.
❑ If the denominator has no repeated roots (pi ≠ pj for i ≠ j), then F(s)
is said to have simple poles

© Ali, 2018 EE 110 Circuit Analysis and Design 93


Inverse Transform
❑ If a proper rational function has only simple poles, then it can be
decomposed into a partial fraction expansion of the form

❑ In this case, F(s) can be expressed as a linear combination of terms.


The k’s associated with each term are called residues.
❑ To illustrate the procedure, consider a case in which F(s) has three
simple poles and one finite zero.

© Ali, 2018 EE 110 Circuit Analysis and Design 94


Cover-up Algorithm

❑ We find the residue k1 by first multiplying this equation through by


the factor (s−p1)

❑ If we now set s = p1, the last two terms on the right vanish, leaving

© Ali, 2018 EE 110 Circuit Analysis and Design 95


Example
❑ Find the waveform corresponding to the transform

❑ Solve 9.17, 9.18

© Ali, 2018 EE 110 Circuit Analysis and Design 96

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