Mersul lucrarii

1. Minimizarea functiei logice y1

a)FCD + 4 forme
b)FCC + 4 forme
c)Implementarea circuitului logic in setul de elemente SI-NU/SI-NU
2. Minimizarea functiei logice y2
a)FCD + 4 forme
b)FCC + 4 forme
c) Implementarea circuitului logic in setul de elemente SAU/SI

Varianta 21
y 1=∪ (0,1,5,6,7,8,9,10,12,13)
y 2=∪ (1,2,3,4,5,6,8,9,11,14,15)

Tabelul de adevar
x1 x2 x3 x4 y1 y2
0 0 0 0 0 1 0
1 0 0 0 1 1 1
2 0 0 1 0 0 1
3 0 0 1 1 0 1
4 0 1 0 0 0 1
5 0 1 0 1 1 1
6 0 1 1 0 1 1
7 0 1 1 1 1 0
8 1 0 0 0 1 1
9 1 0 0 1 1 1
10 1 0 1 0 1 0
11 1 0 1 1 0 1
12 1 1 0 0 1 0
13 1 1 0 1 1 0
14 1 1 1 0 0 1
15 1 1 1 1 0 1

Minimizarea functiei y1 (FCD)

x1x
2 00 01 11 10 2
x3x
4
00 1 1 1 1
01 1 1 1 1

4
 11 1
10 1 1

3 5
4 forme pentru y1 (FCD)
y1  x2 x3  x1 x3  x3 x4  x1 x2 x4  x1 x2 x3  SI / SAU
y1  ( x2 x3 )( x1 x3 )( x3 x4 )( x1 x2 x4 )( x1 x2 x3 )  SI  NU / SI  NU
y1  ( x2  x3 )( x1  x3 )( x3  x4 )( x1  x2  x4 )( x1  x2  x3 )  SAU / SI  NU
y1  ( x2  x3 )  ( x1  x3 )  ( x3  x4 )  ( x1  x2  x4 )  ( x1  x2  x3 )  SAU  NU / SAU

Minimizarea functiei y1 (FCC)

x1x
2 00 01 11 10
x3x 4
4
00 0
3
01
11 0 0 0
10 0 0

1 2

4 forme pentru y1 (FCC)

y1  ( x1  x2  x3 )( x1  x2  x3 )( x1  x3  x4 )( x1  x2  x3  x4 )  SAU / SI
y1  ( x1  x2  x3 )  ( x1  x2  x3 )  ( x1  x3  x4 )  ( x1  x2  x3  x4 )  SAU  NU / SAU  NU
y1  ( x1 x2 x3 )  ( x1 x2 x3 )  ( x1 x3 x4 )  ( x1 x2 x3 x4 )  SI / SAU  NU
y1  ( x1 x2 x3 )( x1 x2 x3 )( x1 x3 x4 )( x1 x2 x3 x4 )  SI  NU / SI
Circuitul logic pentru functia y1 in setul de elmente SI-NU/SI-NU
Diagrama in timp pentru functia y1 in setul de elmente SI-NU/SI-NU

Minimizarea functiei y2 (FCD)

x1x 3
2 00 01 11 10
x3x 2
4
00 1 1 1
01 1 1 1 1
11 1 1 1
10 1 1

4 5

4 forme pentru y2 (FCD)

 y2  x2 x4  x1 x3 x4  x1 x2 x3  x1 x3 x4  x1 x3 x4  SI / SAU
y2  ( x2 x4 )( x1 x3 x4 )( x1 x2 x3 )( x1 x3 x4 )( x1 x3 x4 )  SI  NU / SI  NU
y2  ( x2  x4 )( x1  x3  x4 )( x1  x2  x3 )( x1  x3  x4 )( x1  x3  x4 )  SAU / SI  NU
y2  ( x2  x4 )  ( x1  x3  x4 )  ( x1  x2  x3 )  ( x1  x3  x4 )  ( x1  x3  x4 )  SAU  NU / SAU

Minimizarea functiei y2 (FCC)

x1x
2 00 01 11 10
x3x
4 1
00 0 0
01 0
11 0
2
10 0

4 3
4 forme pentru y2 (FCC)
y2  ( x1  x2  x3 )( x1  x2  x3  x4 )( x1  x2  x3  x4 )( x1  x2  x3  x4 )  SAU / SI
y2  ( x1  x2  x3 )  ( x1  x2  x3  x4 )  ( x1  x2  x3  x4 )  ( x1  x2  x3  x4 )  SAU  NU / SAU  NU
y2  ( x1 x2 x3 )  ( x1 x2 x3 x4 )  ( x1 x2 x3 x4 )  ( x1 x2 x3 x4 )  SI / SAU  NU
y2  ( x1 x2 x3 )( x1 x2 x3 x4 )( x1 x2 x3 x4 )( x1 x2 x3 x4 )  SI  NU / SI

Circuitul logic pentru functia y2 in setul de elmente SAU/SI

Diagrama in timp pentru functia y2 in setul de elmente SAU/SI

Concluzie
In urma efectuarii acestei lucrari de laborator am studiat si am cercetat procesul de sinteza
a circuitelor logice combinationale. Pentru indeplinirea scopul lucrarii, am efectuat minimizare