8 7 6 5 4 3 2 1

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION, 2012 ALL RIGHT RESERVED.

F HSF Property:ROHS or Halogen-Free F

E E

D
COMET DIS D

SI1 BUILD
2012.11.30
C C

B B

A A

DRAWER
DESIGN
EE
EDI CHEN
EDI CHEN
DATE
2012/10/24
2012/10/24
POWER
IRAY CHEN
IRAY CHEN
DATE
2012/10/24
2012/10/24
INVENTEC
CHECK EDI CHEN 2012/10/24 IRAY CHEN 2012/10/24 TITLE MODEL,PROJECT,FUNCTION
RESPONSIBLE EDI CHEN 2012/10/24 IRAY CHEN 2012/10/24 COMET

21-OCT-2002 SIZE= A3 VER: X01 SIZE CODE DOC.NUMBER REV

FILE NAME: COMET DIS C CS 1310xxxxx-0-0 X01
DATE CHANGE NO. REV P/N 6050A2559101 XXX SHEET 1 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

EDP
EDP PANEL
F DDR3 / DDR3L DDR3 / DDR3L F
SODIMMX2

HD HP/MIC
DP AUDIO CODEC
DP DP RE-DRIVER HP/MIC DOCK

USB20
SMART CARD CONTROLLER SMART CARD
DP / CRT
CRT CONTROLLER WEB CAMERA

HASWELL FINGERPRINT
ULT
E KEYBOARD BLUETOOTH E

TOUCH PAD EC LPC

WWAN
SPI FLASH CONTROLLER
USB CHARGE PORT
STICK POINT
USB2 PORT X3
TPM
USB2 DOCK X1

USB30 USB CHARGE PORT

USB3 HUB USB3 PORT X3

D
MEDIA CARD SD/MMC PCIE D
USB3 DOCK X1

MINICARD(WLAN) SATA
2.5" HDD
RJ45 MSATA MODULE
NIC
RJ45 DOCK

SMBUS
ACCELEROMETER

C C
THERMAL SENSOR

NFC
PCIE

DP DOCK MARS DP DOCK

B B

SIDE DOCK CONNECTOR

PRIMARY LI-LON BATTERY

SECOND LI-LON BATTERY

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
Block Diagram

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 2 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
TABLE OF CONTENTS D

01.PROJECT NAME 26.XDP & ME CONN. 51.KBC, SPI

02.BLOCK DIAGRAM
03.TABLE OF CONTENTS
04.POWER BLOCK DIAGRAM
05.SYSTEM POWER(CHARGER)
C 06.SYSTEM POWER(BATT SELECTOR)
27.HASWELL_1 (MISC,JTAG) 52.KEYBOARD
28.HASWELL_2 (LPC,SPI,SMBUS,CLINK,PM) 53.TPM
29.HASWELL_3 (GPIO) 54.LAN
30.HASWELL_4 (DP,EDP) 55.WLAN/BT SLOT
31.HASWELL_5 (DDR) 56.WWAN SLOT, SIM SLOT C

07.SYSTEM POWER(OCP) 32.HASWELL_6 (PCIE,USB) 57.DOCKING

08.SYSTEM POWER(P3V3A&P5V0A)
09.P3V3A&P5V0A_CHG PORT
10.SYSTEM POWER(P1V5)
11.SYSTEM POWER(P1V05_M)
12.SYSTEM POWER(P1V05S)
13.USB HUB POWER (P1V2A)
14.SYSTEM POWER(PVCORE&PVAXG-1)
B 15.SYSTEM POWER(PVCORE&PVAXG-2)
33.HASWELL_7 (RTC,AUDIO,SATA,JTAG) 58.B TO B CONN, POINT STICK CONN
34.HASWELL_8 (CLK) 59.AUDIO CODEC
35.HASWELL_9 (POWER) 60.AUDIO JACK, MIC AMP.
36.HASWELL_10 (POWER) 61.CARD READER
37.HASWELL_11 (GND) 62.BUTTON, LED
38.SYSTEM MEMORY (DIMM0) 63.SMART CARD DAUGHTER BOARD
39.SYSTEM MEMORY (DIMM1) 64.CRT DB WTB CONN
40.EMPTY 65.MIC DB B

16.POWER SEQUENCE (SLEEP) 41.EMPTY 66.SCREW

17.DC JACK & BATTERT CONN. 42.DP TO VGA CONVERTER 67.EMPTY
18.HP_OCP 43.DISPLAY PORT 68.MARS-1
19.PVCORE_DGPU 44.LCM & WEBCAM CONN 69.MARS-2
20.PVDDCI 45.SATA HDD, MSATA 70.MARS-3
21.P1V35S_DGPU 46.USB HUB 71.MARS-4
22.P1V8S 47.USB3 PORTS 72.MARS-5
23.PVPCIE 48.USB & CRT DB 73.MARS-6
A
24.POWER (SEQUENCE) 49.FINGERPRINT READER, NFC 74.MARS-7 A
25.FAN & THERMAL 50.ACCELEMETER 75.MARS-8
76.VRAM-1
77.VRAM-2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
TABLE OF CONTENTS

DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 3 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

EN1V2A P1V2A
RT8068
P5V0DS

KBC_PWR_ON
P5V0A
ADP_EN
ADP_PRES 5/3.3V FDC7692
P3V3DS
LIMIT_SIGNAL OCP OCP_OC# KBC_PW_ON (TPS51225)
D ADAPTER SLP_S3#_3R
VRP5V0A_LDO
SLP_S3#_5R P5V0S D
ICS VRP3V3A_LDO
(90W) CHARGER_DAT
EN0 AO6424L
CHARGER
BQ24736 CHARGER_CLK
SPWON
P3V3S
AO6424L

KBC_PWR_ON
2ND BATTERY MAIN BATTERY FDMC7692 P3V3A

SLP_LAN#
FDC638APZ P3V3M
C C

DDR3 / 1.5V EN1V5S

P1V5S
DDR3L/1.35V RT8068
ENP1V5
TPS51362
P1V5
0V75S
EN_VRPVTT G2997BF61U

EN_DGPU VRPVCORE_DGPU
PVBAT TPS51728

EN_VDDCI VRPVDDCI
B TPS51367 B

EN_1V35S_DGPU VRP1V35S_DGPU
TPS51367

EN_1V8S VRP1V8S
TPS51312
P1V05S
FDMS0310AS
SPWON (IAMT)
PAD P1V05S
(NON-IAMT)
PVCCIO_OUT_R P1V05S_VCCP PVCCIO_OUT
A CPU PAD PAD A
P1V05A P1V05M
EN1V05A TPS51362 PWRCTL_P1V05
AO6424L

PVCORE
EN_CPU
IMVP VI VGATE INVENTEC
TPS51622 TITLE
MODEL,PROJECT,FUNCTION
BLOCK DIAGRAM POWER
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 4 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PVADPTR
OUT VADPBL 3
Q6010
ALPHA_AON7403L_DFN_8P
D S
8 8 1 1
7 7 2 2
6 3

220K_5%_2

0.1UF_16V_2
6 3

1
5 5 4 4

R6017

C6019
G

220K_5%_2
1
2 R6016
2

2
D 3
D
D

Q6009 G 1
SSM3K7002BFU
S

3
PVPACK
100K_5%_2

P3V3DS
21

D Q6012
R6005

G 1 ALPHA_AON7403L_DFN_8P
G
4 4 5 5
S

Q6013 3 3 6 6
2

SSM3K7002BFU 2 2 7 7
PVBAT
2

1 1
S D
8 8
IN ADP_EN
Q6011 R6000
1 S D 8 1 2
2 7 3 4
3 6
4 G 5 0.01_1%_6
NMOS_4D3S

POWERPAD_2_0610
C6028

2
RQ3E080BNFU7TB 1 2

DB2J31300L

1
4.3K_5%_2
1

C 0.1UF_16V_2 C
D6017
R6028

PAD6015
1
4.3K_5%_2
1

2
CSC0402_DY
R6018
2

1
2
1UF_25V_3

2
C6029

C6030
2

2
1
5 IN PVBAT_CHG
VADP_DEBUG IN

LQ3E080BNFU7TB
5
6
7
8

10UF_25V_5

10UF_25V_5
1
1

1
10_5%_5
R6027

C6000

C6001
Q6000
D
NMOS_4D3S
ADP_DET OUT

1
5
4
3
2

2
2
G
ACPRES
ACDRV
CMSRC
ACP
ACN

S
C6027
U6000 1UF_25V_3 PVPACK
21 2 1

4
3
2
1
TML
B TI_BQ24736RGRR_QFN_20P B
6
P5V0S PVADPTR P3V3DS ACDET
VCC 20 VRPVPACK_HG L6000 R6001
7 IOUT
PHASE 19 VRPVPACK_PH 1 2 1 2
18.2K_1%_2

8 SDA
18 3 4

LITEON_B0530W_DIODE
R6015 C6015 ETQP3W4R7WFN
22K_5%_2

HIDRV
1

9
2

SCL
127K_1%
1

BTST 17 1 2 1 2
R6024
R6021

10 ILIM

1
0.02_1%_6
R6029

REGN 16

CSC0805_DY
10UF_25V_5

10UF_25V_5
LODRV
0_5%_2 0.047UF_16V_2

5
6
7
8

1
RSC_0603_DY
DLIM

GND
SRN
SRP

R7600

C6010

C6011

C6012
D6018

LQ3E080BNFU7TB
D6016

Q6001

D6049
D
R6022
2

NMOS_4D3S
1

1UF_10V_2
2 1

1
1 2
2

2 1
2 1 C6023
C6025 1 2
11
12
13
14
15

1M_5%_2
3

2
DA2J10100L Q6019
0.1UF_16V_2
1

1
10K_1%_2

ACDET>0.6V:SMBUS OK
20K_1%_2

DB2J31300L
1

C6022
D

100PF_50V_2

G
R6030

1
ACDET>2.4V&<3.1V:ACOK

2
1
R6023

0.1UF_25V_2

0.1UF_25V_2
G
IN

C7600

1
2
0.01UF_50V_2
1

C6024

C6021
CHG_RST

4
3
2
1
S

100PF_50V_2

C6032

SSM3K7002BFU CSC0402_DY
C6049

VRPVPACK_LG
2

2
2

2
2

R6025
1 2
A 5
A
OUT ICS R6020
SHORT_0402_15 1 2
SDA_BAT_CHG
BI
SCL_BAT_CHG
BI SHORT_0402_15
3 CHR_ILIM IN
R6049
3 1 2
V_3.9K IN
0.01UF_50V_2
1

10K_5%_2
INVENTEC
C6031

TITLE
2

MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 5 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D6050
PVBATA
PVPACK 1 1 2 2

SS3040HE

Q6050 Q6051
1 S D 8 8 D S 1
PVPACK P3V3DS 1 8 8 1
IN 3V3REF 4 3 2 7 7 2

10K_5%_2 220K_5%_2
2 7 7 2

1
3 3 6 6 6 6 3 3

100K_5%_2
200K_1%_2

R6079
P5V0DS 4 5 5 4

1
1

1
4 5 5 4

15K_5%_2

470K_5%_2
G G

R6928

R6927

R6932
D

1
R6064
ALPHA_AON7403L_DFN_8P
D
ALPHA_AON7403L_DFN_8P

1 2
2
R6926
1 2

R6080
V+
1M_5%_2

3 2
5 U6903
++IN 7 2
-
OUT OUT LATCHED_ALARM OUT MFET_A 2
6

470K_5%_2
-IN R6099

0.1UF_16V_2
2

2
2 1 1 2

133K_1%_2
MFET_B 2

2
V-
BCD_AZV393MTR_G1_SOIC_8P IN

C6905

R6081
4
64.9K_1%_2
1
100_5%_2
R6929

D6058

R6997
BAV99W_7_F
R6097

2
1

1
1 2
P3V3DS
32

10K_5%_2
Q6999 Q6053
1

3
S1
D

G 1 2 G1 Q6054
6

D
S

D1 3 1
D2 G
SSM3K7002BFU 5 G2

S
4
2

C S2
SSM3K7002BFU
C
L2N7002DW1T1G

2
FET_A
IN

D6060
PVBATB
PVPACK 1 1 2 2

SS3040HE

Q6060 Q6061
1 S D 8 8 D S 1
1 8 8 1
2 7 7 2

10K_5%_2 220K_5%_2
2 7 7 2

1
3 3 6 6 6 6 3 3

R6070
4 4 5 5 5 5 4 4

470K_5%_2
G G

1
ALPHA_AON7403L_DFN_8P
B B

R6066
ALPHA_AON7403L_DFN_8P

1 2
R6069
3 2

470K_5%_2
2
OUT MFET_B 2

R6082
R6098
2 1 1 2
MFET_A 2

2
IN
D6059 100_5%_2
BAV99W_7_F

1
R6096
1 2

10K_5%_2
Q6063
S1 1
2 G1

3
6 P3V3DS
D1
D2 3 Q6064

D
2 5
LATCHED_ALARM OUT G2
G 1
4
S2

S
L2N7002DW1T1G
A SSM3K7002BFU
A

2
FET_B
IN

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 6 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

R6933
1 2
1 VADPBL IN P5V0S
274K_1%_2 R6920 C6904
1 2 1 2

200K_1%_2
P5V0DS P3V3DS

1
665K_1%_2 1UF_10V_2

R6931
P5V0S

47K_5%_2
2
R6922 U6902

R6935
1 2 1 IN+ VCC 5

2
200K_1%_2

200K_1%_2

0.1UF_16V_2
1

1
8
V+
D

R6924

C6903
3 U6903
++IN 2

1
VEE
OUT 1
OUT ADP_PRES D
2 -
-IN

86.6K_1%_2

CSC0402_DY
2

22K_5%_2
V-

1
BCD_AZV393MTR_G1_SOIC_8P
R6930

2
R6934

C6906
2 1 3 4
OCP_MAIN# IN IN- OUTPUT

2K_5%_2
1M_1%_2
R6925
118K_1%_2

R6923
BCD_AZV321KTR_E1_SOT23_5P

R6919
1

2 1

2
OCP_TRAVEL# IN
R6921
118K_1%_2

2
IN 3V3REF 4 2
3
LIMIT_SIGNAL_100R OUT
D6902
Q6902
R6918
1 2 2 3 1 2
LIMIT_SIGNAL IN S D

100_5%_2 P3V3DS
R6937 BAV70W

1
G
2 1

3
1
3 VBIAS IN 0_5%_2_DY Q6903

B
C 1 V_3.9K
LES_LBSS84LT1G_SOT23_3P 2 3 C
OUT E C

1
619_1%_2
PMBT3906

3900PF_16V_2

100K_5%_2

R6917
RSC_0402_DY
1

1
R6916

C6902

R6915

12
OUT OCP_A_IN

BZT52-B4V7S_DY
2

1 2
2
P3V3DS

3.24K_1%_2
2
D6901
R6914

R6936
2 1 3 C E 2
47K_5%_2
Q6901
LMBT3904WT1G

1
2
1 CHR_ILIM OUT

B B

3 LIMIT_SIGNAL_100R P3V3DS
LIMIT_SIGNAL_100R IN

8.06K_1%_2
1

BASE
1
2 R6910
2 3
PVADPTR EMITTER COLLECTOR

8.66K_1%_2
220K_5%_2

1
2 R6902 1

Q6900
LES_LMBT3906WT1G_SOT323_3P

2 R6909
A A

VBIAS 3
OUT VBIAS
ADP_A_ID 3
OUT ADP_A_ID
130K_1%_2
2 R6903 1

45.3K_1%_2
2 R6904 1

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 7 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PVBAT
PVBAT

1
1

1
PAD6160

1
PAD6110 POWERPAD_2_0610

2
POWERPAD_2_0610

2
2
D VRPVBAT_5V IN
VRPVBAT_3V IN D
TPS51285 IS NOT READY FOR DB0 USE TPS51225 FOR FIRST BUILD

VRP5V0A_PH OUT 4

VRP5V0A_VIN 5 IN

1UF_25V_3

10UF_25V_5

10UF_25V_5
1

1
R6161 VR_VDD5
CSC0805_DY

10UF_25V_5

C6122
1 2
1

C6160

C6161
OUT 6 712
13
C6110

C6111

VRP3V3A OUT SHORT_0402_15

2
VRP5V0A

2
2
OUT 4
2
2

Q6100 C6115 R6115 R6165 C6165 Q6150

U6100
TI_CSD87381P_XSON_5P 0.1UF_16V_2 2.2_5%_3 TI_TPS51225CRUKR_QFN_20P 2.2_5%_3 0.1UF_16V_2 TI_CSD87381P_XSON_5P
OCP=8AMP
2 1 2 1 2 12 1 2 1 2 2 OCP=8AMP
VIN VIN VIN
P3V3DS Control
FET
Control
FET P5V0DS
C 9 VBST2 VBST1 17 C
PAD6100 L6100 TG 1 VRP3V3A_HG 10 DRVH2 DRVH1 16 VRP5V0A_HG 1 TG VRP5V0A_PH L6150 PAD6150
2 2 1
1 1 2 5 VSW VRP3V3A_PH 8 SW2 SW1 18 VRP5V0A_PH VSW 5 1 2 1 1 2
2
ETQP3W3R3WFN ETQP3W4R7WFN
POWERPAD_2_0610 Sync VRP3V3A_LG 11 DRVL2 DRVL1 15 VRP5V0A_LG Sync POWERPAD_2_0610

15.4K_1%_2
4 4

RSC_0603_DY
FET BG BG FET
RSC_0603_DY
6.8K_1%_2

PGND

PGND
1

1
14
1

VO1
4 2
R6100

R6150
R7615
VFB2 VFB1
R7610

5 CS2 CS1 1
3

3
150UF_6.3V
1

150UF_6.3V
60.4K_1%_2

1
2
C6100

2
6 20

C6150
2

EN2 EN1
+

OUT 5V_PG 7 19

+
R6160
PGOOD VCLK

CSC0402_DY
TMD
54.9K_1%_2
CSC0402_DY

3 13
1

1
VREG3 VREG5

1
10K_1%_2

10K_1%_2
2

2
1
R6101

R6110
C7610

C7615

R6151
VRP3V3A_LDO VRP5V0A_LDO

21
4 OUT OUT 4
2

2
1

2
2

B B
0_5%_2
R6117

VO=((6.8K/10K)+1)*2

3V3REF

1
1UF_6.3V_2
1

2 OUT

C6120
3 VO=((15.4K/10K)+1)*2
1UF_6.3V_2
1
C6121

2
VRP5V0A_VCLK P5V0DS
VRP5V0A_VCLK POWERPAD1X1M_DY
2

4 IN OUT 4
4 IN VRP5V0A_LDO1 1 2 2

PAD6105
0.1UF_25V_2

0.1UF_25V_2

EN_3V EN_5V
1

IN IN
C6157

C6156

P3V3DS

PAD6103
1 2 VRP3V3A_LDO 4
2

1 2 IN
POWERPAD1X1M_DY
A A
3

2 1 2 1 4
P15V0A OUT IN
D6151 D6150 VRP5V0A
BAV99W_7_F BAV99W_7_F
0.1UF_25V_2

0.1UF_25V_2
1

1
C6159

C6158

INVENTEC
2

TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 8 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D PVADPTR
D

49.9K_1%_2
1

0.22UF_6.3V_2
R6913

R6996
1 1 2
ICS IN OUT CURRENT_ADC

RSC_0402_DY
1
46.4K_1%_2

2
R6990
R6995

C6900
1 2
OUT VOLTAGE_ADC
576K_1%_3

1
0.22UF_6.3V_2
100PF_50V_2

49.9K_1%_2
1

1
C6999

R6994

C6998
2

2
C C

PVBAT

SHORT_0603_25
2
R6999
1
B B
R6983
1 2 1
4 VRP5V0A_VIN OUT OUT VADP_DEBUG

PANJIT_MMSZ5252A
1
SHORT_0603_25

D6997
2

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 9 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

DDR3L_SEL OUT 6
P3V3DS

2
0_5%_2_DY
R6208

2
332K_1%_2

R6212

2.2UF_6.3V_3
3 1

2700PF_50V_2
SSM3K7002BFU

0_5%_2_DY
PVBAT

1
2
DDR3L_DET Q6202
1

C6217
C6216
R6217 PAD6210

R6213
D 1 2 1 G 1 2
IN 1 2
D
POWERPAD_2_0610

10UF_25V_5
0.1UF_25V_2
0_5%_2 R6204

1
SHORT_0402_15

2
1

C6211

C6210
12
13 1 2
VR_VDD5
2
IN 1 R6203 2
VRPVDDQ IN 0_5%_2
200K_5%_2_DY
2

DDR3L_SEL IN

2
19
18
17
16
15
23
22
21
20
R6211

R6201 R6200
1 2 1 2 U6200

V5
GSNS
VSNS

TRIP
SLEW

GND

VIN
VIN
VIN
154K_1%_2 49.9K_1%_2
1

24 REFIN2 PGND 10
C6218 25 REFIN PGND 11
2 1 26 VREF PGND 12
27 RA PGND 13

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
0.22UF_6.3V_2 28 14

2
EN_VRPVDDQ6 IN EN PGND

PGOOD

MODE
29

C6200

C6202

C6203
C6201
BST
LP#
TML

SW
SW
SW
SW
NC
TI_TPS51362RVER_QFN_28P

2
2 3
4
5
6
7
8
9
1

1
0_5%_2_DY
VRPVDDQ_PH L6200
C 1
1 2
2
OUT VRPVDDQ C

RSC_0603_DY
R6206
3 4

1
3 4

0.1UF_16V_2
VRPVDDQ_PG OUT PAN_ETQP3W1R0WFN_4P

R7620
1 R6215 2

C6215
P1V5

1
VRPPM_SLP_S0_N 7 IN PAD6200
1 2

2
VRPVDDQ IN

1
1 2

2.2_5%_3

2
MODE= OPEN FSW= 800K POWERPAD_2_0610

CSC0402_DY
C7620
MODE= GND FSW= 400K
TRIP =5V OCL=12A

2
REFIN =GND VOUT=1.05V
VREF=2V
VOUT=(107K)X2V/(107K+51K)=1.354V
P3V3A

POWERPAD1X1M
1
PAD6241
B B

1
P1V5

2 2
U6240
10 VIN VDDQSNS 1
P0V75S
9 2
EN_VRPVDDQ IN S5 VLDOIN
PAD6240
8 3 VRPVTT 6 6 1 2
GND VTT OUT VRPVTT IN 1 2

7 4 POWERPAD1X1M
EN_VRPVTT IN S3 PGND

6 5
VRPVTT_REF OUT VTTREF VTTSNS
1UF_6.3V_2

1UF_6.3V_2
1

11

10UF_6.3V_3

10UF_6.3V_3
TML

1
C6243

C6242

C6241
GMT_G2997BF61U_MSOP_10P

C6240
2

2
A A

P0V75M_VREF
PAD6242
1 2
VRPVTT_REF IN 1 2

POWERPAD1X1M_DY

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 10 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

2.2UF_6.3V_3
PVBAT

2700PF_50V_2
1

1
C6317
C6316
PAD6310
1 1 2
2
R6304
SHORT_0402_15 POWERPAD_2_0610

10UF_25V_5
0.1UF_25V_2
1 2

1
12
13
VR_VDD5

2
IN

C6311

C6310
1 R6303 2
0_5%_2
VRP1V05A IN

2
19
18
17
16
15
23
22
21
20
U6300

V5
GSNS
VSNS

TRIP
SLEW

GND

VIN
VIN
VIN
C 24 REFIN2 PGND 10 C
1 R6300 2 25 11
C6318 REFIN PGND
2 1 0_5%_2 26 VREF PGND 12
27 13

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
RA PGND
0.22UF_6.3V_2

2
28 14
EN_1V05A IN EN PGND

PGOOD

MODE

C6300

C6302
C6301
29

BST
LP#
TML

SW
SW
SW
SW
NC
TI_TPS51362RVER_QFN_28P
P1V05A

1
VRP1V05A_PH

2
2 3
4
2 0_5%_2_DY 5
6
7
8
9
1
L6300
1 2
PAD6300
OUT VRP1V05A 1 2
1 2
VRP1V05A IN

RSC_0603_DY
3 4 1 2
IOUT=5A

R6306

1
3 4

0.1UF_16V_2
PAN_ETQP3W1R0WFN_4P POWERPAD_2_0610

R7630
C6315
1V05A_PG
1
OUT

2
1
2
MODE=GND FSW=400K

CSC0402_DY
C7630
VRPPM_SLP_S0_N IN
R6315

2.2_5%_3
MODE= FLOAT FSW= 800K
B TRIP =5V OCL=12A B

2
1

REFIN =GND VOUT=1.05V

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 11 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

P3V3DS
PAD6360
1 1 2
2

10UF_6.3V_3
POWERPAD_2_0610

1
C C

C6360
U6350
11 IOUT=0.67A
1 VRP1V5S_PH L6350
TML
10 PVIN LX
9 2 1 2
PVIN LX OUT VRP1V5S

CSC0402_DY
8 3

1
ELL5PR1R2N

15K_1%_2
SVIN LX

2
7 4

C6352

R6350
6
NC PGOOD
5
OUT 1V5S_PG

22UF_6.3V_5
FB EN P1V5S

1
C6350
RICHTEK_RT8068AZQW_WDFN_10P
EN_1V5S PAD6350

11
IN
1 2
VRP1V5S IN 1 2

R6351

10K_1%_2
2
POWERPAD_2_0610

2
VREF=0.6V
15K=1.5V
10K=1.2V
20.5K=1.83V
B B

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 12 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

P5V0DS

PAD6460
1 1 2
2

10UF_6.3V_3
1
POWERPAD_2_0610
11 U6450 IOUT=1.68A

C6460
C 10
TML
1 VRP1V2A_PH C
PVIN LX L6450
9 2 1 2
PVIN LX OUT VRP1V2A

CSC0402_DY
1

2
11K_1%_2
8 3 ELL5PR1R2N

2
SVIN LX

C6452

22UF_6.3V_5
7 4

1
NC PGOOD OUT 1V2A_PG

R6450
6 5

C6450
FB EN

RICHTEK_RT8068AZQW_WDFN_10P
EN_1V2A

11
IN P1V2A

10K_1%_2

2
R6451
PAD6450
1 2
VRP1V2A IN 1 2

2
POWERPAD_2_0610

VREF=0.6V
15K=1.5V
B 10K=1.2V B
11K=1.25V
20.5K=1.83V
MODE= FLOAT=SKIP MODE
MODE=VIN=FCCM MODE

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 13 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P5V0A

1 R6665 2
10_5%_2
PVCCIO_OUT

VREF_CPU
10 OUT

1
D

0.33UF_10V_3
D

1UF_6.3V_2
C6644

C6643
R6640 VR_SVID_DATA
1 2 10
OUT

1
2

2
C6618 130_1%_2
VR_SVID_CLK
C6639 R6633 R6641 2
1 10
2 1 1 2 CSC0402 OUT
54.9_1%_2
CPU_PROCHOT#

2
10K_1%_2 OUT P3V3A
0.0015UF_50V_2

1 R6645 2
R6656 R6651 IN VR_SVID_CLK 10

10_5%_2
1 2 1 2
10K_1%_2 2.21K_1%_2
P3V3A C6640 IN VR_SVID_ALERT#
1 2

100PF_50V_2 10
IN VR_SVID_DATA
1
0_5%_2
R6663

25
26
27
28
29
30
31
32
33
U6600
C VCCSENSE IN C

VR_HOT#

ALERT#
VREF
DROOP
COMP

V5A

VCLK
GND

PWPD
VSSSENSE IN
2

1UF_6.3V_2
1
24 1

C6642
23
VFB VDIO
2
IN EN_PVCORE
GFB VDD
22 3
N/C PGOOD OUT PVCORE_PG
CPU_CSP2 IN 21 PU3 N/C 4 1 R6612 2
1 R6664 2 20 5
CPU_CSN2 IN RSC_0402_DY

2
CSP2 PWM2
19 6

2
RSC_0402_DY CSN2 PWM1 OUT CPU_PWM2

0_5%_2
18 7
11 CPU_CSN1 IN 17
CSN1 SKIP#
8 OUT CPU_PWM1 11

R6643
CSP1 VR_ON
11 CPU_CSP1 IN OUT CPU_SKIP# 11

B-RAMP
THERM
SLEWA

F-IMAX
O-USR
1

OCP-I
PVBAT
IMON
VBAT

IN VR_ON 10
0_5%_2
R6662

1
10 VR_ON OUT
1 R6657 2 TI_TPS51622RSM_QFN_32P

RSC_0402_DY
16
15
14
13
12
10
9
11

10K_5%_2

1 R6644 2
2

B B
0.1UF_16V_2_DY

10K_1%_2

150K_1%_2

150K_1%_2
1

1 R6658 2
RSC_0402_DY

39K_1%_2

150K_1%_2
2

1 R6660 2

C6646

1 R6654 2

2
R6659

75K_1%_2

R6653

R6650

R6647
2
1

1
RSC_0402_DY
412K_1%_2
2

2
100K_5%_NTC

1.02M_1%_2
2

2
RSC_0402_DY

R6649
R6661

R6655

1 R6652

R6646

VREF_CPU VREF_CPU
1

1
1

10 IN IN 10
4700PF_50V_2
1
C6645

CPU_IMON
A A
OUT
2

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 14 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

PVBAT

11
PAD6600
POWERPAD_2_0610

2
15UF_25V_DY
PVBAT_VCORE

2
1
OUT 11

C6699

10UF_25V_5

10UF_25V_5
1

1
C6601

C6600
2
PVCORE
C C

2
L6600
10 CPU_SKIP# IN 1 2
VRPVCORE_PH OUT 3 4

2
R6605
PCME063T-R24MS1R195

2.32K_1%
R6601
1 2
1 U6610 8
0_5%_2_DY SKIP# PWM IN CPU_PWM1 10
P5V0S
2 7 1 R6615 2 R6600
VDD BOOT 1 2
0_5%_3
1

1
3 PGND BOOT_R 6 2 1 18.7K_1%_2
C6623 0.1UF_16V_2 C6615 R6603 R6602
4 5
VSW VIN IN PVBAT_VCORE 1 2 1 2
PGND

2.2UF_6.3V_3
2

3.01K_1%_2 10K_1%_NTC
TI_CSD97374CQ4M_SON_8P
C6605
9

2 1

VRPVCORE_PH OUT 0.1UF_25V_2 10

OUT CPU_CSN1

B 10
B
OUT CPU_CSP1

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 15 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

R7034
PAD2990 Q7151 Q7150 Q7152 R7150 R7151 R7154 DGPU_PWR_EN IN
1 2
OUT EN_1V8S 22

REFERENCE NUMER : 7000~7350NON-IAMT

0.1UF_16V_2
INSTALL UN-INSTALL UN-INSTALL UN-INSTALL UN-INSTALL UN-INSTALL UN-INSTALL 13.7K_1%_2

C7034
IAMT UN-INSTALL INSTALL INSTALL INSTALL INSTALL INSTALL INSTALL
P1V05S
P1V05A P1V05M

1
PAD2990
1 1 2
2

22UF_6.3V_5_DY
10UF_6.3V_3
1

1
P3V3DS P3V3S P5V0DS P5V0S P1V05A POWERPAD_2_0610_DY

22UF_6.3V_5_DY
MAX 4.5A MAX 2.0A

C7153

C2994

C2995
Q7153
Q7151 8 1
Q7050 Q7100 1 4 D S
1 4 1 4 D S
7 2 1 R7044 2
D S D S
2 DGPU_PWR_EN IN OUT EN_PVPCIE 23

2
2 2 6 3 5.1K_1%_2
5

0.1UF_16V_2
2

2
D 5 5
6 G 3
5 G 4

C7039
6 G 3 6 G 3 NMOS_4D1S D
NMOS_4D1S NMOS_4D1S
FDMS0310AS
ALPHA_AO6424L_TSOP_6P
ALPHA_AO6424L_TSOP_6P ALPHA_AO6424L_TSOP_6P P3V3DS P3V3M
SPWON

1
CSC0402_DY
Q2971

1
R7151 4 1
18 16 8 IN P15V0A 1 2 S D
18 8 2
10UF_6.3V_3
R7101
1
1 2 SPWON SPWON 5

10UF_6.3V_3
P15V0A IN

220_5%_2
470K_5%_2
2 R7050 1

2 R7152 1
10UF_6.3V_3
47_5%_2

220_5%_2
1

2 R7150 1
C7050

3 6
P3V3DS

100_5%_2
G

C7152
470K_5%_2

C2990
P0V75S
PMOS_4D1S

R7100

C7100
P5V0DS

2
TPC6111
C2970

10UF_6.3V_3
1

1
1 2

3 1 R7153 2
200K_5%_2

22_5%_2
2

2
2 R7154

C2971
Q7150

2
S1 1 CSC0402_DY

47K_5%_2
1

1
2

330K_5%_2
G1

1
47_5%_2
R2970
6

R2971
D1
3

2
D2
Q7051 Q7101
1 5

3
S1 G2

R2972
2 SSM3K7002BFU PM_SLP_A 4

3
G1 Q7154 Q7155
S2
6

2
D

D
L2N7002DW1T1G

2
D1
3 1 1

3
D2 G G

D
5 G2 1 G Q7152
C C

S
4 SSM3K7002BFU

D
PM_SLP_A# SSM3K7002BFU Q7056
S
S2
24 G S1 1
L2N7002DW1T1G 51
IN
1 2

2
G1
26

S
28 6
2

SSM3K7002BFU D1
D2 3
51 28 5
SLP_LAN#

2
G2
IN
4
S2
L2N7002DW1T1G
SLP_S3_5R OUT
P5V0DS
PVPCIE P1V8S P1V8S_DGPU
200K_5%_2
1

10UF_6.3V_3_DY

PAD2991 R7016
R7005

1 2
VR_EN_HASWELL IN
1

1 2
1 2 MAX 1.5A 0_5%_2
47_5%_2
R7302

C7302

P1V05S_VCCP

10UF_6.3V_3_DY
POWERPAD_2_0610 R7000
2

1 2 14
PWR_GOOD_3 IN OUT EN_PVCORE
0_5%_2_DY
1

D7000 2 R7012 1
3

PVCCIO_OUT
47_5%_2

OUT
R7300

C7301
23

Q7002 2 1 0_5%_2
Q7302 36 VGATE OUT
D

B B
D

1
SLP_S3#_3R IN G
1 G
1N4148WS_7_F
32

2
S

SSM3K7002BFU Q7301 R7430

SSM3K7002BFU PVCORE_PG IN 1 2 R7010
2

0_5%_2 1 2
2

1 G 8 18 5V_PG IN OUT RSMRST# 28 51

0_5%_2_DY
S

2 R7020 1
SLP_S3#_3R IN OUT EN_1V5S 12
SSM3K7002BFU
2

1 R7112 2
8 EN_3V EN_5V_3V
2

D7001 OUT IN 16 25 68 0_5%_2

0_5%_2
NC

3 1
1 R7113 2 R7022 R7019
8
EN_5V OUT
SLP_SUS#_3R IN 1 2 2 1
OUT EN_1V05A 11
0_5%_2
DIODE-BAT54-TAP-PHP
0_5%_2_DY 0_5%_2
1 R7031 2 19
DGPU_PWR_EN IN OUT EN_DGPU R7021
2 1 13
C7031 KBC_PWR_ON IN OUT EN_1V2A
0_5%_2 2 1 64 27 0_5%_2
2 R7014 1

CSC0402_DY

CSC0402_DY

CSC0402_DY
28 26 SLP_S4#_3R IN

1
CSC0402_DY 0_5%_2

C7037

C7035

C7036
1 R7013 2
27 EN_P1V5 IN OUT EN_VRPVDDQ 10
RSC_0402_DY
A A

2
1 R7015 2
1
R7110
2 1 R7111 2 24 64 31 51 16 SLP_S3#_3R IN OUT EN_VRPVTT 10
25 EN_5V_3V OUT IN VRP3V3A_LDO 26 59 28 43 57
68 RSC_0402_DY
10K_5%_2 100K_5%_2 1 R7018 2
38 DDR_VTT_PG_CTRL IN
0_5%_2
1
0.1UF_16V_2

R7032
C7110

1 2
OUT EN_1V35S_DGPU
8.66K_1%_2

INVENTEC
1
0.1UF_16V_2

POWER TO EE NET NAME CONNECTION

C7032
2

TITLE
MODEL,PROJECT,FUNCTION
2

Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 16 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

JACK6000

PHP_PESD5V0S1BB_SOD523_2P_DY
PVADPTR

PHP_PESD5V0S1BB_SOD523_2P

PHP_PESD5V0S1BB_SOD523_2P
L6035

D7504

D7505
4
5
6
NFE31PT222Z1E9L 1

1
1

1
TMP121018007

0.1UF_25V_2
2

100PF_50V_2

100PF_50V_2
1 2

2
1

1
3

1
C7500

C7501

C7502
7
8
9
1

D7506
4

3
SINGA_2DC3092_000111F_9P
1000PF_50V_2

1000PF_50V_2
100PF_50V_2

100PF_50V_2
D PVBATA

D6035
1

1
2

2
PANJTT_PJSOT24C_SOT23_3P
D

2
C6038

C6037

C6036

C6035

2
3
2

2
100_5%_2 1
CN6050
1
2

3
R6051 2

OUT LIMIT_SIGNAL 7 57 51 17 5 SDA_BAT_CHG BI 1 2 3 3

51 17 5 SCL_BAT_CHG BI 1 2 4 4
5 5
R6053 1 R6057
2 6 G1
6 G
100_5%_2
1K_5%_2 7 7 G G2
8 8

100_5%_2_DY
100PF_50V_2

1
FOX_BP02083_B24B1_9H_8P

1
P3V3DS
P3V3DS

R6055
C7503
6012B0335005

BAV99W_7_F_DY
2

2
100K_5%_2

2
1
3 OUT OCP_MAIN# 7

D7503
BATTERY OCP PWM#
C C

R6058
2

1
OUT MAIN_BAT_DET# 51

PHP_PESD5V0S1BB_SOD523_2P

PHP_PESD5V0S1BB_SOD523_2P

PHP_PESD5V0S1BB_SOD523_2P
B B

0.1UF_25V_2
100PF_50V_2

100PF_50V_2

100PF_50V_2

2
1

2
2

2
C7504

C7507
C7505

C7506
PVBATB TRAVEL BATTERY

1
6012B0449801

1
D7511

D7512

D7513
51

1
17
5 SDA_BAT_CHG BI CN6051
R6078
5 SCL_BAT_CHG BI 100_5%_2 1 1
2 2
1 2 3
P3V3DS 3
1 2 4 4
5 5
R6077 1 R6073 2 6 G1
6 G1
100_5%_2

1
7 G2

RSC_0603_DY
7 G2
1K_5%_2

100_5%_2_DY
8 8

R6083
P3V3DS
P3V3DS

R6076
FOX_BR0208C_Z58ABH1_9H_8P

BAV99W_7_F_DY
D7507

D7508

D7509

2
A 3 3 3 A

2
100K_5%_2
BAV99W_7_F

BAV99W_7_F

BAV99W_7_F

1
3 7
OUT OCP_TRAVEL#

D7510
1

R6074
2

1
OUT TRAVEL_BAT_DET# 51
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 17 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3DS

D
24

100K_5%_2
D

R7017 2
P3V3DS
8
6 3V3REF IN
7

10K_5%_2
R7001
U7000

1
1 NC VCC 5

16 8 2
5V_PG IN IN-A

2
3 4

0.1UF_16V_2
GND OUT-Y OUT DPWROK 28

1
TSB_TC7SZ07FU_SSOP_5P

C7001
2
C C

P5V0DS P5V0A P3V3DS P3V3A

Q7353
P5V0DS Q7351 8 D S 1
8 1
P15V0A IN 8 16
D S
7 2
7 2
6 3
6 3

470K_5%_2
5 G 4
1

5 4
2
G NMOS_4D3S
R7354

NMOS_4D3S
RQ3E100BNFU7TB
R7350 RQ3E100BNFU7TB
100K_5%_2
2

B B
R7355 R7353
2 1 2 1
Q7350
1 100_5%_2 100_5%_2

3
S1
51 16 IN KBC_PWR_ON 2 G1 Q7352
Q7355

1
6

D
1
D1
D2 3 1 G 1 G
5 G2
C7352

S
4 C7355
S2
SSM3K7002BFU SSM3K7002BFU 10UF_6.3V_3
R7356 L2N7002DW1T1G 10UF_6.3V_3
28 16 SLP_SUS#_3R 1 2
2

2
IN

2
0_5%_2_DY

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 18 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

PVCORE_DGPU
PAD6750
1 2
VRPVCORE_DGPU IN 1 2

POWERPAD_2_0610 MAX=50A
OCP=42A
PVBAT
C C

POWERPAD_2_0610
15UF_25V_DY
1

1
C6799

PAD6760
+
EN_DGPU IN

1
2
2
1

1K_5%_2
R6755

2
R6755=100K , FSW=300KHZ
R6755=200K , FSW=400KHZ
OUT 51219VREF R6755=1K , FSW=500KHZ Q6750

2
TI_CSD87588N_LGA_5P
R6752
1 2 VIN 2 VRPVBAT_DGPU
Control
0_5%_2 R6765 C6765 FET

10UF_25V_5

10UF_25V_5

10UF_25V_5
P3V3S

0.1UF_25V_2
DGPU_PG OUT 2.2_5%_3 0.1UF_16V_2
1

1
0_5%_2_DY

1 R6766 2 1
DGPU_VID1 IN TG

C6760

C6761

C6762

C6763
1 2 1 2
SHORT_0402_5
R6750

VSW 5

17

16

15

14

13
U6751
1 R6767 2 ANPEC_APL6502A8I_TRG_8P

R6762 2
SHORT_0603_25
DGPU_VID2 IN 5 VID0 VDA 3 U6750
Sync
0.033UF_16V_2

SHORT_0402_5 2 4 BG FET
B VID1 B

PGND
1

2
1 R6768 2 1 4

PWPD

PGOOD

EN

BST
MODE
DGPU_VID3 IN VID2 VDD
C6770

SHORT_0402_5 8 VID3
R6769 2 7 VID4 GND 6 1 VREF SW 12 VRPVCORE_DGPU_PH
1
DGPU_VID4

1
IN

3
1UF_6.3V_3

SHORT_0402_5 VRPVCORE_DGPU_HG
1

2 REFIN DH 11
2

R6770 2
C6773

1 TI_TPS51219RTER_QFN_16P C6775
DGPU_VID5 IN
SHORT_0402_5 3 GSNS DL 10 VRPVCORE_DGPU_LG 1 2
L6750
PCMC104T_R36MN
4 VSNS V5 9
IN VR_VDD5 47 6 CSC0402_DY 1 2
13 OUT VRPVCORE_DGPU
2

COMP

PGND 3 4

RSC_0603_DY
1
TRIP

GND
100PF_50V_2

0.1UF_16V_2
0_5%_2_DY
1

1 R6763 2
Q6751

SHORT_0603_25
C6769

C6768

R7675
TI_CSD87588N_LGA_5P
R6751

2.2UF_6.3V_3
C6767 2

1
VIN
5

1
C6766
2 1

470UF_2V
Control

2
FET
42.2K_1%_2
1

0.01UF_50V_2
2

2 C6750
+
TG
5
R6756

VSW

CSC0402_DY
2

1
Sync

3
4 BG FET

C7675
PGND
2

A A

2
3
R6759
10_1%_2
VSNS 1 2
IN GPU_VCC_SENSE
GSNS 1 2
IN GPU_VSS_SENSE
R6760
SHORT_0402_15
1

C6774
1000PF_50V_2
INVENTEC
2

TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 19 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

C C

EMPTY
B B

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 20 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

2.2UF_6.3V_3
2700PF_50V_2
PVBAT

1
C6255
C6256
PAD6260
1 1 2
2
R6254
SHORT_0402_15 POWERPAD_2_0610

10UF_25V_5
0.1UF_25V_2
1 2

1
712
VR_VDD5

2
IN

C6261

C6260
1 R6253 2
0_5%_2
VRP1V35S_DGPU IN
C C

2
19
18
17
16
15
23
22
21
20
R6251 R6250 U6250
1 21 2

V5
GSNS
VSNS

TRIP
SLEW

GND

VIN
VIN
VIN
21K_1%_2 10K_1%_2 24 REFIN2 PGND 10
C6257 25 REFIN PGND 11
2 1 26 VREF PGND 12
27 13

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
RA PGND
0.22UF_6.3V_2

2
28 14
EN_1V35S_DGPU IN EN PGND

PGOOD
P1V35S_DGPU

MODE

C6250

C6252

C6253
C6251
29

BST
LP#
TML

SW
SW
SW
SW
NC
TI_TPS51362RVER_QFN_28P PAD6250
1 2
VRP1V35S_DGPU IN 1 2
VRP1V35S_DGPU_PH IOUT=8A

1
2
2 3
4
2 0_5%_2_DY 5
6
7
8
9
POWERPAD_2_0610

1
L6250
1 2
1 2 OUT VRP1V35S_DGPU

RSC_0603_DY
3 4
1V35S_DGPU_PG OUT

R6256

1
3 4

0.1UF_16V_2
PAN_ETQP3W1R0WFN_4P

R7625
C6265
1
B B

2
1
P3V3DS

2
MODE=GND FSW=400K

CSC0402_DY
C7625
R6265

2.2_5%_3
R6258 MODE= FLOAT FSW= 800K
2 1
TRIP =5V OCL=12A

2
1

0_5%_2_DY REFIN =GND VOUT=1.05V

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 21 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

P5V0DS

PAD6971
1 1 2
2

10UF_6.3V_3
1
C POWERPAD_2_0610 C
11 U6970 IOUT=1.68A
C6972

TML
10 PVIN LX 1 VRP1V8S_PH L6970
9 2 1 2

20.5K_1%_2
PVIN LX OUT VRP1V8S

CSC0402_DY
1

2
8 3 ELL5PR1R2N
2

SVIN LX

C6971

R6970

22UF_6.3V_5
7 4

1
NC PGOOD OUT
6 5 1V8S_PG

C6970
FB EN

RICHTEK_RT8068AZQW_WDFN_10P
EN_1V8S

11
IN P1V8S

10K_1%_2

2
R6971
PAD6970
1 2
VRP1V8S IN 1 2

2
POWERPAD_2_0610

B VREF=0.6V B
15K=1.5V
10K=1.2V
20.5K=1.83V
MODE= FLOAT=SKIP MODE
MODE=VIN=FCCM MODE

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 22 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

P5V0DS
PAD6951
1 1 2
2

POWERPAD_2_0610
OCP=4.5AMP
C C

10UF_6.3V_3
OUT VRPVPCIE
PVPCIE

1
C6955
2
VRPVPCIE_PH
11 U6950
TML L6950 PAD6950
10 PVIN LX 1 1 2 1 1 2
2
9 PVIN LX 2 ELL5PR1R2N
8 3 POWERPAD_2_0610
7
SVIN LX
4 PVPCIE_PG
6
NC PGOOD
5
OUT

CSC0402_DY
1

22UF_6.3V_5
5.9K_1%_2
FB EN

1
IN EN_PVPCIE

R6950
VOUT=((5.9K/10K)+1)*0.6

C6954

C6950
RICHTEK_RT8068AZQW_WDFN_10P
0.1UF_16V_2
1
C6952

2
1
10K_1%_2
R6951
2

B B

2
A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 23 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

REFERENCE NUMER : 7400~7450

P5V0S
R7405
1 2

38.3K_1%_2 24 R7410 C7402

R7416 7 6 IN 3V3REF 1 2 2 1
1 2 18 8
VRPVDDQ_PG IN
57.6K_1%_2 1000PF_50V_2
3.3K_5%_2

P3V3S
D R7414 1 R7407 2
57 51 43 31 28 26 16 SLP_S3#_3R IN 1 2 D

3.3K_5%_2
64 59 1M_5%_2

1
3.3K_5%_2
P5V0A

2 R7404
D7400

8
V+
R7415 1 1
3 3 1 R7409 2 5 U7400
51 28 24 1 2 2
M_PWROK IN 2
10K_5%_2 ++IN 7
-
OUT OUT PWR_GOOD_316 26 28 51
3.3K_5%_2 6 -IN
PANASONIC_DB3X313J0L_SOT_3P

31.6K_1%_2
3300PF_50V_2
V-
P3V3S

2
ON_LMV393DMR2G_SOP_8P

4
R7412
13.7K_1%_2
R7418

C7403
1

P1V05S
10K_5%_2

10K_5%_2

10K_5%_2

1
R7433

R7434

R7435

2
R7426
1 2

1 R7406 2
16.2K_1%_2
2

1 R7429 2 1M_5%_2
1V35S_DGPU_PG IN P5V0A
0_5%_2
C
R7431 2
NEED CHECK C7400
C
22 1
1V8S_PG IN 1 2
0_5%_2
R7427 0.1UF_16V_2

8
23 1 R7432 2 GPWR_GOOD 1 2 V+
PVPCIE_PG IN 1 R7408 2 3 U7400
0_5%_2 ++IN OUT
10K_5%_2 1
3.3K_5%_2_DY 2 -
-IN

P3V3S

3300PF_50V_2
V-
ON_LMV393DMR2G_SOP_8P

53.6K_1%_2
1

4
R7425

R7401
1 2

C7401
51.1K_1%_2

2
R7428
12 1 2
1V5S_PG IN
3.3K_1%_2

B B
R2950
24 18 8 7 6 1 2
3V3REF IN

1 R2951 2
1000PF_50V_2

35.7K_1%_2
46.4K_1%_2

C2950 P3V3A

FOR IAMT
2

3.3K_5%_2
1
1 R2953 2
1M_5%_2

2 R2954
P5V0A

P3V3M

5
R2959 U2950
1 R2955
+
1 2 2 1 +
10K_5%_2 OUT
4
OUT M_PWROK24 28 51
41.2K_1%_2 3 -
P1V05M
0_5%_2_DY

AZV331KTR_E1
3300PF_50V_2
-
1

R2958
2

1
1 2

1K_1%_2
R2960

A A
C2952

13K_1%_2

2 R2952
3

2
1
3

D2951 1 R2956 2
PANASONIC_DB3X313J0L_SOT_3P
1M_5%_2
1
2

C2951
51 28 26 16 1R2957 2 1 2
PM_SLP_A# IN
2
1

3.3K_5%_2 0.068UF_10V_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
POWER(SEQUENCE)

REFERENCE NUMER : 2950~2999 SIZE CODE

DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 24 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D REFERENCE NUMBER:4400~4349 D
P3V3S

10K_5%_2
2
R4301
P5V0S

1
CN4300
1 1
2 2 G G1
51 3 G2
TACH_FAN_IN OUT 3 G
1 2 4 4

R4300
22_5%_2 ACES_50271_0040N_001_4P
P5V0S
6012B0194003

0.1UF_16V_2_DY
5

1
U4300

C4300
51 1
+

C PWM_3S_FAN# IN C
4 1 2
68 2
THERM# IN R4302
22_5%_2_DY
-

2
TC7SET00F_DY
3

B B
AMBIENT TEMP SENSE
WILL BE NOT USED IN 2013?

P5V0DS
25.5K_1%_2_DY
R4412 U4411 R4411
1 2 5 VCC SET 1 1 2
0.1UF_16V_2_DY

GND 2
150_1%_2_DY 4 HYST OT 3 EN_5V_3V OUT 16 68
1
C4411

GMT_G708T1U_SOT23_5P_DY
2

A A

RSET (K OHM) = 0.0012T^2 - 0.9308T + 96.147

THERMAL SHUTDOWN AT 85 DEG.

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
FAN & THERMAL

REFERENCE NUMBER:4411~4449 SIZE CODE

DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 25 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3A

P1V05S_VCCP CN4920
1 GND0 GND1 2
27 H_PREQ# OUT 3 OBSFN_A0 OBSFN_C0 4
IN CFG<17> 34

10K_5%_2
27 H_PRDY# IN 5 OBSFN_A1 OBSFN_C1 6
IN CFG<16> 34

R4923
D 7 GND2 GND3 8
U4926 34 CFG<0> IN 9 OBSDATD_A0 OBSDATA_C0 10
IN CFG<8> 34 D
51
1 NC VCC 5 34 CFG<1> IN 11
13
OBSDATD_A1 OBSDATA_C1 12
14
IN CFG<9> 34
26 GND4 GND5

2
16
24
PWR_GOOD_3 IN
2 IN-A 34 CFG<2> IN 15 OBSDATD_A2 OBSDATA_C2 16
IN CFG<10> 34

28
3 4
34 26 CFG<3> IN 17
19
OBSDATD_A4 OBSDATA_C3 18
20
IN CFG<11> 34
GND OUT-Y GND6 GND7
P1V05S_VCCP
TSB_TC7SZ07FU_SSOP_5P 27 H_BPM0_XDP# IN
21 OBSFN_B0 OBSFN_D0 22
IN CFG<19> 34
27 H_BPM1_XDP# IN
23
25
OBSFN_B1 OBSFN_D1 24
26
IN CFG<18> 34 P3V3S
GND8 GND9
34 CFG<4> IN 27 OBSDATA_B0 OBSDATA_D0 28
IN CFG<12> 34
CFG<5> IN CFG<13>

1
34 29 30 34
OBSDATA_B1 OBSDATA_D1 IN
31 GND10 GND11 32
34 CFG<6> IN 33 OBSDATA_B2 OBSDATA_D2 34
IN CFG<14> 34 R4922
R4926 34 CFG<7> IN 35 OBSDATA_B3 OBSDATA_D3 36
IN CFG<15> 34
1K_5%_2
VCCST_PWRGD 1
1K_5%_2
2 VCCST_PWRGD_XDP
37
39
GND12 GND13 38
40
36 CLK_PCIE_XDP_DP_R 26

2
OUT PWRGOOD_HOOK0 ITPCLK_HOOK4 IN
28 PWR_BTN_OUT# IN 41 HOOK1 ITPCLK#_HOOK5 42
IN CLK_PCIE_XDP_DN_R 26
P1V05S_VCCP 43 VCC_OBS_AB VCC_OBS_CD 44
XDP_RST_R_N
36 PWR_DEBUGOUT 45
47
HOOK2 RESET#_HOOK6 46
48
R4921 1 2 1K_5%_2
IN BUF_PLT_RST# 28 33 51
61
53 55 56
51 28 PM_PWROK IN HOOK3 DBR#_HOOK7 OUT 26 28
49 GND14 GND15 50 XDP_DBRESET#
PCH_3S_SMDATA
1

0.1UF_16V_2_DY

28 51 52
BI SDA TDO IN PCH_TDO 26 33
PCH_3S_SMCLK
C4937

28 53 54 26
C BI SCL TRSTn IN XDP_TRST# C
33 55 56
PCH_TCK IN TCK1 TDI IN PCH_TDI 26 33
27 H_TCK IN 57
59
TCK0 TMS 58
60 MSR_ENABLE_N 1 2 1K_5%_2
IN PCH_TMS 26 33
GND16 GND17 R4939 IN CFG<3> 26 34
2

SAMTEC_BSH_030_01_L_D_A_TR_60P
R4822
33 1 2
PCH_JTAG IN
0_5%_2
C4937 PLACE IT NEAR XDP

P1V05S_VCCP 1
R4823
2
CPU XDP CONNECTOR OUT CLK_PCIE_XDP_DP_R 1 R4937
0_5%_2_DY
2 CLK_PCIE_XDP_DP
IN 34

26 OUT CLK_PCIE_XDP_DN_R 1 R4938 2 CLK_PCIE_XDP_DN

IN 34
1K_5%_2
0_5%_2_DY

B Q4921 B
PWR_GOOD_3 2
S1 1
IN H_TDI 27
16 IN G1
28
26
24
51 6
D1 IN PCH_TDI 26 33
3
D2
IN PCH_TMS 26 33
5 G2

S2
4
IN H_TMS 27
L2N7002DW1T1G
Q4920
2 G1
S1 1
IN H_TDO 27
6
D1 IN PCH_TDO 26 33
D2 3 26
IN XDP_TRST#
5 G2
P3V3A
4
S2 IN H_TRST# 27 33
L2N7002DW1T1G
ACES_50501_0144N_001_14P
51_5%_2_DY
1

1 1
R4526

64 59 57 51 43 31 28 24 16 IN SLP_S3#_3R 2 2
R4526 PLACE IT NEAR XDP 3 3
28 IN SLP_S5#_3R 4 4
64 28 27 16 IN SLP_S4#_3R 5 5
PM_SLP_A#
2

51 28 24 16 6
IN 6
A 7 7 A
8 8

IN RTCRST# 9 9
10 10
62 57 51 IN ON_OFF# 11 11 G G1
12 12 G G2
28 26 IN XDP_DBRESET# 13 13
14 14

CN4941

INVENTEC
6012B0218415 TITLE
FOR ME TEST MODEL,PROJECT,FUNCTION
XDP & ME CONN.
NEED TO BE PLACE BETWEEN KEYBOARD OR BOTTOM DOOR DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 26 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

TP4560
TP4561
TP30
P1V05S_VCCP TP4570

1
U4555 HASWELL_MCP_E TP30 TP4558

1
D TP30 TP4559
D

1
2
1 PROC_DETECT_N D61 PROC_DETECT* TP30

62_5%_2
TP4501 TP24

R4517
1 CATERR_N

1
TP4502 TP24
K61 CATERR* MISC TP30
H_PECI
51 N62 PECI PRDY* J62
OUT H_PRDY# 26

1
BI
PREQ* K62
OUT H_PREQ# 26
JTAG PROC_TCK E60
OUT H_TCK 26 27

1
R4515
CPU_PROCHOT#_RK63
PROC_TMS E61
OUT H_TMS 26 27
2 1 1 2 PROCHOT* PROC_TRST* E59
OUT H_TRST# 26 33 P1V05S_VCCP
47PF_50V_2 THERMAL
C4514 56_5%_2 PROC_TDI F63
OUT H_TDI 26 27
PROC_TDO F62
OUT H_TDO 26 27
R4527
1 2 H_PWRGD C61 PROCPWRGD
PWR
10K_5%_2_DY BPM#0 J60 H_BPM0_XDP# 26
OUT

51_5%_2_DY

51_5%_2_DY
BPM#1 H60 H_BPM1_XDP# 26
OUT

2
BPM#2 H61 H_BPM2_XDP# 1

51_5%_2
RCOMP NEED CLOSED TO CPU AT 500MIL

R4508

R4507

R4920
H_BPM3_XDP# 1 TP4552
BPM#3 H62
TP4553 PLACE NEAR CPU
R4518 1 2 200_1%_2 AU60 SM_RCOMP0 BPM#4 K59 H_BPM4_XDP# 1
H_BPM5_XDP# 1 TP4554
R4541 1 2 120_1%_2 AV60 SM_RCOMP1 DDR3 BPM#5 H63
TP4555
R4540 1 2 100_1%_2 AU61 SM_RCOMP2 BPM#6 K60 H_BPM6_XDP# 1
H_BPM7_XDP# 1 TP4556

1
27 DDR3_DRAMRST#_CPU OUT
AV15 SM_DRAMRST* BPM#7 J61
DDR_PG_CTRL OUT
AV61 SM_PG_CNTL1
TP4557 27 26 H_TDI IN
38
C 27 26 H_TMS IN C
27 26 H_TDO IN
ITL_HSW_ULT_2C_BGA_1168P 27 26 H_TCK IN

51_5%_2
R4509
PLACE NEAR CPU

1
14 CPU_PROCHOT# BI
3

Q4501
D

G 1
IN KBC_PROCHOT51
2

100K_5%_2
S

R4516

SSM3K7002BFU
2

B B
P1V5

470_1%_2
1
R4553
P3V3DS

2
OUT DDR3_DRAMRST#38 39

3
1 R4583 2 C4570 Q4502
20K_5%_2_DY 470PF_50V_2

D
1 G

1 R4580 1 R4581

S
P3V3A 2 2
OUT DDR_RST_EN 31 2 1
20K_5%_2 20K_5%_2 SSM3K7002BFU

2
28 PCH_DDR_RST IN 1 2
DDR3_DRAMRST#_CPU
3

IN 27
Q4580
R4550
D

1 4.99K_1%_2
51 KBC_DS3_EN IN G

SSM3K7002BFU
S

A OUT EN_P1V5 16 A
1 R4585 2
2

1 R4586 2 1R4587 2 51 57
20K_5%_2 OUT SLP_S4#_KBC
20K_5%_2 0_5%_2
D4581 1R4588 FOR DEEP S3
3

2
0_5%_2_DY
C

1 2 16 26 28 64
A1 A2 IN SLP_S4#_3R

BAT54C
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP1-MISC

REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 27 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U4555 HASWELL_MCP_E

53 51 LPC_3S_AD(0) BI AU14 LAD0 SMBALERT*/GPIO11 AN2

IN FPR_OFF 49
53 51 LPC_3S_AD(1) BI AW12 LAD1 SMBUS SMBCLK AP2
OUT PCH_3A_SMCLK
53 51 LPC_3S_AD(2) BI AY12 LAD2 LPC SMBDATA AH1
BI PCH_3A_SMDATA 2.2K_5%_2
53 51 AW11 LAD3 SML0ALERT*/GPIO60 AL2 P3V3S 2 R4776 1
LPC_3S_AD(3) BI OUT PCH_DDR_RST 27 P3V3S
53 51 LPC_3S_FRAME# OUT AV12 LFRAME* SML0CLK AN1
OUT PCH_3M_SMCLK 54 Q4759
SML0DATA AK1 1 NFC_3S_SMCLK
BI PCH_3M_SMDATA54 S1
IN 49
SML1ALERT*/PCHHOT*/GPIO73 AU4 1R4840 2 2 G1 2.2K_5%_2
SML1CLK/GPIO75 AU3 10K_5%_2 P3V3A 6 PCH_3M_SMCLK 2 R4797 1
OUT PCH_SML1CLK P3V3A
33_5%_2 SML1DATA/GPIO74 AH3 D1
3 PCH_3M_SMDATA 2 1
BI PCH_SML1DATA D2
67 51 R4794 1 2 R_SPI_CLK_FLH AA3 SPI_CLK 5 2.2K_5%_2 R4884
SPI_CLK_FLH OUT G2
51 R4790 1 2 R_SPI_CS0#_FLH Y7 SPI_CS0* CL_CLK AF2 4 NFC_3S_SMDATA
SPI_CS0#_FLH OUT BI CL_CLK1 55 S2
49 IN
0_5%_2 1 Y4 SPI_CS1* CL_DATA AD2
BI CL_DATA1 55 L2N7002DW1T1G_DY
TP4503 2 R4783 2.2K_5%_2
R4796 33_5%_2
TP4504
1AC2 SPI_CS2* SPI C-LINK CL_RST* AF4
OUT CL_RST#1 55
1
P3V3S
51 1 2 R_SPI_SI_FLH AA2 SPI_MOSI
SPI_SI_FLH OUT
D 51 SPI_SO_FLH IN AA4 SPI_MISO
51 1 2 33_5%_2 R_SPI_WP# Y6 SPI_IO2
SPI_WP# IN R4793 D
51 1 2 33_5%_2 R_SPI_HOLD#_DB AF1 SPI_IO3
SPI_HOLD#_DB IN R4795

ITL_HSW_ULT_2C_BGA_1168P

P3V3A
Q4753
S1 1 PCH_SML1CLK 2R4827 1 P3V3A
2 G1 2.2K_5%_2
6 PCH_KBC_SMCLK 51
68
IN
D1
D2 3 PCH_KBC_SMDATA 51
68
IN
5 G2
4 PCH_SML1DATA 1 2 P3V3A
S2
L2N7002DW1T1G R4856 2.2K_5%_2

1 R4835 2
IN I2C_CLK 57
0_5%_2_DY
P3V3S 2.2K_5%_2
2 R4913 1
C Q4752 P3V3S C
S1 1 PCH_3S_SMCLK 26 38 39 50 58
IN
2 G1
6 PCH_3A_SMCLK 2 R4830 1 2.2K_5%_2
D1
D2 3 PCH_3A_SMDATA 2 1 P3V3A
5 G2 R4792 2.2K_5%_2
4 PCH_3S_SMDATA 26 38 39 50 58
S2 IN
L2N7002DW1T1G 2 1
PCH_PWROK P3V3S
R4925 1 2 0_5%_2 IN PWR_GOOD_316 24 26 51 R4828
2.2K_5%_2
1 R4836 2 57
IN I2C_DATA
0_5%_2_DY
R4936
1 2
IN DPWROK 18
0_5%_2_DY
U4555 HASWELL_MCP_E
P3V3_RTC
R4742
SYSTEM POWER MANAGEMENT 330K_5%_2
R4815 1 2 0_5%_2 AK2 SUSACK* DSWVRMEN AW7 2 1
26 XDP_DBRESET# IN AC3 SYS_RESET* DPWROK AV5 1 2 P3V3A
IN RSMRST# 16 28 51
51 26 PM_PWROK IN R4802 1 2 0_5%_2 AG2 SYS_PWROK WAKE* AJ5
IN PCH_WAKE# 29
AY7 PCH_PWROK R4928 2 10K_5%_2
2 0_5%_2_DY AB5 R4940 1
B R4722 1 APWROK 0_5%_2 B
51 24 R4723 1 2 APWROK AG7 PLTRST* CLKRUN*/GPIO32 V5 28 51
M_PWROK IN BI PCI_3S_CLKRUN#
0_5%_2 SUS_STAT*/GPIO61 AG4
OUT BT_OFF 55
54
70 PLT_RST# OUT SUSCLK/GPIO62 AE6
OUT SUSCLK32_PCH
SLP_S5*/GPIO63 AP5
OUT SLP_S5#_3R 26
51 28 16
RSMRST# IN
AW6 RSMRST*
51 SUS_PWR_ACK OUT
AV4 SUSWARN*/SUSPWRDNACK/GPIO30
26 PWR_BTN_OUT# IN
AL7 PWRBTN* SLP_S4* AJ6
OUT SLP_S4#_3R 16 26 27 64
51
68 51 AJ8 ACPRESENT/GPIO31 SLP_S3* AT4 16 24 26 31 43 51 57 59
ADP_PRES_OUT IN OUT SLP_S3#_3R 64
AN4 BATLOW*/GPIO72 SLP_A* AL5 SLP_A 1 R47182 0_5%_2
GPIO72 IN OUT PM_SLP_A# 16
R47992 VRPPM_SLP_S0_N_R SLP_S0* SLP_SUS* 2 0_5%_2_DY
11 10 1 AF3 AP4
VRPPM_SLP_S0_N OUT R4719 1 OUT SLP_SUS#_3R 16 18
55 PCH_SLP_WLAN_N OUT 0_5%_2 AM5 SLP_WLAN*/GPIO29 SLP_LAN* AJ7
OUT SLP_LAN# 16 51

P3V3S
ITL_HSW_ULT_2C_BGA_1168P P3V3S
1
5

U4700 R4727
5

51 28 1 2
PCI_3S_CLKRUN# OUT
2 4 26 33 51 53 55 56 61
2 4 OUT BUF_PLT_RST#
8.2K_5%_2
2 R4713 1
100K_5%_2

A A
3

TSB_TC7SH17F_SSOP_5P
3

P3V3A

10K_5%_2_DY SUS_PWR_ACK
R4746 1 2
IAMT NON-IAMT
P3V3DSW R4718 INSTALL UNINSTALL

R4743 1 2 10K_5%_2
10K_5%_2
ADP_PRES_OUT R4723 INSTALL UNINSTALL
INVENTEC
R4744 1 2 GPIO72 TITLE
R4722 UNINSTALL INSTALL
MODEL,PROJECT,FUNCTION
MCP2-SPI,SMBUS,SYSTEM SRQUENCE

REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 28 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

R4779
19 1 2
P3V3S DGPU_PG IN OUT DGPU_PWROK29 U4555 HASWELL_MCP_E
REFERENCE NUMBER:4500~4699
0_5%_2

P1V05S_VCCP
R4729 1 2 200K_5%_2 KBL_DET#
R4751 1 2 10K_5%_2_DY DGPU_HOLD_RST# P1 BMBUSY*/GPIO76 THRMTRIP* D60 THRMTRIP# 1 R4732 2 1K_5%_2
BRD_ID1 IN
2 10K_5%_2_DY FPR_LOCK# GPIO8 RCIN*/GPIO82
AU2 V4 56
R4706 1 GPIO8 OUT IN GPS_XMIT_OFF#
54 LAN_DIS# OUT
AM7 LAN_PHY_PWR_CTRL/GPIO12 SERIRQ T4
OUT PCI_3S_SERIRQ 51 53
R4709 1 2 10K_5%_2 DGPU_PRSNT# 1 R4919 2 AD6 GPIO15 PCH_OPI_COMP AW15 1 2
TLS_ENCRYTION IN P3V3S
R4907 1 2 10K_5%_2 DGPU_PWROK 10K_5%_2_DY 52 KBL_DET# IN
Y1 GPIO16 CPU/ RSVD AF20 R4748 49.9_1%_2
DGPU_PWROK IN
T3 GPIO17 MISC RSVD AB21
R4753 1 2 10K_5%_2 MPHY_PRW_EN AD5 GPIO24
GPIO24 IN
GPIO83 R4764 2 10K_5%_2
2 10K_5%_2 GPIO27
29 INTLWAKE# IN AN5 1
R4769 1 LPC_RESET#
GPIO28 2 10K_5%_2
49 AD7
NFC_RST# IN GPIO84 R4754
2 10K_5%_2_DY A_3S_ICHSPKR
1
D R4880 1
49 NFC_INT IN
AN3 GPIO26 LPIO
GPIO85 R4806 2 10K_5%_2_DY
2 10K_5%_2 GSPI0_CS*/GPIO83 D
R6 1
R4726 1 DEVSLP1 IN GPIO83
GPIO56 GSPI0_CLK/GPIO84 2 10K_5%_2_DY
AG6 L6
WLAN_TRANSMIT_OFF# OUT IN GPIO84 GPIO86 R4809
2 10K_5%_2 55 1
R4767 1 DEVSLP0 AP1 GPIO57 GSPI0_MISO/GPIO85 N6
GPIO57 OUT IN GPIO85
GPIO87 R4810 2 10K_5%_2
2 10K_5%_2 GPIO58 GSPI0_MOSI/GPIO86
AL4 L8 1
R4728 1 DOCK_ID1 GPIO58 IN IN GPIO86
GPIO59 GSPI1_CS*/GPIO87 2 10K_5%_2
AT5 R7
WWANSSD_M12DET IN IN GPIO87 GPIO88 R4813 1
GPIO44 IN AK4 GPIO44 GPIO GSPI1_CLK/GPIO88 L5
IN GPIO88
P3V3A AB6 GPIO47 GSPI1_MISO/GPIO89 N7 GPIO89 R4814 1 2 10K_5%_2_DY
GPIO47 IN IN GPIO89
GPIO48 GSPI_MOSI/GPIO90 2 10K_5%_2
49 U4 K2
FPR_LOCK# IN IN GPIO90 GPIO90 R4755
2 10K_5%_2
1
R4714 1 GPIO8 Y3 GPIO49 UART0_RXD/GPIO91 J1
DGPU_PRSNT# IN IN PLT_ID1
TOUCH_RST# R4763 2 10K_5%_2
2 1K_5%_2 GPIO50 UART0_TXD/GPIO92
P3 K3 1
R4733 1 TLS_ENCRYTION DGPU_HOLD_RST# IN IN PLT_ID2
HSIOPC/GPIO71 UART0_RTS*/GPIO93 2 10K_5%_2
Y2 J2
MPHY_PRW_EN IN IN PLT_ID3 64 GPIO5 R4735
2 10K_5%_2
1
R4720 1 GPIO57 AT3 GPIO13 UART0_CTS*/GPIO94 G1
GPIO13 OUT IN TOUCH_RST# 44
GPIO3 R4906 2 10K_5%_2
2 10K_5%_2 GPIO14 UART1_RXD/GPIO0
AH4 K4 1
R4725 1 NFC_RST# GPIO14 IN IN SG_IN
GPIO25 UART1_TXD/GPIO1 2 10K_5%_2
10 AM4 G2
DDR3L_DET IN IN DOCK_ID1 54 57 GPS_XMIT_OFF# R4708
2 10K_5%_2_DY
1
R4736 1 DGPU_HPD_INTR# AG5 GPIO45 UART1_RST*/GPIO2 J3
OUT SC_PWRSV# 58
GPIO45 IN
PCI_3S_SERIRQ R4912 2 10K_5%_2
2 10K_5%_2 GPIO46 UART1_CTS*/GPIO3
AG3 J4 1
R4741 1 GPIO14 GPIO46 IN IN GPIO3
I2C0_SDA/GPIO4 2 10K_5%_2
F2
IN GPIO4 OCP_OC# R4780
2 10K_5%_2
1
R4908 1 GPIO24 AM3 GPIO9 I2C0_SCL/GPIO5 F3
DGPU_HPD_INTR# OUT IN GPIO5 SC_PWRSV# R4757 2 10K_5%_2
2 10K_5%_2 GPIO10 I2C1_SDA/GPIO6
AM2 G4 1
R4911 1 GPIO44 GPIO10 OUT IN RUNSCI_EC# 51
DEVSLP0/GPIO33 I2C1_SCL/GPIO7 2 10K_5%_2
45 P2 F1
DEVSLP0 OUT BI THERM_SCI# 68 RUNSCI_EC# R4785
2 10K_5%_2
1
R4914 1 GPIO45 51 C4 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 E3
LPC_RESET# IN IN GPIO64
GPIO64 R4738 2 10K_5%_2
2 10K_5%_2 DEVSLP1/GPIO38 SDIO_CMD/GPIO65
45 L2 F4 1
R4915 1 GPIO46 DEVSLP1 IN IN GPIO65
DEVSLP2/GPIO39 SDIO_D0/GPIO66 2 10K_5%_2
29 N5 D3
OCP_OC# IN TP4531 TP24 GPIO65 R4745
C 2 10K_5%_2 C
1 1
R4916 1 GPIO47 59 V2 SPKR/GPIO81 SDIO_D1/GPIO67 E4
A_3S_ICHSPKR OUT IN GPIO67
GPIO67 R4749 2 10K_5%_2
2 10K_5%_2 SDIO_D2/GPIO68 C3 1
R4917 1 GPIO58 IN GPIO68
SDIO_D3/GPIO69 2 10K_5%_2
E2
IN GPIO69 GPIO68 R4750
2 10K_5%_2
1
R4918 1 WWANSSD_M12DET
GPIO69 R4752 2 10K_5%_2
2 10K_5%_2
1
R4960 1 GPIO10
ITL_HSW_ULT_2C_BGA_1168P GPIO4 R4859 2 10K_5%_2
2 10K_5%_2
1
R4961 1 GPIO13

P3V3DSW

R4721 1 2 10K_5%_2_DY LAN_DIS#

B R4909 1 2 10K_5%_2 DDR3L_DET B
R4717 1 2 10K_5%_2 INTLWAKE#
P3V3S
R4724 1 2 10K_5%_2 NFC_INT
PLT_ID1 R4760 1 2 10K_5%_2_DY
R4803 1 2 10K_5%_2
PLT_ID2 R4761 1 2 10K_5%_2
R4804 1 2 10K_5%_2_DY
PLT_ID3 R47621 10K_5%_2
2
R48051 10K_5%_2_DY
2
R4716 P3V3DSW
10K_5%_2 P3V3S
1 2
PCIE_WAKE# OUT SG_IN R4730 1 2 10K_5%_2

R4731 1 2 10K_5%_2_DY

29
R4934 1 2 PLT_ID1 PLT_ID2 PLT_ID3
INTLWAKE# OUT
0_5%_2_DY R4760 R4761 R4762 H
A R4930
R4730 SWITCHABLE GRAPHICS ENABLE R4803 R4804 R4805 L A
28 1 2
PCH_WAKE# OUT R4731 SWITCHABLE GRAPHICS DISABLE
0_5%_2_DY 0 1 0 14"
51
R4932 1 2 0 1 1 15"
KBC_WAKE# OUT
0_5%_2
29 OCP_OC# OUT BOARD ID GPIO

3
Q4700

D
INVENTEC
1
G
IN OCP_PWM_OUT 51

S
SSM3K7002BFU
TITLE

2
MODEL,PROJECT,FUNCTION
MCP3-GPIO

REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 29 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U4555 HASWELL_MCP_E

P3V3S
eDP SIDEBAND
P3V3S 44 INV_PWM OUT
B8 eDP_BKLCTL DDPB_CTRLCLK B9
BI DPB_PORT_DDCCLK
44 L_BKLT_EN OUT
A9 eDP_BKLEN DDPB_CTRLDATA C9
BI DPB_PORT_DDCDATA
2 8.2K_5%_2 eDP_VDDEN DDPC_CTRLCLK
44 C6 D9
R4781 1 ACCEL_INT# OUT 30 50 LVDS_VDD_EN OUT BI DPC_PORT_DDCCLK
DDPC_CTRLDATA D11
BI DPC_PORT_DDCDATA
R4924 1 2 10K_5%_2 MUX_SELECT# R4788 1 2 2.2K_5%_2
DPC_PORT_DDCCLK OUT
R4929 1 2 10K_5%_2 DGPU_PWR_EN# 2.2K_5%_2
BRD_ID2 U6 PIRQA*/GPIO77 R4789 1 2
DPC_PORT_DDCDATA OUT
R4770 1 2 10K_5%_2 CAMERA_ON BRD_ID3 P4 PIRQB*/GPIO78 DDPB_AUXN C5
BI DPB_PORT_AUX_DN
D BRD_ID4 N4 PIRQC*/GPIO79 DDPC_AUXN B6
BI DPC_PORT_AUX_DN
PIRQD*/GPIO80 DDPB_AUXP 2 100K_5%_2 D
30 N2 B5
ACCEL_INT#_R IN BI DPB_PORT_AUX_DP 43 30 DPD_HPD OUT
R4758 1
1 TP24 AD4 PME* DDPC_AUXP A6
P3V3S TP4509 BI DPC_PORT_AUX_DP
30 1 R4866 2 U7
GPIO55 R4759 1 2 100K_5%_2
10K_5%_2_DY HDD_HALTLED_R OUT SHORT_0402_5 L1 DPC_PORT_HPD OUT
R4571 1 2 BRD_ID1 GPIO52
MUX_SELECT# IN
2 10K_5%_2 GPIO54 DDPB_HPD
56 L3 C8
R4572 1 DGPU_PWR_EN# IN IN DPD_HPD 30 43
WWAN_TRANSMIT_OFF# OUT
R5 GPIO51 DDPC_HPD A8
IN DPC_PORT_HPD
R4573 1 2 8.2K_5%_2_DY BRD_ID2 L4 GPIO53 EDP_HPD D6
44 CAMERA_ON OUT IN EDP_HPD#
R4574 1 2 8.2K_5%_2
PCI DISPLAY
R4575 1 2 8.2K_5%_2_DY BRD_ID3
R4576 1 2 8.2K_5%_2
R4577
1 8.2K_5%_2
2 BRD_ID4 ITL_HSW_ULT_2C_BGA_1168P
R4578
1 8.2K_5%_2_DY
2
58 OUT HDD_HALTLED 1 R4867 2 ACCEL_INT#_R OUT 30
1K_5%_2 P3V3S
1 R4868 2 P3V3S
1K_5%_2_DY

100K_5%_2
2.2K_5%_2

2.2K_5%_2
1

1
30 IN ACCEL_INT# 1 R4870 2 HDD_HALTLED_R IN 30
50

2 R4900

2 R4899
2 R4851
0_5%_2
C C
1 R4871 2
0_5%_2_DY
DPB_PORT_DDCDATA BI BI DPB_PORT_DATA_AUX_DN

6
3

4
S1

D2

S2
D1
Q4701

G1

G2
BRD_ID1 BRD_ID2 BRD_ID3 BRD_ID4 L2N7002DW1T1G
R4571 R4573 R4575 R4577 H

5
30 DDC_EN IN
R4572 R4574 R4576 R4578 L
DPB_PORT_DDCCLK BI BI 43
DPB_PORT_CLK_AUX_DP
0 0 0 0 DB0

100K_5%_2
1

6
3

1
0 0 0 1 DB1 P3V3S

S1

D2

S2
D1
Q4702

100K_5%_2_DY

2 R4895
G1

G2
COMMON PLATFORMS SYSTEM BOARD ID GPIO L2N7002DW1T1G

5
2 R4853
30 43 DDC_EN IN

C4756
B 1 2 DPB_PORT_AUX#_C B
DPB_PORT_AUX_DN BI

6
3

4
0.1UF_16V_2

S1

D2

S2
D1
Q4703

G1

G2
L2N7002DW1T1G

5
30 43 DP_EN IN
C4757
1 2 DPB_PORT_AUX_C
U4555 HASWELL_MCP_E DPB_PORT_AUX_DP BI

6
3

4
100K_5%_2_DY
0.1UF_16V_2

S1

D2

S2
D1
1
Q4704

G1

G2
L2N7002DW1T1G

2 R4854
DPB0_PORT_DN
C54 DDI1_TXN0 EDP_TXN0 C45
EDP_TX0_DN 44

5
OUT OUT
DPB0_PORT_DP OUT C55 DDI1_TXP0 EDP_TXP0 B46
OUT EDP_TX0_DP 44
DPB1_PORT_DN OUT B58 DDI1_TXN1 EDP_TXN1 A47
OUT EDP_TX1_DN 44 30 DP_EN IN
DPB1_PORT_DP OUT C58 DDI1_TXP1 EDP_TXP1 B47
OUT EDP_TX1_DP 44
DPB2_PORT_DN OUT B55 DDI1_TXN2
DPB2_PORT_DP OUT A55 DDI1_TXP2 EDP_TXN2 C47
DPB3_PORT_DN OUT A57 DDI1_TXN3 EDP_TXP2 C46
A DPB3_PORT_DP OUT B57 DDI1_TXP3 EDP_TXN3 A49 A
EDP_TXP3 B49
DPC0_PORT_DN OUT C51 DDI2_TXN0
DPC0_PORT_DP OUT C50 DDI2_TXP0 EDP_AUXN A45
OUT EDP_AUX_DN 44
VCCIOA_OUT
DPC1_PORT_DN OUT C53 DDI2_TXN1 EDP_AUXP B45
OUT EDP_AUX_DP 44
DPC1_PORT_DP OUT B54 DDI2_TXP1 24.9_1%_2
C49 DDI2_TXN2 EDP_RCOMP D20 R4544 2 1
B50 DDI2_TXP2 EDP_DISP_UTIL A43 DP_UTIL 1
TP4500
A53 DDI2_TXN3 TP24
B53 DDI2_TXP3

DDI EDP
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP4-GPIO,DP
ITL_HSW_ULT_2C_BGA_1168P
REFERENCE:4500~4949 SIZE CODE
DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 30 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1
HASWELL_MCP_E
U4555
U4555
HASWELL_MCP_E
39 M_B_DQ<63..0> BI
38 M_A_DQ<63..0> BI
0 AH63 SA_DQ0 SA_CLK#0 AU37
0 AY31 SB_DQ0 SB_CK#0 AM38
OUT M_CLK_DDR2_DN 39
OUT M_CLK_DDR0_DN 38 1 AW31 SB_DQ1 SB_CK0 AN38
1 AH62 SA_DQ1 SA_CLK0 AV37 OUT M_CLK_DDR2_DP 39
OUT M_CLK_DDR0_DP 38 2 AY29 SB_DQ2 SB_CK#1 AK38
2 AK63 SA_DQ2 SA_CLK#1 AW36 OUT M_CLK_DDR3_DN 39
OUT M_CLK_DDR1_DN 38 AW29 SB_DQ3 SB_CK1 AL38
AK62 SA_DQ3 SA_CLK1 AY36
3 OUT M_CLK_DDR3_DP 39
3 OUT M_CLK_DDR1_DP 38 4 AV31 SB_DQ4
4 AH61 SA_DQ4 5 AU31 SB_DQ5 SB_CKE0 AY49 39
5 AH60 SA_DQ5 SA_CKE0 AU43
OUT M_CKE0 38 OUT M_CKE2
6 AK61 SA_DQ6 SA_CKE1 AW43
6 AV29 SB_DQ6 SB_CKE1 AU50
OUT M_CKE3 39
OUT M_CKE1 38
7 AK60 SA_DQ7 SA_CKE2 AY42
7 AU29 SB_DQ7 SB_CKE2 AW49
8 AM63 SA_DQ8 SA_CKE3 AY43
8 AY27 SB_DQ8 SB_CKE3 AV50
9 AM62 SA_DQ9
9 AW27 SB_DQ9
10 AP63 SA_DQ10 SA_CS#0 AP33 38
10 AY25 SB_DQ10 SB_CS#0 AM32
OUT M_CS#2 39
OUT M_CS#0 11 AW25 SB_DQ11 SB_CS#1 AK32
OUT M_CS#3 39
11 AP62 SA_DQ11 SA_CS#1 AR32
OUT M_CS#1 38 12 AV27 SB_DQ12
D
12 AM61 SA_DQ12 13 AU27 SB_DQ13 SB_ODT0 AL32 TP24 1
13 AM60 SA_DQ13 SA_ODT0 AP32 TP24 1 TP90664
14 AP61 SA_DQ14
TP90665 14 AV25 SB_DQ14 D
15 AP60 SA_DQ15 SA_RAS* AY34 38
15 AU25 SB_DQ15 SB_RAS* AM35
OUT M_B_RAS#39
OUT M_A_RAS# 16 AM29 SB_DQ16 SB_WE* AK35
OUT M_B_WE# 39
16 AP58 SA_DQ16 SA_WE* AW34
OUT M_A_WE#38 AK29 SB_DQ17 SB_CAS* AM33
17 AR58 SA_DQ17 SA_CAS* AU34
OUT M_A_CAS# 38
17 OUT M_B_CAS#39
18 AM57 SA_DQ18
18 AL28 SB_DQ18
AK57 SA_DQ19 SA_BA0 AU35
19 AK28 SB_DQ19 SB_BA0 AL35
OUT M_B_BS0 39
19 OUT M_A_BS0 38 20 AR29 SB_DQ20 SB_BA1 AM36
OUT M_B_BS1 39
20 AL58 SA_DQ20 SA_BA1 AV35
OUT M_A_BS1 38 21 AN29 SB_DQ21 SB_BA2 AU49
21 AK58 SA_DQ21 SA_BA2 AY41
OUT M_A_BS2 38 OUT M_B_BS2 39
22 AR57 SA_DQ22
22 AR28 SB_DQ22 39
OUT M_A_A<15..0> 38 23 AP28 SB_DQ23 SB_MA0 AP40 0 OUT M_B_A<15..0>
23 AN57 SA_DQ23 SA_MA0 AU36 0
24 AN26 SB_DQ24 SB_MA1 AR40 1
24 AP55 SA_DQ24 SA_MA1 AY37 1
25 AR26 SB_DQ25 SB_MA2 AP42 2
25 AR55 SA_DQ25 SA_MA2 AR38 2
26 AR25 SB_DQ26 SB_MA3 AR42 3
26 AM54 SA_DQ26 SA_MA3 AP36 3
27 AP25 SB_DQ27 SB_MA4 AR45 4
27 AK54 SA_DQ27 SA_MA4 AU39 4
28 AK26 SB_DQ28 SB_MA5 AP45 5
28 AL55 SA_DQ28 SA_MA5 AR36 5
29 AM26 SB_DQ29 SB_MA6 AW46 6
29 AK55 SA_DQ29 SA_MA6 AV40 6
30 AK25 SB_DQ30 SB_MA7 AY46 7
30 AR54 SA_DQ30 SA_MA7 AW39 7
31 AL25 SB_DQ31 SB_MA8 AY47 8
31 AN54 SA_DQ31 SA_MA8 AY39 8
32 AY23 SB_DQ32 SB_MA9 AU46 9
32 AY58 SA_DQ32 SA_MA9 AU40 9
33 AW23 SB_DQ33 SB_MA10 AK36 10
33 AW58 SA_DQ33 SA_MA10 AP35 10
34 AY21 SB_DQ34 SB_MA11 AV47 11
34 AY56 SA_DQ34 SA_MA11 AW41 11
35 AW21 SB_DQ35 SB_MA12 AU47 12
35 AW56 SA_DQ35 SA_MA12 AU41 12
36 AV23 SB_DQ36 SB_MA13 AK33 13
C 36 AV58 SA_DQ36 SA_MA13 AR35 13
37 AU23 SB_DQ37 SB_MA14 AR46 14 C
37 AU58 SA_DQ37 SA_MA14 AV42 14
38 AV21 SB_DQ38 SB_MA15 AP46 15
38 AV56 SA_DQ38 SA_MA15 AU42 15
39 AU21 SB_DQ39
39 AU56 SA_DQ39 40 AY19 SB_DQ40 SB_DQSN0 AW30 39
40 AY54 SA_DQ40 SA_DQSN0 AJ61 38 BI M_B_DQS0_DN
BI M_A_DQS0_DN 41 AW19 SB_DQ41 SB_DQSN1 AV26 39
41 AW54 SA_DQ41 SA_DQSN1 AN62 38 BI M_B_DQS1_DN
BI M_A_DQS1_DN 42 AY17 SB_DQ42 SB_DQSN2 AN28 39
42 AY52 SA_DQ42 SA_DQSN2 AM58 38 BI M_B_DQS2_DN
BI M_A_DQS2_DN 43 AW17 SB_DQ43 SB_DQSN3 AN25 39
43 AW52 SA_DQ43 SA_DQSN3 AM55 38 BI M_B_DQS3_DN
BI M_A_DQS3_DN 44 AV19 SB_DQ44 SB_DQSN4 AW22 39
44 AV54 SA_DQ44 SA_DQSN4 AV57 38 BI M_B_DQS4_DN
BI M_A_DQS4_DN 45 AU19 SB_DQ45 SB_DQSN5 AV18 39
45 AU54 SA_DQ45 SA_DQSN5 AV53 38 BI M_B_DQS5_DN
BI M_A_DQS5_DN 46 AV17 SB_DQ46 SB_DQSN6 AN21 39
46 AV52 SA_DQ46 SA_DQSN6 AL43 38 BI M_B_DQS6_DN
BI M_A_DQS6_DN 47 AU17 SB_DQ47 SB_DQSN7 AN18 39
47 AU52 SA_DQ47 SA_DQSN7 AL48 38 BI M_B_DQS7_DN
BI M_A_DQS7_DN 48 AR21 SB_DQ48
48 AK40 SA_DQ48 49 AR22 SB_DQ49 SB_DQSP0 AV30 39
49 AK42 SA_DQ49 SA_DQSP0 AJ62 38 BI M_B_DQS0_DP
BI M_A_DQS0_DP 50 AL21 SB_DQ50 SB_DQSP1 AW26 39
50 AM43 SA_DQ50 SA_DQSP1 AN61 38 BI M_B_DQS1_DP
BI M_A_DQS1_DP 51 AM22 SB_DQ51 SB_DQSP2 AM28 39
51 AM45 SA_DQ51 SA_DQSP2 AN58 38 BI M_B_DQS2_DP
BI M_A_DQS2_DP 52 AN22 SB_DQ52 SB_DQSP3 AM25 39
52 AK45 SA_DQ52 SA_DQSP3 AN55 38 BI M_B_DQS3_DP
BI M_A_DQS3_DP 53 AP21 SB_DQ53 SB_DQSP4 AV22 39
53 AK43 SA_DQ53 SA_DQSP4 AW57 38 BI M_B_DQS4_DP
BI M_A_DQS4_DP 54 AK21 SB_DQ54 SB_DQSP5 AW18 39
54 AM40 SA_DQ54 SA_DQSP5 AW53 38 BI M_B_DQS5_DP
BI M_A_DQS5_DP 55 AK22 SB_DQ55 SB_DQSP6 AM21 39
55 AM42 SA_DQ55 SA_DQSP6 AL42 38 BI M_B_DQS6_DP
BI M_A_DQS6_DP 56 AN20 SB_DQ56 SB_DQSP7 AM18 39
56 AM46 SA_DQ56 SA_DQSP7 AL49 38 BI M_B_DQS7_DP
BI M_A_DQS7_DP 57 AR20 SB_DQ57
57 AK46 SA_DQ57 58 AK18 SB_DQ58
B
58 AM49 SA_DQ58 SM_VREF_CA AP49
P0V75M_VREF_H 59 AL18 SB_DQ59 B
59 AK49 SA_DQ59 SM_VREF_DQ0 AR51 DDR_WR_VREF01
60 AM48 SA_DQ60 SM_VREF_DQ1 AP51 DDR_WR_VREF02
60 AK20 SB_DQ60
61 AK48 SA_DQ61
61 AM20 SB_DQ61
62 AM51 SA_DQ62
62 AR18 SB_DQ62
63 AK51 SA_DQ63
63 AP18 SB_DQ63

DDR CHANNEL B

DDR CHANNEL A

ITL_HSW_ULT_2C_BGA_1168P

ITL_HSW_ULT_2C_BGA_1168P P0V75S_DIMM0_VREF_CA
P0V75S_DIMM0_VREF_DQ
R4105 R4538
R4503 R4506
0.022UF_16V_2

1 2 1 2

0.022UF_16V_2
1 2 1 2 P0V75M_VREF_H
1

0_5%_2_DY

1
DDR_WR_VREF01 0_5%_2_DY
C4121

2_1%_2
1K_5%_2_DY

C4124
2_1%_2
D D S S
1

D D S S
R4539
Q4503

DIODES_DMG2302U_7_3P
A

0.1UF_16V_2_DY
A

2.2UF_6.3V_3_DY
G

R4136

100K_5%_2
1

1
Q4500

2
2

1 2

R4505

C4501
DDR_RST_EN
G

C4502
31 27 IN
2

G
DIODES_DMG2302U_7_3P 24.9_1%_2
P0V75S_DIMM1_VREF_DQ
24.9_1%_2
R4110

2
R4112 R4560 SLP_S3#_3R 1 R4511

1
642 59 57 51 43 28 26 24 16 2
IN
0.022UF_16V_2

1 2 1

470PF_50V_2
3.3K_5%_2
1

0_5%_2_DY

1
1

DDR_WR_VREF02
INVENTEC
C4122

C4500
2_1%_2 D D S S
1K_5%_2_DY
1
Q4504

R4561

R4111
G

1 2 TITLE

2
2

DDR_RST_EN MODEL,PROJECT,FUNCTION
G

31 27 IN MCP5-DDR
24.9_1%_2
DIODES_DMG2302U_7_3P
REFERENCE:4500~4949
2

DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 31 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D
U4555 HASWELL_MCP_E

70 PEG_RX0_C_DN IN
F10 PERn5_L0 USB2n0 AN8
BI USB_P0_DN 57
70 PEG_RX0_C_DP IN
E10 PERp5_L0 USB2p0 AM8
BI USB_P0_DP
USB3 DOCK
57

70 C4835 1 2 0.22UF_16V_2 PEG_TX0_DN C23 PETn5_L0 USB2n1 AR7 64

PEG_TX0_C_DN OUT BI USB_P1_DN USB3 PORT 1 (DEBUGPORT)
70 C4836 1 2 0.22UF_16V_2 PEG_TX0_DP C22 PETp5_L0 USB2p1 AT7 64
PEG_TX0_C_DP OUT BI USB_P1_DP
70 PEG_RX1_C_DN IN
F8 PERn5_L1 USB2n2 AR8
BI USB_P2_DN 46
70 PEG_RX1_C_DP IN
E8 PERp5_L1 USB2p2 AP8
BI USB_P2_DP
USB3 HUB 46

70 C4837 1 2 0.22UF_16V_2 PEG_TX1_DN B23 PETn5_L1 USB2n3 AR10 64

PEG_TX1_C_DN OUT BI USB_P3_DN CHARGER PORT
70 C4838 1 2 0.22UF_16V_2 PEG_TX1_DP A23 PETp5_L1 USB2p3 AT10 64
PEG_TX1_C_DP OUT BI USB_P3_DP
70 PEG_RX2_C_DN IN
H10 PERn5_L2 USB2n4 AM15
BI USB_P4_DN 49
70 PEG_RX2_C_DP IN
G10 PERp5_L2 USB2p4 AL15
BI USB_P4_DP
FINGER PRINTER 49

70 C4839 1 2 0.22UF_16V_2 PEG_TX2_DN B21 PETn5_L2 USB2n5 AM13

PEG_TX2_C_DN OUT BI USB_P5_DN TOUCH 44
70 C4840 1 2 0.22UF_16V_2 PEG_TX2_DP C21 PETp5_L2 USB2p5 AN13
PEG_TX2_C_DP OUT BI USB_P5_DP 44
C USB C
70 PEG_RX3_C_DN IN
E6 PERn5_L3 USB2n6 AP11
BI USB_P6_DN 44
70 PEG_RX3_C_DP IN
F6 PERp5_L3 USB2p6 AN11
BI USB_P6_DP
CAMERA 44

70 C4841 1 2 0.22UF_16V_2 PEG_TX3_DN B22 PETn5_L3 USB2n7 AR13 58

PEG_TX3_C_DN OUT BI USB_P7_DN SMART CARD
70 C4842 1 2 0.22UF_16V_2 PEG_TX3_DP A21 PETp5_L3 USB2p7 AP13 58
PEG_TX3_C_DP OUT BI USB_P7_DP
54 PCIE_RX3_C_DN IN G11 PERn3
54 PCIE_RX3_C_DP IN F11 PERp3 USB3Rn0 G20
IN USB30_RX0_DN 57
NIC USB3Rp0 H20
IN USB30_RX0_DP 57
54 C4834 1 2 0.1UF_16V_2 PCIE_TX3_DN C29 PETn3 USB3 DOCK
PCIE_TX3_C_DN OUT
54 C4831 1 2 0.1UF_16V_2 PCIE_TX3_DP B30 PETp3 USB3Tn0 C33 57
PCIE_TX3_C_DP OUT PCI USB3Tp0 B34
OUT USB30_TX0_DN
57
OUT USB30_TX0_DP
55 PCIE_RX4_C_DN IN F13 PERn4
55 PCIE_RX4_C_DP IN G13 PERp4 USB3Rn1 E18
IN USB30_RX1_DN 64
WLAN USB3Rp1 F18
IN USB30_RX1_DP 64
55 C4832 1 2 0.1UF_16V_2 PCIE_TX4_DN B29 PETn4 USB3 PORT 1
PCIE_TX4_C_DN OUT
55 C4833 1 2 0.1UF_16V_2 PCIE_TX4_DP A29 PETp4 USB3Tn1 B33 64
PCIE_TX4_C_DP OUT OUT USB30_TX1_DN
USB3Tp1 A33
OUT USB30_TX1_DP 64
46 USB30_RX2_DN IN G17 PERn1/USB3Rn2
46 USB30_RX2_DP IN F17 PERp1/USB3Rp2
USB3 HUB
B 46 USB30_TX2_DN OUT C30 PETn1/USB3Tn2 B
46 C31 PETp1/USB3Tp2 USBRBIAS* AJ10 1R4756 2
USB30_TX2_DP OUT
USBRBIAS AJ11 22.6_1%_2 RCOMP NEED CLOSED TO CPU AT 500MIL
64 USB30_RX3_DN IN F15 PERn2/USB3Rn3 RSVD AN10
64 USB30_RX3_DP IN G15 PERp2/USB3Rp3 RSVD AM10

CHARGER PORT 64 B31 PETn2/USB3Tn3 P3V3A

USB30_TX3_DN OUT
64 USB30_TX3_DP OUT A31 PETp2/USB3Tp3
OC0*/GPIO40 AL3
OUT LANLINK_STATUS
OC1*/GPIO41 AT1
OUT ISO_PREP# R4734 10K_5%_2
OC2*/GPIO42 AH2
OUT GPIO42 32 LANLINK_STATUS OUT 2 1
P1V05S 3K_1%_2 E15 RSVD OC3*/GPIO43 AV3 10K_5%_2
OUT GPIO43 32 R4857 2 1
R4812 E13 RSVD ISO_PREP# OUT
10K_5%_2
1 2 A27 PCIE_RCOMP 32 GPIO42 OUT R4737 1 2
1 2 B27 PCIE_IREF 32 1 2 10K_5%_2
0_5%_3 GPIO43 OUT R4778
R4811

RCOMP NEED CLOSED TO CPU AT 500MIL

ITL_HSW_ULT_2C_BGA_1168P

A A

REFERENCE:4700~4949
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP6-PCIE,USB
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 32 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3DS
C4767
1 2 RTC_X1

10M_5%_2
2

1
P3V3_RTC

4
3
18PF_50V_2

A2
C4766

2 R4862
1 2 X4750
32.768KHZ
1UF_6.3V_2 C4788
1 2 RTC_X2

2
1 R4834

1
C 3 2
D4750
D 20K_5%_2

1
18PF_50V_2

20K_5%_2

1UF_6.3V_2
BAT54C

2 R4845 1
D

1
1M_5%_2

C4764
U4555
HASWELL_MCP_E

2 R4833
P3V3AL_RTC_BAT
A1

2
R4832 1
2 AW5 RTCX1
1

1K_5%_2 56 33 OUT INTRUDER# AY5 RTCX2

1UF_6.3V_2

CN4750
AU6 INTRUDER* SATA_Rn0/PERn6_L3 J5 SATA_RX0_C_DN IN 45
C4768

1 2 INTVRMEN_R AV7 INTVRMEN SATA_Rp0/PERp6_L3 H5 SATA_RX0_C_DP IN 45

3 1 R4842 330K_5%_2 AV6 SRTCRST* RTC SATA_Tn0/PETn6_L3 B15 SATA_TX0_C_DN 45
HDD
G 1 OUT
4 G 2 2 RTCRST# AU7 RTCRST* SATA_Tp0/PETp6_L3 A15 SATA_TX0_C_DP OUT 45
2

1 R4876 2
ACES_50224_0020N_001_2P SATA_Rn1/PERn6_L2 J8 SATA_RX1_C_DN IN 45
330K_5%_2_DY SATA_Rp1/PERp6_L2 H8 SATA_RX1_C_DP IN 45
6012B0069907 SATA_Tn1/PETn6_L2 A17 SATA_TX1_C_DN OUT 45 MSATA
SATA_Tp1/PETp6_L2 B17 SATA_TX1_C_DP OUT 45
P1V05A
59
67 AZ_R3S_BITCLK OUT R4910 1 2 33_5%_2
AW8 HDA_BCLK/I2S0_SCLK SATA_Rn2/PERn6_L1 J6
59 AZ_R3S_SYNC OUT R4903 1 2 33_5%_2
AV11 HDA_SYNC/I2S0_SFRM SATA_Rp2/PERp6_L1 H6
59 AZ_R3S_RST# OUT R4901 1 2 33_5%_2
AU8 HDA_RST*/I2S_MCLK SATA_Tn2/PETn6_L1 B14
59 AZ_R3S_SDIN0 IN R4905 1 2 33_5%_2
AY10 HDA_SDI0/I2S0_RXD SATA_Tp2/PETp6_L1 C15
1

61
AU12 HDA_SDI1/I2S1_RXD 61
51_5%_2

51_5%_2

51_5%_2

2 33_5%_2 HDA_SDO/I2S0_TXD SATA_Rn3/PERn6_L0

2 R4807

2 R4886

2 R4891

67
59 1 AU11 F5
C AZ_R3S_SDOUT OUT R4869 IN PCIE_RX6_L0_C_DN C
HDA_SDO_RAW10 HDA_DOCK_EN*/I2S1_TXD SATA_Rp3/PERp6_L0 E5
IN PCIE_RX6_L0_C_DP
AV10 HDA_DOCK_RST*/I2S1_SFRM SATA_Tn3/PETn6_L0 C17 C4818 1 2 0.1UF_16V_2
PCIE_TX6_L0_DN
OUT PCIE_TX6_L0_C_DN
AY8 I2S1_SCLK SATA_Tp3/PETp6_L0 D17 C4819 1 2 0.1UF_16V_2
PCIE_TX6_L0_DP
OUT PCIE_TX6_L0_C_DP
1 2 P3V3S R4817 1
61
61
AUDIO R4818 10K_5%_2_DY 2 P3V3S
26 SATA0GP/GPIO34 V1 AMD_BIOS_SEL# 2 1 10K_5%_2
27
H_TRST# IN
R4807,R4886,R4891 SATA1GP/GPIO35 U1 R4826 10K_5%_2 IN MSATA_DET# 45
CAN BE OPENED FOR POWER CONSUMPTION SATA2GP/GPIO36 V6 NMI_SMI_DBG# IN 51
R4808
SATA3GP/GPIO37 AC1 GPIO37 33 IN P1V05S
2 1
AU62 PCH_TRST*
51_5%_2_DY
26 PCH_TCK IN AE62 PCH_TCK SATA_IREF A12
26 PCH_TDI IN AD61 PCH_TDI RSVD L11
26 PCH_TDO OUT AE61 PCH_TDO RSVD K10 R4852
26 PCH_TMS IN AD62 PCH_TMS JTAG SATA_RCOMP C12 L2 MAX. = 100 MILS 1 2 L1 MAX. = 500 MILS
AL11 RSVD SATALED* U3 3K_1%_2
R4816
AC4 RSVD
P3V3_RTC 26 AE63 JTAGX SATA
2 1 P3V3S
PCH_JTAG IN 10K_5%_2
AV2 RSVD OUT LED_3S_SATA# 58

1
TP30
1

1M_5%_2

1
TP30
R4831

TP4569
OUT INTRUDER# 33
B 56 P3V3S B
1

TP30 ITL_HSW_ULT_2C_BGA_1168P
3

TP4566
R4765
Q4831 NMI_SMI_DBG# 1 2
2

TP30
D

1 TP4567 10K_5%_2
WWAN_DET#IN G
AMD_BIOS_SEL# O 1GB
P3V3S
S

TP4568 AMD_BIOS_SEL# 1 2GB

SSM3K7002BFU P3V3A
33 GPIO37 2 R4820 1
2

LAYOUT NOTE:PLACE R4808 NEAR PCH OUT

43.2K_1%_2
LAYOUT NOTE:JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH
1

LAYOUT NOTE:JTAG_TDI TERMINATIONS NEED TO BE PLACED NEAR PCH

1K_5%_2

LAYOUT NOTE:JTAG_TDO TERMINATIONS NEED TO BE PLACED NEAR XDP 1 R4824 2

R4861

10K_5%_2_DY
22 S

58 51 IN BAT_GRNLED# 1R4863 2 1 G
10K_5%_2
Q4755
D

LES_LBSS84LT1G_SOT23_3P
A A
23
S

61 56 55 53 51 28 26 IN BUF_PLT_RST# 1 G

Q4754
D

LES_LBSS84LT1G_SOT23_3P

INVENTEC
3

HDA_SDO_R TITLE
MODEL,PROJECT,FUNCTION
MCP7-RTC,AUDIO,SATA
DOC.NUMBER REV
REFERENCE:4500~4949 SIZE
A3
CODE
CS
1310xxxxx-0-0 X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 33 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U4555 C4828
HASWELL_MCP_E XTAL24_IN 1 2

1 R4898 2

3
2
1M_5%_2
12PF_50V_2
X4751
24MHZ_12PF
C43 CLKOUT_PCIE_N0 XTAL24_IN A25 C4826
C42 CLKOUT_PCIE_P0 XTAL24_OUT B25 XTAL24_OUT 1 2

4
1
P3V3S GPIO18 IN U2 PCIECLKRQ0*/GPIO18 12PF_50V_2
RSVD K21 P1V05S
B41 CLKOUT_PCIE_N1 RSVD M21 R4892
R4707 1 2 GPIO18 A41 CLKOUT_PCIE_P1 DIFFCLK_BIASREF C26 XCLK_BIASREF 1 2 RCOMP NEED CLOSED TO CPU AT 500MIL
D 10K_5%_2 Y5 PCIECLKRQ1*/GPIO19 3K_1%_2
GPIO19 IN D
TESTLOW C35 CPU_TEST1 1 2 10K_5%_2
R4711 1 2 GPIO19 R4775
54 C41 CLKOUT_PCIE_N2 TESTLOW C34 CPU_TEST2 1 2 10K_5%_2
10K_5%_2 CLK_PCIE3_DN OUT R4791
54 B42 CLKOUT_PCIE_P2 TESTLOW AK8 CPU_TEST3 1 2 10K_5%_2
NIC CLK_PCIE3_DP OUT R4800
54 AD1 PCIECLKRQ2*/GPIO20 TESTLOW AL8 CPU_TEST4 1 2 10K_5%_2
R4798 1 2 CLKREQ_PCIE3_N CLKREQ_PCIE3_N IN R4801
10K_5%_2 CLK_KBC_SIO
55 CLK_PCIE4_DN OUT B38 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AN15 22_5%_2 2 1 R4774
OUT CLK_R3S_KBPCI 51
67
R4705 1 2 CLKREQ_PCIE4_N WLAN 55 C37 CLKOUT_PCIE_P3 CLKOUT_LPC_1 AP15
CLK_PCIE4_DP OUT OUT CLK_TPM_DEBUG
10K_5%_2 55 CLKREQ_PCIE4_N IN N1 PCIECLKRQ3*/GPIO21
R4712 1 2 CLKREQ_PCIE5_N CLKOUT_ITPXDP* B35
OUT CLK_PCIE_XDP_DN 26

10K_5%_2 CLK_PCIE5_DN OUT A39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P A35

OUT CLK_PCIE_XDP_DP 26
MARS CLK_PCIE5_DP OUT B39 CLKOUT_PCIE_P4
R4715 1 2 CLKREQ_PCIE6_L0_N U5 PCIECLKRQ4*/GPIO22
CLKREQ_PCIE5_N IN
10K_5%_2 CLOCK
61 CLK_PCIE6_L0_DN OUT B37 CLKOUT_PCIE_N5 SIGNALS
SD/MMC 61 A37 CLKOUT_PCIE_P5 P3V3S
CLK_PCIE6_L0_DP OUT
61 CLKREQ_PCIE6_L0_N IN T2 PCIECLKRQ5*/GPIO23 R4950
U4560 22_5%_2
22_5%_2 1 8 1 2
CLK_TPM_DEBUG IN R4777 2 CLK_R3S_TPM_R
CLKIN FBIN
67 1 2 7
CLK_R3S_TPM OUT CLK1 CLK4
1 2 CLK_R3S_DEBUG_R 3 6
ITL_HSW_ULT_2C_BGA_1168P CLK_R3S_DEBUG OUT CLK2 CLK3
R4773 22_5%_2 4 GND VDD 5

0.1UF_16V_2
1
IDT_IDT5V60034DCG8_SOP_8P
C C

C4581
2
U4555
HASWELL_MCP_E

26 CFG<0> IN AC60 CFG0 RSVD_TP AV63

26 CFG<1> IN AC62 CFG1 RSVD_TP AU63
26 CFG<2> IN AC63 CFG2
26 CFG<3> IN AA63 CFG3

RESERVED
26 CFG<4> IN AA60 CFG4 RSVD_TP C63
CFG<5> CFG5 RSVD_TP
1

26 Y62 C62
IN
1K_5%_2

CFG<6> CFG6 EDP_SPARE

R4523

26 Y61 B43
IN
B STRAPPING: 26 CFG<7> IN Y60 CFG7 B
DP ENABLE/DISABLE 26 CFG<8> IN V62 CFG8 RSVD_TP A51
26 CFG<9> IN V61 CFG9 RSVD_TP B51
0 : ENABLED 26 CFG<10> V60 CFG10
2

1K_1%_2_DY

IN
1

26 CFG<11> IN U60 CFG11 RSVD_TP L60

R4534

26 CFG<12> IN T63 CFG12

26 CFG<13> IN T62 CFG13 RSVD N60
26 CFG<14> IN T61 CFG14
R4520
26 CFG<15> IN T60 CFG15 RSVD W23
49.9_1%_2
2

RSVD Y22
26 CFG<16> IN AA62 CFG16 PROC_OPI_COMP AY15 1 2
26 CFG<18> IN U63 CFG18
26 CFG<17> IN AA61 CFG17 RSVD AV62
26 CFG<19> IN U62 CFG19 RSVD D58

1 2 V63 CFG_RCOMP VSS P22

VSS N21
R4519
49.9_1%_2
A5 RSVD
RSVD P20
E1 RSVD RSVD R20
RCOMP NEED CLOSED TO CPU AT 500MIL D1 RSVD
J20 RSVD
H18 RSVD
1 2 B12 TD_IREF
TD_IREF
A R4841 A
8.2K_5%_2
ITL_HSW_ULT_2C_BGA_1168P

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP8-CLOCK,RESERVED
DOC.NUMBER REV
REFERENCE:4500~4949 SIZE
A3
CODE
CS
1310xxxxx-0-0 X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 34 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

R4902 1 RSC_0603_DY
2 P1V05S
P1V05A
R4941
D D S S P1V05A_MODPHY 1 2
RSC_0603_DY
Q4505

G
DIODES_DMG2302U_7_3P

G
MPHY_PRW_EN IN

P1V05A
D
P1V05S D
L4854
1 2

1UF_6.3V_2_DY
2.2UH_20% C4765
1

1
10UF_6.3V_3

1 2
1UF_6.3V_2

C4760
0.1UF_16V_2
U4555 HASWELL_MCP_E
C4785

C4786

1UF_6.3V_2 C4761
2 1 K9 VCCHSIO
L10 VCCHSIO RTC C4746
P3V3A
2

2
M9 VCCHSIO 1UF_6.3V_2
mPHY P3V3_RTC
N8 VCCIO VCCSUS3_3 AH11 2 1
P9 VCCIO VCCRTC AG10
L4865 P1V05A_USB3PLL B18 VCCUSB3PLL DCPRTC AE7 2 1

0.1UF_16V_2
P1V05A_SATA3PLL

1UF_6.3V_2
VCCSATA3PLL

1
1 2 B11
C4712
P3V3A
1

0.1UF_16V_2
10UF_6.3V_3

2.2UH_20%
1UF_6.3V_2

SPI

C4709

C4710
Y20 VCCAPLL OPI VCCSPI Y8 C4753 1 2 0.1UF_16V_2
C4792

C4790

P1V05S_APLLOPI AA21 VCCAPLL

W21 VCCAPLL

2
P1V05A VCCASW AG14
P1V05M
2

USB3 VCCASW AG13

P1V05S
R4850 C4758 2 1 1UF_6.3V_2

C
1 2 J13 DCPSUS3 C
P3V3S VCC1P05 J11
0_5%_2_DY VCC1P05 H11

10UF_6.3V_3
C4730
AXALIA/HDA CORE

1
P1V05S

1UF_6.3V_2

1UF_6.3V_2
1 2 AH14 VCCHDA VCC1P05 H15
R4858
VCC1P05 AE8

C4751

C4718

C4721
1 2
1UF_6.3V_2 VRM/USB2/AZALIA VCC1P05 AF22
10UF_6.3V_3_DY

R4875
DCPSUS2 DCPSUSBYP P1V05M
1

1 2AH13 AG19
0_5%_3
1UF_6.3V_2

DCPSUSBYP AG20
P3V3DS P3V3A 0_5%_2_DY

2
VCCASW
C4787

C4789

22UF_6.3V_5_DY
AE9
2 R4927 VCCASW AF9
P1V05A

1
1
P3V3DSW

1UF_6.3V_2
0_5%_2
AC9 VCCSUS3_3 GPIO/LCC VCCASW AG8 R4877

C4729
AA9 VCCSUS3_3 DCPSUS1 AD10 1 2
2

2 R4935 VCCDSW3_3 DCPSUS1

C4716
1 AH10 AD8 0_5%_2_DY
0_5%_2_DY V8 Vcc3_3 P1V5S
2 1 C4728
W9 Vcc3_3 THERMAL SENSOR

2
1UF_6.3V_2 VCCTS1_5 J15 0.1UF_16V_2 1 2 C4763

1
1UF_6.3V_2
P3V3S Vcc3_3 K14
P3V3S
Vcc3_3

C4714
K16
C4935 0.1UF_16V_2 1 2
P1V05S 2 1
C4717
L4850
22UF_6.3V_5
ICC P3V3S
1 2 P1V05S_AXCK_DCB J18 VCC1P05 SDIO/PLSS

2
R4701
2.2UH_20% K19 VCC1P05 VCCSDIO U8 1 2
1

1
10UF_6.3V_3

P1V05S_SSCF100 A20 VCCACLKPLL VCCSDIO T9 0_5%_2

1UF_6.3V_2

B P1V05S J17 VCCCLK 1 2 B

C4754

C4723

P1V05S R21 VCCCLK 1UF_6.3V_2 C4762 P1V05A

SUS OSCILLATOR
T21 VCCCLK R4855
K18 VCCCLK DCPSUS4 AB8 1 2
2

M20 VCCCLK 0_5%_2_DY

1UF_6.3V_2

1UF_6.3V_2
C4719

P3V3A V21 VCCCLK

C4720

TP4703
AE20 VCCSUS3_3 VCCAPLL AC20 1
P1V05S
AE21 VCCSUS3_3 USB2 VCCIO AG16
TP24
LPT LP POWER VCCIO AG17 1 2
1

P1V05S 1UF_6.3V_2
22UF_6.3V_5

C4701
2

C4700

L4851
1 2
1

1
10UF_6.3V_3

2.2UH_20% ITL_HSW_ULT_2C_BGA_1168P
1UF_6.3V_2

2
C4755

C4724
2

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP9-POWER

REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 35 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

ROUTE VCCSENSE WITH 27.4OHM IMPEDANCE

PVCORE
U4555 HASWELL_MCP_E

P1V5 L59 RSVD VCC C36

D J58 RSVD VCC C40
PVCCIO_OUT_R 1 R4568
2 VCC C44 D

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
VDDQ VCC

1
AH26 C48
0_5%_2_DY
VDDQ VCC

C4542

C4536

C4532

C4537

C4540
AJ31 C52

C4547

C4548
P1V05S AJ33 VDDQ VCC C56

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3
1 R4569
AJ37 VDDQ VCC E23

1
2
0_5%_2
AN33 VDDQ VCC E25
C4527 VDDQ VCC

C4515

C4528

C4516

C4525

C4526

C4990
AP43 E27

2
P1V05S_VCCP AR48 VDDQ VCC E29
AY35 VDDQ VCC E31
AY40 VDDQ HSW ULT POWER VCC E33
4.7UF_6.3V_3

2
1

AY44 VDDQ VCC E35

AY50 VDDQ VCC E37
C4555

PVCORE VCC E39

F59 VCC VCC E41
N58 RSVD VCC E43
RSVD VCC

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
P1V05S_VCCP AC58 E45
2

R4521 2

1
1
P1V05S_VCCP 100_1%_2
VCC E47

C4539

C4530

C4521

C4529

C4544

C4538
14 VCCSENSE OUT E63 VCC_SENSE VCC E49
AB23 RSVD VCC E51
PVCCIO_OUT_R VCCIO_OUT VCC
2 R4524 1

R4821 1

A59 E53
130_1%_2
75_1%_2

VCCIOA_OUT E20 VCCIOA_OUT VCC E55

2
R4524 CLOSE TO CPU AD23 RSVD VCC E57
C
AA23 RSVD VCC F24
C
R4525 AE59 RSVD VCC F28
14 43_5%_2 VCC F32
2

VR_SVID_ALERT# OUT 2 1 L62 VIDALERT* VCC F36

P1V05S_VCCP N63 VIDSCLK VCC F40
14 VR_SVID_CLK OUT
14 VR_SVID_DATA OUT L63 VIDSOUT VCC F44
26 VCCST_PWRGD B59 VCCST_PWRGD VCC F48
2

IN
VR_EN_HASWELL
150_5%_2

36 16 IN F60 VR_EN VCC F52

VR_READY_HASWELL VR_READY VCC
R4590

36 C59 F56
IN

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
VCC

1
G23
VSS VCC

C4522

C4533

C4531

C4535

C4534
D63 G25

C4549
PWR_DEBUG H59 PWR_DEBUG VCC G27
1

P62 VSS VCC G29

IN PWR_DEBUG 26 36 1 P60 RSVD_TP VCC G31
TP4562 1 P61 RSVD_TP VCC G33

2
TP4563
TP4564
1 N59 RSVD_TP VCC G35
TP4565
1 N61 RSVD_TP VCC G37
T59 RSVD VCC G39
AD60 RSVD VCC G41
AD59 RSVD VCC G43
AA59 RSVD VCC G45
AE60 RSVD VCC G47
AC59 RSVD VCC G49

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5
B RSVD VCC B

1
AG58 G51
RSVD VCC

C4545

C4559

C4560
P1V05S_VCCP U59 G53

C4561
V59 RSVD VCC G55
VCC G57
AC22 VCCST VCC H23
10UF_6.3V_3_DY

AE22 VCCST VCC J23

2
PVCORE AE23 VCCST VCC K23
1

VCC K57
C4590

AB57 VCC VCC L22

AD57 VCC VCC M23
AG57 VCC VCC M57
C24 VCC VCC P57
2

C28 VCC VCC U57

C32 VCC VCC W57

ITL_HSW_ULT_2C_BGA_1168P
P1V05S
OUT VR_EN_HASWELL 36
16
10K_5%_2_DY
1

10K_5%_2
R4513

R4593

A A
2

R4594
16 1 2 36
VGATE IN OUT VR_READY_HASWELL
0_5%_2

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
REFERENCE:4500~4949 CODE
MCP10-POWER
DOC.NUMBER REV
SIZE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 36 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

HASWELL_MCP_E HASWELL_MCP_E U4555

HASWELL_MCP_E U4555 HASWELL_MCP_E
U4555 U4555
VSS H17
A11 VSS VSS AJ35 AP22 VSS VSS AV59
D33 VSS VSS H57
D34 VSS VSS J10 DC_TEST_AY2_AW2 AY2 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ A3 DC_TEST_A3_B3
A14 VSS VSS AJ39 AP23 VSS VSS AV8
D35 VSS VSS J22 DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ A4 TP_DC_TEST_A4
A18 VSS VSS AJ41 AP26 VSS VSS AW16
D37 VSS VSS J59 TP_DC_TEST_AY60 AY60 DAISY_CHAIN_NCTF_
A24 VSS VSS AJ43 AP29 VSS VSS AW24
D38 VSS VSS J63 DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ A60 TP_DC_TEST_A60
A28 VSS VSS AJ45 AP3 VSS VSS AW33
D39 VSS VSS K1 DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ A61 DC_TEST_A61_B61
A32 VSS VSS AJ47 AP31 VSS VSS AW35
D41 VSS VSS K12 DC_TEST_A3_B3 B2 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ A62 DC_TEST_B62_B63
A36 VSS VSS AJ50 AP38 VSS VSS AW37
D42 VSS VSS L13 DC_TEST_A3_B3 B3 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ AV1 TP_DC_TEST_AV1
A40 VSS VSS AJ52 AP39 VSS VSS AW4
D43 VSS VSS L15 DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ AW1 DC_TEST_AY2_AW2
A44 VSS VSS AJ54 AP48 VSS VSS AW40
D45 VSS VSS L17 DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ AW2 DC_TEST_AY2_AW2
A48 VSS VSS AJ56 AP52 VSS VSS AW42
D46 VSS VSS L18 B63 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ AW3 DC_TEST_AY3_AW3
A52 VSS VSS AJ58 AP54 VSS VSS AW44
D47 VSS VSS L20 DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ AW61 DC_TEST_AY61_AW61
D
A56 VSS VSS AJ60 AP57 VSS VSS AW47
D49 VSS VSS L58 C2 DAISY_CHAIN_NCTF_ DAISY_CHAIN_NCTF_ AW62 DC_TEST_AY62_AW62
AA1 VSS VSS AJ63 AR11 VSS VSS AW50
D5 VSS VSS L61 DAISY_CHAIN_NCTF_ AW63 DC_TEST_AY62_AW62 D
AA58 VSS VSS AK23 AR15 VSS VSS AW51
D50 VSS VSS L7
AB10 VSS VSS AK3 AR17 VSS VSS AW59
D51 VSS VSS M22 ITL_HSW_ULT_2C_BGA_1168P
AB20 VSS VSS AK52 AR23 VSS VSS AW60
D53 VSS VSS N10
AB22 VSS VSS AL10 AR31 VSS VSS AY11
D54 VSS VSS N3
AB7 VSS VSS AL13 AR33 VSS VSS AY16
D55 VSS VSS P59
AC61 VSS VSS AL17 AR39 VSS VSS AY18
D57 VSS VSS P63
AD21 VSS VSS AL20 AR43 VSS VSS AY22
D59 VSS VSS R10
AD3 VSS VSS AL22 AR49 VSS VSS AY24
D62 VSS VSS R22
AD63 VSS VSS AL23 AR5 VSS VSS AY26
D8 VSS VSS R8
AE10 VSS VSS AL26 AR52 VSS VSS AY30
E11 VSS VSS T1
AE5 VSS VSS AL29 AT13 VSS VSS AY33
E17 VSS VSS T58
AE58 VSS VSS AL31 AT35 VSS VSS AY4
F20 VSS VSS U20
AF11 VSS VSS AL33 AT37 VSS VSS AY51
F26 VSS VSS U22
AF12 VSS VSS AL36 AT40 VSS VSS AY53
F30 VSS VSS U61
AF14 VSS VSS AL39 AT42 VSS VSS AY57
F34 VSS VSS U9
AF15 VSS VSS AL40 AT43 VSS VSS AY59
F38 VSS VSS V10
AF17 VSS VSS AL45 AT46 VSS VSS AY6
F42 VSS VSS V3
AF18 VSS VSS AL46 AT49 VSS VSS B20
F46 VSS VSS V7
AG1 VSS VSS AL51 AT61 VSS VSS B24
F50 VSS VSS W20
AG11 VSS VSS AL52 AT62 VSS VSS B26
F54 VSS VSS W22
AG21 VSS VSS AL54 AT63 VSS VSS B28
F58 VSS VSS Y10
AG23 VSS VSS AL57 AU1 VSS VSS B32
F61 VSS VSS Y59
C AG60 VSS VSS AL60 AU16 VSS VSS B36
G18 VSS VSS Y63 C
AG61 VSS VSS AL61 AU18 VSS VSS B4
G22 VSS
AG62 VSS VSS AM1 AU20 VSS VSS B40
G3 VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44
G5 VSS VSS V58
AH17 VSS VSS AM23 AU24 VSS VSS B48
G6 VSS VSS AH46
AH19 VSS VSS AM31 AU26 VSS VSS B52
G8 VSS VSS V23
AH20 VSS VSS AM52 AU28 VSS VSS B56
AH22 VSS VSS AN17 AU30 VSS VSS B60
H13 VSS VSS_SENSE E62
OUT VSSSENSE 14
AH24 VSS VSS AN23 AU33 VSS VSS C11 VSS AH16
ROUTE VSSSENSE WITH 27.4OHM IMPEDANCE

100_1%_2
AH28 VSS VSS AN31 AU51 VSS VSS C14

R4522
ITL_HSW_ULT_2C_BGA_1168P
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27

2
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
B
AH57 VSS VSS AN52 AV39 VSS VSS D23
B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31

ITL_HSW_ULT_2C_BGA_1168P U4555 HASWELL_MCP_E

ITL_HSW_ULT_2C_BGA_1168P
RSVD N23
RSVD R23

SPARE
AT2 RSVD RSVD T23
AU44 RSVD RSVD U10
AV44 RSVD
D15 RSVD RSVD AL1
RSVD AM11
F22 RSVD RSVD AP7
H22 RSVD RSVD AU10
J21 RSVD RSVD AU15
RSVD AW14
RSVD AY14
A A

ITL_HSW_ULT_2C_BGA_1168P

INVENTEC
REFERENCE:4500~4949 TITLE
MODEL,PROJECT,FUNCTION
MCP11-GND,DAISY CHAIN,RESERVE
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 37 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

31 M_A_A<15..0> BI 0 98
CN4100
A0 DQ0 5
BI M_A_DQ<8> 31
1 97 7
96
A1 DQ1
15
BI M_A_DQ<9> 31
2 A2 DQ2 BI M_A_DQ<10> 31
3 95 17
A3 DQ3 BI M_A_DQ<11> 31
4 92 4
A4 DQ4
6
BI M_A_DQ<12> 31
F 5 91 F
A5 DQ5
16
BI M_A_DQ<13> 31
6 90 A6 DQ6
18
BI M_A_DQ<14> 31
7 86 A7 DQ7
21
BI M_A_DQ<15> 31
8 89 A8 DQ8
23
BI M_A_DQ<24> 31
9 85 A9 DQ9 BI M_A_DQ<25> 31
10 107 33
A10_AP DQ10 BI M_A_DQ<26> 31
11 84 35
A11 DQ11 BI M_A_DQ<27> 31
12 83 22
A12 DQ12 BI M_A_DQ<28> 31
13 119 24
A13 DQ13 BI M_A_DQ<29> 31
14 80 34
A14 DQ14 BI M_A_DQ<30> 31
15 78 36
A15 DQ15 BI M_A_DQ<31> 31
39
DQ16 BI M_A_DQ<40> 31
109 41
M_A_BS0 IN
31
108
BA0 DQ17
51
BI M_A_DQ<41> 31
M_A_BS1 IN
31
79
BA1 DQ18
53
BI M_A_DQ<42> 31
M_A_BS2 IN
31
114
BA2 DQ19
40
BI M_A_DQ<43> 31
M_CS#0 IN
31
121
S0# DQ20
42
BI M_A_DQ<44> 31
P1V5 31 M_CS#1 IN 101
S1# DQ21
50
BI M_A_DQ<45> 31
31 M_CLK_DDR0_DP IN CK0 DQ22 BI M_A_DQ<46> 31
103 52
31 M_CLK_DDR0_DN IN CK0# DQ23 BI M_A_DQ<47> 31
P3V3A 102 57
31 M_CLK_DDR1_DP IN CK1 DQ24 BI M_A_DQ<50> 31
31 104 59
M_CLK_DDR1_DN IN CK1# DQ25 BI M_A_DQ<51> 31

0.1UF_16V_2
1
R4117 73 67
31 M_CKE0 IN CKE0 DQ26 BI M_A_DQ<55> 31

C4550
1 2 38
OUT M_ODT0 74 69
31 M_CKE1 IN 115
CKE1 DQ27
56
BI M_A_DQ<49> 31
64.9_1%_2 31 M_A_CAS# IN CAS# DQ28 BI M_A_DQ<52> 31
110 58
R4118
31 M_A_RAS# IN 113
RAS# DQ29
68
BI M_A_DQ<53> 31
P1V5 1 2 38
31 M_A_WE# IN WE# DQ30 BI M_A_DQ<54> 31

2
OUT M_ODT1

220K_5%_2
197 70
SA0_DIM0 OUT

1
38 SA0 DQ31 BI M_A_DQ<48> 31
201 129

R4114
3 2 64.9_1%_2 38 SA1_DIM0 OUT SA1 DQ32 BI M_A_DQ<0> 31
202 131
58 50 39 28 26 PCH_3S_SMCLK IN M_A_DQ<1> 31
D S
R4119 200
SCL DQ33
141
BI
E 1 2
OUT M_ODT2 39
26 PCH_3S_SMDATA IN SDA DQ34
143
BI M_A_DQ<2> 31 E
DQ35 BI M_A_DQ<3> 31

G
1 U4100 5 116 130
64.9_1%_2 38 M_ODT0 IN M_A_DQ<4> 31

2
n.c. VCC Q4100 ODT0 DQ36 BI
2 BSS138LT1 120 132
27 DDR_PG_CTRL IN A
R4120
38 M_ODT1 IN ODT1 DQ37 BI M_A_DQ<5> 31

1
3 4 140
GND Y 1 2
OUT M_ODT3 39
DQ38 BI M_A_DQ<6> 31

2M_5%_2_DY
11 142

1
DM0 DQ39
147
BI M_A_DQ<7> 31
28

R4115
64.9_1%_2 DM1 DQ40 BI M_A_DQ<20> 31
NXP_74AUP1G07GW_TSSOP5_5P 46 149
DM2 DQ41
157
BI M_A_DQ<18> 31
63 DM3 DQ42
159
BI M_A_DQ<17> 31
136 DM4 DQ43
146
BI M_A_DQ<16> 31
153
M_A_DQ<21> 31

2
170
DM5 DQ44
148
BI
16
DM6 DQ45 BI M_A_DQ<19> 31
OUT DDR_VTT_PG_CTRL 187 158
DM7 DQ46
160
BI M_A_DQ<22> 31
12
DQ47
163
BI M_A_DQ<23> 31
31 M_A_DQS1_DP BI DQS0 DQ48 BI M_A_DQ<32> 31
31 29 165
M_A_DQS3_DP BI 47
DQS1 DQ49
175
BI M_A_DQ<33> 31
31 M_A_DQS5_DP BI DQS2 DQ50 BI M_A_DQ<35> 31
31 64 177
M_A_DQS6_DP BI 137
DQS3 DQ51
164
BI M_A_DQ<39> 31
31 M_A_DQS0_DP BI DQS4 DQ52 BI M_A_DQ<36> 31
31 154 166
M_A_DQS2_DP BI 171
DQS5 DQ53
174
BI M_A_DQ<37> 31
31 M_A_DQS4_DP BI DQS6 DQ54 BI M_A_DQ<38> 31
31 188 176
M_A_DQS7_DP BI 10
DQS7 DQ55
181
BI M_A_DQ<34> 31
31 M_A_DQS1_DN BI DQS#0 DQ56 BI M_A_DQ<63> 31
31 27 183
M_A_DQS3_DN BI 45
DQS#1 DQ57
191
BI M_A_DQ<62> 31
31 M_A_DQS5_DN BI DQS#2 DQ58 BI M_A_DQ<60> 31
31 62 193
M_A_DQS6_DN BI 135
DQS#3 DQ59
180
BI M_A_DQ<61> 31
31 M_A_DQS0_DN BI DQS#4 DQ60 BI M_A_DQ<58> 31
D 31 152 182 D
M_A_DQS2_DN BI 169
DQS#5 DQ61
192
BI M_A_DQ<59> 31
31 M_A_DQS4_DN BI DQS#6 DQ62 BI M_A_DQ<57> 31
31 186 194
M_A_DQS7_DN BI DQS#7 DQ63 BI M_A_DQ<56> 31
FOX_AS0A626_U4R6_7H_HP_204P

6026B0216701
P1V5

75 CN4100 44
VDD1 VSS16
76 VDD2 VSS17 48
81 49

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3
2.2UF_6.3V_3
VDD3 VSS18

1
1

1
330UF_2.5V
P0V75M_VREF 82 VDD4 VSS19 54

C4113

C4117

C4118

C4115

C4109
C4106

C4146
P1V5 87 VDD5 VSS20 55
P0V75S_DIMM0_VREF_CA P0V75M_VREF

+
88 VDD6 VSS21 60
P1V5 93 61
P0V75S_DIMM0_VREF_DQ VDD7 VSS22
94 VDD8 VSS23 65
1.8K_1%_2
2

2
2

2
R4104 99 VDD9 VSS24 66
1 2 100 71
1.8K_1%_2
2

VDD10 VSS25
R4106

R4107 105 72
0_5%_2_DY 1 2 VDD11 VSS26
106 127
R4108

10UF_6.3V_3
VDD12 VSS27

1
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
0_5%_2_DY 111 VDD13 VSS28 128

C4108

C4114

C4116

C4112

C4107
1

112 VDD14 VSS29 133

117 134
1

VDD15 VSS30
C 118 VDD16 VSS31 138 C
1.8K_1%_2
2

123 VDD17 VSS32 139

P3V3S

2
124 144
1.8K_1%_2
2

VDD18 VSS33
R4122

VSS34 145
199 150
R4109

VDDSPD VSS35
VSS36 151
1

77 NC1 VSS37 155

122 156
2.2UF_6.3V_3
1

NC2 VSS38
0.1UF_16V_2
1

125 NCTEST VSS39 161

C4105

VSS40 162
C4104

198 167
39 PM_EXTTS#1_R OUT 30
EVENT# VSS41
168
27 DDR3_DRAMRST#OUT RESET# VSS42
172
VSS43
2

VSS44 173
1 VREF_DQ VSS45 178
126 VREF_CA VSS46 179
VSS47 184
VSS48 185
2 VSS1 VSS49 189
P0V75S_DIMM0_VREF_DQ 3 VSS2 VSS50 190
8 VSS3 VSS51 195
9 VSS4 VSS52 196
13 VSS5
14

2.2UF_6.3V_3
VSS6 P0V75S

0.1UF_16V_2
1
1
19 VSS7

C4120
20 VSS8

C4119
25 VSS9
B 26 VSS10 VTT1 203 B
31 VSS11 VTT2 204

2
2
32 VSS12
37 VSS13 G1 G1
38 VSS14 G2 G2
43 VSS15

1
FOX_AS0A626_U4R6_7H_HP_204P

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
C4100

C4103

C4102

C4101
P3V3S

P0V75S_DIMM0_VREF_CA
10K_5%_2_DY
1

2
R4103

NOTE:

2.2UF_6.3V_3

0.1UF_16V_2
1

1
IF SA0_DIM0=0 , SA1_DIM0=0 C4111
2

C4110
SO-DIMMA SPD ADDRESS IS 0XA0
SO-DIMMA TS ADDRESS IS 0X30 IN SA0_DIM0 38
2

2
IN SA1_DIM0 38

IF SA0_DIM0=1 , SA1_DIM0=0
SO-DIMMA SPD ADDRESS IS 0XA2
1

1
10K_5%_2

10K_5%_2

SO-DIMMA TS ADDRESS IS 0X32

R4101

R4100

A A

INVENTEC
2

REFERENCE NUMBER:4100~4299
TITLE

MODEL,PROJECT,FUNCTION
DDR3_SO-DIMM0

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 38 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

F F
31 M_B_A<15..0> BI 0 98 CN4125
A0 DQ0 5
BI M_B_DQ<8> 31
1 97 7
96
A1 DQ1
15
BI M_B_DQ<14> 31
2
95
A2 DQ2
17
BI M_B_DQ<10> 31
3 A3 DQ3
4
BI M_B_DQ<11> 31
4 92 A4 DQ4
6
BI M_B_DQ<12> 31
5 91 A5 DQ5
16
BI M_B_DQ<9> 31
6 90 A6 DQ6
18
BI M_B_DQ<13> 31
7 86 A7 DQ7
21
BI M_B_DQ<15> 31
8 89 A8 DQ8
23
BI M_B_DQ<29> 31
9 85 A9 DQ9 BI M_B_DQ<28> 31
10 107 33
84
A10_AP DQ10
35
BI M_B_DQ<26> 31
11
83
A11 DQ11
22
BI M_B_DQ<27> 31
12
119
A12 DQ12
24
BI M_B_DQ<25> 31
13
80
A13 DQ13
34
BI M_B_DQ<24> 31
14
78
A14 DQ14
36
BI M_B_DQ<30> 31
15 A15 DQ15
39
BI M_B_DQ<31> 31
109
DQ16
41
BI M_B_DQ<40> 31
31 IN M_B_BS0 108
BA0 DQ17
51
BI M_B_DQ<41> 31
P1V5
P0V75M_VREF 31 IN M_B_BS1 79
BA1 DQ18
53
BI M_B_DQ<47> 31
P0V75S_DIMM1_VREF_DQ
31 IN M_B_BS2 114
BA2 DQ19
40
BI M_B_DQ<43> 31
31 IN M_CS#2 121
S0# DQ20
42
BI M_B_DQ<44> 31
31 IN M_CS#3 101
S1# DQ21
50
BI M_B_DQ<45> 31
31 M_CLK_DDR2_DP IN CK0 DQ22 BI M_B_DQ<46> 31

1.8K_1%_2
2
31 103 52
R4134 M_CLK_DDR2_DN IN
102
CK0# DQ23
57
BI M_B_DQ<42> 31
1 2 31 M_CLK_DDR3_DP IN CK1 DQ24 BI M_B_DQ<56> 31

R4132
0_5%_2_DY 31 104 59
M_CLK_DDR3_DN IN
73
CK1# DQ25
67
BI M_B_DQ<57> 31
E 31 M_CKE2 IN 74
CKE0 DQ26
69
BI M_B_DQ<58> 31 E
31 M_CKE3 IN CKE1 DQ27 BI M_B_DQ<59> 31

1
115 56
31 M_B_CAS# IN 110
CAS# DQ28
58
BI M_B_DQ<60> 31
31 M_B_RAS# IN 113
RAS# DQ29
68
BI M_B_DQ<61> 31
31 M_B_WE# IN WE# DQ30 BI M_B_DQ<62> 31

1.8K_1%_2
2
197 70
39 SA0_DIM1 OUT 201
SA0 DQ31
129
BI M_B_DQ<63> 31
39 SA1_DIM1 OUT SA1 DQ32 BI M_B_DQ<0> 31

R4131
202 131
38
58
28
50
26 PCH_3S_SMCLK IN 200
SCL DQ33
141
BI M_B_DQ<1> 31
PCH_3S_SMDATA IN
26 SDA DQ34
143
BI M_B_DQ<7> 31
DQ35 BI M_B_DQ<3> 31

1
116 130
38 M_ODT2 IN 120
ODT0 DQ36
132
BI M_B_DQ<4> 31
38 M_ODT3 IN ODT1 DQ37
140
BI M_B_DQ<5> 31
DQ38
142
BI M_B_DQ<2> 31
11
28
DM0 DQ39
147
BI M_B_DQ<6> 31
DM1 DQ40
149
BI M_B_DQ<20> 31
46 DM2 DQ41
157
BI M_B_DQ<21> 31
63 DM3 DQ42
159
BI M_B_DQ<22> 31
136 DM4 DQ43
146
BI M_B_DQ<23> 31
153 DM5 DQ44
148
BI M_B_DQ<16> 31
170 DM6 DQ45
158
BI M_B_DQ<17> 31
187 DM7 DQ46 BI M_B_DQ<19> 31
160
12
DQ47
163
BI M_B_DQ<18> 31
31 M_B_DQS1_DP BI DQS0 DQ48 BI M_B_DQ<32> 31
31 29 165
M_B_DQS3_DP BI 47
DQS1 DQ49
175
BI M_B_DQ<33> 31
31 M_B_DQS5_DP BI DQS2 DQ50 BI M_B_DQ<34> 31
31 64 177
M_B_DQS7_DP BI 137
DQS3 DQ51
164
BI M_B_DQ<35> 31
31 M_B_DQS0_DP BI DQS4 DQ52 BI M_B_DQ<36> 31
31 154 166
D M_B_DQS2_DP BI 171
DQS5 DQ53
174
BI M_B_DQ<37> 31 D
31 M_B_DQS4_DP BI DQS6 DQ54 BI M_B_DQ<38> 31
31 188 176
M_B_DQS6_DP BI 10
DQS7 DQ55
181
BI M_B_DQ<39> 31
31 M_B_DQS1_DN BI DQS#0 DQ56 BI M_B_DQ<55> 31
31 27 183
M_B_DQS3_DN BI 45
DQS#1 DQ57
191
BI M_B_DQ<51> 31
31 M_B_DQS5_DN BI DQS#2 DQ58 BI M_B_DQ<50> 31
31 62 193
M_B_DQS7_DN BI 135
DQS#3 DQ59
180
BI M_B_DQ<53> 31
31 M_B_DQS0_DN BI DQS#4 DQ60 BI M_B_DQ<52> 31
31 152 182
M_B_DQS2_DN BI 169
DQS#5 DQ61
192
BI M_B_DQ<49> 31
31 M_B_DQS4_DN BI 186
DQS#6 DQ62 BI M_B_DQ<54> 31
31 194
M_B_DQS6_DN BI DQS#7 DQ63 BI M_B_DQ<48> 31
FOX_AS0A626_U4R6_7H_HP_204P

P1V5 6026B0216701
75 CN4125 44
VDD1 VSS16
76 48

330UF_2.5V_DY
VDD2 VSS17

2.2UF_6.3V_3
81 49

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3
1 VDD3 VSS18

1
82 54
C4131

VDD4 VSS19

C4147

C4143

C4140

C4141

C4134

C4133
87 55
+

VDD5 VSS20
88 VDD6 VSS21 60
93 VDD7 VSS22 61
94 65
2

VDD8 VSS23
2

2
99 VDD9 VSS24 66
100 VDD10 VSS25 71
C 105 VDD11 VSS26 72 C
P3V3S 106 VDD12 VSS27 127

10UF_6.3V_3
0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
111 128
1

1
VDD13 VSS28

C4132
112 VDD14 VSS29 133
C4136

C4135

C4142

C4139
117 VDD15 VSS30 134

2.2UF_6.3V_3

0.1UF_16V_2
118 138

1
VDD16 VSS31
123 139

C4130
VDD17 VSS32
124 144

C4129
2

2
VDD18 VSS33
VSS34 145
199 VDDSPD VSS35 150
151

2
VSS36
P3V3S 77 NC1 VSS37 155
R4200 122 NC2 VSS38 156
1 2 125 NCTEST VSS39 161
10K_5%_2 VSS40 162
198 167
38 PM_EXTTS#1_R OUT 30
EVENT# VSS41
168
38 27 DDR3_DRAMRST#OUT RESET# VSS42
172
VSS43
VSS44 173
P3V3S 1 VREF_DQ VSS45 178
126 VREF_CA VSS46 179
VSS47 184
VSS48 185
2 VSS1 VSS49 189
1

10K_5%_2

P0V75S_DIMM1_VREF_DQ 3 VSS2 VSS50 190

R4126

8 VSS3 VSS51 195

9 VSS4 VSS52 196
B 13 VSS5 B
14 VSS6
2.2UF_6.3V_3
2

0.1UF_16V_2

19
1

VSS7
20 P0V75S
C4145

VSS8
IN SA1_DIM1 39 25
C4144

VSS9
26 VSS10 VTT1 203
IN SA0_DIM1 39 31 VSS11 VTT2 204
32
2

VSS12

1
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
37 VSS13 G1 G1
38 G2
1

10K_5%_2

VSS14 G2
43
R4125

C4128

C4127

C4126

C4125
VSS15
P0V75S_DIMM0_VREF_CA FOX_AS0A626_U4R6_7H_HP_204P

2
2

2.2UF_6.3V_3

0.1UF_16V_2
1

1
C4137

C4138

NOTE:
2

SO-DIMMB SPD ADDRESS IS 0XA4

SO-DIMMB TS ADDRESS IS 0X34

A A

INVENTEC
TITLE

REFERENCE NUMBER:4100~4299 MODEL,PROJECT,FUNCTION

DDR3_SO-DIMM0

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 39 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

C C

B
RESERVED B

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DPB DEMUX1 TO DP
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 40 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

C C

B
RESERVED B

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DPC DEMUX2 TO VGA
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 41 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

CRT_R 1 R7500 2
3393 3355 OUT CRT_R_L
0_5%_2

CSC0402_DY

CSC0402_DY
1

1
PIN 2 R3062 R3061

C7571

C7548
C3069
C3070
P1V5_VDD
PIN 5 R3065 R3063 P3V3S P3V3S_DVDD33

2
C3077
C3061
PIN 8
C3062 1
L3065
2
OSC_OUT
C3071 FOR EMI

0.01UF_50V_2
1 2

0.1UF_16V_2
0.01UF_50V_2

1UF_6.3V_2
1

1
BLM15BB470SS1

1
1

1
1UF_6.3V_2
PIN 11 C3073

C3090

C3091
P3V3S_DVDD33 20PF_50V_2

2
3
D CRT_G R7501

C3085
1 2
OUT CRT_G_L

C3065

C3066
PIN 14 R3064 R3080 0_5%_2 D

CSC0402_DY

CSC0402_DY
X3065
C3074

1
P1V5_VDD 27MHZ

C7572

C7549
2
2

2
2

2
PIN 15 R3078

4
1
C3072
PIN 16 R3067 L3068 OSC_IN 1 2
1 2

2
4.7UF_6.3V_3
R3074
PIN 17 R3079 1 2 20PF_50V_2

1
SWF2520CF_4R7K_M
10K_5%_2_DY

C3092
PIN 27 L3066 R3075 P1V5_VDD
1 2
C3087 0_5%_2
R3076 R3081 2
PIN 35 C3068 R3081 1 2 1
P3V3S_DVDD33 P3V3S_AVDD33 CRT_B

2
1 R7502 2
10K_5%_2 C3067 0_5%_2 OUT CRT_B_L
PIN 36 R3077 1 R3077 2 2 1 0_5%_2

CSC0402_DY

CSC0402_DY
1
0.1UF_16V_2

1
0_5%_2_DY
PIN 37 R3074 R3076

C7573

C7550
1 L3067 2 C3068
2 1

0.01UF_50V_2
PIN 38 10K_DY R3075 BLM15BB470SS1
1

1
1UF_6.3V_2
C3090 2.2UF_6.3V_3_DY

C3089
C3091
C3088

2
1 R3092 2
C PIN 39 L3068 0_5%_2
C

40
39
38
37
36
35
34
33
32
31
U3065
C3092
2

S3
S2

S0

LDOCAP_DIG

NC4
OSC_OUT
VDDD33_CORE

OSC_IN

RED
S1
PIN 40 R3092

1 30 2 R3068 1
VDDA33_AUX RSET P3V3S_DVDD33
2 LDOCAP_AUX NC3 29 1.2K_1%_2 CRT_R
42A6 41A1 IN DPC_PORT_CLK_AUX_DP C3075 1 2 0.1UF_16V_2 DPC_PORT_CLK_AUX_C1_DP 3 AUX_P GRN 28 CRT_G L3066
42A6 41A1 IN DPC_PORT_DATA_AUX_DN C3076 1 2 0.1UF_16V_2 DPC_PORT_DATA_AUX_C1_DN 4 AUX_N VDDA33_DAC 27 2 1
5 PRX BLU 26 CRT_B
DPC0_PORT_DP 6 25 CRT_HSYNC_R 1 R3090 2 33_1%_2 CRT_HSYNC BLM15BB470SS1_DY
41C3 IN ML0_P HSYNC OUT 64C5
DPC0_PORT_DN 24 CRT_VSYNC_R 1 2 33_1%_2 CRT_VSYNC

1
41C3 7 64C5
IN ML0_N VSYNC OUT

0.1UF_16V_2_DY
C3087
8 NC1 NC2 23 R3091
41B3 IN DPC1_PORT_DP 9 ML1_P DDC_SDA 22 CRT_DDCDATA OUT 64C5
41B3 IN DPC1_PORT_DN 10 ML1_N VDDD33_IO 21 CRT_DDCCLK OUT 64C5
P1V5_VDD

VDDA33_DP

DDC_SCL

2
RST_N
CLK_O

TRSTn

GND
HPD

TDO
TMS
TCK

TDI
NXP_PTN3393BS_HVQFN_40P
B B

12
13
14
15
16
17
118
119
20
R3061

1 11

41
1 2
10K_5%_2 1
TP3069

1UF_6.3V_2_DY
C3073
C3069
0.01UF_50V_2

P3V3S_DVDD33
0.1UF_16V_2

1 2
1

TP3067
TP3068
TP30
TP30
TP30

0.01UF_50V_2_DY
C3061

C3062

1 R3062 2 P3V3S_DVDD33

2
0_5%_2_DY
C3070

1
1 2 2 2 1 1 1 R3067 2

0.1UF_16V_2
2

C3093
R3065 12K_5%_DY 10K_5%_2
2.2UF_6.3V_3_DY 1 2
R3078

1
10K_5%_2

TP30

TP30
P3V3S_DVDD33

2
TP3065

TP3066
1 R3063 2
0_5%_2
2 1
41C3 IN DPC_PORT_HPD
C3077 0.1UF_16V_2
2 R3071 1
100K_5%_2
P3V3S_DVDD33

A A
1 R3064 2
0_5%_2_DY
R3080
42C8 41A1 IN DPC_PORT_CLK_AUX_DP 1 2
0_5%_2
R3079
42C8 41A1 IN DPC_PORT_DATA_AUX_DN 1 2
1

0_5%_2
0.1UF_16V_2_DY

INVENTEC
C3074

CHECK IF DEMUX NOT NEED R3079,R3080

TITLE
2

MODEL,PROJECT,FUNCTION
DP TO VGA CONVERTER
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 42 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P5V0A

10K_5%_2
1
R3305
D P5V0A 30 DPB0_PORT_DP 1 2 C3300 0.1UF_16V_2 DPB0_PORT_C_DP 1
CN3300
IN 2
1

30
2 D
DPB0_PORT_DN 1 2 C3301 0.1UF_16V_2 DPB0_PORT_C_DN 3
30 IN 0.1UF_16V_2
3
DPB1_PORT_DP DPB1_PORT_C_DP 4

1
1 2

10K_5%_2
IN C3307 4

2
5

R3303
5
30 DPB1_PORT_DN 1 2 0.1UF_16V_2 DPB1_PORT_C_DN 6
30 IN IN C3306 6
DP_EN 30 DPB2_PORT_DP 1 2 C3302 0.1UF_16V_2 DPB2_PORT_C_DP 7
IN 8
7
8
Q3300 30
2 1 S1 DPB2_PORT_DN 1 2 C3303 0.1UF_16V_2 DPB2_PORT_C_DN 9
30 IN 0.1UF_16V_2
9
G1 2 DPB3_PORT_DP IN C3305 1 2 DPB3_PORT_C_DP10 10
30 6 11
DDC_EN IN 30 0.1UF_16V_2
11
3 D1
D2 DPB3_PORT_DN IN C3304 1 2 DPB3_PORT_C_DN12 12
G2 5 13 13
4 14 14
S2 15
L2N7002DW1T1G 30 DPB_PORT_CLK_AUX_DP IN 15
16 16
30 17 G1
DPB_PORT_DATA_AUX_DN IN 18
17 G1
G2
43 DPB_PORT_HPD OUT 18 G2
19 19 G3 G3
P3V3S_DP 20 20 G4 G4
TAIWIN_DP004_206CRL_TW_20P
P3V3S TMP121112006

1
1M_5%_2

5.1M_5%_2
C C

R3304

R3302
U3300
1 GND VOUT 8
2 VIN VOUT 7 DGND_CHASSIS3
3 VIN VOUT 6

2
4 5
IN EN_EN# FLG#
64 59 57 51 31 28 26 24 16 SLP_S3#_3R
ROHM_BD82022FVJ_E2_MSOP_8P

1UF_6.3V_2
1
C3311

10UF_6.3V_3

1UF_6.3V_2
1

1
C3310

C3308
DISPLAY PORT

2
B B

IN DPB_PORT_HPD 43

100K_5%_2_DY
P5V0S

2 R3306 1
3

Q3301
D

1 G
S

BSS138LT1
2

A IN DPD_HPD 30 A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
REFERENCE NUMBER:3300~3399 CRT & DP
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 43 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3S P3V3S_LCDVDD

1 R3001 2
100_5%_2

1
C3003

4.7UF_6.3V_3
U3000

2
5 IN OUT 1
1

2
1UF_6.3V_2

GND
C3006

4 DIS EN 3
IN LVDS_VDD_EN30
CHECK IF TOUCH PANEL NEED OTHER POWER RAIL

100K_5%_2
D
NUVO_NCT3521U_SOT23_5P D

R3003 1
CN3000
G1
2

G
L7501 1 1
32 USB_P5_DN_L 2
USB_P5_DN IN 4 3 2
TOUCH PANEL 32 USB_P5_DP_L 3
USB_P5_DP IN 1 2 3
4 4
WCM_2012_900T
2
5 5
6 6
7 7
30 1 2 C3014 0.1UF_16V_2 EDP_TX1_C_DN 8
EDP_TX1_DN IN C3013 0.1UF_16V_2
8
30 1 2 EDP_TX1_C_DP 9
EDP_TX1_DP IN 9
10 10
30 1 2 C3012 0.1UF_16V_2 EDP_TX0_C_DN 11
EDP_TX0_DN IN C3011 0.1UF_16V_2
11
30 1 2 EDP_TX0_C_DP 12
EDP_TX0_DP IN 12
13 13
30 1 2 C3010 0.1UF_16V_2 EDP_AUX_C_DP 14
EDP_AUX_DP IN C3009 0.1UF_16V_2
14
30 1 2 EDP_AUX_C_DN 15
EDP_AUX_DN IN 15
16 16
17
P3V3S_LCDVDD 17
18 18
19

2
19
D3000 20 20
21

NC
21
C BKLT_EN C
62 51 LID_SW#_3 IN 3 1 22
23
22
P3V3S 30 INV_PWM IN 23
24 24
BAT54_30V_0.2A 25
59 DMIC_CLK OUT 25
1 R3009
30 L_BKLT_EN IN 2 59 DMIC_DAT OUT 26 26
2K_5%_2 27 27

100K_5%_2

1
28 28

1
1 R3023 2 29
P5V0S TOUCH_RST# IN 29

C2255
2 R3008
30

0.1UF_16V_2
30 CAMERA_ON IN 0_5%_2_DY 30
31 31
32

4.7UF_6.3V_3
L7500 32

0.1UF_16V_2
3 USB_P6_DP_L

1UF_6.3V_2
1

1
32 33
USB_P6_DP

2
BI 4 33
32 USB_P6_DN BI 1 2 USB_P6_DN_L 34 34

C2251

C2250

C2256
35 35
WCM_2012_900T 36 36
37 37
38
PVBAT

2
38
39 39
40 40
G G2
30 EDP_HPD# OUT
ACES_50203_0400T_001_40P
B 6012B0431203 B

100K_5%_2
1
R3021
2
25~34 WEBCAM
35~36 LOGO LIGHT

A A

INVENTEC
TITLE
REFERENCE NUMBER:3000~3049 MODEL,PROJECT,FUNCTION
LCM & WEBCAM
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 44 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P1V5S

1 R1702
1 R1701

0.01UF_50V_2

0.01UF_50V_2

0.01UF_50V_2

0.01UF_50V_2
0_5%_2_DY R1703
CN1700

1
1 GND
0.01UF_50V_2 C1705 SATA_TXP0_O

C1711

C1712

C1713

C1714
45 1 2 2
SATA_C_TXP0_O

7 4.7K_5%_2_DY

10 4.7K_5%_2_DY
IN A+

1
45
0.01UF_50V_2 1 2 C1704 SATA_TXN0_O 3
SATA_C_TXN0_O IN A-
4 GND
0.01UF_50V_2
45 SATA_C_RXN0_O OUT
1 2 C1702 SATA_RXN0_O 5 B-
0.01UF_50V_2
45 SATA_C_RXP0_O OUT
1 2 C1703 SATA_RXP0_O 6

2
B+
C1710 7 GND

2
2
2
1 2 8 V3.3
1.3A 9 V3.3
1UF_6.3V_2 29 10
1 R1704 2 DEVSLP0 OUT V3.3
11 GND
0_5%_2_DY

8
9
12 GND
13
P5V0S GND

VDD_15

B_PRE-I2C_ADDR0

I2C_EN#
EN

A_PRE-I2C_ADDR1
U1700 14 V5
D 15 V5
PARADE_PS8520ATQFN20GTR_TQFN_20P 16 V5 D

1
17 GND

C1701
18

4.7UF_6.3V_3
RESERVED
19
C1706 1 2 0.01UF_50V_2 SATA_RX0_DP 5 11 SATA_C_RXP0_O 45
GND
SATA_RX0_C_DP OUT OUT 20
2 0.01UF_50V_2
B_OUTP B_INP
C1707 1 SATA_RX0_DN 4 12 SATA_C_RXN0_O 45
V12
SATA_RX0_C_DN OUT B_OUTN B_INN OUT 21 V12 G G1
3 13
22 G2
2 0.01UF_50V_2
GND GND
SATA_TX0_DN 2 SATA_C_TXN0_O

2
C1708 1 V12 G
14 45
SATA_TX0_C_DN IN IN
2 0.01UF_50V_2
A_INN A_OUTN
C1709 1 SATA_TX0_DP 1 15 SATA_C_TXP0_O 45 ALLTOP_C166CS_12201_L_22P
SATA_TX0_C_DP IN A_INP A_OUTP IN

B_PRE1-SDA_CTL
A_PRE1-SCL_CTL
6012B0323101

VDD_15
EPAD

REXT

TEST
P1V5S
SATA HDD CONNECTOR

20
19
18
17
16
21
1 R1705 2
4.7K_5%_2_DY

0_5%_2_DY
1
R1706 2

R1951
1
4.7K_5%_2_DY
C 1 R1707 2 C
4.7K_5%_2_DY
REFERENCE NUMBER:1700~1749

2
R1709
1 2 1 R1708 2
4.7K_5%_2_DY CN1951 P3V3S
4.3K_1%_2 1 GND1
3 SLOT C_KEY M 2
GND2 3.3VAUX1
5 PERn3 3.3VAUX2 4
7 PERp3 NC1 6

4.7UF_6.3V_3
9 GND3 NC2 8

1
11 PETp3 DAS/DSS# 10

C1956
13 PETn3 3.3VAUX3 12
15 GND4 3.3VAUX4 14
17 PERn2 3.3VAUX5 16
19 PERp2 3.3VAUX6 18

2
21 GND5 NC3 20
23 PETp2 NC4 22
25 PETn2 NC5 24
27 GND6 NC6 26
29 PERn1 NC7 28
31 PERp1 NC8 30
33 GND7 NC9 32
B 35 PETn1 NC10 34 B
37 PETp1 NC11 36
39 38 29
GND8 DEVSLP IN DEVSLP1
33 C1950 1 2 0.01UF_50V_2 SATA_RX1_DP 41 40
SATA_RX1_C_DP OUT PERn0/SATA-B+ NC12
33 C1951 1 2 0.01UF_50V_2 SATA_RX1_DN 43 42
SATA_RX1_C_DN OUT 45
PERp0/SATA-B- NC13
44
GND9 NC14
33 C1952 1 2 0.01UF_50V_2 SATA_TX1_DN 47 46
SATA_TX1_C_DN IN PETn0/SATA-A- NC15
33 C1953 1 2 0.01UF_50V_2 SATA_TX1_DP 49 48
SATA_TX1_C_DP IN 51
PETp0/SATA-A+ NC16
50
GND10 PERST#/NC
53 REFCLKN CLKREQ#/NC 52
55 REFCLKP PEWake#/NC 54
57 GND11 NC17 56
NC18 58

KEY KEY

KEY KEY

KEY KEY

KEY KEY

A A
68 1 TP1951
R1953 NC19 SUSCLK
33 1 2 69 70
MSATA_DET# OUT 71
PEDET 3.3VAUX7
72
TP30
GND12 3.3VAUX8
0_5%_2_DY 73 GND13 3.3VAUX9 74
75 GND14
67
GND15
GND16
0_5%_2_DY
1
R1952

LOTES_APCI0020_P001A01_75P
INVENTEC
2

G2
G1

M TYPE TITLE
MODEL,PROJECT,FUNCTION
REFERENCE NUMBER:1950~1999 6026B0240301 SATA HDD & M-SATA
DOC.NUMBER
CONN.

REV
NGFF SSD SIZE
A3
CODE
CS
1310xxxxx-0-0
SHEET
X01

CHANGE by XXX DATE 21-OCT-2002 45 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3A
10K_5%_2
1 R2560 2
C2578 U2550
1 2 48 2 56
GPIO2(VBUS) USB2DN_DM1 OUT USB_D_P1_DN WWAN(USB2)
1 56
0.01UF_50V_2
USB2DN_DP1 OUT USB_D_P1_DP
Upstream
32 54 7
USB_P2_DN IN USB2UP_DM USB3DN_RXDM1 OUT USB30_D_RX1_DN
32 53 6
USB_P2_DP IN USB2UP_DP USB3DN_RXDP1 OUT USB30_D_RX1_DP
0.1UF_16V_2
C2567 0.1UF_16V_2 USB3DN_TXDM1 4
OUT USB30_D_TX1_DN
32 1 2 USB30_RX2_C_DN 56 3
USB30_RX2_DN IN C2568 USB3UP_TXDM USB3DN_TXDP1 OUT USB30_D_TX1_DP
32 1 2 USB30_RX2_C_DP 55
USB30_RX2_DP IN USB3UP_TXDP
C2569
D 32 USB30_TX2_DN OUT 1 2 C2570 USB30_TX2_C_DN 59 USB3UP_RXDM
32 1 2 USB30_TX2_C_DP 58 D
USB30_TX2_DP OUT USB3UP_RXDP
0.1UF_16V_2 USB2DN_DM2 10
OUT USB_D_P2_DN 55
0.1UF_16V_2 P3V3A USB2DN_DP2 9
OUT USB_D_P2_DP 55 BT(USB2)
R2557 R2559
1 2 1 2
15
0_5%_2_DY 10K_5%_2
USB3DN_RXDM2 OUT USB30_D_RX2_DN
37 14
GPIO12/SM_DAT USB3DN_RXDP2 OUT USB30_D_RX2_DP
38 GPIO13/SM_CLK
12
R2558 R2556 USB3DN_TXDM2 OUT USB30_D_TX2_DN

Downstream
1 2 1 2 11
USB3DN_TXDP2 OUT USB30_D_TX2_DP
10K_5%_2 0_5%_2_DY
Reset
P3V3A

100K_5%_2
50 RESET#

2
R2550
18 47
Bias/Test
USB2DN_DM3 OUT USB_D_P3_DN
17 47
USB2DN_DP3 OUT USB_D_P3_DP
64 RBIAS

0.1UF_16V_2_DY
R2571 49

1 1
TEST
13 1 2 60 23 47
1V2A_PG IN ATEST USB3DN_RXDM3 OUT USB30_D_RX3_DN USB UP3

1
2

12K_1%_2

10K_5%_2

10K_5%_2
22 47
USB3DN_RXDP3 OUT USB30_D_RX3_DP

C2565

R2553

R2554

R2555
0_5%_2
20 47
USB3DN_TXDM3 OUT USB30_D_TX3_DN
C USB3DN_TXDP3 19
OUT USB30_D_TX3_DP 47 C

2
1
Clock
C2566
2 1 62 XTALI/CLK_IN
HUB_XTAL_IN

25MHZ_10PF
25 47
USB2DN_DM4 OUT USB_D_P4_DN

3
2
10PF_50V_2 USB2DN_DP4 24
OUT USB_D_P4_DP 47

X2500
HUB_XTAL_OUT 61 30
OUT USB30_D_RX4_DN 47
XTALO USB3DN_RXDM4
29 USB UP4
P3V3A USB3DN_RXDP4 OUT USB30_D_RX4_DP 47
P3V3A

4
1
C2550
10K_5%_2_DY

2 1 27 47
USB3DN_TXDM4 OUT USB30_D_TX4_DN
26 47
USB3DN_TXDP4 OUT USB30_D_TX4_DP
10K_5%_2_DY

R2590 10PF_50V_2
1

1
1
1

R2570
0.1UF_16V_2_DY

0_5%_2_DY
R2581

R2580
C2590

1 2 R2591
1 2 40 SPI_CLK/GPIO4
1 R2575 2 41
10K_5%_2

SPI_DO/GPIO5
10K_5%_2_DY
0_5%_2_DY 42 P3V3A
2

2
2

SPI_DI
2

39 Port Power Control

SPI_CE_N
PRT_CTL1/GPIO8 36
OUT PRTPWR1
OUT PRTPWR2

1
35

10K_5%_2

10K_5%_2

10K_5%_2

10K_5%_2
PRT_CTL2/GPIO9
B B
OUT PRTPWR3

R2561

R2562

R2563

R2564
PRT_CTL3/GPIO10 33 47
R2573 2
1
Power
PRT_CTL4/GPIO11 32
OUT PRTPWR4 47
0_5%_2_DY
5 VDD12
U2551 8 OCS / JTAG / UART

2
1 8 1 R2572 2 VDD12
A0 VCC
13 46
2 A1 WP 7 0_5%_2_DY
VDD12 TCK/GPIO1 IN OCS_N1
21 47
3 A2 SCL 6 VDD12 TMS/GPIO3 IN OCS_N2
28 44 47
4 GND SDA 5 VDD12 TDI/GPIO6 IN OCS_N3
31 43
P1V2A VDD12 TDO/GPIO7 IN OCS_N4 47
51 VDD12 R2574
ATMEL_AT24C08BN_SOIC_8P_DY 57 45 1 2
VDD12 TRST/GPIO0

0.1UF_16V_2_DY

0.1UF_16V_2_DY

0.1UF_16V_2_DY

0.1UF_16V_2_DY
P3V3A

1
16 VDD33 10K_5%_2

1
34 VDD33

C2580

C2581

C2582

C2583
L2550 52
P3VA_D_L (89.5MA) VDD33

TP2550

TP2552

TP2553

TP2554
1 2 63

TP30 TP2551
4.7UF_6.3V_3

VDD33
SWF2520CF_4R7K_M
1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
1

1
4.7UF_6.3V_3

65 GND(FLAG)
C2551

C2553

C2554

C2555

C2556

2
C2552

SMSC_USB5534B_4100JZX_TR_QFN_64P

TP30

TP30

TP30

TP30
2

A A

P1V2A
P3V3A
(885.6MA)
REF
1
0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

100UF_6.3V_DY
1

2550~2599
C2571
+
C2557

C2558

C2559

C2560

C2561

C2562

C2563

C2564

INVENTEC
2
2

TITLE
MODEL,PROJECT,FUNCTION
USB3.0 HUB
C2569 RESEVE FOR THAT IF USB3.0 SSC FAIL DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 46 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P5V0A_USB1
1.8A
P5V0A_USB1
D
D

0.1UF_16V_2
1
C2400
P5V0A

22UF_6.3V_5
1
C2403
U2400

2
1 GND VOUT 8
2 VIN VOUT 7
3 VIN VOUT 6

2
4 5 46
PRTPWR3 IN EN_EN# FLG# OUT OCS_N3 1 CN2400
L2400 1
ROHM_BD82022FVJ_E2_MSOP_8P USB_D_P3_L_DN 2
22UF_6.3V_5_DY

46 4 3
46 USB_D_P3_DN BI 2
46 1 2 USB_D_P3_L_DP 3
USB_D_P3_DP
1UF_6.3V_2

BI 3
1

4 4
C2405

C2404

46
WCM_2012_900T 5
USB30_D_RX3_DN OUT 6
5
G1
46 USB30_D_RX3_DP OUT 6 G
0.1UF_16V_2 7 7 G G2
46 C2401 1 2 USB30_D_TX3_C_DN 8 G3
USB30_D_TX3_DN IN 8 G
2

46 C2402 1 2 USB30_D_TX3_C_DP 9 G4
USB30_D_TX3_DP IN 9 G

0.1UF_16V_2 SINGA_2UB4006_180101F_9P
C TMP121023001 C

USB WALK UP1

DGND_CHASSIS2

P5V0A_USB3
1.8A
P5V0A_USB3

0.1UF_16V_2
1
P5V0A

C2420
U2420
1 GND VOUT 8
22UF_6.3V_5

2
B B
1
2 VIN VOUT 7
C2423

3 VIN VOUT 6
4 5 46
PRTPWR4 IN EN_EN# FLG# OUT OCS_N4
ROHM_BD82022FVJ_E2_MSOP_8P 1 CN2420
22UF_6.3V_5_DY

L2420 1
46 4 3 USB_D_P4_L_DN 2
USB_D_P4_DN
2

BI
1UF_6.3V_2

2
1

1 2 USB_D_P4_L_DP 3
USB_D_P4_DP BI 3
C2425

C2424

4 4
WCM_2012_900T 5
USB30_D_RX4_DN OUT 6
5
G1
USB30_D_RX4_DP OUT 6 G
0.1UF_16V_2 7 7 G G2
USB30_D_TX4_C_DN
2

C2421 1 2 8 G3
USB30_D_TX4_DN IN 8 G
C2422 1 2 USB30_D_TX4_C_DP 9 G4
USB30_D_TX4_DP IN 9 G

0.1UF_16V_2 SINGA_2UB4006_180101F_9P

TMP121023001

USB WALK UP3 DGND_CHASSIS2

DGND_CHASSIS3

A A

REFERENCE NUMBER:2400~2499
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
USB & USB CHARGER
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 47 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P5V0A_USB2

R2511 R2515 R2514

TPS2543 20K 10K NI
2
R2512
1
17.8K_1%_2
REFERENCE NUMBER:2500~2599

22UF_6.3V_5
1
R2511 2

C2413
1
TPS2540/A 20K_5%_2 P5V0DS_DB
PI5USB2543 NI NI 0

2
U2410
1 8
P5V0DS_DB GND VOUT
2 VIN VOUT 7
P5V0DS_DB DGND_USB DGND_USB 3 VIN VOUT 6
4 5 DGND_USB
SLP_S4#_3R_DB IN EN_EN# FLG#

0.1UF_16V_2
D

1
64 48 ROHM_BD82022FVJ_E2_MSOP_8P

22UF_6.3V_5_DY
D

C2513
DGND_USB
P5V0A_USB_CHARGE
2

10K_5%_2

1UF_6.3V_2
1

1
17
16
15
14
13
R2515

C2415

C2414
C2512
U2511 2.5A 1 + 2

ILIM_LO

FAULT#
PWPD

GND
2

ILIM_HI
100UF_6.3V
1

2
1 IN OUT 12 DGND_USB
DGND_USB 2 11
USB_P3_DN_DB BI 3
DM_OUT DM_IN
10
BI USB_P3_CH_DN_DB P5V0A_USB2
USB_P3_DP_DB BI 4
DP_OUT DP_IN
9
BI USB_P3_CH_DP_DB
ILIM_SET STATUS#
DGND_USB 1.8A
0_5%_2_DY
2
R2514

CTL1
CTL2
CTL3
P5V0DS_DB TEXAS_TPS2546RTER_QFN_16P

EN
DGND_USB

0.1UF_16V_2
CPPWR_EN_DB

1
IN

5
6
7
8
1

C2410
1

SLP_S4#_3R_DB 64 P5V0A_USB_CHARGE
0.1UF_16V_2

IN
C2514

IN SLP_S3#_3R_DB 64
DGND_USB
2

2
1
0.1UF_16V_2
C2503
C C
DGND_USB 1 CN2410
L2410 DGND_USB 1
USB_P1_L_DN_DB 2
USB_P1_DN_DB

2
64 BI 1 2 2
USB_P1_L_DP_DB 3
64 USB_P1_DP_DB BI 4 3
4
3
4
WCM_2012_900T 5
64 USB30_RX1_DN_DB OUT 6
5
G1
L2500 DGND_USB 1 CN2500
USB30_RX1_DP_DB OUT 6 G
S3051 S3052 1 64
0.1UF_16V_2 7 G2
3 4 USB_P3_L_DN_DB 2 7 G
USB_P3_CH_DN_DB BI 2
C2411 1 2 USB30_TX1_C_DN_DB 8 G3
2 1 USB_P3_L_DP_DB 3 64 USB30_TX1_DN_DB IN 8 G
SCREW300_600_1P SCREW280_0_0_1P USB_P3_CH_DP_DB BI 3
C2412 1 2 USB30_TX1_C_DP_DB 9 G4
4 4 64 USB30_TX1_DP_DB IN 9 G
WCM_2012_900T
1

5 0.1UF_16V_2 SINGA_2UB4006_180101F_9P
USB30_RX3_DN_DB OUT 6
5
G1
USB30_RX3_DP_DB OUT 6 G
TMP121023001
0.1UF_16V_2 7 7 G G2
C2500 1 2 USB30_TX3_C_DN_DB 8 G3
USB30_TX3_DN_DB IN 8 G
C2501 1 2 USB30_TX3_C_DP_DB 9 G4 DGND_USB
USB30_TX3_DP_DB IN 9 G
DGND_USB
DGND_USB S3050 DGND_USB S3053 0.1UF_16V_2
SINGA_2UB4006_180101F_9P

SCREW300_600_1P SCREW280_0_0_1P
TMP121023001
USB CHARGER
1

B B
DGND_USB
DGND_USB
DGND_USB DGND_USB

VGA_R_L2_DB
64 1 L3051 2 120NH,5%
CRT_R_DB IN
VGA_G_L2_DB
64 1 L3052 2 120NH,5%
CRT_G_DB IN
VGA_B_L2_DB
64 1 L3053 2 120NH,5%
CRT_B_DB IN
1 CN3050
1
2 2
12PF_50V_2

12PF_50V_2

12PF_50V_2

3
1

3
1

12PF_50V_2

12PF_50V_2

12PF_50V_2

4
C3051

C3052

C3053

1
75_1%_2

75_1%_2

75_1%_2

4
5
R3051

R3052

R3053

C3054

C3055

C3056

P5V0S_CRTVDD 5
P5V0S_CRTVDD 6 6
7 7
8
2

8
4.7K_5%_2
2

R3059 9
2

9
2 1
10 10
2 R3060 1 4.7K_5%_2 11 11
12 G1
CRT_DDCDATA_DB BI 12 G
DGND_USB DGND_USB DGND_USB DGND_USB DGND_USB DGND_USB 13 G2
CRT_HSYNC_DB BI 13 G
DGND_USB DGND_USB DGND_USB 14
A CRT_VSYNC_DB BI 14
A
P5V0S_CRTVDD 15
CRT_DDCCLK_DB BI 15

P5V0DS_DB SUYIN_M195001HR015M205ZR_15P
U3051 6012B0503901
1
2
GND
VIN
VOUT
VOUT
8
7 REFERENCE NUMBER:3050~3099
1

3 VIN VOUT 6 FIX2400 FIX2401

DGND_USB
SLP_S3#_3R_DB IN 4 EN_EN# FLG# 5 DGND_USB

CRT
C3058
1UF_6.3V_2

FIX_MASK FIX_MASK
1

64 48 ROHM_BD82022FVJ_E2_MSOP_8P
0.1UF_16V_2
INVENTEC
C3357

1
2

DGND_USB TITLE
2

FIX2402 FIX2403
MODEL,PROJECT,FUNCTION
USB CONN.
DGND_USB FIX_MASK FIX_MASK DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
1

A3 CS
DGND_USB
CHANGE by XXX DATE 21-OCT-2002 SHEET 48 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3A P3V3DS

2
R2210 R2211
0_5%_2 0_5%_2_DY

VCC_FPR

1
4.7UF_6.3V_3

0.1UF_16V_2
1

1
C2201

C2200
D
D

2
2

10K_5%_2
R2201
1
CN2200
28 FPR_OFF IN 1 1
29 FPR_LOCK# IN 2 2
3 3
32 4
USB_P4_DP BI 4
32 5 G1
USB_P4_DN BI 5 G1

1
6 G2

10K_5%_2
6 G2
D2201

R2200
2
3 ACES_51571_0064N_001_6P
1
6012B0481801

2
PHP_PESD5V2S2UT_SOT23_3P_DY
C C

FINGER PRINT CONN

P3V3S P3V3DS P3V3M

0_5%_2_DY

0_5%_2_DY

0_5%_2_DY
1

1
REFERENCE:2200~2249

2 R4353

2 R4354

2 R4355
B P3V3S B
10K_5%_2_DY
1

CN4350
R4350

1 1
2 2
3 3

IN NFC_RST# 4 4
29 NFC_3S_SMDATA 5
2

28 BI 5

IN NFC_3S_SMCLK 6 6
28 NFC_INT 7
29 IN 7

IN NFC_HI_SEL 8 8
49 OUT NFC_SWP 9 9 G G1
10 10 G G2
IN NFC_RX
10K_5%_2_DY

51 11 11
1

OUT NFC_TX 12 12
R4351

51
ACES_50501_01241_001_12P_DY

6012B0104502
0.5PITCH BOTTON CONTACT
2

NFC CONN

A R4352 A
56 OUT UIM_VPP 1 2 NFC_SWP IN 49
NFC_HI_SEL R4350 R4351 0_5%_2_DY

HIGH (UART) INSTALL

LOW (I2C) INSTALL

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
REFERENCE:4350~4399 CODE
FINGER PRINTER
DOC.NUMBER
& NFC

REV
SIZE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 49 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

P3V3S

10UF_6.3V_3
0.1UF_16V_2
1

1
C1001

C1000
C C

2
14
15
16
U1000

VDD
RES
RES
13 RES VDD_IO 1
12 GND NC1 2
30 IN ACCEL_INT# 11 INT1 NC1 3
10 4 PCH_3S_SMCLK_R 50
RES SCL_SPC BI
9 5

SDA_SDI_SDO
INT2 GND

SDO_SA0
CS
ST_HP3DC2TR_LGA_16P
P3V3S

8
7
6
PCH_3S_SMDATA_R 50
BI
1 R1001 2

0_5%_2_DY
B B

1
R1000
0_5%_2_DY

2
ACCELEMETOR

50 BI PCH_3S_SMCLK_R 1 R1002 2 PCH_3S_SMCLK BI 26 28 38 39 58

0_5%_2
1 R1003 2 THERM_CLK_GPU BI 68
0_5%_2_DY

50 BI PCH_3S_SMDATA_R 1 R1004 2 PCH_3S_SMDATA BI 26 28 38 39 58

0_5%_2
1 R1005 2 THERM_DATA_GPU BI 68
0_5%_2_DY
A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION

REFERENCE NUMER : 1000~1099 SIZE

A3
CODE
CS
ACCELEMETOR
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 50 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

REFERENCE NUMER : 300~399

P3V3DS P3V3AL_KBC P3V3AL_KBC
PAD300 CN375
1 1
1 1 2
2 10MA 34 CLK_R3S_DEBUG 2
IN 3
2

POWERPAD_2_0610 P3V3_RTC
3
LPC_3S_FRAME#

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
1

1
53 51 28 4
IN PCI_3S_SERIRQ 5
4
53 51 29 IN 5
P3V3DS 61 56 55 53 33 28 26 BUF_PLT_RST# 6
IN NMI_SMI_DBG#
6
F 51 33 OUT 7 7 F

2 C303

2 C131

2 C314

2 C315

2 C308

2 C310
53 51 28 LPC_3S_AD(0) 8
IN 8

0.1UF_16V_2
1

1
1UF_6.3V_2
53 51 28 LPC_3S_AD(1) 9
BI LPC_3S_AD(2) 10
9
53 51 28 BI 10

0.1UF_16V_2
C311

2
LPC_3S_AD(3)

C312
53 51 28 11
BI VADP_DEBUG 12
11
9 5 OUT 12

C313
51 BI 8051_TX_LED_PWRSTBY# 13 13

2
51 BI 8051_RX_CAPS_LED# 14 14
51 IN NUM_LOCK_LED# 15 15

106
119
VCC1_POR#_3

1
14
16

68

37
58
84

40
51 IN 16
51 IN SCAN_3S_OUT<0> R339 1 2 15_5%_2 SPI_CLK_FLH_R6_R 17 17
51 IN SCAN_3S_OUT<1> R338 1 2 15_5%_2 SPI_CS0#_FLH_R6_R 18 18
U300
51 IN SCAN_3S_OUT<3> R337 1 2 15_5%_2 SPI_SI_FLH_R6_R 19 19
62 51 SCAN_3S_OUT<2> R336 1 2 15_5%_2 SPI_SO_FLH_R6_R 20
IN 20

AVCC
JTAG_RST# SPI_HOLD#_DB_R6_R

VBAT

VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
51 51 1 2 0_5%_2 21 G1
TP24 GPIO027 64 LID_SW#_3 IN 44 IN R335 21 25
R371 2 1 100K_5%_2
TP332
1
107 CPPWR_EN 51 64
P3V3DS R343 1 2 0_5%_2 22 22 26 G2
GPIO030
OUT 23
OUT JTAG_RST# WLAN_OFF 23
51 49 30 55
JTAG_nRST GPIO031
OUT 24
OUT SCAN_3S_OUT(0) 21 KSO00/GPIO000/JTAG_TCK GPIO033 65 TRAVEL_BAT_DET#
IN 17
24

51 OUT SCAN_3S_OUT(1) 20 KSO01/GPIO100/JTAG_TMS GPIO035 63 ADP_EN OUT 5 51 ACES_50238_02471_001_24P

51 OUT SCAN_3S_OUT(2) 19 KSO02/GPIO101/JTAG_TDI GPIO036 1 LATCHED_ALARM IN 6
51 SCAN_3S_OUT(3) 18
OUT SCAN_3S_OUT(4) 17
KSO03/GPIO102/JTAG_TDO
124 NMI_SMI_DBG# OUT
OUT KSO04/GPIO103/TFDP_DATA/XNOR GPIO066 33 51
SCAN_3S_OUT(5)

TP301

TP301

TP301

TP301

TP301
16
OUT
OUT SCAN_3S_OUT(6)
SCAN_3S_OUT(7)
13
12
KSO05/GPIO104/TFDP_CLK
KSO06/GPIO001 GPIO110 73 PWRBTN# IN DEBUG PORT
6012B0073604
OUT SCAN_3S_OUT(8) 10
KSO07/GPIO002
74 ADP_PRES
OUT KSO08/GPIO003 GPIO130
IN 7

TP344

TP340

TP342

TP343
TP341
OUT SCAN_3S_OUT(9) 9 KSO09/GPIO106 GPIO145 93 PM_SLP_A# IN 16 24 26 28
SCAN_3S_OUT(10) 8 33 WWAN_OFF OUT 56
OUT SCAN_3S_OUT(11) 7
KSO10/GPIO004 GPIO147
34 SLP_LAN#
OUT KSO11/GPIO107 GPIO151
IN 16 28
E 6 116 FET_B OUT E
KSO12/GPIO005 GPIO163 6 51
5 KSO13/GPIO006
64 59 57 43 31 28 26 24 16 SLP_S3#_3R 81
IN NUM_LOCK_LED# 83
GPIO007/KSO14
52 51 OUT GPIO010/KSO15
28 26 PWR_BTN_OUT# 4
OUT SCAN_3S_OUT(17) 108
GPIO011/KSO16
62 OUT GPIO012/KSO17 R319
41 2 1 ISCT_LED# 62
52
SCAN_3S_IN(0) 29
GPIO206
IN
52 IN KSI0/GPIO125/TRACEDATA3
SCAN_3S_IN(1) 28 0_5%_2
52 IN KSI1/GPIO126/TRACEDATA2
52 SCAN_3S_IN(2) 27
IN SCAN_3S_IN(3) 26
KSI2/GPIO144/TRACEDATA1
52 IN KSI3/GPIO032/TRACEDATA0
52 SCAN_3S_IN(4) 25 112 SCL_BAT_CHG 5 17 51
IN SCAN_3S_IN(5) 24
KSI4/GPIO142/TRACECLK I2C0_CLK0/GPIO015
111 SDA_BAT_CHG
BI
52 IN KSI5/GPIO040 I2C0_DAT0/GPIO016
BI 5 17 51
52 IN SCAN_3S_IN(6) 23 KSI6/GPIO042 I2C0_CLK1/GPIO134 110
52 SCAN_3S_IN(7) 22 109
IN KSI7/GPIO043 I2C0_DAT1/GPIO017

51 BI EMCLK 66 PS2_CLK0/GPIO046 GPIO022/I2C1_CLK0 89 PCH_KBC_SMCLK BI 28

68
51 BI EMDAT 67 PS2_DAT0/GPIO047 GPIO023/I2C1_DAT0 88 PCH_KBC_SMDATA BI 28
68
58 51 BI SP_CLK 61 PS2_CLK1/GPIO050 GPIO020/I2C2_CLK0 91 A_SD# OUT 59
58 51 BI SP_DATA 62 PS2_DAT1/GPIO065 GPIO021/I2C2_DAT0 90 KBC_PROCHOT OUT 27 R323
58 51 BI IM_5S_CLK 35 PS2_CLK2/GPIO051 GPIO024/I2C3_CLK0 126 1 2 KBC_WAKE# OUT 29
58 51 BI IM_5S_DATA 32 PS2_DAT2/GPIO052 GPIO025/I2C3_DAT0 125 CHG_RST OUT 5 51
1 TP24 103 0_5%_2
GPIO053/PS2_CLK3
TP301 1 TP24 105 98 SUS_PWR_ACK IN
GPIO152/PS2_DAT3 GPIO157/BC_CLK 28
TP302 99 ADP_PRES_OUT OUT
GPIO160/BC_DAT 68
28
53 51 28 LPC_3S_AD(0) 46 100 KBC_PWR_ON_R 0_5%_2 1 2 R352 KBC_PWR_ON 16 18
BI LPC_3S_AD(1) 48
LAD0/GPIO112 GPIO161/BC_nINT
OUT
53 51 28 BI LAD1/GPIO114
D LPC_3S_AD(2) 50 120 BAT_GRNLED# OUT D
53 51 28 BI LAD2/GPIO113 GPIO133/PWM0 33 58
53 51 28 BI LPC_3S_AD(3) 51 LAD3/GPIO111 GPIO136/PWM1 118 PWM#_LED OUT 52 R7510
53 51 28 IN LPC_3S_FRAME# 52 nLFRAME/GPIO120 GPIO034/PWM2/TACH2PWM_OUT 121 1 2 PWM_3S_FAN#
OUT 25
LPC_RESET#

CSC0402_DY
1
29 53 78
IN CLK_R3S_KBPCI
nLRESET/GPIO116 GPIO141/PWM3/LED3
0_5%_2

C7530
34
67 54
IN PCI_3S_CLKRUN# 55
PCI_CLK/GPIO117
92 MAIN_BAT_DET# IN
28 IN nCLKRUN/GPIO014 GPIO105/TACH1 17
53 51 29 IN PCI_3S_SERIRQ R333 2 1 33_5%_2 57 SER_IRQ/GPIO115 GPIO140/TACH2/TACH2PWM_IN 101 TACH_FAN_IN OUT 25 RF SOLUTION
51 6 OUT FET_A 123 GPIO044/nSMI
28 24 M_PWROK 122 113 BAT_AMBERLED# OUT 51 58

2
IN GPIO135/KBRST LED0/GPIO154
114 8051_RX_CAPS_LED#
LED1/GPIO155
OUT 51
29 RUNSCI_EC# 76 115 8051_TX_LED_PWRSTBY# 51
OUT nEC_SCI/GPIO026 LED2/GPIO156
OUT
51 OUT PVT_SCLK R362 1 2 33_5%_2
PVT_MISO
2 GPIO153/PVT_SCLK GPIO143/nRSMRST 85
PM_PWROK IN
10K_5%_2 1 2 R330 RSMRST# OUT 16 28
51 IN 94 GPIO164/PVT_MISO nRESET_OUT/GPIO121 60 10K_5%_2 1 2 R329
51 OUT PVT_MOSI R396 2 1 33_5%_2
PVT_CS#
127
96
GPIO054/PVT_MOSI VCC_PWRGD/GPIO063 72
77
PWR_GOOD_3 IN
VCC1_POR#_3 OUT
16 24 26 28
51 OUT PLT_DET GPIO146/PVT_nCS0 VCC1_nRST/GPIO131 51
51 102
IN GPIO045/A20M/PVT_nCS1

67 51 28 OUT SPI_CLK_FLH R366 1 2 33_5%_2 SPI_CLK_FLH_KR 3 GPIO122/SHD_SCLK GPIO127/PECI_RDY 31 ADP_DET IN 5

51 28 SPI_SO_FLH 95 80 43_5%_2 1 2 R328 H_PECI 27
IN SPI_SI_FLH 2 1 33_5%_2 SPI_SI_FLH_KR 128
GPIO124/SHD_MISO GPIO132/PECI_DAT
79
BI
51 28 OUT R365 GPIO064/SHD_MOSI VREF_PECI
P1V05S_VCCP
51 28 SPI_CS0#_FLH 97
OUT NFC_RX KBC_GPIO9
GPIO150/SHD_nCS0
SLP_S4#_KBC
49 OUT R350 2 1 0_5%_2_DY 87 GPIO165/TXD/SHD_nCS1 ADC4/GPIO062 38
IN 27 57
39 300_5%_2 2 1 R302 VOLTAGE_ADC 9
NFC_TX KBC_GPIO8
ADC3/GPIO061
IN
51 49 R348 2 1 0_5%_2_DY 86 42 2200PF_50V_2 2 1 C304
IN GPIO162/RXD ADC2/GPIO060
43 AGND_KBC
ADC1/GPIO057
300_5%_2 2 1 R300 ADP_A_ID 7
INSTALL C317,C318,X300 FOR 1322 B VERSION TEST OUT KBC_DS3_EN 75 32KHZ_OUT/GPIO013 ADC_TO_PWM_IN/ADC0/GPIO056 44 IN
C 2200PF_50V_2 1 2 C301 C
ADC_TO_PWM_OUT/GPIO041 59 AGND_KBC
300_5%_2 2 1 R316 CURRENT_ADC IN 9
C318 69 2200PF_50V_2 1 2 C306

VSS_VBAT
2 1 KBC_XTAL2 2 1 0_5%_2_DY 71
XTAL2
AGND_KBC
R357 XTAL1
300_5%_2 2 1 R315 OCP_A_IN 7
SUSCLK32_KBC IN

AVSS
51 R380 2 10_5%_2_DY P3V3DS

CAP
IN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SUSCLK32_PCH 2200PF_50V_2 1 2 C307
12PF_50V_2 IN R382 2 10_5%_2 AGND_KBC
3
4

KBC_XTAL1 2 1 0_5%_2_DY
R358
SMSC_MEC1322_NU_VTQFP_128P OCP_PWM_OUT OUT 29
X300
32.768KHZ
NO 5V TOLERANT FOR MEC1322
P3V3DS 4.7K_5%_2
58 51 IM_5S_CLK 1 2 R385
36
47
56
82
104
117

70

45

15
11

X301 BI
IM_5S_DATA 4.7K_5%_2 R386
2

1 2
1

4 3 SUSCLK32_KBC 58 51 BI
C317 VDD OUT
OUT 51
2 1 SP_CLK 4.7K_5%_2 1 2 R387
R377 58 51 BI
1 2 1 OE GND 2
SP_DATA 4.7K_5%_2 1 2 R388
58 51 BI
POWERPAD1X1M
12PF_50V_2
10K_5%_2

4.7UF_6.3V_3
2

32.768KHZ 10K_5%_2 1

1
TP365 TP366 51 OUT EMCLK 2 R312

C302
TP370
10K_5%_2 1
PAD310

P3V3A 51 EMDAT 2 R313

2

OUT
TP24 TP24 BAT_AMBERLED# 10K_5%_2_DY 1 R318
TP24 58 51 OUT 2
100K_5%_2_DY

TP367
1

TP371 TP372 PLT_DET 10K_5%_2 1 R309

1

51 2
2
OUT
1R368 2
3.3K_5%_2

100K_5%_2 1
2

2
3.3K_5%_2

TP24 NUM_LOCK_LED# 2 R320

R331

TP369 52 51
1

TP24 TP24 OUT

R369

KBC_PWR_ON_R 100K_5%_2 1 R326

1

2
1

OUT
1

TP24 SDA_BAT_CHG 1K_5%_2 1 R306

1

51 17 5 2
OUT
1

CN365 SCL_BAT_CHG 1K_5%_2 1

AGND_KBC 51 17 5 2 R307
B 51 28 IN SPI_CS0#_FLH 1 1 CE# VDD 8 OUT
10K_5%_2_DY 1
B
OUT SPI_SO_FLH 2 SPI_SO_FLH_R SPI_HOLD#_DB KBC_DS3_EN
2 7 2 R340
51 28 R367 SO HOLD#
IN 28 51 27 IN
28 IN SPI_WP# 33_5%_2 3
4
WP# SCK 6
5
SPI_CLK_FLH
SPI_SI_FLH
IN 28 51 67
51 5 IN ADP_EN 10K_5%_2 1 2 R317
28 51
0_5%_2_DY

VSS SI
IN P3V3DS LID_SW#_3 100K_5%_2 1 2 R314
62 51 44 IN
R370 1

P3V3DS
0.1UF_16V_2

ACES_91960_0084L_8P U302 8051_TX_LED_PWRSTBY# 10K_5%_2 1 R322

SPI BIOS TP368 51 IN 8051_TX_LED_PWRSTBY# 1 1A 1Y 6 LED_PWRSTBY#
OUT 57 58 62
51 IN
10K_5%_2 1
2
C366
1

51 8051_RX_CAPS_LED# 2 R324
SOCKET : 6026B0150101 10K_5%_2 1 2 R303 IN
TP24 2 5
VCC1_POR#_3 10K_5%_2 1 R325
16M (128M) 8P：6019B0988701 GND VCC
51 IN 2
1

6019B0988601
2

51 8051_RX_CAPS_LED# 3 4 CAPS_LED# 52 200K_5%_2_DY 1

2

IN 2A 2Y
OUT 51 49 NFC_TX 2 R334
OUT
10K_5%_2 1 2 R341
VCC1_POR#_3 10K_5%_2_DY 1 2 R342
51 OUT
ONLY FOR DEBUG NXP_74LVC2G07GW_SC88A_6P
10K_5%_2 1
P3V3DS 51 5 CHG_RST 2 R308
P3V3DS P3V3DS REMOVE WITH SPI SCOKET OUT
CPPWR_EN 10K_5%_2 1 2 R356
51 OUT FET_A 100K_5%_2 1 R305
1

51 6 2
OUT FET_B
0.1UF_16V_2

100K_5%_2 1
3.3K_5%_2

R304
100K_5%_2
1

P3V3DS 2
2

51 6 OUT
C316

P3V3A
3.3K_5%_2

10K_5%_2 1
2

PM_PWROK R321
R355

51 28 26 2
OUT
R344

R346

100K_5%_2
1
2

2R103 1
1K_5%_2
U366
PVT_CS#
2
1

1 8
2
R101

51
1

IN CS# VCC

51 OUT PVT_MISO R390 1 2 33_5%_2 PVT_MISO_R 2

3
DO(IO1) HOLD#(IO3) 7
6 PVT_SCLK
D100
51
NC

WP#(IO2) CLK
IN R100
4 5 PVT_MOSI 51 62 57 26 ON_OFF# 1 2 PWRBTN# 3 1 PWR_BTN_OUT#
12

A GND DI(IO0)
IN IN A
1UF_6.3V_2

2MB ROM FOR KBC 47_5%_2

INVENTEC
1
0_5%_2_DY

C100

WINBOND_W25Q16DVSSIQ_SOP_8P
DIODE-BAT54-TAP-PHP_DY
R345

SOCKET : 6026B0150101
2M (16M) 8P： TITLE
2

MODEL,PROJECT,FUNCTION
2

KBC

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 51 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3S
REFERENCE NUMER : 300~399

0.1UF_16V_2_DY
P3V3DS

1
0.1UF_16V_2

C335
RS340

C305
10 1
9 2
8 3

2
7 4
6 5

10K_5%

D R392 CN300 P3V3DS

270_5%_2 1 1
1 2 2 2
D
51 3
CAPS_LED# IN 4
3
4 0
51 5 SCAN_3S_IN(0)
NUM_LOCK_LED# IN 6
5
1
1 2 R391 0_5%_2 6
SCAN_3S_IN(1)
2 1 7 2
REC_MUTE_LED R381 7

3
270_5%_2 SCAN_3S_OUT(9) 8 8 SCAN_3S_IN(2)
3
Q321
52 KSCAN_3S_IN(9) 9
KSCAN_3S_IN(9) OUT 9 SCAN_3S_IN(3)
KSCAN_3S_IN(11) 10
D
52 4
1 KSCAN_3S_IN(11) OUT 10
ISCT_LED# IN G
52 KSCAN_3S_IN(13) 11 SCAN_3S_IN(4)
KSCAN_3S_IN(13) OUT 11
5
52 51 SCAN_3S_IN(7) 12
SCAN_3S_IN(7) OUT 12
S
SCAN_3S_IN(5)
SSM3K7002BFU 52 KSCAN_3S_IN(6) 13 6
KSCAN_3S_IN(6) OUT 13
52 KSCAN_3S_IN(5) 14 SCAN_3S_IN(6)
KSCAN_3S_IN(5) OUT 14
7
SCAN_3S_OUT(1) 15
2

15
SCAN_3S_IN(7)
SCAN_3S_OUT(10)16 51 52
16 OUT SCAN_3S_IN<7..0>
SCAN_3S_OUT(6) 17 17
SCAN_3S_IN<7..0>
SCAN_3S_OUT(7) 18 18
SCAN_3S_OUT(4) 19
3

19
Q320 SCAN_3S_OUT(8) 20 20
SSM3K7002BFU SCAN_3S_OUT(3) 21 21
D

59 1 52 KSCAN_3S_IN(3) 22
REC_MUTE_LED_CNTR IN G
KSCAN_3S_IN(3) OUT 22
KSCAN_3S_IN(1) 23
2

6252 KSCAN_3S_IN(1) OUT 23

KSCAN_3S_IN(2)
S

C 52 24 C
KSCAN_3S_IN(2) OUT 24
52 KSCAN_3S_IN(4) 25
R383 KSCAN_3S_IN(4) OUT 25
6252 KSCAN_3S_IN(0) 26
KSCAN_3S_IN(0)
2

OUT 26
10K_5%_2 52 KSCAN_3S_IN(10) 27
KSCAN_3S_IN(10) OUT 27
52 KSCAN_3S_IN(12) 28
KSCAN_3S_IN(12)
1

OUT 28
52 KSCAN_3S_IN(8) 29
KSCAN_3S_IN(8) OUT 29
52 KSCAN_3S_IN(14) 30 G1 P5V0S
KSCAN_3S_IN(14) OUT 30 G
SCAN_3S_OUT(5) 31 31 G G2
SCAN_3S_OUT(2) 32 32
SCAN_3S_OUT(0) 33 33
R351
1 2
SCAN_3S_OUT(11)34 34

S
ACES_51510_0344N_001_34P 4.7K_5%_2
TMP121011001

S
G G

DIODES_DMP2305U_SOT23_3P

D
Q300
Q301

D
D
CN301
51 1 P5V0S_KBL 1
PWM#_LED IN G
2
1
2

S
D303 3 3
KSCAN_3S_IN(4) 1 6 SCAN_3S_IN(4) SSM3K7002BFU 4 4
B 5 B

2
5
KSCAN_3S_IN(12) 2 29 OUT KBL_DET# 6 6 G G1
7 7 G G2
5 KSCAN_3S_IN(5) 8 8

SCAN_3S_IN(5) 3 4 KSCAN_3S_IN(13) HIROSE_FH34SRJ_8S_0_5SH_50_8P

BAW56DW_7_F KEYBOARD BACK LIGHT CONN 6012B0474701

KSCAN_3S_IN(14)
NOTE:
KBL_DET# FOR KEYBOARD LIGHT DETECT
1

D304
KSCAN_3S_IN(2) 1 6 SCAN_3S_IN(2)

KSCAN_3S_IN(10) 2

5 KSCAN_3S_IN(3)
3 SCAN_3S_IN(6)
SCAN_3S_IN(3) 3 4 KSCAN_3S_IN(11)

D301
BAW56DW_7_F
BAW56

A A
KSCAN_3S_IN(6)
2

D302
KSCAN_3S_IN(0) 1 6 SCAN_3S_IN(0)

KSCAN_3S_IN(8) 2

5 KSCAN_3S_IN(1)

SCAN_3S_IN(1) 3 4 KSCAN_3S_IN(9)

BAW56DW_7_F
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
KEYBOARD
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 52 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

NO INSTALL FOR ST33

P3V3S P3V3DS P3V3A

2
2

2
R3516
R3511 R3510
0_5%_2_DY
D INSTALL FOR SLB9656 0_5%_2_DY
0_5%_2 D

1
1

1
1
P3V3_TPM

0.1UF_16V_2
C3503
2
P3V3S
U3500
26 5
51 28 LPC_3S_AD(0) IN LAD0 VDD

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
1

1
51 28 LPC_3S_AD(1) IN 23 LAD1 P3V3S

C3504

C3506
20 10
51 28 LPC_3S_AD(2) IN LAD2 VDD

C3502
17 19 1 2
51 28 LPC_3S_AD(3) IN LAD3 VDD
VDD 24 0_5%_2

1
21
34
67 CLK_R3S_TPM IN LCLK
4 R3517 R3518

2
GND R3501
0_5%_2_DY

1
22 11
51 28 LPC_3S_FRAME# IN LFRAME# GND
18
GND
16 25 1 2 NO INSTALL FOR ST33
C3501 51 33 28 26 BUF_PLT_RST# IN LRESET# GND

2
61 56 55 0_5%_2
10PF_50V_2_DY
C 28 NC PP 7 C
1
2
NC
27 3
51 29 PCI_3S_SERIRQ IN SERIRQ NC

1
15 TEST NC 12
R3507 R3502
2 1 9 TESTBI_LRESET# NC 13
NC 14 0_5%_2_DY
0_5%_2 8 6
TESTI GPIO

2
NC 2
INFINEON_SLB9656TT1_2_TSSOP_28P

TPM1.2

B B
SLB9656TT1.2 ST33
C3503 INSTALL OPEN

R3507 INSTALL OPEN

R3511 INSTALL OPEN

R3517 INSTALL OPEN

R3518 INSTALL OPEN

A A

INVENTEC
TITLE

REFERENCE NUMER : 3500~3549 MODEL,PROJECT,FUNCTION

TPM
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 53 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U400 P3V3A P3V3M

4.7K_5%_2_DY

4.7K_5%_2_DY
34 48 13 54
CLKREQ_PCIE3_N OUT CLK_REQ_N MDI_PLUS0 BI TD1_DP

2
36 14 54
28 70 PLT_RST# IN PE_RST_N MDI_MINUS0 BI TD1_DN

R497

R444
34 44 17 54
CLK_PCIE3_DP IN PE_CLKP MDI_PLUS1 BI TD2_DP
45 18

PCIE
34 CLK_PCIE3_DN IN PE_CLKN MDI_MINUS1 BI TD2_DN 54
C408 0.1UF_16V_2

MDI
2 PCIE_RX3_DP

1
32 1 38 20 54
PCIE_RX3_C_DP OUT PETp MDI_PLUS2 BI TD3_DP R498
32 1 2 PCIE_RX3_DN 39 21 54 1 2 LANWAKE_N
PCIE_RX3_C_DN OUT PETn MDI_MINUS2 BI TD3_DN PCIE_WAKE# IN
C407 0.1UF_16V_2
32 PCIE_TX3_C_DP IN 41 PERp MDI_PLUS3 23
BI TD4_DP 54 0_5%_2
32 42 24 54
PCIE_TX3_C_DN IN PERn MDI_MINUS3 BI TD4_DN
R499

SMBUS
28 PCH_3M_SMCLK 28 6 2 1
BI SMB_CLK SVR_EN_N
D 28 PCH_3M_SMDATA BI 31 SMB_DATA 0_5%_2
RSVD1_VCC3P3 1 P3V3M_R_RSVD D
P3V3M
2 R405 1 10K_5%_2_DY LANWAKE_N2 LANWAKE_N
VDD3P3_5 5
P3V3M

1UF_6.3V_2
1
3 4
54 29 LAN_DIS# IN LAN_DISABLE_N VDD3P3_4
VDD3P3_15 15 4.7K_5%_2 1 R407 2 P3V3M_R_RSVD
470_5%_2 19

C402
R402 VDD3P3_19

LED
1 2 26 29
54 LED_3S_LANLINK#_R OUT LED0 VDD3P3_29
27 LED1
54 25
LED_3S_LANLINK#

2
OUT LED2
VDD0P9_8 8 P1V05_LAN_M_PHY
R403 11
VDD0P9_11
1 2
OUT 1 32 16
LED_3S_LANACT# JTAG_TDI VDD0P9_16

JTAG

22UF_6.3V_5

0.1UF_16V_2

0.1UF_16V_2
57 54 TP7
470_5%_2

1
1 34 JTAG_TDO
TP10 1 33 22
JTAG_TMS VDD0P9_22
TP8 1 35 JTAG_TCK

C409

C401

C403
TP2 37
VDD0P9_37
C404
1 2 NIC_XTAL_OUT 9 40

2
XTAL_OUT VDD0P9_40
10 43

RSC_0402_DY
25MHZ_10PF

XTAL_IN VDD0P9_43
10PF_50V_2
1
4

1 VDD0P9_46 46
47
57 32 LANLINK_STATUS OUT 3 D S 2
IN LED_3S_LANLINK# 54
VDD0P9_47
X400

2 R400
30 TEST_EN Q487
C C

G
12 RBIAS CTRL_0P9 7 P1V05_NIC 1 L400 2 L2N7002WT1G
SWF2520CF_4R7K_M
2
3

C400 54 29

1
LAN_DIS# IN

3.01K_1%_2
1

1
1K_5%_2
1 2 GND_EPAD 49
NIC_XTAL_IN
10PF_50V_2
2 R404

R401
INTEL_CLARKVILLE_I218_LM_48P
2

P3V3M
REFERENCE NUMER : 400~469

1
R485
B 100K_5%_2 B

2
REFERENCE NUMER : 470~499

LES_LBSS84LT1G_SOT23_3P
S
2

Q485
U470 1 G
1 TCT1 MCT1 24

3
2 23
TD1_DP

D
54 BI TD1+ MX1+ BI TD_DP 54 57 Q486
3 22
54 TD1_DN BI TD1- MX1- BI TD_DN 54 57 57

D
29 1

3
DOCK_ID1 IN G
4 TCT2 MCT2 21 D485
0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

1UF_6.3V_2

S
1

1 1 2 2
54 TD2_DP BI 5 TD2+ MX2+ 20
BI RD_DP 54 57 L2N7002WT1G
6 19
54 TD2_DN RD_DN 54 57

2
BI TD2- MX2- BI
C475

C476

C477

C478

C479

PHP_PESD5V0S1BB_SOD523_2P
7 TCT3 MCT3 18
IN LED_3S_LANLINK#_R 54
2

8 17
54 TD3_DP BI
9
TD3+ MX3+
16
BI C_DP 54 57
54 TD3_DN BI TD3- MX3- BI C_DN 54 57 JACK485

10 15 A2 A1
TCT4 MCT4
1
G2 G1 BI LED_3S_LANLINK#_R
11 14
57 54 TD_DP BI 2
TX+
G1
54 TD4_DP BI
12
TD4+ MX4+
13
BI D_DP 54 57 57 54 TD_DN BI 3
TX- G
G2
54 TD4_DN BI TD4- MX4- BI D_DN 54 57 57 54 RD_DP BI 4
RX+ G

A BOTH_GST5009_SOP_24P 57 54 C_DP BI 5
P4
A
LAYOUT NOTE: C_DN
75_1%_2 0.01UF_100V_3

75_1%_2 0.01UF_100V_3

75_1%_2 0.01UF_100V_3

75_1%_2 0.01UF_100V_3

57 54 BI P5 G3
G
6016B0000201 57 54 RD_DN BI 6 RX- G4
1

TO PLACE ONE 0.1UF AT EACH PIN 1 , 4 , 7 , 10 7 G

57 54 D_DP BI 8
P7
C473

C472

C471

C470

AND PLACE THE 1UF IN THE SPOT THAT 57 54 D_DN BI P8

B2 B1 57
IS AS CLOSE AS POSSIBLE TO ALL 4 PINS Y2 Y1 BI LED_3S_LANACT# 54

FOX_JM3611_SP51AB11_7H_12P
2

60260197001
INVENTEC
2

IN LED_3S_LANACT# 54
57
D486
1 R473

1 R472

1 R471

1 R470

1 1 2 2 TITLE
MODEL,PROJECT,FUNCTION
LAN (NIC,TRANSFORMER,RJ45)
C474
1 2 PHP_PESD5V0S1BB_SOD523_2P
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
100PF_3000V
CHANGE by XXX DATE 21-OCT-2002 SHEET 54 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

P3V3A_Q_WLAN
P3V3DS

S S D D 576MA

10K_5%_2
1
0.1UF_16V_2_DY
1

4.7UF_6.3V_3

0.01UF_50V_2
DIODES_DMP2305U_SOT23_3P
1

0.1UF_16V_2
G
C1308

1
10K_5%_2

Q1300 R1304
R1302

C1307

C1305

C1301
Q1301
SSM3K7002BFU

G
G

CLKREQ_PCIE4_R_N

2
3 2
34 P3V3A
2

OUT D S
2

2
1 2
R1311 R1301 CLKREQ_PCIE4_N
51 IN WLAN_OFF 1 2 1 2 R1310 0_5%_2_DY CN1300
1 R1303 2 1 2

2
0_5%_2 61 56 54 29 PCIE_WAKE# OUT WAKE# 3.3V
R1312 220K_5%_2 0_5%_2 3 RESERVED GND 4
C C
28 IN PCH_SLP_WLAN_N 1 2 TP1301 1 5 RESERVED 1.5V 6
R1300
0_5%_2_DY 7 CLKREQ# RESERVED 8
9 10 10K_5%_2
GND RESERVED
34 11 12
CLK_PCIE4_DN

1
IN REFCLK- RESERVED
34 13 14

2
CLK_PCIE4_DP IN REFCLK+ RESERVED
15 RESERVED RESERVED 16 D1300
17 18 29

NC
RESERVED GND

TP1302
1 19 RESERVED RESERVED 20 1 3
IN WLAN_TRANSMIT_OFF#
21
23
GND PERST# 22
24
IN BUF_PLT_RST# 26
32 PCIE_RX4_C_DN OUT PERN0 +3.3VAUX

10UF_6.3V_3
25 26 BAT54_30V_0.2A

0.1UF_16V_2
32 PCIE_RX4_C_DP OUT PERP0 GND

1
27 GND 1.5V 28

C1304

C1303
29 GND SMB_CLK 30
32 31 32
PCIE_TX4_C_DN IN PETN0 SMB_DATA
32 33 34
PCIE_TX4_C_DP IN PETP0 GND
35 36
GND USB_D- BI USB_D_P2_DN

2
37 38
RESERVED USB_D+ BI USB_D_P2_DP
39 RESERVED GND 40
41 RESERVED LED_WWAN# 42
43
45
RESERVED LED_WLAN# 44
46
OUT WL_LED_ALL# 58
62
P3V3A 28 CL_CLK1 IN RESERVED LED_WPAN#
28 47 48
CL_DATA1 IN RESERVED 1.5V
B R1306 28 CL_RST#1 IN 49 RESERVED GND 50 B
1 2 BT_OFF# 51 RESERVED 3.3V 52
G1 G1 G2 G2
3

10K_5%_2_DY FOX_AS0B226_S40QW_7H_52P
Q1302
D

28 1
BT_OFF IN G
6026B0221501
S

SSM3K7002BFU
2

WLAN & BLUE TOOTH

A A

REFERENCE NUMBER:1300~1349 INVENTEC

TITLE
MODEL,PROJECT,FUNCTION
WLAN & BLUE TOOTH
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 55 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PVSIM

1
56 UIM_CD OUT
D1451
DIODES_BAV99
3

R1452
56 UIM_PWR BI 1 2

2
100K_5%_2 P3V3DS
PVSIM
CN1451
1 R1451 2.75A Q1400
56 UIM_PWR BI 2 5 GND VCC 1
BI UIM_PWR 56 1 D S 4
47K_5%_2_DY

0.1UF_16V_2_DY
2
UIM_VPP UIM_RST

1
6 2

10K_5%_2
49 BI VPP RST BI 56 5

C1402
6 3

4.7UF_6.3V_3
0.01UF_50V_2
G
UIM_CLK

R1404
7 3

0.1UF_16V_2
56 BI I_O CLK BI 56
D UIM_DATA

1
PMOS_4D1S

TPC6111 D

C1413

C1414

C1415
8 RESERVED RESERVED 4

18PF_50V_2_DY

18PF_50V_2_DY

2
4.7UF_6.3V_3
0.1UF_16V_2
1

1
CD CD

C1405
C1451

C1452

C1453
R1403

2
2 1
IN WWAN_OFF
51

G2 G G G1 220K_5%_2
P3V3S

2
TAI_PMPAT0_08GLBS7N14H1__8P PVSIM
CAP CLOSE TO SIM CARD
6026B0180901

1
10K_5%_2

10K_5%_2
SIM CARD

R1407

R1402
CN1400
R1405
WWAN_DET#

2
33 INTRUDER# 2 1 1 2

2
IN GND_PRESENCE_IND 3P3VAUX_2
0_5%_2_DY 3 GND3 3P3VAUX_4 4 D1410
30
WCM_2012_900T 5 6

NC
GND5 FULL_CARD_POWER_OFF#
USB_D_P1_L_DP
USB_D_P1_DP BI 2 1
USB_D_P1_L_DN
7 USB_D+ W_DISABLE# 8 1 3
IN WWAN_TRANSMIT_OFF#
USB_D_P1_DN BI 3 4 9 USB_D- LED1#/DAS/DSS# 10
OUT LED_WWAN_LINK# 58
C L1400 PVSIM 11 GND11
BAT54_30V_0.2A
C
1

10K_5%_2
CS PS
R1408

KEY B

0_5%_2
2

R1409
29 2 1 21 20
WWANSSD_M12DET IN WWAN/SSD IND GND-WWAN/OC-SSD AUDIO_0
61 55 54 29 2 1 23 22
PCIE_WAKE# IN RESERVED_23 AUDIO_1
WWAN_NGFF_DPR 25 RESERVED_25 AUDIO_2 24
R1406 0_5%_2 27
29
GND_27 AUDIO_3 26
28
IN GPS_XMIT_OFF# 29
PERN1/USB3.0-RX- UIM-RFU
31 PERP1/USB3.0-RX+ UIM-RESET 30
BI UIM_RST 56
33 GND_33 UIM-CLK 32
BI UIM_CLK 56
35 PETN1/USB3.0-TX- UIM-DATA 34
BI UIM_DATA 56
37
39
PETP1/USB3.0-TX+ UIM-PWR 36
38
BI UIM_PWR 56
GND_39 DEVSLP
41 PETN0/SATA-B+ GNSS0 40
43 PETN0/SATA-B- GNSS1 42
45 GND_45 GNSS2 44
47 PETN0/SATA-A- GNSS3 46
B 49 PETN0/SATA-A+ GNSS4 48 B
51 GND_51 PERST# 50
53 REFCLKN CLKREQ# 52
55 REFCLKP PEWAKE# 54
57 GND_57 NC_56 56
59 ANTCTL0 NC_58 58
61 ANTCTL1 COEX3 60
63 ANTCTL2 COEX2 62
65 ANTCTL3 COEX1 64
55 53 51 33 28 26
61
BUF_PLT_RST# IN 67
69
RESET# SIM DETECT 66
68
IN UIM_CD 56
PEDET_OC-PCIE/GND-SATA SSCLK
71 GND_71 3P3VAUX_70 70
73 GND_73 3P3VAUX_72 72
75 USB3.0IND/GND-OTHER 3P3VAUX_74 74
GND_G1
GND_G2

LOTES_APCI0018_P005A_75P
A A
G2
G1

6026B0243101
KEY B TYPE
NGFF WWAN
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
WWAN NGFF

REFERENCE NUMBER:1400~1499 SIZE CODE

DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 56 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

CN3601
DETECT1#1 47 32
DETECT1# PREP#
IN ISO_PREP#
54 2 48
RD_DP IN RJ45_B+ RJ45_D+
IN D_DP 54
54 3 49
RD_DN IN RJ45_B- RJ45_D-
IN D_DN 54
4 GND GND 50
5 51 C_DP 54
54 TD_DP IN RJ45_A+ RJ45_C+
IN
54 6 52 54
TD_DN IN RJ45_A- RJ45_C-
IN C_DN
7 GND GND 53
8 Reserved Reserved 54
9 Reserved Reserved 55
10 GND GND 56
32 54 11 57
LANLINK_STATUS IN RJ45_LINKLED# Reserved PCIe TX1+

54 12 58
LED_3S_LANACT# IN RJ45_ACTLED# Reserved PCIe TX1-
1 13 59
TP3601 TP24
Reserved GND

59 14 60
C LINE_IN_SENSE IN LINE_IN_SENSE Reserved PCIe RX1+
C
59 15 61
LINE_OUT_SENSE IN LINE_OUT_SENSE Reserved PCIe RX1-
16 AUDIOAGND GND 62
59 17 63 70
A_LINEINL_DOCK IN LINE_IN_L Reserved DPB_ML1+
IN DPB0_DOCK_DP
59 18 64 70
A_LINEINR_DOCK IN LINE_IN_R Reserved DPB_ML0-
IN DPB0_DOCK_DN
19 AUDIOAGND GND 65
59 20 66 70
PR_AOUT_L_DOCK IN LINE_OUT_L Reserved DPB_ML1+
IN DPB1_DOCK_DP
59 21 67 70
PR_AOUT_R_DOCK IN LINE_OUT_R Reserved DPB_ML1-
IN DPB1_DOCK_DN
22 AUDIOAGND GND 68
51 23 69
LED_PWRSTBY# IN PWRLED Reserved DPB_ML2+

70
68 24 70
DPB_DOCK_HPD IN Reserved DPB_HPD Reserved DPB_ML2-
25 GND GND 71
26 Reserved DPB_CTRLDATA
Reserved DPB_ML3+ 72
27 Reserved DPB_CTRLCLK
Reserved DPB_ML3- 73
28 GND GND 74
68 29 75
DPB_DOCK_DAT_AUX_DN IN Reserved DPB_AUX- DP_ML0+
IN DPA0_DOCK_DP 70
68 30 76
DPB_DOCK_CLK_AUX_DP IN Reserved DPB_AUX+ DP_ML0-
IN DPA0_DOCK_DN 70
31 GND GND 77
28 32 78
I2C_CLK IN Reserved PCIe CLK1+ DP_ML1+
IN DPA1_DOCK_DP 70
28 33 79
I2C_DATA IN Reserved PCIe CLK1- DP_ML1-
IN DPA1_DOCK_DN 70
68 34 80
DPA_DOCK_HPD IN DPA_HPD GND

68 35 81
DPA_DOCK_DAT IN DPA_CTRLDATA DP_ML2+
IN DPA2_DOCK_DP 70
68 36 82
DPA_DOCK_CLK IN DPA_CTRLCLK DP_ML2-
IN DPA2_DOCK_DN 70
B 29 DOCK_ID1 IN 37 DOCK_ID1 GND 83 B
68 38 84
DPA_DOCK_AUX_DN IN DPA_AUX- DP_ML3+
IN DPA3_DOCK_DP 70
68 39 85
DPA_DOCK_AUX_DP IN DPA_AUX+ DP_ML3-
IN DPA3_DOCK_DN 70
16 40 86
SLP_S3#_3R IN SLP_S3# GND

27 41 87 32
SLP_S4#_KBC IN RESERVED_SLP_S4# USB3_RX+
OUT USB30_RX0_DP
42 88 32
VA_ON# USB3_RX-
OUT USB30_RX0_DN
26 43 89
ON_OFF# IN NBSWON# GND

32 44 90
PVADPTR USB_P0_DP BI RESERVED (I2C_CLK/USB1+) USB3_TX+
IN USB30_TX0_DP 32
32 45 91
USB_P0_DN BI RESERVED (I2C_Data/USB1-) USB3_TX-
IN USB30_TX0_DN 32
7 46 92 DETECT1#
LIMIT_SIGNAL IN DOCK_ADP_SIGNAL DETECT2#
P1 VA(120W) GND G1
G3 G2
0.1UF_25V_3

0.1UF_25V_3

GND GND
1

G4 GND GND G5
C3600

C3601

FOX_QL1046L_D262AR_7H_92P

6012B0449701
2

AGND_AUDIO

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DOCKING CONN.
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 57 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D P3V3S
P5V0S D

2
2
R118
R113 P3V3S
CN200
47K_5%_2 1 1
47K_5%_2 2
P3V3DS 2

1
3

1
3
IN 55 58 62 4
WL_LED_ALL# 5
4

3
5
62 57 51 6
Q112 LED_PWRSTBY# OUT 7
6
51 33 BAT_GRNLED# OUT

D
7
30 1 51 8
WWAN_TRANSMIT_OFF# IN G
BAT_AMBERLED# OUT 9
8
33 LED_3S_SATA# OUT 9

S
30 10
SSM3K7002BFU HDD_HALTLED IN 11
10
62 58 55 WL_LED_ALL# OUT 11
12
2
12
13 13
29 14
SC_PWRSV# OUT 15
14
32 USB_P7_DN BI 15
IN 56 16
LED_WWAN_LINK# 32 USB_P7_DP BI 17
16
51 IM_5S_DATA BI 17
C 51 18 C
IM_5S_CLK BI 19
18
19
20
P3V3S_ISCT IN 21
20
21

WLAN_WWAN_BLUETOOTH_ LED 50
50
39
39
38
38
28
28
26
26
PCH_3S_SMDATA BI
PCH_3S_SMCLK BI
22
23
22
23
24 24
58 25 G1
ST_LEFT BI 26
25 G
G2
58 ST_RIGHT BI 26 G

ACES_50501_0264N_001_26P

TMP121029001

P3V3S P5V0S
1

1
0_5%_2_DY

0_5%_2
R203

R204

B SMART CARD AND TOUCHPAD D/B W TO B CONN B

2

CN202
8 8
7 7 G G2
6 6 G G1
58 5
SP_DATA_Q BI 5
58 4
SP_CLK_Q BI 4
58 3
ST_LEFT BI 3
2 2
58 1
ST_RIGHT BI 1

HIROSE_FH34SRJ_8S_0_5SH_50_8P
6012B0474701
STICK POINT
P5V0S P3V3S
4.7K_5%_2_DY

4.7K_5%_2_DY

4.7K_5%_2_DY

4.7K_5%_2_DY

5V 3.3V
1

R201 INSTALL UNINSTALL

R201

R202

R205

R206

A R202 INSTALL UNINSTALL A

R203 UNINSTALL INSTALL
2

R204 INSTALL UNINSTALL

P3V3S

Q200
S1 1 SP_DATA BI 51
2 G1 1 R207 2
6 0_5%_2 SP_DATA_Q BI 58
D1
SP_CLK_Q
INVENTEC
D2 3 58
R208 BI
5 G2 1 2
4 0_5%_2 SP_CLK BI 51
S2
L2N7002DW1T1G_DY TITLE
MODEL,PROJECT,FUNCTION
STICK POINT OPTION STICK POINT & B2B CNTR

REFERENCE NUMBER:100~199 SIZE

A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 58 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

59 SENSE_B IN
X5R

20K_1%_2
1
C511
59 PR_AOUT_L_AB IN 1 + 2 PR_AOUT_C_L_DOCK 1 R522 2
OUT PR_AOUT_L_DOCK 57

R528
150UF_6.3V 30_1%_3
C512
P3V3S 59 1 + 2 PR_AOUT_C_R_DOCK 1 R523 2
PR_AOUT_R_AB IN OUT PR_AOUT_R_DOCK 57

2
Q528 30_1%_3
150UF_6.3V

10K_5%_2
L2N7002DW1T1G

20K_1%_2

20K_1%_2
X5R

1
57 S1 1
2 X5R
LINE_IN_SENSE IN G1 C526
A_LINEINR

R517
R504
100K_5%_2

R502
6 1 2 1 2

2 R503
59 OUT IN A_LINEINR_DOCK 57
2
D1
D2 3 D500 6.2K_1%_2
5 2.2UF_6.3V_3
R529

G2

2
C514
4 51 A_SD# IN 1 2
SPKR_EN_AB A_LINEINL

2
1 2 1 R505 2
S2 59 OUT IN A_LINEINL_DOCK 57
D 6.2K_1%_2
D

2K_5%_2_DY

2K_5%_2_DY
1N4148WS_7_F 2.2UF_6.3V_3

0.1UF_16V_2
1

R506 2

R507 2
AGND_AUDIO

C527
AGND_AUDIO R531
X5R
39.2K_1%_2 AGND_AUDIO
2
57
LINE_OUT_SENSE SENSE_A 59 60

1
IN OUT
100K_5%_2
1
R530

P5V0S_AUDIO_AVDD P5V0S
P3V3S P3V3S AGND_AUDIO INT-SPEAKER CONN.
2

750MA
AGND_AUDIO
85MA

0.1UF_16V_2

0.1UF_16V_2

10UF_6.3V_3
1UF_6.3V_2

1UF_6.3V_2
1

1
1

1
P5V0S_AUDIO_AVDD

10UF_6.3V_3
0.1UF_16V_2

0.1UF_16V_2
1 CN640

C506

C507

C509

C510
1UF_6.3V_2 C502

C508
59 1
C505 SPK_OUT_R_DP IN 1
59 2 G1
C503 SPK_OUT_R_DN IN 2 G
59 3 G2
C504 SPK_OUT_L_DN IN 3 G

2.49K_1%_2

2.49K_1%_2
1

1
59 4
SPK_OUT_L_DP

2
IN 4

2
U501
C C
2

2
ACES_50271_0040N_001_4P

2 R512
1 27

2 R511
DVDD_CORE AVDD1
38
AVDD2
6012B0194003
3 45

2200PF_50V_2

2200PF_50V_2

2200PF_50V_2

2200PF_50V_2
DVDD_IO PVDD1
AGND_AUDIO 59

1
39
PVDD2
SENSE_A IN
59 SENSE_B IN

1000PF_50V_2

1000PF_50V_2

C640

C641

C642

C643
9 13
DVDD SENSE_A OUT SENSE_A 59

1
14
SENSE_B OUT SENSE_B 59

C524

C525
28
PR_AOUT_L_AB 59

2
P3V3S
HP0_PORTA_L OUT
29
HP0_PORTA_R OUT PR_AOUT_R_AB 59
VREFOUT_A 23

2
6

R534 2

R535 2

R536 2

R537 2
33
67

3.3_5%_2

3.3_5%_2

3.3_5%_2

3.3_5%_2
AZ_R3S_BITCLK IN HDA_BITCLK
31 60
5
HP1_PORTB_L
32
OUT HP_OUT_L1
33
67 AZ_R3S_SDOUT HP_OUT_R1 60
4.7K_5%_2

IN HDA_SDO HP1_PORTB_R OUT

1

X7R
33 10 19 C530 1 2 1UF_6.3V_3 60
AZ_R3S_SYNC IN HDA_SYNC PORTC_L
A_MIC IN
1 2 R513

20
EXT_MIC_JACK 60

1
PORTC_R IN
33 AZ_R3S_SDIN0 OUT 1 R514 82
HDA_SDI VREFOUT_C/GPIO4 24
OUT MIC_BIAS 60 AGND_AUDIO
33_5%_2
33 11 15
AZ_R3S_RST# IN HDA_RST# PORTE_L
0_5%_2_DY
21 R515 1

PORTE_R 16
0.01UF_50V_2

B B
C522

PORTF_L 17
IN A_LINEINL 59

SPKR_EN_AB 47
PORTF_R 18
IN A_LINEINR 59
10PF_50V_2_DY

EAPD
40 59
SPK_OUT_L_DP
2

R516 SPK_PORTD_+L OUT P5V0S_AUDIO_AVDD

44 DMIC_CLK OUT 1 2 DMIC_CLK/GPIO1 SPK_PORTD_-L 41
OUT SPK_OUT_L_DN 59
C523

44 IN 100_5%_24
DMIC_DAT
DMIC0/GPIO2

1
44

10K_5%_2
SPK_PORTD_+R OUT SPK_OUT_R_DP 59
48 43 59
SPDIFOUT0/GPIO3 SPK_PORTD_-R OUT SPK_OUT_R_DN

R508
46
2

DMIC1/GPIO0/SPDIFOUT1
MONO_OUT 25
C518 R509 C520
36 12 1 2 PCBEEP_IC_C 2 1 1 2

2
CAP+ PCBEEP

52
0.1UF_16V_2 PCBEEP_IC_CR PCBEEP_CRC

REC_MUTE_LED_CNTR OUT 100K_5%_2 0.1UF_16V_2

3
0.01UF_50V_2
62 PLAY_MUTE_LED_CNTR OUT

1
21

10K_5%_2
VREFFILT Q500
C521 22

D
CAP2

C519

2 R510
1 35 2 34 1
CAP- V- G
IN A_3S_ICHSPKR 29
37
P5V0S

10UF_6.3V_3
1UF_6.3V_2
VREG(+2.5V)
4.7UF_6.3V_3

4.7UF_6.3V_3

4.7UF_6.3V_3

S
1

1
7 SSM3K7002BFU

2
X5R DVSS
1

C515

C516

C529

2
C517
42 PVSS AVSS1 26
30
P5V0S_AUDIO_AVDD AVSS2

2
C500
A 49 PAD AVSS3 33 A
2

2
1UF_6.3V_2_DY 1
U500
5 AGND_AUDIO
10UF_6.3V_3

IN OUT
IDT_92HD91B2X5NLGXWCX_QFN_48P
2

AGND_AUDIO
C501

2 GND
64
43 31 R520
24
28
16
26
SLP_S3#_3R IN 3 EN N/C 4 1 2
C7551 EMI SOLUTION
57 51
TI_HPA01091DBVR_SOT23_5P SHORT_0805_40 AGND_AUDIO 1 2
2

R521
0.1UF_16V_2

INVENTEC
1 2
C7552
SHORT_0805_40 1 2
AGND_AUDIO
0.1UF_16V_2 TITLE
MODEL,PROJECT,FUNCTION
AUDIO CODEC

REFERENCE NUMBER:500~549 AGND_AUDIO AGND_AUDIO SIZE

A4
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01

CHANGE by XXX DATE 21-OCT-2002 SHEET 59 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P5V0S_AUDIO_AVDD
IN VREF_EQ 60 C615
C612 1 2

1
59 2 1
A_MIC OUT
0.1UF_16V_2
C616 15PF_50V_2
D 100PF_50V_2 R612 U610 X7R
2 1 1 1OUT VDD+ 8
L627
AGND_AUDIO
D
C620 BLM18PG600SN1D 100K_5%_2

2
1 2 1 2 2 R617 1 2 7
60 59 EXT_MIC_JACK IN 1IN- 2OUT IN VREF_EQ 60

1
10K_5%_2 3 6
0.47UF_10V_3 1IN+ 2IN-

C617 R618 1
X5R 4 GND 2IN+ 5 2
68PF_50V_2 100K_5%_2
TI_TLV2462CDGKR_MSOP_8P

1
0.1UF_16V_2
100K_5%_2

2.2UF_6.3V_2
C614
AGND_AUDIO

R619

C613
2

2
X7R X5R

REFERENCE NUMBER:600~649 AGND_AUDIO

C C

B JACK600 B
7 1 L602 2
7 OUT EXT_MIC_JACK 59 60
5 R602
5 BLM18PG600SN1D
2 16_1%_2
1 2 59
4 1 2 1 R600
59 IN MIC_BIAS
4
3
L600 IN HP_OUT_L1
3 FBM_11_160808_121T 2.2K_5%_2
1 R601 2 16_1%_2

1
1 2 1 59
1
2
L601 IN HP_OUT_R1
2 FBM_11_160808_121T OUT JACK_DET C600
6 6 1UF_6.3V_2
0.033UF_16V_2

0.033UF_16V_2
1

1
220PF_50V_2

SINGA_2SJ3005_023111F_7P

2
C601

C602

C603

TMP121022002 P5V0S_AUDIO_AVDD
2

SENSE_A 59
OUT AGND_AUDIO
1
1
R603
R604
100K_5%_2
20K_1%_2
2
2
AGND_AUDIO

3
AGND_AUDIO Q600

D
A 1 G A

S
SSM3K7002BFU

REFERENCE NUMBER:600~610
2
AGND_AUDIO

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
EXT. MIC AMP. & AUDIO JACK
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 60 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
PCIE_WAKE# BI 29 54 55 56 D

SD_MMC_CD# IN 61
SD_MMC_WP 61 P3V3A
IN
CR_GPIO 1 2
P3V3A
R802
10K_5%_2

4.7UF_6.3V_3
32
31
30
29
28
27
26
25

0.1UF_16V_2
1

1
U800

C803

C807
WAKE#
MS_INS#
SD_CD#
SP7

NC
NC
GPIO
3V3aux

2
56
33 28 26 BUF_PLT_RST# 1 24
IN PERST# NC
55 53 51
IN CLKREQ_PCIE6_L0_N 2 CLKREQ# NC 23
34 PCIE_TX6_L0_C_DP 3 22
33 IN HSIP NC P3V3S_VCC_READER
33 IN PCIE_TX6_L0_C_DN 4 HSIN SP6 21 SD_MMC_DATA2 IN 61
C 34 IN CLK_PCIE6_L0_DP 5 REFCLKP SP5 20 SD_MMC_DATA3 IN 61 C
34 IN CLK_PCIE6_L0_DN 6 REFCLKN SP4 19 SD_MMC_CMD IN 61
33 PCIE_RX6_L0_C_DP 0.1UF_16V_2 PCIE_RX6_L0_DP 7 18 P3V3D_P1V8D
OUT C813 1 2 0.1UF_16V_2 HSOP DV33_18

0.1UF_16V_2
10UF_6.3V_3
PCIE_RX6_L0_C_DN PCIE_RX6_L0_DN SD_MMC_CLK

1
33 8 17 61
OUT IN

1UF_6.3V_2
C811 HSON SP3

1
1 2

C808

C810
CARD_3V3

C802
3V3_IN

DV12S
RREF
AV12
33

SP1
SP2
GND

NC

2
2
REALTEK_RTS5237_GR_QFN_32P
CN820

9
10

12
13
14
15
16
11
R801 4 SD_VDD
1 2
6.2K_1%_2 SD_MMC_CLK 5
61 IN SD_CLK
SD_MMC_DATA0 IN 61 61 IN SD_MMC_CMD 2 SD_CMD
P1V2_CR SD_MMC_DATA1 61
IN
61 IN SD_MMC_DATA0 7 SD_DATA0
P1V2_PHY_CR 61 SD_MMC_DATA1 8
IN SD_DATA1
SD_MMC_DATA2 9
1

61 IN SD_DATA2
P3V3S
0.1UF_16V_2

61 IN SD_MMC_DATA3 1 SD_DATA3_CD
C806

B 61 SD_MMC_WP 10 B

4.7UF_6.3V_3
IN SD_WP
SD_MMC_CD# 11

1
0.1UF_16V_2
61 IN SD_CD_SW
12
2

SD_COM

C801

C800
0.1UF_16V_2
10UF_6.3V_3

3 G1
1

SD_VSS1 GND1
P3V3S_VCC_READER 6 SD_VSS2 GND2 G2
C804

C805

2
PLAST_CS1R_211_H_N_12P

TMP120912001
2

DGND_CHASSIS3

P1V2_CR P1V2_PHY_CR
R800
1 2

A 0_5%_2 A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CARD READER
DOC.NUMBER REV
REFERENCE NUMBER:800~899 SIZE
A3
CODE
CS 1310xxxxx-0-0
SHEET
X01

CHANGE by XXX DATE 21-OCT-2002 61 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3S
P3V3DS

47K_5%_2
1

S
R131
DIODES_DMP2305U_SOT23_3P
R132 Q127

S
1 2 G
MUTE BOTTON G

32

CSC0402_DY
330K_5%_2

D
SW154 Q126
SCAN_3S_OUT(17) 3

D
OUT 3 4 4

C101
1
ISCT_LED#

D
G
IN
KSCAN_3S_IN(0)

S
52

2
IN 1 1 2 2
SSM3K7002BFU

GND
D

2
D
MISAKI_NTC011_BA1J_A160T_4P

G1
6026B0239401
P3V3S_ISCT

EVL_23_22B_Y2ST3D_C30_2T_4P R126 EVL_23_22B_Y2ST3D_C30_2T_4P

Q125 D126 270_5%_2 R115
WIRELESS BOTTON PLAY_MUTE_LED_CNTR S1 1
Yellow PureWhite 270_5%_2
2 2 3 1 2
SW152 59 OUT G1 - +
IN WL_LED_ALL# 1 - + 4 1 2
6 58 55
OUT SCAN_3S_OUT(17) 3 3 4 4
D1
D2 3 1 - + 4
2 - + 3
5 G2 PureWhite Yellow
4
52 KSCAN_3S_IN(1) 6011B0137801

3
IN 1 1 2 2 S2 D110
L2N7002DW1T1G Q110
GND

6011B0137801

D
R124 R130
MISAKI_NTC011_BA1J_A160T_4P 1 G
10K_5%_2 2 1
G1

S
6026B0239401 10K_5%_2
SSM3K7002BFU
MUTE LED

2
C C

2
WIRELESS/BLUETOOTH LED
S9101

SCREW660_800_NP_1P
1

DGND_PBN
P3V3AL_PB
0.1UF_16V_2
1

P3V3AL_PB
C9113

B P3V3DS B
CN290
1 1
U9100 CN9100
58 57 51 2
1 VDD 62 6 6 G2 G2 LED_PWRSTBY# IN 2
57 51 26 3
ON_OFF# IN
2

5 G1 3
62 LED_PWRSTBY#_PB IN 5 G1
4
3 4 51 44 LID_SW#_3 IN 4
DGND_PBN GND 62 ON_OFF#_PB IN 4
5 G1
3 5 G1
LID_SW#_3_PB IN 3
6 G2
OUT LID_SW#_3_PB 2 6 G2
62 2 Output 2
1 1 ACES_51571_0064N_001_6P
BCD_AH9249NTR_G1_TSOT23_3P
ACES_51571_0064N_001_6P

6012B0481801
SW9100
OUT ON_OFF#_PB 3 3 4 4 DGND_PBN
DGND_PBN
1 1 2 2 DGND_PBN
6012B0481801
GND

MISAKI_NTC011_BA1J_A160T_4P
POWER SWITCH B TO B CONN
G1

P3V3AL_PB
D9100
6026B0239401
A A
OUT LED_PWRSTBY#_PB 1 2 1 R9100 2
62
360_5%_2
19_217_W1D_AP1Q2QY_3T
FIX9102 FIX9103
DGND_PBN 6011B0028601
1

FIX_MASK FIX_MASK

POWER SWITCH DAUGHTER BOARD INVENTEC

FIX9100 FIX9101
REFERENCE NUMBER:9100~9199 TITLE
MODEL,PROJECT,FUNCTION
BUTTON LED
1

FIX_MASK FIX_MASK
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 62 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

XTAL_12M_OUT 12MHZ_DY
X9000
XTAL_12M_IN 1 3

18PF_50V_2_DY
18PF_50V_2_DY

NC
4 2
AU9542 AU9560

1
P5V0S_SM P3V3AL_SM

C9018

C9019
D9031
24MA

NC
X9000 R9031 2
C9108 INSTALL UNINSTALL LED_SM_PWRSTBY# IN
1 1 2 2 1
C9109 270_5%_2
6011B0115101

2
PVSM_VCC_SM EVL_12_21_T3D_CP1Q2B12Y_2C_2P
C9006
P3V3S_SM_AB
0.1UF_16V_2 DGND_SM DGND_SM
POWER LED
P3V3AL_SM

1
2
R9012 D9032

1
U9000 1 2 WHITE
59 SCARDC8 1 28 2 Pure White
IN 2
SCARD0C8 XO
27 0_5%_2_DY BAT_SM_GRNLED# OUT -
R9032 2
R9000 59 SCARDC6 R9002 1 1
IN SCARD0C6 XI +
D 4.7K_5%_2 59 3 26 1 R9011 2 59 3 Yellow
SCARDFCB IN SCARD0FCB PWRSV_SEL IN 100K_5%_2 BAT_SM_AMBERLED# OUT -
270_5%_2
4 SMIO_5VPWR LEDCRD 25 YELLOW D
0_5%_2 SC_PWRSV#_SM
DGND_SM 59 SCARDRST 5 24 EVL_12_22_Y2ST3D_C30_2C_3P

2
IN SCARD0RST LEDPWR

2
R9001 2 59 SCARDCLK 6 23
59 SCARDDATA IN SCARD0CLK RESET
1

P3V3S_SM_AB
IN
470_5%_2
USB_P7_SM_DN IN
7
8
SCARD0DATA
DM
EEPDATA
EEPCLK
22
21
P3V3S_SM_AB
BATTERY LED 6011B0137701

1
9 20
USB_P7_SM_DP IN DP P1-6
WHITE D9033 P3V3S_ISCT_SM
10 19 ICCINSERTN
11
AV33 ICCINSERTN
18
OUT 59 C9011 2 Pure White
- R9033
PVSM_VCC_SM SCPWR0 VDDH
1UF_6.3V_2 1 1 2
12 17 +
5VGND VDDP P1V8S_SM 270_5%_2
1

1
3 -
Yellow
13 5VINPUT VDD 16
YELLOW

2
14 15

3
C9005 V33OUT V18OUT
1

C9010 EVL_12_22_Y2ST3D_C30_2C_3P
ALCOR_AU9560_GBS_GR_SSOP_28P Q9031
C9004
0.1UF_16V_2
DGND_SM WIRELESS LED

D
0.1UF_16V_2 1 6011B0137701
WL_LED_SM_ALL# IN G
P5V0S_SM P3V3S_SM_AB
2

2
1UF_6.3V_2
DGND_SM

S
1

1
2

SSM3K7002BFU
C9009 C9007

2
DGND_SM 1UF_6.3V_2
DGND_SM
1

2
DGND_SM C9003 C9002
0.1UF_16V_2
C9001 C9000 P3V3S_SM
1UF_6.3V_2 0.1UF_16V_2 1UF_6.3V_2
C 0.1UF_16V_2 C
DGND_SM
2

2
DGND_SM

1K_5%_2
1

1
10K_5%_2

R9036
R9035
DGND_SM DGND_SM

2
2
HDD_STP#
PVSM_VCC_SM
CN9001 P3V3S_ISCT_SM
Q9032
1 1
VCC
HDD_SM_HALTLED IN S1
IN LED_3S_SM_SATA#
59 SCARDRST 2 2 G1
OUT

100K_5%_2_DY
RST

1
59 SCARDCLK 3 P5V0S_SM 6 WHITE 2 Pure White D9030
R9034
OUT CLK
CN9000 -
0.1UF_16V_2

1 D1
1

59 SCARDFCB 4 D2 3 1 1 2
OUT C4
P3V3S_SM 2
1 +

R9037
C9015

59 SCARDC6 6 5 G2 3 Yellow
OUT VPP
3
2
HDD_STP# IN -
270_5%_2
7 4
SCARDDATA OUT IO P3V3AL_SM 3
YELLOW
SCARDC8 OUT
8 C8 4 4
L2N7002DW1T1G
S2
6011B0137701

2
5 5 EVL_12_22_Y2ST3D_C30_2C_3P
9 6
ICCINSERTN LED_SM_PWRSTBY# IN
2

OUT SW-CD
7
6

BAT_SM_GRNLED# OUT 7
B 10
5
SW-CD-GND
GND
BAT_SM_AMBERLED#
LED_3S_SM_SATA# IN
OUT 8
9
8
9
SATA LED & HDD-HALTED LED B

DGND_SM HDD_SM_HALTLED IN
10 10 DGND_SM
HAMB_083AA24F08B_10P 11
WL_LED_SM_ALL# IN 11

6026B0198201
12 12
S9005 DGND_SM
13 13
S9002 DGND_SM 1
DGND_SM SMART CARD READER CONN SC_PWRSV#_SM IN 14 14 1
SCREW240_460_0_1P
USB_P7_SM_DN IN 15 15
SCREW550_860_0_NP_1P S9006 DGND_SM
16 1
USB_P7_SM_DP IN 17
16

P3V3S_ISCT_SM IM_5S_DATA_SM BI 17
SCREW240_460_0_1P
P3V3S_ISCT_SM 18
IM_5S_CLK_SM BI 19
18
DGND_SM
P3V3S_SM 19 S9007 1
CN9021 1 R9039 2 20
59 BI ST_RIGHT_SM 1 1
20
SCREW250_460_0_1P
0_5%_2_DY

0_5%_2 21
ST_LEFT_SM 2 21
DGND_SM
R9038 2

R9040 2

59 BI 2 22
IM_5S_CLK_SM 3 PCH_3S_SMDATA_SM BI 22 S9008 1
0_5%_2

59 BI 3 23
59 BI IM_5S_DATA_SM 4 4 PCH_3S_SMCLK_SM BI 24
23
SCREW250_400_0_1P
5 24
5 25 G1
59 BI PCH_3S_SMCLK_SM 6 6 G G1 ST_LEFT_SM BI 26
25 G
G2
59 PCH_3S_SMDATA_SM 7 G2 ST_RIGHT_SM BI 26 G
1

BI 7 G
8 8
S9003 DGND_SM
1
HIROSE_FH34SRJ_8S_0_5SH_50_8P ACES_50501_0264N_001_26P
1

6012B0474701 FIX9006 FIX9007 SCREW220_600_1P

TMP121029001
C9021

1000PF_50V_2

A A
DGND_SM S9004 DGND_SM
2

DGND_SM

1
FIX_MASK FIX_MASK 1
DGND_SM DGND_SM SCREW560_860_0_NP_1P

DGND_SM TOUCHPAD FIX9004

1 FIX9005

1
FIX_MASK FIX_MASK

REFERENCE NUMBER:9000~9099 FIX9000 FIX9001 FIX9002 FIX9003

DGND_SM
INVENTEC
S9001 1 TITLE

SMART CARD DOUGHTER BOARD SCREW550_860_0_NP_1P MODEL,PROJECT,FUNCTION

SMART CARD DB
1

FIX_MASK FIX_MASK FIX_MASK FIX_MASK

DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 63 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

F F

CN3056
48 BI CRT_VSYNC_DB 40 40
48 BI CRT_HSYNC_DB 39 39
38 38 G2 G2
48 IN CRT_G_DB 37 37 G1 G1
48 IN CRT_R_DB 36 36
48 IN CRT_B_DB 35 35
34 34
48 BI CRT_DDCDATA_DB 33 33
48 BI CRT_DDCCLK_DB 32 32
31 31 DGND_USB
48 BI USB_P3_DN_DB 30 30
48 BI USB_P3_DP_DB 29 29
28 28
48 OUT USB30_RX3_DN_DB 27 27
48 OUT USB30_RX3_DP_DB 26 26
25 25
48 IN USB30_TX3_DN_DB 24 24
48 IN USB30_TX3_DP_DB 23 23
E 22 E
22
48 BI USB_P1_DN_DB 21 21
48 BI USB_P1_DP_DB 20 20
19 19
48 OUT USB30_RX1_DN_DB 18 18
48 OUT USB30_RX1_DP_DB 17 17
16 16
48 IN USB30_TX1_DN_DB 15 15
48 IN USB30_TX1_DP_DB 14 14
13 13
48 IN CPPWR_EN_DB 12 12
P5V0DS_DB 48 IN SLP_S4#_3R_DB 11 11
48 IN SLP_S3#_3R_DB 10 10
9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1

ACES_51517_04001_001_40P

6012B0218428
D
USB DB DGND_USB
D

CN3055
42 BI CRT_VSYNC 1 1
42 BI CRT_HSYNC 2 2
3 3

IN CRT_G_L 4 4
42C2 CRT_R_L 5
42C2 IN 5

IN CRT_B_L 6 6
42C2 7 7
42 BI CRT_DDCDATA 8 8
42 BI CRT_DDCCLK 9 9
10 10
C 32 BI USB_P3_DN 11 11 C
32 BI USB_P3_DP 12 12
13 13
32 OUT USB30_RX3_DN 14 14
32 OUT USB30_RX3_DP 15 15
16 16
32 IN USB30_TX3_DN 17 17
32 IN USB30_TX3_DP 18 18
19 19
32 USB_P1_DN 20
BI USB_P1_DP 21
20
32 BI 21
22 22
32 IN USB30_RX1_DN 23 23
32 IN USB30_RX1_DP 24 24
25 25
32 OUT USB30_TX1_DN 26 26
32 OUT USB30_TX1_DP 27 27
P5V0DS 28 28
51 OUT CPPWR_EN 29 29
16 OUT SLP_S4#_3R 30 30
16 OUT SLP_S3#_3R 31 31
29 IN PLT_ID3 32 32
33 33
34 34
35 35
36 36
37 37 G1 G1
B 38 38 G2 G2 B
39 39
40 40

ACES_51517_04001_001_40P

6012B0218428

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
RESERVE

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 64 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

P3V3S_CAM

D CN600
1 1
OUT DMIC_CLK_DB D
2
2 OUT DMIC_DATA_DB
3 3
4 4 1 2
5 5 L603 BLM15AG121SN1D_500MA
6 6

1
7 7
8 8
G1 9 C604
G 9
G2 G 10 10 1UF_16V_3
ACES_50376_01001_001_10P

2
6012B0452401
DGND_SYS1 DGND_SYS1
DGND_SYS1

C C

P3V3S_CAM
P3V3S_CAM
1000PF_50V_2

1000PF_50V_2
4.7UF_6.3V_3

4.7UF_6.3V_3
1

1
C650

C651

C652

C653
2

2
KNOWLES_SPK0415HM4H_B_8P
KNOWLES_SPK0415HM4H_B_8P
MIC600 MIC601
1 VDD CLOCK 3 1 VDD CLOCK 3
B DATA 4 DATA 4 B
5 DGND_SYS1 5 DGND_SYS1
GND_1 GND_1
6 2 6 2
GND_2 SELECT
IN DMIC_DATA_DB GND_2 SELECT
IN DMIC_DATA_DB
7 GND_3 7 GND_3
8 8
GND_4
IN DMIC_CLK_DB GND_4
IN DMIC_CLK_DB
2

LEFT
10K_5%_2

RIGHT P3V3S_CAM
R640

10K_5%_2
DGND_SYS1 R641
DGND_SYS1
1

DGND_SYS1

A A
FIX600

FIX_MASK
1

FIX601
REFERENCE NUMBER:600~649
FIX_MASK INVENTEC
MIC DOUGHTER BOARD
1

TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 65 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

S3
D S14
SCREW320_700_800_1P
D
SCREW320_700_800_1P

1
1
SCREW330_600_0_1P

STDPAD_1.15_6-TOP
S8 S7

S13 SCREW330_600_0_1P ST23

1
ST17 1MM
SCREW300_700_1P
STDPAD_3.15_5.5_TOP
1

1
S10 S9

1.6MM
1
SCREW320_600_1P ST22
SCREW320_600_1P S6 S25
1MM

1
STDPAD_1.15_6-TOP
SCREW330_600_0_1P SCREW330_600_0_1P STDPAD_3.15_5.5_TOP
S12

1
1

1
SCREW320_600_1P S4
SCREW300_700_1P S15
ST19 S18 S21
1

SCREW300_700_1P
SCREW320_600_1P

1
SCREW350_700_NP_1P
S11

1
C C

1.6MM
1
S2
SCREW300_600_1P
S24
1

SCREW320_800_NP_1P

1
STDPAD_1.15_6-TOP

SCREW315_550_1P
ST21

1
1.6MM
1

6052B0103501
6052B0103501
6052B0103501

S16

B SCREW300_700_1P B
1

FIX1 FIX2

FIX_MASK FIX_MASK
1

FIX3 FIX4

A FIX_MASK FIX_MASK A
1

FIX5 FIX6

FIX_MASK FIX_MASK

INVENTEC
1

FIX7 FIX8
TITLE

FIX_MASK FIX_MASK MODEL,PROJECT,FUNCTION

SCREW
1

DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 66 of 77

8 7 6 5 4 3 2 1
 A
B
C
D

8
8

C7553
2 1
CSC0402_DY

P3V3S
C7554
2 1
CSC0402_DY

AZ_R3S_BITCLK
C7556
C7542

IN
2 1 2 1
CSC0402_DY
CSC0402_DY C7512

PVPACK
C7557 C7543 2 1
SPI_CLK_FLH

2 1 2 1
CSC0402_DY
CSC0402_DY CSC0402_DY

7
IN
7

C7544
2 1 C7510
CSC0402_DY 2 1
C7545 CSC0402_DY
2 1
CSC0402_DY

C7546
AZ_R3S_SDOUT IN

2 1
C7559
CSC0402_DY
2 1 C7513
2 1

P1V5
CSC0402_DY C7547
CLK_R3S_KBPCI

C7560 2 1 CSC0402_DY
2 1
IN

CSC0402_DY

6
6

CSC0402_DY
10

C7511
C7561
2 1
2 1
CSC0402_DY
CSC0402_DY
C7562
2 1
VRPVBAT_3V

CSC0402_DY
C7514
IN
VRPVDDQ IN

2 1
CSC0402_DY
PVBAT

C7536 C7528
C7515
2 1 2 1
2 1

EMI SOLUTION
CSC0402_DY CSC0402_DY
CSC0402_DY

5
5

C7537 C7529
C7516
C7564 2 1 2 1
2 1
2 1 CSC0402_DY CSC0402_DY
CSC0402_DY
CSC0402_DY
C7517
C7565
2 1
2 1
CSC0402_DY
CSC0402_DY
C7518
C7566
2 1
2 1
CSC0402_DY
CSC0402_DY
VRPVBAT_5V

C7567 C7519
P5V0DS
R_SPI_CLK_FLH

2 1 2 1
IN

CSC0402_DY CSC0402_DY
4

IN

4
C7568
C7534
2 1 2 1 C7533
CSC0402_DY CSC0402_DY 2 1
PVSIM

C7569
C7535 CSC0402_DY
2 1
IN

2 1
CSC0402_DY
CSC0402_DY
C7540
2 1
CSC0402_DY
C7570
C7541
2 1 2 1
CLK_KBC_SIO

CSC0402_DY CSC0402_DY
P5V0S

CHANGE by
3

3
IN
11

C7531
XXX

2 1
C7555 CSC0402_DY
VRP1V05A

2 1
CSC0402_DY
IN

P1V05S

C7538
2 1
CSC0402_DY
DATE

C7539
CLK_R3S_TPM

2 1
2

CSC0402_DY
IN

C7532
21-OCT-2002

2 1
RF SOLUTION

CSC0402_DY
A3
SIZE
TITLE

CS
CODE

67SHEET
of
1

DOC.NUMBER

1
1310xxxxx-0-0

77
EMI & RF SOLUTION
INVENTEC
MODEL,PROJECT,FUNCTION

X01
REV
A
B
C
D
 8 7 6 5 4 3 2 1

MLPS TABLE THERM SENSOR

P3V3S
U5001
PART 2 0F 9

MUTI GFX
AD29 GENLK_CLK NC#AU24 AU24
F AC29 GENLK_VSYNC NC#AV23 AV23 F

0.1UF_16V_2
1
C5306
MMBT3904

10K_5%_2
NC#AT25 AT25

2 R5307 1
1
AJ21 AR24

2.2K_5%_2
SWAPLOCKA
DPA NC#AR24 Q5300

R5305
AK21 SWAPLOCKB 3 2

2
C E
NC#AU26 AU26
NC#AV25 AV25

AR8 AT27 C5302

2
NC#AR8 NC#AT27
1 2
AU8 NC#AU8 NC#AR26 AR26
AP8 DBG_CNTL0
AW8 AR30 1000PF_50V_2 U5300
NC#AW8 NC#AR30
1 8
AR3 AT29 VDD SMCLK BI THERM_CLK_GPU
NC#AR3 NC#AT29
GPU_THRM_DPLUS 2 7
AR1 DP SMDATA BI THERM_DATA_GPU
NC#AR1
GPU_THRM_DMINUS 3 6
AU1 DBG_DATA0 NC#AV31 AV31 DN ALERT# OUT THERM_SCI#
25 16 1 2 4 5
AU3 DBG_DATA1 NC#AU30 AU30 EN_5V_3V OUT THERM#/ADDR GND
DPB R5303
AW3 DBG_DATA2
AP6 AR32 0_5%_2 SMSC_EMC1412_1_ACZL_TR_MSOP_8P
DBG_DATA3 NC#AR32
25 1 2
AW5 DBG_DATA4 NC#AT31 AT31 THERM# OUT
AU5 R5304
DBG_DATA5
AR6 AT33 0_5%_2_DY
DBG_DATA6 NC#AT33
AW6 DBG_DATA7 NC#AU32 AU32
AU6 DBG_DATA8 P3V3S
AT7 DBG_DATA9 NC#AU14 AU14
AV7 DBG_DATA10 NC#AV13 AV13

1
AN7

10K_5%_2
DBG_DATA11
P3V3S_DGPU

R5320
AV9 DBG_DATA12 NC#AT15 AT15
AT9 DBG_DATA13 NC#AR14 AR14
AR10 DBG_DATA14
E AW10 DBG_DATA15
DPC
NC#AU16 AU16 E
AU10 AV15 OUT CLKREQ_PCIE5_N

2
DBG_DATA16 NC#AV15
AP10 DBG_DATA17
OUT DGPU_PWR_EN
AV11 AT17

3
DBG_DATA18 NC#AT17
AT11 AR16

3
DBG_DATA19 NC#AR16 Q5322

45.3K_1%_2

45.3K_1%_2
1

1
AR12 Q5321

D
DBG_DATA20
AW12 AU20 1
NC#AU20
DGPU_PWR_EN IN G

D
DBG_DATA21

R5045

R5047
AU12 AT19 1
DBG_DATA22 NC#AT19
DGPU_PWR_EN# IN G

S
AP12 DBG_DATA23

S
NC#AT21 AT21 SSM3K7002FU_DY
AR20 SSM3K7002BFU

2
NC#AR20

2
DPD
THERM_CLK_GPU OUT R5046 1 2 0_5%_2_DY AJ23 SMBCLK
SMBus NC#AU22 AU22
THERM_DATA_GPU OUT R5048 1 2 0_5%_2_DY AH23 SMBDATA NC#AV21 AV21

NC#AT23 AT23
P3V3S_DGPU P3V3S_DGPU NC#AR22 AR22
AK26 SCL
I2C
AJ26 SDA P3V3S_DGPU
P3V3S_DGPU
P3V3S_DGPU
10K_5%_2_DY

AD39 Q5314
R
1 THERM_CLK_GPU
2

2
10K_5%_2

GENERAL PURPOSE I/O AD37

S1
IN 50 68
AVSSN
R5014

100K_5%_2 2
R5069 GPU_GPIO0 G1
R5013

AH20 GPIO_0
6 PCH_KBC_SMCLK 28 51
1 2 GPU_GPIO1 AH18 AE36 IN
GPIO_1 G D1
3 PCH_KBC_SMDATA

1
P3V3S

10K_5%_2

10K_5%_2
GPU_GPIO2 AN16 AD35
D2
IN 28 51
P3V3S_DGPU

2
GPIO_2 AVSSN

R5079

R5033
5 G2
D5000 4 THERM_DATA_GPU 50 68
1
1

AF37 IN

NC
B S2
D DGPU_VID5 OUT DGPU_VID1 OUT 3 1 AH17 AE38 L2N7002DW1T1G Q5311 D
ADP_PRES_OUT IN GPIO_5_AC_BATT AVSSN
2 3
10K_5%_2_DY

DGPU_VID6 AJ17 GPIO_6_TACH

S D
DAC1
2

10K_5%_2

2
AK17 GPIO_7_BLON HSYNC AC36
R5011

1
GPU_GPIO8

200_5%_2
R5015

BAT54_30V_0.2A AJ13 GPIO_8_ROMSO VSYNC AC38

R5313
AM2321P

G
1UF_6.3V_2

10K_5%_2
GPU_GPIO9 AH15 GPIO_9_ROMSI

C5309

R5310
DGPU_VID5 AJ16 GPIO_10_ROMSCK
R5026 P1V8S_DGPU
GPU_GPIO11

1
AK16 GPIO_11 RSET AB34 1 2
GPU_GPIO12
1
1

AL16 GPIO_12 499_1%_2

3 2
GPU_GPIO13 AM16 GPIO_13 AVDD AD34

2
AM14 AE34

10UF_6.3V
70 DPB_DOCK_HPD OUT GPIO_14_HPD2 AVSSQ
DGPU_VID3

0.1UF_16V_2
1

1
P3V3S_DGPU AM13

1UF_6.3V_2
GPIO_15_PWRCNTL_0 Q5312
DGPU_VID2

C5045

C5047
1
AK14 AC33 R5308

C5046
GPIO_16 VDD1DI

D
1 R5068 2 AG30 AC34 1 2 1
DGPU_PWR_EN# IN

1
GPIO_17_THERMAL_INT VSS1DI G
AN14 GPIO_18_HPD3
10K_5%_2_DY

S
68 GPU_CTF OUT AM17 1K_5%_2

2
GPIO_19_CTF
DGPU_VID1 AL13 V13 SSM3K7002BFU

2
GPIO_20_PWRCNTL_1 NC#V13

P3V3S_DGPU P3V3S_DGPU P3V3S_DGPU AJ14 U13 THRMTRIP# OUT

2
GPIO_21 NC#U13
GPU_GPIO22 AK13 GPIO_22_ROMCSB NC#AF33 AF33
68 AN13 AF32
CLKREQ_PCIE5_N OUT CLKREQB NC#AF32

3
NC#AA29 AA29
AG21 Q5000
10K_5%_2_DY

10K_5%_2_DY

10K_5%_2_DY

NC#AG21
DGPU_VID4

D
AG32 AC32
2

GPIO_29 NC#AC32
G 1
IN GPU_CTF 68
R5016

R5027

R5022

AG33 GPIO_30
NC_SVI2#AC31 AC31

10K_5%_2_DY
AJ19 GENERICA NC_SVI2#AD30 AD30

1
AK19 GENERICB NC_SVI2#AD32 AD32 L2N7002WT1G_DY

2
AJ20
1

GENERICC

R5057
C AK20 C
DGPU_VID2 OUT DGPU_VID3 OUT DGPU_VID4 OUT GENERICD
AJ24 GENERICE_HPD4
AH26
2

2
10K_5%_2

10K_5%_2

10K_5%_2

GENERICF_HPD5

2
AH24 GENERICG_HPD6
R5030

R5019

R5031

P1V8S_DGPU
AM34 68 P1V8S_DGPU
PS_0
IN PS_0
AC30
2

499_1%_2
1

CEC_1

8.45K_1%_2
1
P1V8S_DGPU
R5020

R5003
68
70 57 AK24 AD31 68
DPA_DOCK_HPD OUT HPD1
MLPS PS_1
IN PS_1

8.45K_1%_2
1
R5001
1

AH13 AG31 68
PS_2

2
DBG_VREFG PS_2
IN
P3V3S_DGPU 68 PS_1 OUT
0.1UF_16V_2
1

P3V3S
2

249_1%_2

2
C5083

BACO

CSC0402_DY
5.11K_1%_2_DY

1
68 PS_0 OUT
CLOSE TO GPU

2K_1%_2
R5023

1 AL21 AD33 68
TP5060 TP24
PX_EN PS_3
IN PS_3

R5004

C5020
2

0.082UF_16V
100K_5%_2_DY

1
2K_1%_2

1
C5019
R5098

R5002
1
2

1
1

R5053
DEBUG DDC/AUX

2
2
AM26 57
DPA_DOCK_CLK

2
DDC1CLK
BI
1

GPU_TESTEN AN26
DPA_DOCK_DAT 57

2
DDC1DATA
BI

2
AD28 TESTEN

2
AM27 57
P3V3S_DGPU
AUX1P
BI DPA_DOCK_AUX_DP
AL27 57
AUX1N
BI DPA_DOCK_AUX_DN
1

B B
1K_5%_2

100K_5%_2_DY
10K_5%_2_DY GPU_TRSTB AM23
R5059
R5065

1
2 1 AM19
JTAG_TRSTB DDC2CLK
BI DPB_DOCK_CLK_AUX_DP
GPU_TRSTB R5064 1
10K_5%_2_DY GPU_TDI AN23

R5054
1 2 AL19 P1V8S_DGPU
TP30 TP5030
JTAG_TDI DDC2DATA
BI DPB_DOCK_DAT_AUX_DN
2 R5063 1 10K_5%_2_DY GPU_TCK AK23
1 GPU_TDI JTAG_TCK
P1V8S_DGPU
10K_5%_2_DY GPU_TMS AL24
TP30 TP5031 2 R5061 1 AN20
P3V3S_DGPU
JTAG_TMS AUX2P
BI DPB_DOCK_CLK_AUX_DP

RSC_0402_DY
2

GPU_TCK R5066
10K_5%_2_DY GPU_TDO AM24

1
1 2 1 AM20
TP30 TP5032
JTAG_TDO AUX2N
BI DPB_DOCK_DAT_AUX_DN

RSC_0402_DY
2
GPU_TMS

R5009
1
1
TP30 TP5033 NC#AL30 AL30

R5007
10K_5%_2_DY

GPU_TDO

51K_5%_2_DY

51K_5%_2_DY
1 AM30
TP30 NC#AM30

1
2

TP5034
R5012

R5051

R5052
THERMAL
AL29

2
NC#AL29
GPU_THRM_DPLUS AF29 DPLUS NC#AM29 AM29
68

2
GPU_THRM_DMINUS AG29 DMINUS PS_3 OUT
AN21 68 PS_2

CSC0402_DY
OUT

4.75K_1%_2
NC#AN21

1
2

2
1

NC#AM21 AM21

C5022
0.68UF_10V_2
GPU_FDO

4.75K_1%_2

R5010
1

1
AK32 GPIO_28_FDO

C5021
NC#AK30 AK30

R5008
2

10K_5%_2

P1V8S_DGPU AL31 TS_A NC#AK29 AK29

R5000

13 MA

2
1 100K_5%_2
AJ30
2 R5049 L5011 DDCVGACLK
68
70 57 DPB_DOCK_HPD IN 1 2 P1V8S_GPU_TSVDD AJ32 AJ31

2
TSVDD DDCVGADATA

2 100K_5%_2
AJ33
1 R5028 TSVSS
68
70 57 DPA_DOCK_HPD IN
1

0.1UF_16V_2

BLM15AG121SN1D_500MA
1

10UF_6.3V
1UF_6.3V_2
C5084

1
C5057
1
C5056

AMD_MARS_M2_FCBGA_962P
2 2

A A
2

FOR MARS ENBLE MLPS

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
AMD-THAMES-1

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 68 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

F F

E E

D D

C C

B B

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
Block Diagram

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 69 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

F F

U5001

PART 1 0F 9

32 AA38 Y33 PEG_RX0_DP C5001 1 2 0.22UF_16V_2 32

PEG_TX0_C_DP IN PCIE_RX0P PCIE_TX0P
OUT PEG_RX0_C_DP
32 Y37 Y32 PEG_RX0_DN C5002 1 2 0.22UF_16V_2 32
PEG_TX0_C_DN IN PCIE_RX0N PCIE_TX0N
OUT PEG_RX0_C_DN U5001

Y35 W33 PEG_RX1_DP C5003 1 2 0.22UF_16V_2 PART 7 0F 9

32 PEG_TX1_C_DP IN PCIE_RX1P PCIE_TX1P
OUT PEG_RX1_C_DP 32
32 W36 W32 PEG_RX1_DN C5004 1 2 0.22UF_16V_2 32
PEG_TX1_C_DN IN PCIE_RX1N PCIE_TX1N
OUT PEG_RX1_C_DN
RSVD/VARY_BL AK27
RSVD/DIGON AJ27
32 W38 U33 PEG_RX2_DP C5005 1 2 0.22UF_16V_2 32
PEG_TX2_C_DP IN PCIE_RX2P PCIE_TX2P
OUT PEG_RX2_C_DP LVDS CONTROL
32 V37 U32 PEG_RX2_DN C5006 1 2 0.22UF_16V_2 32
PEG_TX2_C_DN IN PCIE_RX2N PCIE_TX2N
OUT PEG_RX2_C_DN

E 32 V35 U30 PEG_RX3_DP C5007 1 2 0.22UF_16V_2 32 AK35 E

PEG_TX3_C_DP IN PCIE_RX3P PCIE_TX3P
OUT PEG_RX3_C_DP TXCBP_DPB3P
32 U36 U29 PEG_RX3_DN C5008 1 2 0.22UF_16V_2 32 AL36
PEG_TX3_C_DN IN PCIE_RX3N PCIE_TX3N
OUT PEG_RX3_C_DN TXCBM_DPB3N

TX3P_DPB2P AJ38
U38 PCIE_RX4P PCIE_TX4P T33 TX3M_DPB2N AK37
T37 PCIE_RX4N PCIE_TX4N T32
AH35 57
TX4P_DPB1P
IN DPB1_DOCK_DP
AJ36 57
TX4M_DPB1N
IN DPB1_DOCK_DN
T35 PCIE_RX5P PCIE_TX5P T30
R36 T29 AG38 57
PCIE_RX5N PCIE_TX5N TX5P_DPB0P
IN DPB0_DOCK_DP

LVTMDP
AH37 57
TX5M_DPB0N
IN DPB0_DOCK_DN
R38 PCIE_RX6P PCIE_TX6P P33 NC#AF35 AF35
P37 PCIE_RX6N PCIE_TX6N P32 NC#AG36 AG36

P35 PCIE_RX7P PCIE_TX7P P30

N36 PCIE_RX7N PCIE_TX7N P29
AP34
TXCAP_DPA3P
IN DPA3_DOCK_DP 57
AR34
TXCAM_DPA3N
IN DPA3_DOCK_DN 57
N38 NC#N38 NC#N33 N33
M37 N32 AW37
NC#M37 NC#N32 TX0P_DPA2P
IN DPA2_DOCK_DP 57
AU35
TX0M_DPA2N
IN DPA2_DOCK_DN 57
M35 N30 AR37
NC#M35 NC#N30 TX1P_DPA1P
IN DPA1_DOCK_DP 57
L36 N29 AU39
NC#L36 NC#N29 TX1M_DPA1N
IN DPA1_DOCK_DN 57

D TX2P_DPA0P AP35
IN DPA0_DOCK_DP D
L38 L33 AR35 57
NC#L38 NC#L33 TX2M_DPA0N
IN DPA0_DOCK_DN
PCI EXPRESS INTERFACE

K37 L32 57
NC#K37 NC#L32
NC#AN36 AN36
NC#AP37 AP37
K35 NC#K35 NC#L30 L30
J36 NC#J36 NC#L29 L29

J38 NC#J38 NC#K33 K33

H37 NC#H37 NC#K32 K32 AMD_MARS_M2_FCBGA_962P

H35 NC#H35 NC#J33 J33

G36 NC#G36 NC#J32 J32

G38 NC#G38 NC#K30 K30

F37 NC#F37 NC#K29 K29

F35 NC#F35 NC#H33 H33

E37 NC#E37 NC#H32 H32

CLOCK
C CLK_PCIE5_DP IN AB35 PCIE_REFCLKP C
AA36
CLK_PCIE5_DN IN PCIE_REFCLKN

PVPCIE
CALIBRATION
R5017 1.69K_1%_2 PVPCIE
PCIE_CALR_TX Y30 PVDDCI_PCIE_CALRP 1 2
R5060 R5018 1K_1%_2
1 2 AH16 TEST_PG PCIE_CALR_RX Y29 PVDDCI_PCIE_CALRN 1 2

1K_5%_2
AA30
PEG_PLT_RST# IN PERSTB

P3V3S

AMD_MARS_M2_FCBGA_962P

1
5
U5010
TSB_TC7SH17F_SSOP_5P_DY

1
2 2 4 4

3
R5420
1 2
DPA_DOCK_HPD IN

3
2
0_5%_2
P3V3S

BAT54C
A2
B R5421 B
1 2
C5150
1 2 R5099
10K_5%_2_DY 3 1 2
C OUT DGPU_HPD_INTR#

2
0.1UF_16V_2
D5433 0_5%_2
D5422
P3V3S
5

NC
U5005 P3V3S 1 3
A1
1 10K_5%_2_DY
DGPU_HOLD_RST#
+

BI R5425
1 2
4 1 R5431 2
R5110 BI PEG_PLT_RST# R5426
1 10K_5%_2_DY
2 BAT54_30V_0.2A_DY
2

3
R5423 5.1K_5%_2_DY
1

1 2

100K_5%_2
1 2

1
DPB_DOCK_HPD IN R5430 Q5432
-

C5427 1UF_6.3V_2_DY D5429 1 2

TC7SZ08FU

R5434
D
100K_5%_2 1 2 1 100K_5%_2_DY
0_5%_2 DPA_DOCK_HPD IN 1 3 1
3

3 G
1 2 2
DPB_DOCK_HPD IN 2

S
R5424 C5428 1UF_6.3V_2_DY SSM3K7002BFU_DY
1 2 PANASONIC_DB3X313J0L_SOT_3P_DY

2
54 28 PLT_RST#

2
BI
10K_5%_2_DY

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
Block Diagram

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 70 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
D

U5001

PART 9 0F 9
P1V8S_DGPU

L5023
130 MA XTALIN AV33 GPU_XTALIN
1 2 P1V8S_DGPU_MPLL_PVDD
R5021

10UF_6.3V
0.1UF_16V_2
GPU_XTALOUT

1UF_6.3V_2
BLM15AG221SN1D_300MA

1
2 1
1M_5%_2

1 1
C5036

C5035
C5034
X5000
C AU34
1 3 C

2
XTALOUT
4 2

2
27MHZ_12PF
H7 MPLL_PVDD
H8

12PF_50V_2

12PF_50V_2
MPLL_PVDD

1
C5069

C5067
XO_IN AW34

AM10 SPLL_PVDD
P1V8S_DGPU

2
75 MA

PLLS/XTAL
L5014
1 2 P1V8S_DGPU_SPLL_PVDD AN9 SPLL_VDDC XO_IN2 AW35
10UF_6.3V
0.1UF_16V_2

1UF_6.3V_2
BLM15AG121SN1D_500MA
1

1
1 1
C5156

C5155
C5157

AN10 SPLL_PVSS
2
2

CLKTESTA AK10
B AF30 NC_XTAL_PVDD CLKTESTB AL10 B
AF31 NC_XTAL_PVSS

PVPCIE

L5005
100 MA
1 2 PVPCIE_DGPU_SPLL_VDDC
10UF_6.3V
0.1UF_16V_2

AMD_MARS_M2_FCBGA_962P
1UF_6.3V_2

BLM15AG121SN1D_500MA
1

1
C5162

C5160

1 1
C5161
2 2
2

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 71 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D
U5001 D
PART 8 0F 9
PVPCIE
DP_VDDR DP_VDDC
L5001
DP_VDDC AP31 280 MA 1 2
AP32

10UF_6.3V
DP_VDDC

0.1UF_16V_2

1UF_6.3V_2
BLM15PD600SN1D

1
DP_VDDC AN33

1 1
AP33

C5148
DP_VDDC

C5085

C5081
AN24 NC#AN24 DP_VDDC AL33
AP24 NC#AP24 DP_VDDC AM33
AP25 AK33

2 2
NC#AP25 DP_VDDC
AP26 AK34

2
NC#AP26 DP_VDDC
AU28 NC#AU28 DP_VDDC AN31
AV29 NC#AV29

AP20 NC#AP20 NC#AP13 AP13

AP21 NC#AP21 NC#AT13 AT13
AP22 AP14
NC#AP22 NC#AP14
NC_CAP
AP23 NC#AP23 NC#AP15 AP15
P1V8S_DGPU AU18 NC#AU18

10UF_6.3V
C AV19 C

0.1UF_16V_2

1UF_6.3V_2
NC#AV19

1
DP GND
237 MA HDMI

1 1
C5027
C5023

C5024
AN27
188 MA DP AH34 DP_VDDR
DP_VSSR
DP_VSSR AP27
AJ34 DP_VDDR DP_VSSR AP28

2 2
AF34 AW24
0.1UF_16V_2
1UF_6.3V_2

DP_VDDR DP_VSSR
1

2
10UF_6.3V

AG34 DP_VDDR DP_VSSR AW26

C5144

C5147
1 1

AM37 AN29
C5143

DP_VDDR DP_VSSR
AL38 DP_VDDR DP_VSSR AP29
AM32 DP_VDDR DP_VSSR AP30
AW30
2

DP_VSSR
2

AW32
2

DP_VSSR
DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
DP_VSSR AW20
CALIBRATION
DP_VSSR AW22
DP_VSSR AN34
B AP39 B
R5025 DP_VSSR
1 2 AW28 NC#AW28 DP_VSSR AR39
DP_VSSR AU37
150_1%_2_DY DP_VSSR AF39
R5024 DP_VSSR AH39
1 2 AW18 NC#AW18 DP_VSSR AK39
DP_VSSR AL34
150_1%_2_DY DP_VSSR AV27
R5029 DP_VSSR AR28
1 2 AM39 DP_CALR DP_VSSR AV17
DP_VSSR AR18
150_1%_2 AN38
DP_VSSR
DP_VSSR AM35
DP_VSSR AN32

AMD_MARS_M2_FCBGA_962P

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 72 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PVCORE_DGPU
PAD5001
1 2
P1V35S_DGPU VRPVCORE_DGPU IN 1 2

POWERPAD_2_0610

330UF_2.5V_DY
F F

1
C5151
U5001
P1V8S_DGPU

+
PART 6 0F 9

0.1UF_16V_2

0.1UF_16V_2

2.2UF_6.3V_2

0.1UF_16V_2

2.2UF_6.3V_2

2.2UF_6.3V_2
1

1
C5126

C5125

C5114

C5113

C5111

C5116

2
AB39 PCIE_VSS GND A3
E39 A37

0.01UF_50V_2
PCIE_VSS

0.1UF_16V_2
GND

1
1UF_6.3V_2
U5001 F34 PCIE_VSS GND AA16

C5121

C5077

C5028
F39 AA18

2
PCIE_VSS GND
PART 5 0F 9
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
MEM I/O
1.5A
AC7 AA31
H31 PCIE_VSS GND AA23

2
VDDR1 NC#AA31
H34 PCIE_VSS GND AA26
AD11 VDDR1 NC#AA32 AA32
H39 PCIE_VSS GND AA28
AF7 VDDR1 NC#AA33 AA33
J31 PCIE_VSS GND AA6
AG10 VDDR1 NC#AA34 AA34
J34 PCIE_VSS GND AB12
AJ7 VDDR1 NC#W30 W30
K31 PCIE_VSS GND AB15
AK8 VDDR1 NC#Y31 Y31
K34 PCIE_VSS GND AB17
AL9 VDDR1 NC_BIF_VDDC V28
K39 PCIE_VSS GND AB20
G11 W29

PCIE
VDDR1 NC_BIF_VDDC
100 MA PVPCIE L31 PCIE_VSS GND AB22
G14 VDDR1 PCIE_PVDD AB37
L34 PCIE_VSS GND AB24
G17 VDDR1
G20 VDDR1 PCIE_VDDC
2.5A
G30
M34 PCIE_VSS GND AB27
M39 PCIE_VSS GND AC11
G23 G31

10UF_6.3V

10UF_6.3V
VDDR1 PCIE_VDDC
N31 PCIE_VSS GND AC13

1
G26 H29

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
VDDR1 PCIE_VDDC
N34 PCIE_VSS GND AC16

C5108

C5109

C5095

C5103

1
G29 H30

C5123

C5094
VDDR1 PCIE_VDDC
P31 AC18

10UF_6.3V

10UF_6.3V

10UF_6.3V
PCIE_VSS GND
H10 J29

1
2.2UF_6.3V_2

2.2UF_6.3V_2
VDDR1 PCIE_VDDC

1
P34 PCIE_VSS GND AC2
C5025 J7 VDDR1 PCIE_VDDC J30

C5026

1
P39 AC21

C5000

C5117

C5115
PCIE_VSS GND
E J9 L28 E

2 2

2
VDDR1 PCIE_VDDC
R34 AC23

1
PCIE_VSS GND
K11 M28

2
VDDR1 PCIE_VDDC
T31 PCIE_VSS GND AC26
K13 VDDR1 PCIE_VDDC N28
T34 AC28

2
PCIE_VSS GND
K8 VDDR1 PCIE_VDDC R28
T39 AC6
2

2
PCIE_VSS GND
L12 VDDR1 PCIE_VDDC T28
U31 PCIE_VSS GND AD15
L16 VDDR1 PCIE_VDDC U28
U34 PCIE_VSS GND AD17
L21 VDDR1
V34 PCIE_VSS GND AD20
L23 VDDR1
L26 VDDR1 BIF_VDDC
1.4A
N27
V39 PCIE_VSS GND AD22
BACO PVCORE_DGPU W31 PCIE_VSS GND AD24
L7 VDDR1 BIF_VDDC T27
W34 PCIE_VSS GND AD27
M11 VDDR1
Y34 PCIE_VSS GND AD9
N11 VDDR1
Y39 PCIE_VSS GND AE2
P7 VDDR1 VDDC AA15
CORE GND AE6
R11 VDDR1 VDDC AA17
AF10

10UF_6.3V

10UF_6.3V

10UF_6.3V

10UF_6.3V
GND
U11 VDDR1 VDDC AA20

1
P1V8S_DGPU AF16

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
GND
U7 VDDR1 VDDC AA22

C5087

C5089

C5082

1
AF18

C5142

C5139

C5140

C5141
GND
Y11 VDDR1 VDDC AA24
AF21

1
Y7 AA27 GND GND
VDDR1 VDDC
GND AG17
VDDC AB16
L5012 F15 AG2

2 2

2 2
GND GND
AB18
1 2 P1V8S_DGPU_VDD_CT VDDC
F17 AG20

2
GND GND
VDDC AB21
F19 GND
AB23

10UF_6.3V
VDDC
BLM15AG121SN1D_500MA F21 GND GND AG6
0.1UF_16V_2
1

1
LEVEL AB26

1UF_6.3V_2
VDDC
F23 GND GND AG9
13 MA
C5132

C5055

1
TRANSLATION AB28

C5065
VDDC
F25 GND GND AH21
AF26 AC17

1
VDD_CT VDDC
F27 GND GND AJ10
AF27 VDD_CT VDDC AC20
F29 GND GND AJ11
AG26 AC22

2 2
VDD_CT VDDC
F31 GND GND AJ2
D NEED TO CHECK POWER TIMING AG27 AC24 D
2

VDD_CT VDDC
F33 GND GND AJ28
VDDC AC27

1
F7 AJ6

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
GND GND
VDDC AD18

C5107

C5104

C5091

C5101

C5102

C5096

C5106
F9 GND GND AK11
I/O VDDC AD21
25 MA
AF23 VDDR3 VDDC AD23
G2 GND GND AK31
G6 GND GND AK7
AF24 VDDR3 VDDC AD26
H9 GND GND AL11
AG23 VDDR3 VDDC AF17
J2 AL14

2
GND GND
AG24 VDDR3 VDDC AF20
J27 GND GND AL17
VDDC AF22
J6 GND GND AL2
DVP VDDC AG16
300AD12
MA VDDR4 VDDC AG18
J8 GND GND AL20
K14 GND
AF11 VDDR4
K7 GND GND AL23
AF12 VDDR4 VDDC AH22
P3V3S_DGPU L11 GND GND AL26
AF13 VDDR4 VDDC AH27
L17 GND GND AL32
VDDC AH28
L2 GND GND AL6

1
M26

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
VDDC
L22 GND GND AL8

C5110

C5099

C5100

C5093

C5097

C5105

C5090
L5016 AF15 VDDR4 VDDC N24
L24 GND GND AM11
NEED TO CHECK POWER TIMING 1 2 AG11 VDDR4 VDDC R18
L6 GND GND AM31
AG13 VDDR4 VDDC R21
M17 GND GND AM9
BLM15AG121SN1D_500MA
1

AG15 R23
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

VDDR4 VDDC
M22 GND GND AN11
C5086

C5175

C5176

R26

2
VDDC
M24 GND GND AN2
VDDC T17
N16 GND GND AN30
VDDC T20
N18 GND GND AN6
VDDC T22
N2 GND GND AN8
T24
2

VDDC
N21 GND GND AP11
VDDC U16
N23 GND GND AP7
VDDC U18
N26 GND GND AP9
C VDDC U21
N6 GND GND AR5 C
VDDC U23
R15 GND GND B11
P1V8S_DGPU VDDC U26

1
R17 B13

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
GND GND
VDDC V17

C5127

C5128

C5129

C5130

C5131

C5136

C5133

C5134

C5135
R2 GND GND B15
VDDC V20
R20 GND GND B17
VDDC V22
R22 GND GND B19
VDDC V24
L5013 R24 GND GND B21
V27
1 2 P1V8S_DGPU_VDDR4 VDDC
R27 B23

2
GND GND
VDDC Y16
R6 GND GND B25
VDDC Y18
0.1UF_16V_2

BLM15AG121SN1D_500MA
1

T11 B27
1UF_6.3V_2

GND GND
VDDC Y21
C5152

C5098

T13 GND GND B29

VDDC Y23
PVCORE_DGPU T16 GND GND B31
VDDC Y26
T18 GND GND B33
VDDC Y28
T21 GND GND B7
8.8A T23 B9
2

GND GND
VDDCI AA13
T26 GND GND C1
VDDCI AB13
U15 GND GND C39
AC12

10UF_6.3V
VDDCI
U17 GND GND E35

1
AC15

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
VDDCI
U2 GND GND E5

C5164

C5165

C5158

1
AD13

C5159
VDDCI
U20 GND GND F11
AD16

1
VDDCI
U22 GND GND F13
M15
ISOLATED

VDDCI
U24 GND
M16
CORE I/O

2
VDDCI
U27 GND
M18
2

2
VDDCI
VOLTAGE U6 GND
VDDCI M23
SENESE V11 GND NC#AG22 AG22
VDDCI N13
V16 GND
AF28 N15
GPU_VCC_SENSE OUT FB_VDDC VDDCI
V18 GND
B VDDCI N17
V21 GND
B
VDDCI N20
V23 GND
NC FOR MARS
1 AG28 FB_VDDCI VDDCI N22
TP5001 V26 GND
VDDCI R12
W2 GND
VDDCI R13
W6 GND
AH29 R16
GPU_VSS_SENSE OUT FB_GND VDDCI
Y15 GND
VDDCI T12
Y17 GND
VDDCI T15
Y20 GND
VDDCI V15
Y22 GND VSS_MECH A39
VDDCI Y13
Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39

AMD_MARS_M2_FCBGA_962P
I181
AMD_MARS_M2_FCBGA_962P

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
AMD-THAMES-1

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 73 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U5001

PART 3 0F 9

VM_DQA0_<31..0> BI GDDR5/DDR3
VM_MAA0_<0> VM_MAA0_<7..0> VM_MAA0_<7..0>

MEMORY INTERFACE A
0 C37 G24 0
DQA0_0 MAA0_0/MAA_0 BI
1 C35 DQA0_1 MAA0_1/MAA_1 J23 VM_MAA0_<1>
1
2 A35 DQA0_2 MAA0_2/MAA_2 H24 VM_MAA0_<2>
2
3 E34 DQA0_3 MAA0_3/MAA_3 J24 VM_MAA0_<3>
3
4 G32 DQA0_4 MAA0_4/MAA_4 H26 VM_MAA0_<4>
4
D 5 D33 DQA0_5 MAA0_5/MAA_5 J26 VM_MAA0_<5>
5
6 F32 DQA0_6 MAA0_6/MAA_6 H21 VM_MAA0_<6>
6 D
7 E32 DQA0_7 MAA0_7/MAA_7 G21 VM_MAA0_<7>
7
8 D31 DQA0_8 MAA1_0/MAA_8 H19 VM_MAA1_<0>
0 VM_MAA1_<7..0> BI VM_MAA1_<7..0>
9 F30 DQA0_9 MAA1_1/MAA_9 H20 VM_MAA1_<1>
1
10 C30 DQA0_10 MAA1_2/MAA_10 L13 VM_MAA1_<2>
2
11 A30 DQA0_11 MAA1_3/MAA_11 G16 VM_MAA1_<3>
3
12 F28 DQA0_12 MAA1_4/MAA_12 J16 VM_MAA1_<4>
4
13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 VM_MAA1_<5>
5
14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VM_MAA1_<6>
6
15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VM_MAA1_<7>
7
16 D27 DQA0_16
17 F26 DQA0_17 WCKA0_0/DQMA_0 A32
BI VM_WCKA0_0_DP
18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32
BI VM_WCKA0_0_DN
19 A26 DQA0_19 WCKA0_1/DQMA_2 D23
BI VM_WCKA0_1_DP
20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22
BI VM_WCKA0_1_DN
21 C24 DQA0_21 WCKA1_0/DQMA_4 C14
BI VM_WCKA1_0_DP
22 A24 DQA0_22 WCKA1B_0/DQMA_5 A14
BI VM_WCKA1_0_DN
23 E24 DQA0_23 WCKA1_1/DQMA_6 E10
BI VM_WCKA1_1_DP
24
25
C22
A22
DQA0_24 WCKA1B_1/DQMA_7 D9
BI VM_WCKA1_1_DN
DQA0_25
26 F22 DQA0_26 EDCA0_0/QSA_0 C34
BI VM_EDCA0_0
27 D21 DQA0_27 EDCA0_1/QSA_1 D29
BI VM_EDCA0_1
C
28 A20 DQA0_28 EDCA0_2/QSA_2 D25
BI VM_EDCA0_2 C
29 F20 DQA0_29 EDCA0_3/QSA_3 E20
BI VM_EDCA0_3
30 D19 DQA0_30 EDCA1_0/QSA_4 E16
BI VM_EDCA1_0
31 E18 DQA0_31 EDCA1_1/QSA_5 E12
BI VM_EDCA1_1
VM_DQA1_<31..0> BI 0 C18 DQA1_0 EDCA1_2/QSA_6 J10
BI VM_EDCA1_2
1
2
A18
F18
DQA1_1 EDCA1_3/QSA_7 D7
BI VM_EDCA1_3
DQA1_2
3 D17 DQA1_3 DDBIA0_0/QSA_0B A34
BI VM_DDBIA0_0
4 A16 DQA1_4 DDBIA0_1/QSA_1B E30
BI VM_DDBIA0_1
5 F16 DQA1_5 DDBIA0_2/QSA_2B E26
BI VM_DDBIA0_2
6 D15 DQA1_6 DDBIA0_3/QSA_3B C20
BI VM_DDBIA0_3
7 E14 DQA1_7 DDBIA1_0/QSA_4B C16
BI VM_DDBIA1_0
8 F14 DQA1_8 DDBIA1_1/QSA_5B C12
BI VM_DDBIA1_1
9 D13 DQA1_9 DDBIA1_2/QSA_6B J11
BI VM_DDBIA1_2
10
11
F12
A12
DQA1_10 DDBIA1_3/QSA_7B F8
BI VM_DDBIA1_3
DQA1_11
12 D11 DQA1_12 ADBIA0/ODTA0 J21
BI VM_ADBIA0 76
13
14
F10
A10
DQA1_13 ADBIA1/ODTA1 G19
BI VM_ADBIA1 76
DQA1_14
15 C10 DQA1_15 CLKA0 H27
OUT VM_CLKA0_DP
16
17
G13
H13
DQA1_16 CLKA0B G27
OUT VM_CLKA0_DN
DQA1_17
18 J13 DQA1_18 CLKA1 J14
OUT VM_CLKA1_DP
B 19
20
H11
G10
DQA1_19 CLKA1B H14
OUT VM_CLKA1_DN B
DQA1_20
21 G8 DQA1_21 RASA0B K23
OUT VM_RASA0#
22 K9
K10
DQA1_22 RASA1B K19
OUT VM_RASA1#
P1V35S_DGPU P1V35S_DGPU 23 DQA1_23
24 G9 DQA1_24 CASA0B K20
OUT VM_CASA0#
25
26
A8
C8
DQA1_25 CASA1B K17
OUT VM_CASA1#
DQA1_26
27 E8 K24
OUT VM_CSA0#_0
40.2_1%_2

40.2_1%_2

DQA1_27 CSA0B_0
1

28 A6 DQA1_28 CSA0B_1 K27

R5103
1

R5102

29 C6 DQA1_29
30
31
E6
A5
DQA1_30 CSA1B_0 M13
K16
OUT VM_CSA1#_0
DQA1_31 CSA1B_1
2

L18 MVREFDA CKEA0 K21

OUT VM_CKEA076
L20 MVREFSA CKEA1 J20
OUT VM_CKEA1 76
1UF_6.3V_2
1

1
100_1%_2

100_1%_2

1UF_6.3V_2

VM_WEA0#
1
R5101

C5038

R5100

C5037

L27 K26 76
NC#L27 WEA0B OUT
N12
AG12
NC#N12 WEA1B L15
OUT VM_WEA1#
76
NC#AG12
2

H23
VM_MAA0_<8>
2

R5104 MAA0_8/MAA_13 BI
1 2 M27 MEM_CALRP0 MAA1_8/MAA_14 J19
M21
BI VM_MAA1_<8>
MAA0_9/MAA_15
A 120_1%_2 M12 NC#M12 MAA1_9/RSVD M20 A
AH12 NC#AH12

AMD_MARS_M2_FCBGA_962P

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-4
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 74 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

U5001

PART 4 0F 9

VM_DQB0_<31..0> BI GDDR5/DDR3
P8 VM_MAB0_<0> VM_MAB0_<7..0>
0
1
C5
C3
DQB0_0 MAB0_0/MAB_0
T9 VM_MAB0_<1>
0
1
BI VM_MAB0_<7..0>
DQB0_1 MAB0_1/MAB_1
2 E3 DQB0_2 MAB0_2/MAB_2 P9 VM_MAB0_<2>2
3 E1 DQB0_3 MAB0_3/MAB_3 N7 VM_MAB0_<3>3
4 F1 DQB0_4 MAB0_4/MAB_4 N8 VM_MAB0_<4>4
5 F3 DQB0_5 MAB0_5/MAB_5 N9 VM_MAB0_<5>5
6 F5 DQB0_6 MAB0_6/MAB_6 U9 VM_MAB0_<6>6
D 7 G4 DQB0_7 MAB0_7/MAB_7 U8 VM_MAB0_<7>7
Y9 VM_MAB1_<0> VM_MAB1_<7..0> D
8 H5 DQB0_8 MAB1_0/MAB_8
W9 VM_MAB1_<1>
0
BI VM_MAB1_<7..0>

MEMORY INTERFACE B
9 H6 DQB0_9 MAB1_1/MAB_9 1
10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VM_MAB1_<2>
2
11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VM_MAB1_<3>
3
12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VM_MAB1_<4>
4
13 L4 DQB0_13 MAB1_5/BA2 AA8 VM_MAB1_<5>
5
14 M6 DQB0_14 MAB1_6/BA0 Y8 VM_MAB1_<6>6
15 M1 DQB0_15 MAB1_7/BA1 AA9 VM_MAB1_<7>
7
16 M3 DQB0_16
17 M5 DQB0_17 WCKB0_0/DQMB_0 H3
BI VM_WCKB0_0_DP
18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1
BI VM_WCKB0_0_DN
19 P6 DQB0_19 WCKB0_1/DQMB_2 T3
BI VM_WCKB0_1_DP
20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5
BI VM_WCKB0_1_DN
21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4
BI VM_WCKB1_0_DP
22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5
BI VM_WCKB1_0_DN
23 T1 DQB0_23 WCKB1_1/DQMB_6 AK6
BI VM_WCKB1_1_DP
24
25
U4
V6
DQB0_24 WCKB1B_1/DQMB_7 AK5
BI VM_WCKB1_1_DN
DQB0_25
26 V1 DQB0_26 EDCB0_0/QSB_0 F6
BI VM_EDCB0_0
27 V3 DQB0_27 EDCB0_1/QSB_1 K3
BI VM_EDCB0_1
28 Y6 DQB0_28 EDCB0_2/QSB_2 P3
BI VM_EDCB0_2
29 Y1 DQB0_29 EDCB0_3/QSB_3 V5
BI VM_EDCB0_3
C 30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5
BI VM_EDCB1_0 C
31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1
BI VM_EDCB1_1
VM_DQB1_<31..0> BI 0 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9
BI VM_EDCB1_2
1
2
AB6
AB1
DQB1_1 EDCB1_3/QSB_7 AM5
BI VM_EDCB1_3
DQB1_2
3 AB3 DQB1_3 DDBIB0_0/QSB_0B G7
BI VM_DDBIB0_0
4 AD6 DQB1_4 DDBIB0_1/QSB_1B K1
BI VM_DDBIB0_1
5 AD1 DQB1_5 DDBIB0_2/QSB_2B P1
BI VM_DDBIB0_2
6 AD3 DQB1_6 DDBIB0_3/QSB_3B W4
BI VM_DDBIB0_3
7 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4
BI VM_DDBIB1_0
8 AF1 DQB1_8 DDBIB1_1/QSB_5B AH3
BI VM_DDBIB1_1
9 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8
BI VM_DDBIB1_2
10
11
AF6
AG4
DQB1_10 DDBIB1_3/QSB_7B AM3
BI VM_DDBIB1_3
DQB1_11
12 AH5 DQB1_12 ADBIB0/ODTB0 T7
BI VM_ADBIB0 77
13
14
AH6
AJ4
DQB1_13 ADBIB1/ODTB1 W7
BI VM_ADBIB1 77
DQB1_14
15 AK3 DQB1_15 CLKB0 L9
OUT VM_CLKB0_DP
16
17
AF8
AF9
DQB1_16 CLKB0B L8
OUT VM_CLKB0_DN
DQB1_17
18 AG8 DQB1_18 CLKB1 AD8
OUT VM_CLKB1_DP
19
20
AG7
AK9
DQB1_19 CLKB1B AD7
OUT VM_CLKB1_DN
DQB1_20
B B
21 AL7 DQB1_21 RASB0B T10
OUT VM_RASB0#
22
23
AM8
AM7
DQB1_22 RASB1B Y10
OUT VM_RASB1#
DQB1_23

P1V35S_DGPU P1V35S_DGPU 24 AK1 DQB1_24 CASB0B W10

OUT VM_CASB0#
25
26
AL4
AM6
DQB1_25 CASB1B AA10
OUT VM_CASB1#
DQB1_26
27
28
AM1
AN4
DQB1_27 CSB0B_0 P10
L10
OUT VM_CSB0#_0
40.2_1%_2

40.2_1%_2

DQB1_28 CSB0B_1
1

29 AP3 DQB1_29
1
R5108

R5005

30
31
AP1
AP5
DQB1_30 CSB1B_0 AD10
AC10
OUT VM_CSB1#_0
DQB1_31 CSB1B_1
2

CKEB0 U10
OUT VM_CKEB077
2

Y12
AA12
MVREFDB CKEB1 AA11
OUT VM_CKEB1 77
MVREFSB
1UF_6.3V_2

1UF_6.3V_2

VM_WEB0#
1

N10 77
100_1%_2

100_1%_2

WEB0B OUT
VM_WEB1#
1
R5107

C5039

R5006

C5040

AB11 77
WEB1B OUT

T8
VM_MAB0_<8>
2

MAB0_8/MAB_13 BI
W8
VM_MAB1_<8>
2

MAB1_8/MAB_14 BI
MAB0_9/MAB_15 U12
MAB1_9/RSVD V12
R5081 R5041
A A
DRAM_RST AH11 1 2 1 2
OUT DRAM_RST# 76 77

10_5%_2 51_1%_2

4.99K_1%_2

120PF_50V_2
1

AMD_MARS_M2_FCBGA_962P

1
R5080

C5174
INVENTEC
2

2
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-3
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 75 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

F F

P1V35S_DGPU
P1V35S_DGPU
U5551
U5501
VM_DQA0_<12> BI M2 DQ31|DQ7 VDDQ-B1 B1 VM_DQA1_<14> BI M2 DQ31|DQ7 VDDQ-B1 B1

VM_DQA0_<15> BI M4 DQ30|DQ6 VDDQ-B3 B3 VM_DQA1_<15> BI M4 DQ30|DQ6 VDDQ-B3 B3

VM_DQA0_<14> BI N2 DQ29|DQ5 VDDQ-B12 B12 VM_DQA1_<13> BI N2 DQ29|DQ5 VDDQ-B12 B12

VM_DQA1_<12>

10UF_6.3V_3
N4 B14
BI DQ28|DQ4 VDDQ-B14

0.1UF_16V_2

0.1UF_16V_2
VM_DQA0_<13>

10UF_6.3V_3

1
N4 B14

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
BI

0.1UF_16V_2

0.1UF_16V_2
DQ28|DQ4 VDDQ-B14
VM_DQA1_<10>

1
T2 D1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
VM_DQA0_<11> BI DQ27|DQ3 VDDQ-D1

C5556

C5557

C5558

C5559

C5560
T2 D1
BI DQ27|DQ3 VDDQ-D1
VM_DQA1_<8>

C5506

C5507

C5508

C5509

C5510

C5561

C5562
T4 D3
VM_DQA0_<9> BI T4 DQ26|DQ2 VDDQ-D3 D3 BI DQ26|DQ2 VDDQ-D3

VM_DQA0_<10> VM_DQA1_<11> BI U2 DQ25|DQ1 VDDQ-D12 D12

C5511

C5512
U2 D12
BI DQ25|DQ1 VDDQ-D12
VM_DQA1_<9> BI U4 DQ24|DQ0 VDDQ-D14 D14
VM_DQA0_<8> BI U4 DQ24|DQ0 VDDQ-D14 D14
VM_DQA1_<7> BI M13 DQ23|DQ15 VDDQ-E5 E5
VM_DQA0_<7> M13 E5

2
BI DQ23|DQ15 VDDQ-E5
VM_DQA1_<4> M11 E10

2
VM_DQA0_<6> BI M11 DQ22|DQ14 VDDQ-E10 E10 BI DQ22|DQ14 VDDQ-E10

VM_DQA0_<5> BI N13 VDDQ-F1 F1 VM_DQA1_<5> BI N13 DQ21|DQ13 VDDQ-F1 F1

VM_DQA1_<6>
DQ21|DQ13 N11 F3
VM_DQA0_<4> BI N11 DQ20|DQ12 VDDQ-F3 F3 BI DQ20|DQ12 VDDQ-F3

VM_DQA0_<0> BI T13 DQ19|DQ11 VDDQ-F12 F12 VM_DQA1_<1> BI T13 DQ19|DQ11 VDDQ-F12 F12

VM_DQA0_<2> BI T11 DQ18|DQ10 VDDQ-F14 F14 VM_DQA1_<0> BI T11 DQ18|DQ10 VDDQ-F14 F14

VM_DQA0_<1> BI U13 DQ17|DQ9 VDDQ-G2 G2 VM_DQA1_<3> BI U13 DQ17|DQ9 VDDQ-G2 G2

VM_DQA0_<3> BI U11 DQ16|DQ8 VDDQ-G13 G13 VM_DQA1_<2> BI U11 DQ16|DQ8 VDDQ-G13 G13

VM_DQA0_<27> BI F13 DQ15|DQ23 VDDQ-H3 H3 VM_DQA1_<27> BI F13 DQ15|DQ23 VDDQ-H3 H3

VM_DQA0_<29> BI F11 DQ14|DQ22 VDDQ-H12 H12 VM_DQA1_<24> BI F11 DQ14|DQ22 VDDQ-H12 H12

VM_DQA0_<25> BI E13 DQ13|DQ21 VDDQ-K3 K3 VM_DQA1_<26> BI E13 DQ13|DQ21 VDDQ-K3 K3

VM_DQA0_<26> BI E11 DQ12|DQ20 VDDQ-K12 K12 VM_DQA1_<25> BI E11 DQ12|DQ20 VDDQ-K12 K12
E VM_DQA0_<30> BI B13 DQ11|DQ19 VDDQ-L2 L2 VM_DQA1_<31> BI B13 DQ11|DQ19 VDDQ-L2 L2
E
VM_DQA0_<24> BI B11 DQ10|DQ18 VDDQ-L13 L13 VM_DQA1_<28> BI B11 DQ10|DQ18 VDDQ-L13 L13

VM_DQA0_<31> BI A13 M1 VM_DQA1_<30> BI A13 DQ9|DQ17 VDDQ-M1 M1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
DQ9|DQ17 VDDQ-M1
VM_DQA1_<29>

1
A11 M3

1UF_6.3V_2

1UF_6.3V_2
VM_DQA0_<28> BI A11 DQ8|DQ16 VDDQ-M3 M3 BI DQ8|DQ16 VDDQ-M3

VM_DQA1_<16>

C5513

C5514
F2 M12
VM_DQA0_<16> BI F2 M12 BI DQ7|DQ31 VDDQ-M12

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
DQ7|DQ31 VDDQ-M12
VM_DQA1_<17>

1
F4 M14

1UF_6.3V_2

1UF_6.3V_2
VM_DQA0_<18> BI DQ6|DQ30 VDDQ-M14

C5515

C5516

C5517

C5518
F4 M14
BI DQ6|DQ30 VDDQ-M14
VM_DQA1_<18>

C5563

C5564
E2 N5
VM_DQA0_<19> BI DQ5|DQ29 VDDQ-N5

C5565

C5566

C5567

C5568
E2 N5
BI DQ5|DQ29 VDDQ-N5
VM_DQA1_<19> BI E4 DQ4|DQ28 VDDQ-N10 N10
VM_DQA0_<17> BI E4 DQ4|DQ28 VDDQ-N10 N10
VM_DQA1_<23> B2 P1

2
VM_DQA0_<22> BI B2 DQ3|DQ27 VDDQ-P1 P1 BI DQ3|DQ27 VDDQ-P1

VM_DQA0_<21> BI B4 DQ2|DQ26 VDDQ-P3 P3 VM_DQA1_<20> BI B4 DQ2|DQ26 VDDQ-P3 P3

VM_DQA1_<22> A2 P12

2
VM_DQA0_<20> BI A2 DQ1|DQ25 VDDQ-P12 P12 BI DQ1|DQ25 VDDQ-P12

VM_DQA0_<23> BI A4 DQ0|DQ24 VDDQ-P14 P14 VM_DQA1_<21> BI A4 DQ0|DQ24 VDDQ-P14 P14

T1
VDDQ-T1
VDDQ-T1 T1
VDDQ-T3 T3
VDDQ-T3 T3
VDDQ-T12 T12
VDDQ-T12 T12
VDDQ-T14 T14
VDDQ-T14 T14
J5
J5 VM_MAA1_<8> BI RFU/A12/NC
VM_MAA0_<8> BI RFU/A12/NC
K4 C5
74 K4 C5 VM_MAA1_<7> BI A7/A8|A0/A10 VDD-C5
VM_MAA0_<0> BI A7/A8|A0/A10 VDD-C5
K5 C10
74 K5 C10 VM_MAA1_<6> BI A6/A11|A1/A9 VDD-C10
VM_MAA0_<1> BI A6/A11|A1/A9 VDD-C10
K10 D11
74 K10 D11 VM_MAA1_<5> BI A5/BA1|A3/BA3 VDD-D11
VM_MAA0_<3> BI A5/BA1|A3/BA3 VDD-D11
K11 G1
74 K11 G1 VM_MAA1_<4> BI A4/BA2|A2/BA0 VDD-G1
VM_MAA0_<2> BI A4/BA2|A2/BA0 VDD-G1
H10 G4
74 H10 G4 VM_MAA1_<3> BI A3/BA3|A5/BA1 VDD-G4
VM_MAA0_<5> BI A3/BA3|A5/BA1 VDD-G4
H11 G11
74 H11 G11 VM_MAA1_<2> BI A2/BA0|A4/BA2 VDD-G11
VM_MAA0_<4> BI A2/BA0|A4/BA2 VDD-G11
H5 G14
74 H5 G14 VM_MAA1_<1> BI A1/A9|A6/A11 VDD-G14
VM_MAA0_<6> BI A1/A9|A6/A11 VDD-G14
H4 L1
74 H4 L1 VM_MAA1_<0> BI A0/A10|A7/A8 VDD-L1
VM_MAA0_<7> BI A0/A10|A7/A8 VDD-L1
VDD-L4 L4
VDD-L4 L4
VDD-L11 L11
D VDD-L11 L11
VDD-L14 L14 D
VDD-L14 L14
D4 P11
D4 P11 VM_WCKA1_1_DP BI WCK01|WCK23 VDD-P11
VM_WCKA0_1_DP BI WCK01|WCK23 VDD-P11
D5 R5
D5 R5 VM_WCKA1_1_DN BI WCK01#|WCK23# VDD-R5
VM_WCKA0_1_DN BI WCK01#|WCK23# VDD-R5
VDD-R10 R10
VDD-R10 R10
P4
P4 VM_WCKA1_0_DP BI WCK23|WCK01
VM_WCKA0_0_DP BI WCK23|WCK01
P5
P5 VM_WCKA1_0_DN BI WCK23#|WCK01#
VM_WCKA0_0_DN BI WCK23#|WCK01#
VSSQ-A1 A1
VSSQ-A1 A1
R2 A3
R2 A3 VM_EDCA1_1 BI EDC3|EDC0 VSSQ-A3
VM_EDCA0_1 BI EDC3|EDC0 VSSQ-A3
R13 A12
R13 A12 VM_EDCA1_0 BI EDC2|EDC1 VSSQ-A12
VM_EDCA0_0 BI EDC2|EDC1 VSSQ-A12
C13 A14
C13 A14 VM_EDCA1_3 BI EDC1|EDC2 VSSQ-A14
VM_EDCA0_3 BI EDC1|EDC2 VSSQ-A14
C2 C1
C2 C1 VM_EDCA1_2 BI EDC0|EDC3 VSSQ-C1
VM_EDCA0_2 BI EDC0|EDC3 VSSQ-C1
VSSQ-C3 C3
VSSQ-C3 C3
P2 C4
P2 C4 VM_DDBIA1_1 BI DBI3#|DBI0# VSSQ-C4
VM_DDBIA0_1 BI DBI3#|DBI0# VSSQ-C4
P13 C11
P13 C11 VM_DDBIA1_0 BI DBI2#|DBI1# VSSQ-C11
VM_DDBIA0_0 BI DBI2#|DBI1# VSSQ-C11
D13 C12
D13 C12 VM_DDBIA1_3 BI DBI1#|DBI2# VSSQ-C12
VM_DDBIA0_3 BI DBI1#|DBI2# VSSQ-C12
P1V35S_DGPU D2 C14
P1V35S_DGPU D2 C14 VM_DDBIA1_2 BI DBI0#|DBI3# VSSQ-C14
VM_DDBIA0_2 BI DBI0#|DBI3# VSSQ-C14
VSSQ-E1 E1
VSSQ-E1 E1
VSSQ-E3 E3
VSSQ-E3 E3
VSSQ-E12 E12

2 R5556 1

2 R5557 1
E12

60.4_1%_2

60.4_1%_2
VSSQ-E12
2 R5506 1

2 R5507 1

G3 E14
VM_RASA1#
60.4_1%_2

60.4_1%_2

VM_CASA0# IN G3 RAS#|CAS# VSSQ-E14 E14 IN L3

RAS#|CAS# VSSQ-E14
F5
L3 F5 VM_CASA1# IN CAS#|RAS# VSSQ-F5
VM_RASA0# IN CAS#|RAS# VSSQ-F5
VSSQ-F10 F10
VSSQ-F10 F10
VSSQ-H2 H2
VSSQ-H2 H2
J3 H13
J3 H13 VM_CKEA1 IN CKE# VSSQ-H13
VM_CKEA0 IN CKE# VSSQ-H13
J11 K2
J11 K2 VM_CLKA1_DN IN CK# VSSQ-K2
VM_CLKA0_DN IN CK# VSSQ-K2
J12 K13
J12 K13 VM_CLKA1_DP IN CK VSSQ-K13
VM_CLKA0_DP IN CK VSSQ-K13
VSSQ-M5 M5
C VSSQ-M5 M5
VSSQ-M10 M10 C
VSSQ-M10 M10
G12 N1
G12 N1 VM_CSA1#_0 IN CS#|WE# VSSQ-N1
VM_WEA0# IN CS#|WE# VSSQ-N1
L12 N3
L12 N3 VM_WEA1# IN WE#|CS# VSSQ-N3
VM_CSA0#_0 IN WE#|CS# VSSQ-N3
VSSQ-N12 N12
VSSQ-N12 N12 P1V35S_DGPU P1V35S_DGPU P1V35S_DGPU
P1V35S_DGPU P1V35S_DGPU P1V35S_DGPU VSSQ-N14 N14
2 120_1%_2 J13
VSSQ-N14 N14 R5558 1
2 120_1%_2 J13
R5508 ZQ VSSQ-R1 R1
1 ZQ VSSQ-R1 R1
1 2 J10 SEN VSSQ-R3 R3
1 2 J10 SEN VSSQ-R3 R3
R5559 1K_5%_2 VSSQ-R4 R4
R5509 1K_5%_2 VSSQ-R4 R4
VSSQ-R11 R11
VSSQ-R11 R11
DRAM_RST# IN J2 RESET# VSSQ-R12 R12 DRAM_RST# IN 1 2
J2
J1
RESET# VSSQ-R12 R12
R14

1UF_6.3V_2_DY

1UF_6.3V_2_DY

1UF_6.3V_2_DY
MF VSSQ-R14
1 2 J1 R14
1UF_6.3V_2_DY

1UF_6.3V_2_DY

1UF_6.3V_2_DY

2.37K_1%_2

2.37K_1%_2

2.37K_1%_2
MF VSSQ-R14

1
1K_5%_2 U1
2.37K_1%_2

2.37K_1%_2

2.37K_1%_2

VSSQ-V1
1

P1V35S_DGPU 1K_5%_2 VSSQ-V1 U1 R5560

R5555

C5555

R5554

C5554

R5553

C5553
R5510 VSSQ-V3 U3
R5505

C5505

R5504

C5504

R5503

C5503

VSSQ-V3 U3
VSSQ-V12 U12
VSSQ-V12 U12
VSSQ-V14 U14
VSSQ-V14 U14
A5 Vpp,NC
A5 Vpp,NC
U5
2

2
Vpp,NC1
U5
2

Vpp,NC1
VSS-B5 B5
VVM_REFD1_A0
VSS-B5 B5
VVM_REFD1_MA0 A10 VREFD1 VSS-B10 B10
VVM_REFD2_A0
A10 VREFD1 VSS-B10 B10
VVM_REFD2_MA0 U10 VREFD2 VSS-D10 D10
VVM_REFC_A0
U10 VREFD2 VSS-D10 D10
G5
VVM_REFC_MA0 VSS-G5 G5
VSS-G5
VSS-G10 G10
VSS-G10 G10
H1
5.49K_1%_2

5.49K_1%_2

5.49K_1%_2
VSS-H1
1

1
H1
5.49K_1%_2

5.49K_1%_2

5.49K_1%_2

VSS-H1
1

H14
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

VSS-H14
R5552

C5552

R5551

C5551

R5550

C5550
H14 1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
VSS-H14
R5502

C5502

R5501

C5501

R5500

C5500

VSS-K1 K1
VSS-K1 K1
J14 VREFC VSS-K14 K14
J14 VREFC VSS-K14 K14
VSS-L5 L5
B VSS-L5 L5
VSS-L10 L10 B
L10
2

2
VSS-L10
P10
2

VSS-P10
VSS-P10 P10
J4 T5
J4 T5 VM_ADBIA1 BI ABI# VSS-T5
VM_ADBIA0 BI ABI# VSS-T5
VSS-T10 T10
VSS-T10 T10

SAM_K4G20325FD_FC04_BGA_170P
SAM_K4G20325FD_FC04_BGA_170P

MIRROR
MF=1

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
VRAM-1

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 76 of 77

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

F F

P1V35S_DGPU P1V35S_DGPU

U5601 U5651
VM_DQB0_<9> BI M2 DQ31|DQ7 VDDQ-B1 B1
VM_DQB1_<15> BI M2 DQ31|DQ7 VDDQ-B1 B1
VM_DQB0_<15> BI M4 DQ30|DQ6 VDDQ-B3 B3
VM_DQB1_<14> BI M4 DQ30|DQ6 VDDQ-B3 B3
VM_DQB0_<8> BI N2 DQ29|DQ5 VDDQ-B12 B12
VM_DQB1_<13> BI N2 DQ29|DQ5 VDDQ-B12 B12
VM_DQB0_<13> VM_DQB1_<8>

10UF_6.3V_3

10UF_6.3V_3
N4 B14 N4 B14
BI DQ28|DQ4 VDDQ-B14 BI DQ28|DQ4 VDDQ-B14

1
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
VM_DQB0_<14> BI T2 DQ27|DQ3 VDDQ-D1 D1
VM_DQB1_<12> BI T2 DQ27|DQ3 VDDQ-D1 D1

C5606

C5607

C5608

C5609

C5610

C5656

C5657

C5658

C5659

C5660
VM_DQB0_<12> BI T4 DQ26|DQ2 VDDQ-D3 D3
VM_DQB1_<9> BI T4 DQ26|DQ2 VDDQ-D3 D3
VM_DQB0_<10> BI U2 DQ25|DQ1 VDDQ-D12 D12
VM_DQB1_<11> BI U2 DQ25|DQ1 VDDQ-D12 D12
VM_DQB0_<11> BI U4 DQ24|DQ0 VDDQ-D14 D14
VM_DQB1_<10> BI U4 DQ24|DQ0 VDDQ-D14 D14
VM_DQB0_<7> BI M13 DQ23|DQ15 VDDQ-E5 E5
VM_DQB1_<1> BI M13 DQ23|DQ15 VDDQ-E5 E5

2
VM_DQB0_<6> BI M11 DQ22|DQ14 VDDQ-E10 E10
VM_DQB1_<4> BI M11 DQ22|DQ14 VDDQ-E10 E10
VM_DQB0_<5> BI N13 DQ21|DQ13 VDDQ-F1 F1
VM_DQB1_<7> BI N13 DQ21|DQ13 VDDQ-F1 F1
VM_DQB0_<4> BI N11 DQ20|DQ12 VDDQ-F3 F3
VM_DQB1_<6> BI N11 DQ20|DQ12 VDDQ-F3 F3
VM_DQB0_<3> BI T13 DQ19|DQ11 VDDQ-F12 F12
VM_DQB1_<3> BI T13 DQ19|DQ11 VDDQ-F12 F12
VM_DQB0_<2> BI T11 DQ18|DQ10 VDDQ-F14 F14
VM_DQB1_<5> BI T11 DQ18|DQ10 VDDQ-F14 F14
VM_DQB0_<0> BI U13 DQ17|DQ9 VDDQ-G2 G2
VM_DQB1_<0> BI U13 DQ17|DQ9 VDDQ-G2 G2
VM_DQB0_<1> BI U11 DQ16|DQ8 VDDQ-G13 G13
VM_DQB1_<2> BI U11 DQ16|DQ8 VDDQ-G13 G13
VM_DQB0_<24> BI F13 DQ15|DQ23 VDDQ-H3 H3
VM_DQB1_<26> BI F13 DQ15|DQ23 VDDQ-H3 H3
VM_DQB0_<28> BI F11 DQ14|DQ22 VDDQ-H12 H12
VM_DQB1_<24> BI F11 DQ14|DQ22 VDDQ-H12 H12
VM_DQB0_<27> BI E13 DQ13|DQ21 VDDQ-K3 K3
VM_DQB1_<27> BI E13 DQ13|DQ21 VDDQ-K3 K3

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
VM_DQB0_<25> VM_DQB1_<25>

1
E11 K12 E11 K12

1UF_6.3V_2

1UF_6.3V_2
E BI DQ12|DQ20 VDDQ-K12 BI DQ12|DQ20 VDDQ-K12
E
VM_DQB0_<30> VM_DQB1_<29>

C5614
B13 L2 B13 L2
BI BI DQ11|DQ19 VDDQ-L2

0.1UF_16V_2

0.1UF_16V_2
DQ11|DQ19 VDDQ-L2

C5613

C5615

C5616

C5617

C5618

C5611

C5612

1
1UF_6.3V_2

1UF_6.3V_2
VM_DQB0_<31> BI B11 DQ10|DQ18 VDDQ-L13 L13
VM_DQB1_<30> BI B11 DQ10|DQ18 VDDQ-L13 L13

C5663

C5664
VM_DQB0_<29> VM_DQB1_<31>

C5661

C5662
A13 M1 A13 M1
BI DQ9|DQ17 VDDQ-M1 BI DQ9|DQ17 VDDQ-M1

VM_DQB0_<26> BI A11 DQ8|DQ16 VDDQ-M3 M3

VM_DQB1_<28> BI A11 DQ8|DQ16 VDDQ-M3 M3
VM_DQB0_<17> F2 M12
VM_DQB1_<18> F2 M12

2
BI DQ7|DQ31 VDDQ-M12 BI DQ7|DQ31 VDDQ-M12

VM_DQB0_<16> BI F4 DQ6|DQ30 VDDQ-M14 M14

VM_DQB1_<16> BI F4 DQ6|DQ30 VDDQ-M14 M14

2
VM_DQB0_<18> BI E2 DQ5|DQ29 VDDQ-N5 N5
VM_DQB1_<19> BI E2 DQ5|DQ29 VDDQ-N5 N5
VM_DQB0_<20> BI E4 DQ4|DQ28 VDDQ-N10 N10
VM_DQB1_<17> BI E4 DQ4|DQ28 VDDQ-N10 N10
VM_DQB0_<21> BI B2 DQ3|DQ27 VDDQ-P1 P1
VM_DQB1_<23> BI B2 DQ3|DQ27 VDDQ-P1 P1
VM_DQB0_<23> BI B4 DQ2|DQ26 VDDQ-P3 P3
VM_DQB1_<22> BI B4 DQ2|DQ26 VDDQ-P3 P3
VM_DQB0_<19> BI A2 DQ1|DQ25 VDDQ-P12 P12
VM_DQB1_<21> BI A2 DQ1|DQ25 VDDQ-P12 P12
VM_DQB0_<22> BI A4 DQ0|DQ24 VDDQ-P14 P14
T1
VM_DQB1_<20> BI A4 DQ0|DQ24 VDDQ-P14 P14
T1
VDDQ-T1 VDDQ-T1
VDDQ-T3 T3 VDDQ-T3 T3
VDDQ-T12 T12 VDDQ-T12 T12
VDDQ-T14 T14 VDDQ-T14 T14

J5 J5
VM_MAB0_<8> BI RFU/A12/NC
VM_MAB1_<8> BI RFU/A12/NC

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2
1

1
K4 C5 K4 C5
VM_MAB0_<0> BI A7/A8|A0/A10 VDD-C5
VM_MAB1_<7> BI A7/A8|A0/A10 VDD-C5

C5665

C5666

C5667

C5668
K5 C10 K5 C10
VM_MAB0_<1> BI A6/A11|A1/A9 VDD-C10
VM_MAB1_<6> BI A6/A11|A1/A9 VDD-C10
K10 D11 K10 D11
VM_MAB0_<3> BI A5/BA1|A3/BA3 VDD-D11
VM_MAB1_<5> BI A5/BA1|A3/BA3 VDD-D11
K11 G1 K11 G1
VM_MAB0_<2> BI A4/BA2|A2/BA0 VDD-G1
VM_MAB1_<4> BI A4/BA2|A2/BA0 VDD-G1
H10 G4 H10 G4
VM_MAB0_<5> BI A3/BA3|A5/BA1 VDD-G4
VM_MAB1_<3> BI A3/BA3|A5/BA1 VDD-G4

2
H11 G11 H11 G11
VM_MAB0_<4> BI A2/BA0|A4/BA2 VDD-G11
VM_MAB1_<2> BI A2/BA0|A4/BA2 VDD-G11
H5 G14 H5 G14
VM_MAB0_<6> BI A1/A9|A6/A11 VDD-G14
VM_MAB1_<1> BI A1/A9|A6/A11 VDD-G14
H4 L1 H4 L1
VM_MAB0_<7> BI A0/A10|A7/A8 VDD-L1
VM_MAB1_<0> BI A0/A10|A7/A8 VDD-L1
VDD-L4 L4 VDD-L4 L4
D VDD-L11 L11 VDD-L11 L11 D
VDD-L14 L14 VDD-L14 L14
D4 P11 D4 P11
VM_WCKB0_1_DP BI WCK01|WCK23 VDD-P11
VM_WCKB1_1_DP BI WCK01|WCK23 VDD-P11
D5 R5 D5 R5
VM_WCKB0_1_DN BI WCK01#|WCK23# VDD-R5
VM_WCKB1_1_DN BI WCK01#|WCK23# VDD-R5
VDD-R10 R10 VDD-R10 R10
P4 P4
VM_WCKB0_0_DP BI WCK23|WCK01
VM_WCKB1_0_DP BI WCK23|WCK01
P5 P5
VM_WCKB0_0_DN BI WCK23#|WCK01#
VM_WCKB1_0_DN BI WCK23#|WCK01#
VSSQ-A1 A1 VSSQ-A1 A1
R2 A3 R2 A3
VM_EDCB0_1 BI EDC3|EDC0 VSSQ-A3
VM_EDCB1_1 BI EDC3|EDC0 VSSQ-A3
R13 A12 R13 A12
VM_EDCB0_0 BI EDC2|EDC1 VSSQ-A12
VM_EDCB1_0 BI EDC2|EDC1 VSSQ-A12
C13 A14 C13 A14
VM_EDCB0_3 BI EDC1|EDC2 VSSQ-A14
VM_EDCB1_3 BI EDC1|EDC2 VSSQ-A14
C2 C1 C2 C1
VM_EDCB0_2 BI EDC0|EDC3 VSSQ-C1
VM_EDCB1_2 BI EDC0|EDC3 VSSQ-C1
VSSQ-C3 C3 VSSQ-C3 C3
P2 C4 P2 C4
VM_DDBIB0_1 BI DBI3#|DBI0# VSSQ-C4
VM_DDBIB1_1 BI DBI3#|DBI0# VSSQ-C4
P13 C11 P13 C11
VM_DDBIB0_0 BI DBI2#|DBI1# VSSQ-C11
VM_DDBIB1_0 BI DBI2#|DBI1# VSSQ-C11
D13 C12 D13 C12
VM_DDBIB0_3 BI DBI1#|DBI2# VSSQ-C12
VM_DDBIB1_3 BI DBI1#|DBI2# VSSQ-C12
D2 C14 D2 C14
P1V35S_DGPU VM_DDBIB0_2 BI DBI0#|DBI3# VSSQ-C14
P1V35S_DGPU VM_DDBIB1_2 BI DBI0#|DBI3# VSSQ-C14
VSSQ-E1 E1 VSSQ-E1 E1
VSSQ-E3 E3 VSSQ-E3 E3
VSSQ-E12 E12 VSSQ-E12 E12
2 R5606 1

2 R5607 1

2 R5657 1
60.4_1%_2

60.4_1%_2

60.4_1%_2

60.4_1%_2
G3 E14 G3 E14
VM_CASB0# IN RAS#|CAS# VSSQ-E14
VM_RASB1# IN RAS#|CAS# VSSQ-E14

R5656
L3 F5 L3 F5
VM_RASB0# IN CAS#|RAS# VSSQ-F5
VM_CASB1# IN CAS#|RAS# VSSQ-F5
VSSQ-F10 F10 VSSQ-F10 F10
VSSQ-H2 H2 VSSQ-H2 H2
J3 H13 J3 H13
VM_CKEB0 IN CKE# VSSQ-H13
VM_CKEB1 IN CKE# VSSQ-H13

2
J11 K2 J11 K2
VM_CLKB0_DN IN CK# VSSQ-K2
VM_CLKB1_DN IN CK# VSSQ-K2
J12 K13 J12 K13
C VM_CLKB0_DP IN CK VSSQ-K13
VM_CLKB1_DP IN CK VSSQ-K13
C
VSSQ-M5 M5 VSSQ-M5 M5
VSSQ-M10 M10 VSSQ-M10 M10
G12 N1 G12 N1
VM_WEB0# IN CS#|WE# VSSQ-N1
VM_CSB1#_0 IN CS#|WE# VSSQ-N1
L12 N3 L12 N3
VM_CSB0#_0 IN WE#|CS# VSSQ-N3
VM_WEB1# IN WE#|CS# VSSQ-N3
R5608 VSSQ-N12 N12 VSSQ-N12 N12
120_1%_2 N14 P1V35S_DGPU P1V35S_DGPU P1V35S_DGPU N14
P1V35S_DGPU P1V35S_DGPU P1V35S_DGPU VSSQ-N14 R5658 VSSQ-N14
1 2 J13 ZQ VSSQ-R1 R1 1 2 J13 ZQ VSSQ-R1 R1
1 2 J10 SEN VSSQ-R3 R3 120_1%_2 1 2J10 SEN VSSQ-R3 R3
1K_5%_2 VSSQ-R4 R4 1K_5%_2 VSSQ-R4 R4
R5609 R11 R5659 R11
VSSQ-R11 VSSQ-R11

DRAM_RST# IN
1 2
J2
J1
RESET# VSSQ-R12 R12
R14
DRAM_RST#
1
IN 2
J2
J1
RESET# VSSQ-R12 R12
R14

1UF_6.3V_2_DY

1UF_6.3V_2_DY

1UF_6.3V_2_DY
MF VSSQ-R14 MF VSSQ-R14
P1V35S_DGPU
1UF_6.3V_2_DY

1UF_6.3V_2_DY

1UF_6.3V_2_DY

2.37K_1%_2

2.37K_1%_2

2.37K_1%_2
1

1
1K_5%_2 U1 1K_5%_2 U1
2.37K_1%_2

2.37K_1%_2

2.37K_1%_2

VSSQ-V1 VSSQ-V1
1

R5610 R5660

R5655

C5655

R5654

C5654

R5653

C5653
VSSQ-V3 U3 VSSQ-V3 U3
R5605

C5605

R5604

C5604

R5603

C5603

VSSQ-V12 U12 VSSQ-V12 U12

VSSQ-V14 U14 VSSQ-V14 U14
A5 Vpp,NC A5 Vpp,NC
U5 U5

2
Vpp,NC1 Vpp,NC1
2

VSS-B5 B5 VSS-B5 B5
VVM_REFD1_A1 A10 VREFD1 VSS-B10 B10 VVM_REFD1_MA1 A10 VREFD1 VSS-B10 B10
VVM_REFD2_A1 U10 VREFD2 VSS-D10 D10 VVM_REFD2_MA1 U10 VREFD2 VSS-D10 D10
VVM_REFC_A1 VSS-G5 G5 VVM_REFC_MA1 VSS-G5 G5
VSS-G10 G10 VSS-G10 G10
H1 H1
5.49K_1%_2

5.49K_1%_2

5.49K_1%_2
VSS-H1 VSS-H1
1

1
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2
5.49K_1%_2

5.49K_1%_2

5.49K_1%_2
1

H14 H14
1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

VSS-H14 VSS-H14
R5652

C5652

R5651

C5651

R5650

C5650
R5602

C5602

R5601

C5601

R5600

C5600

VSS-K1 K1 VSS-K1 K1
J14 VREFC VSS-K14 K14 J14 VREFC VSS-K14 K14
B VSS-L5 L5 VSS-L5 L5 B
VSS-L10 L10 VSS-L10 L10
2

2
P10 P10
2

VSS-P10 VSS-P10
J4 T5 J4 T5
VM_ADBIB0 BI ABI# VSS-T5
VM_ADBIB1 BI ABI# VSS-T5
VSS-T10 T10 VSS-T10 T10

SAM_K4G20325FD_FC04_BGA_170P SAM_K4G20325FD_FC04_BGA_170P

MIRROR
MF=1

A A

INVENTEC
TITLE

MODEL,PROJECT,FUNCTION
VRAM-2

SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 77 of 77

8 7 6 5 4 3 2 1