2011 IEEE Symposium on Industrial Electronics and Applications (ISIEA2011), September 25-28, 2011, Langkawi, Malaysia

XILINX FPGA Design for Sinusoidal Pulse Width

Modulation (SPWM) control of Single-phase Matrix
Converter
S.Z.Mohammad Noor, M.K.Hamzah, N.F.Abdul Z.Idris
Rahman, A.F.Hapani Faculty of Engineering
Faculty of Electrical Engineering Universiti Selangor
Universiti Teknologi Mara Bestari Jaya, Malaysia
Shah Alam, Malaysia zahir@unisel.edu.my
sitizaliha@ieee.org

Abstract—This paper is concerned on Xilinx FPGA design for behaviour. A laboratory model test-rig of the SPMC was
SPWM control of Single-Phase Matrix Converter (SPMC). The then constructed to experimentally verify the result. This
Sinusoidal Pulse Width Modulation (SPWM) technique is used paper introduces the steps and techniques for generating the
to synthesize the output voltage. The power circuit uses the SPWM pattern for SPMC operating as a single-phase AC to
Insulated Gate Bipolar Transistor (IGBT) as switching device AC converter, which is placed in one chip without using
in the SPMC implementation. Safe-commutation strategy was external memory chips, where design re-uses is advantages
incorporated to solve switching transients. A Xilinx Field in development. The result from the hardware
Programmable Gate Array (FPGA) was used at the heart of implementation will be compared with those simulations
the control electronics, implemented to verify operation.
using MATLAB/ Simulink.
Selected simulation and experimental results are presented.
II. SINGLE-PHASE MATRIX CONVERTER
Keywords-Single-phase Matrix Converter (SPMC); AC to AC
Converter; Sinusoidal Pulse Width Modulation (SPWM); SPMC utilizes four bi-directional switches arranged in
Insulated Gate Bipolar Transistor (IGBT); Matlab/Simulink form of 2x2 matrixes as shown in Fig.1. Since such devices
(MLS); Field Programmable Gate Array (FPGA) currently unavailable, each bi-directional switch is
constructed using two diodes and two IGBTs connected in
I. INTRODUCTION common emitter configuration [15]; providing the capability
Matrix converter is a forced commutated converter that of conducting current in both directions, blocking forward
uses an array of controlled bi-directional switches as the and reverse voltages.
main power elements to create an unrestricted frequency of
variable output voltage system without dc-link circuit and
large energy storage elements [1]. A single-phase version
called single-phase matrix converter (SPMC) was then
proposed by Zuckerberger for step-up frequency operation
[2].Even though SPMC also can provide an ‘all silicon’
solution as matrix converter [4], the absence of natural free-
wheeling path in SPMC causes voltage spikes during Fig.1. SPMC topology with bi-directional switch module
switching especially in inductive loads condition [5]. This
can be overcome by using safe-commutation switching III. DIGITAL DESIGN OF AC TO AC CONVERTER
strategy [6]. The Sinusoidal Pulse Width Modulation Single-phase AC to AC converter based on SPMC
(SPWM) control as proposed in [7] can significantly topology is shown in Fig.2. Sinusoidal Pulse Width
improve the performance of cycloconverter [8]. Modulation (SPWM) technique is used to synthesize the
This paper presents the design and development of a output voltage.
sinusoidal pulse width modulation (SPWM) generator
suitable for Single-Phase Matrix Converter (SPMC). It is
based on the Xilinx chip XC4005XL Field Programmable
Gate Array (FPGA) with IGBTs as the power switching
device. The proposed design enables the modulation index
and the switching frequency to be changed externally.
Results are provided to demonstrate successful
implementation of the design. Prior to hardware
implementation, simulations were performed to predict the

978-1-4577-1417-7/11/$26.00 ©2011 IEEE 714

 2011 IEEE Symposium on Industrial Electronics and Applications (ISIEA2011), September 25-28, 2011, Langkawi, Malaysia

DATA
1,2,3,5,6,7,9,10,11,12,13,14,16,17,18,18,19,20,21,22,22,23,24,24,24,25,25,
25,25,25,25,25,25,25,25,24,24,24,23,22,22,21,20,19,18,18,17,16,14,13,12,
11,10,9,7,6,5,3,2,1
Fig.4. Data in look-up table

Sixty data of 6 kHz carrier signal are sampled from 0o to

180o as shown in data above based on equation (2).

[
Vref (t k ) = round 25.5 sin(2.π .50.t k ) ] (2)
Fig.2. AC to AC converter based on SPMC topology
Tcarrier
t k = ( 2.k + 1).( )
A. Sinusoidal Pulse Width Modulation (SPWM) 2

In Sinusoidal Pulse Width Modulation (SPWM), a

where k is the carrier pulse position ( in example for
triangular carrier wave is use to sample the sinusoidal
switching frequency, fs= 6 kHz, k = 0 to 59) and 2.k+1 is
modulating wave once every carrier cycle at regular
equivalent to the phase angle.
intervals, corresponding to the peaks of the triangular wave,
to produce the amplitude modulation wave ma sin (ωtk). B. Turn-on time
Here the sinusoidal modulating wave value is store in a Results obtained when comparing the sinusoidal
look-up table inside ROM, where the values are first pre- waveforms with the ‘w’ shape of the carrier signal is shown
determined through calculations. Comparison of both waves in Fig.5. It produces a turn-on time with width of tma,1,
defines the intersection point used to determine the tma,3, ..tma,2k+1 where k = 0 to 59 (for fs =6kHz). In tstep
switching instants of the SPWM, defined as in equation (1) defined as
with illustrations as shown in Fig. 3 to produce the SPWM Tcarrier Tcarrier
generation. t step = = (3)
step total 510

Tcarrier T
t step = = carrier (1)
steptotal 510

td
Vref ( 2.k +1)
Vref 1 Vref 2 t
t ma ,1 t ma , 3 t ma , 2.k +1
Fig.5. The width of SPWM pattern
k =0 k =1 k
k = 0,1,2 ... N
The general equation of the turn-on width tma,2k+1 is
derived from equation (2) and (3) which is finally expressed
Fig. 3. Illustration of memory pointer and data from ROM as in equation (4).

The memory requirement, efficiency of operation and ( (4)

accuracy of the output waveform depends on the number of
samples defining a cycle of the sine wave and their
resolution. The modulating wave could be defined at a
greater number of sample points, but the memory
requirement is proportionally increased. Hence the point at
which a sample is taken for the modulating process directly
corresponds to a value in the look-up table.
i) Look-up Table
The sample of sine value with carrier frequency, fc = 6
kHz (switching frequency, fs) phase data for half cycle of
sinusoidal modulating wave is shown in Fig.4. The look-up
tables are formed using the internal ROM unit in XILINX
XC4005XL. MathCAD is used to calculate data in look-up
table.
tma, 2.k + 1 = (Vref (t k )).ma .2.t step)
where ma is in the range 0 to 10 representing the actual
modulation index ranging between 0 to 1 with a
multiplication factor of 10.
C. Time delay
In Fig.5, there is time delay, td in the beginning of the
SPWM signal during transition period between one state to
another that incorporates safe switch commutation strategy.
The time delay is defined as in equation (5).
t ma , 2.k +1
td = tk − (5)
2
The time delay varies in accordance to variation of
modulation index and carrier frequency. The time delay at

715
 2011 IEEE Symposium on Industrial Electronics and Applications (ISIEA2011), September 25-28, 2011, Langkawi, Malaysia

the initial stage (k=0) of the PWM signal is defined by expressed by equation (8). The main clock frequency for
equation (6). related carrier frequency is shown in Table I.

⎛ Tcarrier ⎞ t ma,1 n
t d = 1.⎜ ⎟− (6) fclock = fcarrier * ( 2 − 1) * 2 (8)
⎝ 2 ⎠ 2
where fcarrier is the carrier frequency, fclock is the main
D. Triangular Carrier Signal clock frequency and n is the bit size of the up-down counter.
The triangular carrier wave is generated using an For example, an 8 bit up/down counter must be clocked at
up/down counter. The rate at which this counter is the 3.06 MHz to produce 6 kHz carrier frequency following
incremented or decremented determines the carrier equation (8). The time for each step counter changes, tstep
frequency and accuracy of the sampling process. Each time
is given by equation (9). Table I shows the tstep for each
the counter is incremented or decremented, its output is
compared with a sampled value of the modulation wave to carrier frequency.
determine the switching edge of the PWM waveform. This
process is illustrated as in Fig. 6. Tcarrier Tcarrier
t step = = (9)
steptotal 510

Total step for a carrier frequency is 510 governed by

equation (10).
n
steptotal = ( 2 − 1) * 2 (10)
where n is the bit size of an up-down counter. Therefore
the time to generate the carrier wave, Tc uses equation (11).

Fig.6. Illustration of sampling process

E. Carrier Frequency Tc = step total * Tclock (11)
Determination of the carrier frequency or switching
1
frequency is the first step of design process, where the clock = step total *
f clock
frequency needs to be calculated precisely. The carrier
frequency, fc has been decided to operate in steps of 3 kHz,
Table I : Generation of SPWM
6 kHz and 10 kHz for cycloconverter.
Carrier Number of Clock Time of step
Frequency, pulses, N frequency, counter, tstep
fcarrier fclock
2KHz 20 1.02 MHz 0.98 μs
3KHz 30 1.53 MHz 0.65 μs
6KHz 60 3.06 MHz 0.33 μs
10KHz 100 5.1 MHz 0.2 μs
Fig.7. Pattern of W shape carrier signal
IV. HARDWARE IMPLEMENTATION
The carrier ‘W’ shape waveform is shown in Fig.7. The The SPMC test rig consists of a single-phase supply, an
carrier period Tcarrier is expressed as equation (7). input filter, a power circuit, a load, an electronic controller
and a computer as shown in Fig. 8. A phase detector circuit
T
Tcarrier = (7) as shown in Fig. 9 was constructed to detect the positive
2*N magnitude of input supply as well as generate 50 Hz digital
or on-off signal.
2*N
f carrier =
T

where N is the number of carrier pulses per half-cycle.

fcarrier is the carrier frequency and T is the period of
modulating signal. Table I shows the number of carrier
pulses for a half cycle of 50 Hz modulating signal compared
with desired carrier frequency. Fig.8. SPMC test rig diagram

A controller is combination of a phase detector, isolated

The carrier frequency has a relationship with the main
gate drives and Xilinx FPGA. Other parameters used are
clock frequency and the up-down counter and can be tabulated in Table II.

716
 2011 IEEE Symposium on Industrial Electronics and Applications (ISIEA2011), September 25-28, 2011, Langkawi, Malaysia

SSU

CSS
Fig.9. Phase detector circuit
Fig.12. SSU and CSU schematic diagram
Table II: Test rig parameters
An eight bit inverter was used to invert ‘M’ shape
AC Input Supply 50Hz, 50Vrms triangular waveform to ‘W’ shape triangular waveform.
Input Filter L = 4mH, C = 10uF
Then, it is compared with the product of modulation index
Carrier Frequency 3KHz, 6KHz
Output Frequency 12.5Hz, 25Hz and sinusoidal reference signal from look-up table (ROM).
Modulation Index 0.7, 1.0 The complete block diagram of SPWM generator is shown in
Load R = 50Ω, L = 4mH Fig. 13 and Fig. 14.
V. XILINX FPGA
The main control block diagram to realize safe-
commutation switching strategy in Xilinx FPGA is shown in
Fig. 10. The design consists of desired output frequency
(DOF), switch selector unit (SSU) and commutation switch
selector (CSS).

Fig.13. Block diagram of SPWM generator in Xilinx FPGA

Fig.10. Block diagram of switching generation in Xilinx FPGA

The SPWM signal for both cycles is identical; a positive

cycle is used by repeating it in negative cycle. The output
signal of phase detector is important for Xilinx FPGA
produces switching pattern that in synchronous with the
input supply. Besides, it is also used to generate desired
output frequency through FTC as shown in Fig. 11.
Finally, the SSU and CSS which stand of digital gates as
shown in Fig. 12 are used to realize the switching sequence Fig.14. SPWM generator for positive cycle in Xilinx FPGA
of the converter. In Xilinx FPGA, SPWM generator
generates carrier signal from an eight bit counter VI. RESULTS AND DISCUSSION
(CB8CLED) which digitally increments the counter value
from 0 to 255 before decrements back to 0 over a period of A. Xilinx FPGA Simulation
time to form the ‘M’ shape triangular waveform. The control of the proposed AC to AC converter (eg.
cycloconverter) was built and simulated using Xilinx FPGA
as shown in Fig. 15.

Fig.11. Desired output frequency unit

Positive cycle Negative cycle Positive cycle Negative cycle
S1a, S2b, S4a S1a, S2b, S3b S1b, S2a, S3a S1b, S2a, S4b

Fig.15. 25Hz switching sequence for SPMC in Xilinx FPGA

717
 2011 IEEE Symposium on Industrial Electronics and Applications (ISIEA2011), September 25-28, 2011, Langkawi, Malaysia

B. Results
Table IV :Variation of time delay, td respect to modulation index
The proposed AC to AC Converter is tested using MLS
under the condition in Table III which the results are shown fs=3kHz
Different in
in Fig. 16 and 17. SPWM simulation output fc = 3kHz is XILINX
Modulation
shown in Fig.18. Variation of time delay respect to td (us) td (us) compare to
index, ma
(mathematical) (XILINX) mathematical
modulation index for carrier frequency, fc = 3kHz for AC to (%)
AC Converter is shown in Table IV and illustrated in
0.1 166.3 165.6 0.423
Fig.19.
0.2 165.7 164.9 0.485
The experimental results achieve good agreement with
0.3 165.0 164.3 0.426
those predicted in simulation. A plot of the RMS output
voltage is shown in Fig.20. By increasing the switching 0.4 164.4 163.8 0.366
frequency, there is proportionate increase in the RMS output 0.5 163.7 163.2 0.306
voltage.
0.6 163.1 162.4 0.431
Table III: Simulation parameters
0.7 162.4 161.7 0.433
AC Supply 50Hz, 50Vp
Switching Frequency 3KHz, 6KHz, 10KHz 0.8 161.8 161.1 0.435
Modulation Index 0.3, 0.5, 0.7, 1.0 0.9 161.1 160.4 0.436
Output Frequency 12.5Hz, 25Hz
Load R=50Ω, L=4mH 1.0 160.5 159.8 0.438

50 0.8

40
0.6
30
0.4
20
O u t p u t V o lt a g e ( V )

O u tp u t C u rre n t (A )

0.2
10

0 0

-10
-0.2
-20
-0.4
-30
-0.6
-40

-50 -0.8
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
Time (s) Time (s)

(a) (b)
Fig.16. Simulation result of SPMC at fO= 25 Hz with mi= 0.7 (a) output
voltage (b) output current td
Fig.19. XILINX FPGA simulation SPWM output for ma = 1.0

(a) (b)
Fig.17. Result of SPMC at fo = 25 Hz , mi = 0.7 (a) Simulation (b)
Experimental, scale Y:100V/div, X: 10ms/div
Fig.20. Variation of RMS output voltage versus modulation index, ma with
different switching frequency, fc for SPMC at fo=25Hz supplied by
Vp=50V loaded with R=50Ω and L = 4mH

Fig.18. XILINX FPGA simulation output of SPWM at fs=3kHz.

718
 2011 IEEE Symposium on Industrial Electronics and Applications (ISIEA2011), September 25-28, 2011, Langkawi, Malaysia
C. Hardware
A test rig was constructed for experimental verification
as shown in Fig. 21.
Function
Generator
SPMC
Phase
Detector
DC
Supply
Fig.21. Hardware test-rig set-up
The test rig consist of a single phase supply, a power
circuit (SPMC), load, electronic controller and personal
computer. In Fig.22, the phase detector produces output
voltage when input supply in the positive cycle region. The
frequency of phase detector output voltage equals to the
input supply.
Input supply
Phase
detector
Fig.22. Input supply voltage (yellow), scale Y:5V/div, X: 10ms/div and
phase detector output voltage (blue), scale Y:2V/div, X:10ms/div
VII. CONCLUSION
In this paper, Xilinx FPGA design for SPWM control of
Single-Phase Matrix Converter (SPMC) was presented. The
proposed AC to AC converter can produce variable output
voltage when varying modulation index as well as step down
the input frequency. Simulation and experimental results
show that the SPMC can be realize as a single-phase AC to
AC converter. Experimental results achieve good agreement
with those predicted in simulations. PWM controlling
algorithm is placed on a single chip of XC4005XL FPGA
and is capable of providing flexibility and design reuse. The
overall system is compact with no external memory system
required. Tests have been carried out to show the
effectiveness and flexibility of the proposed method.
Selected experimental result has also shown that this could
be practically realised in the future in applications.
719
REFERENCES
[1] P. W. Wheeler, et al., "Matrix converters: a technology review,"IEEE
Transactions on Industrial Electronics, vol. 49, pp. 276-288, 2002.
[2] A. Zuckerberger, et al., "Single-phase matrix converter," Electric
Power Applications, IEE Proceedings -, vol. 144, pp. 235-240, 1997.
[3] L. Empringham, et al., "Intelligent commutation of matrix converter
bi-directional switch cells using novel gate drive
techniques,"Specialists Conferencein Power Electronics, 1998.
PESC 98 Record. 29th Annual IEEE, 1998, pp. 707-713 vol.1.
[4] Gyugyi,L and Pelly,B.R, "Static Power Chargers, Theory,
Performance and Application,"John Wiley & Son Inc, 1976
[5] B. H. Kwon, et al., "Novel commutation technique of AC-AC
converters,"Electric Power Applications, IEE Proceedings-, vol. 145,
pp. 295-300, 1998.
[6] Z. Idris, et al., "Safe Commutation Strategy in Single Phase Matrix
Converter," International Conference on Power Electronics and
Drives Systems, 2005. PEDS 2005.2005, pp. 886-891.
[7] S. Firdaus and M. K. Hamzah, "Modelling and simulation of a
single-phase AC-AC matrix converter using SPWM,"Student
Conference on Research and Development, 2002. SCOReD 2002.
2002, pp. 286-289.
[8] Z. Idris, et al., "Implementation of Single-Phase Matrix Converter as
a Direct AC-AC Converter with Commutation Strategies,"Specialists
Conferencein Power Electronics, 2006. PESC '06. 37th IEEE, 2006,
pp. 1-7.
[9] A. Maamoun, "Development of cycloconverters,"Canadian
Conference on Electrical and Computer Engineering, 2003. IEEE
CCECE 2003.2003, pp. 521-524 vol.1.
[10] Bin Wu; Pontt, J.; Rodriguez, J.; Bernet, S.; Kouro, S.; , "Current-
Source Converter and Cycloconverter Topologies for Industrial
Medium-Voltage Drives,"IEEE Transactions on Industrial
Electronics, vol.55, no.7, pp.2786-2797, July 2008
[11] R. F. Chu and J. J. Burns, "Impact of cycloconverter
harmonics,"IEEE Transactions on Industry Applications, vol. 25, pp.
427-435, 1989.
[12] W. Timpe, "Cycloconverter Drives for Rolling Mills,"IEEE
Transactions on Industry Applications,vol. IA-18, pp. 400-404,
1982.
[13] C.P. LeMone, M. Ehara, and L. Nehl, "AC adjustablespeed
application for the cement industry," in Proc. WEEECement Industry
Technical Conf., Salt lake City,UT.,1986, pp: 335-362.
[14] W.A. Hill, G. Creelman, and L. Mischke, "Conrol strategyfor an
icebreaker propulsion system," EEE Trans. Ind.Appl., Vol.28, no.4,
pages: 887-892, Jul. /Aug. 1992.
[15] M. Hornkamp, M. Loddenkötter, M.Münzer, O. Simon, M.
Bruckmann, “Economac the first all-in-one IGBT module for matrix
converter”, PCIM, June 2001, pp. 19-21.