SRI VENKATESHWARA COLLEGE OF ENGINEERING

Department of Electronics & Communication Engineering

Course Name: Digital System Design using Verilog Course Code: 17EC663
Sem: VI‘A & B’ Faculty Name: RNG
Assignment–I
Module 1
1. Explain the two level logic threshold with noise margin.
2. What are the effects of capacitive loading and propagation delay on signal transitions
between logic levels?
3. Develop a circuit for datapath and control section to perform complex multiplication of
two complex numbers a and b represented as a = ar + j ai and b = br + j bi. The data path
need to perform sequential complex multiplication with shared resources and registers to
store intermediate results.
4. What is meant by design methodology? Explain simple and hierarchical design
methodology along with intermediate stages.
5. Describe Embedded Systems Design along with diagram.
6. Write verilog code for the 3:8 decoders.
7. What do you mean by Finite State Machine? Differentiate between Moore and Mealy
finite-state machine.
8. Define the terms setup time, hold time and clock-to-output of a flip flop and what are the
constraints imposed by these parameters on the circuit operations?
9. Develop a Verilog code for a 7-segment decoder. Include an additional input, blank that
overrides the BCD input and causes all segments not to be lit.
10. Develop a sequential circuit that has a single data input signal, S, and produces an output
Y. The output is 1 whenever S has the same value over three successive clock cycles, and
0 otherwise. Assume that the value of S for a given clock cycle is defined at the time of
the rising clock edge at the end of the clock cycle.
11. Develop a Verilog model of a debouncer for a pushbutton switch that uses a debounce
interval of 10ms. Assume the system clock frequency is 50MHz.
12. Explain Asynchronous Inputs of the Clocked Synchronous Timing Methodology with
diagram.
13. Explain Switch Inputs and Debouncing along with diagram
 MODULE 2
1. What do you mean by memory? Describe the basic memory components along with
diagram for read and write operations.
2. Design a 64K X 8-bit composite memory using four 16K X 8-bit components.
3. Explain bidirectional tristate data connections used in the output stage circuit.
4. Describe composite memory constructed using components with common data inputs
and outputs with diagram
5. Explain Asynchronous Static RAM along with timing diagram for read and write
operations
6. Explain Synchronous Static RAM along with timing diagram.
7. Design a circuit that computes the function y = ci * , where x is a binary-coded
input value and ci is a coefficient stored in a flow-through SSRAM. x, ci and y are all
signed fixed-point values with 8 pre-binary-point and 12 post-binary-point bits. The
index i is also an input to the circuit, encoded as a 12-bit unsigned integer. Values for
x and i arrive at the input during the cycle when a control input, start, is 1. The circuit
should minimize by using a single multiplier to multiply ci by x and then by x again.
8. Describe dynamic RAM along diagram
9. Explain different ROM types.
10. Describe error detection and correction method used in memory components.
11. Compute the 12-bit ECC word corresponding to the 8-bit data word 01100001.
12. Determine whether there is an error in the ECC word 000111000100, and if so,
correct it.
13. Using the Hamming code determine whether there is an error in each of the following
ECC words, and if so, determine the corrected ECC word and the original data value.
a) 100100011010 b) 000110111000 c) 111011011101
 Module 3

1. Describe the manufacturing method of integrated circuits using photolithography

techniques.
2. Write short notes on SSI, MSI and ASIC logic families.
3. Write short notes on programmable logic devices.
4. Write short notes on complex PLDS
5. Explain the internal organization of an FPGA along with diagram
6. With neat diagram explain typical organization of an FPGA I/O block.
7. Explain different types of packaging and circuit boards.
8. Describe the need for interconnection and signal integrity along with diagram
9. Describe differential signaling
10. What are EMI and crosstalk?