Short Range Electric Vehicle

Motor Controller

Jesse Teat

a thesis submitted for the degree of

Master of Science
at the University of Otago, Dunedin,
New Zealand.

November 10, 2011

 Abstract

The recent and steady increase in fuel cost, climate change and pollution
has created a public awareness for energy conservation. The Internal Com-
bustion Engine (ICE) is known to be highly inefficient during stop/start
(acceleration) and idle periods at intersections and traffic lights. These are
areas where electric vehicles surpass the efficiency of any ICE powered ve-
hicle. Historically public opinion has been that electric vehicles do not have
a place in everyday transport needs due to that fact they are limited by
range. However a government study recently released figures stating that
the average distance travelled by New Zealanders every day was less than
50km. Recent advances in electronic motor control have seen three phase
Brushless DC Hub Motors in E-bikes become more readily available. These
motors are also being prototyped in four wheel passenger vehicles for mass
production. These Brushless Hub Motors are simple compact devices that
allow for a reduction in moving mechanical parts and therefore servicing
costs. Because a large percentage of New Zealand’s electricity production is
via renewable energy resources it was proposed that a short range electric
vehicle could be a solution to reducing the average New Zealander’s daily
commuting expenditure. This thesis is directed at producing a proof of
concept short range electric vehicle that might suit the daily needs of the
average New Zealander, promote the clean green image and reduce their
carbon footprint. The project covers the design of a vehicle to be classified
as a Land Transport New Zealand LB2 vehicle. This includes chassis de-
sign, motor selection and motor controller design. The main focus of the
thesis is the design of a three phase Brushless DC motor controller and the
accompanying firmware required to control it. The design is specifically
focused on reduction in motor controller size, reduced cost and component

ii
count. This includes designing the PCB so that no extra programming or
debugging interface is required. The schematic, PCB and firmware will be
produced as part of an Open-source project, therefore giving others the
opportunity to learn from the author’s mistakes and discoveries. A major
discovery made by the author is that motor control design requires effective
interfacing techniques. Switching noise is a continuous problem especially
induced noise on Hall effect sensor outputs. Therefore correct design prac-
tices must be adhered to to achieve the desired goal.

iii
 Acknowledgements

It is a pleasure to thank those who made this thesis possible.

Tim Molteno for giving me the opportunity to work on such an interesting
project. Thank you for allowing me to continue work as a part time student
on what will hopefully become a fully developed Open-source product.
Colin Fox and Warren Kennedy for their advice on both life and electronics
and for posing challenging questions when required.
Thanks to my employer Edwin Nieman at Kamahi Electronics for giving
me the opportunity to work in the industry while continuing my study and
for the mentally stimulating job.
Thanks also go to Richard Sparrow and Peter Stroud for helping design
and create the Ant.
Special thanks to my family Nev, Casey and especially my mother Bonny
for her advice and proof reading skills. I can’t imagine how bored you must
have been.
I’d like to finish by thanking my girlfriend Bridget for sticking with me,
proof reading and reminding me that I should go and finish writing this
thesis.

iv
Contents

1 Introduction 1
1.1 Project Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2 Background 4
2.1 Electric Vehicle Motors . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 DC motors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.2 Brushless DC motors . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.3 AC motors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.4 Hub Motors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Electric Vehicle Motor Control . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 H-bridge Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3.1 BEMF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4 Motor Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3 The Test Vehicle 15

3.1 Chassis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 The Motor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Motor Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.1 KEB48301 E-bike brush-less motor controller. . . . . . . . . . . 17
3.3.2 An Unbranded Chinese BLDC Controller . . . . . . . . . . . . . 18

4 Motor Controller Design 19

4.1 Design considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1.1 Aliasing and Parasitic Noise. . . . . . . . . . . . . . . . . . . . . 21
4.1.2 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1.3 Isolation of high voltage components . . . . . . . . . . . . . . . 23
4.1.4 MOSFET Driver . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1.5 MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2 Micro-controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.2.1 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.2.2 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.2.3 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.3 Safety and Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.4 FTDI Programming and Communication . . . . . . . . . . . . . . . . . 33
4.5 Power Electronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.6 PCB Redesign . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

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 4.7 System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5 Firmware Design 38
5.1 Firmware Design Specifications . . . . . . . . . . . . . . . . . . . . . . 38
5.2 Firmware Design and Testing Phases . . . . . . . . . . . . . . . . . . . 39
5.3 Motor Initialisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.4 Interesting OUBMC Control Algorithms . . . . . . . . . . . . . . . . . 40
5.4.1 TIM1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.4.2 TIM2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.4.3 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
5.4.4 Commutation Control . . . . . . . . . . . . . . . . . . . . . . . 44
5.4.5 SysTick . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
5.4.6 USART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

6 Results 47
6.1 Motor Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
6.1.1 Driven Performance . . . . . . . . . . . . . . . . . . . . . . . . . 50
6.1.2 Motor Controller Comparison . . . . . . . . . . . . . . . . . . . 52
6.1.3 OUBMC Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

7 Conclusion 56
7.1 Motor Controller Design . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.2 OUBMC Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.3 Commuting Via Short Range Electric Vehicle . . . . . . . . . . . . . . 57

8 Future Revisions 58
8.1 Required Modifications on current PCB . . . . . . . . . . . . . . . . . . 59
8.1.1 USART communication . . . . . . . . . . . . . . . . . . . . . . 59
8.1.2 Removal of IC7 . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
8.1.3 Corrections to IC9 . . . . . . . . . . . . . . . . . . . . . . . . . 59
8.1.4 Hall effect sensor interfacing . . . . . . . . . . . . . . . . . . . . 59
8.2 Hardware current limiting . . . . . . . . . . . . . . . . . . . . . . . . . 60
8.3 Removal of Bell DC Converter . . . . . . . . . . . . . . . . . . . . . . . 60
8.4 Lights driven by external circuitry . . . . . . . . . . . . . . . . . . . . . 60
8.5 Phase voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
8.6 LED user feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
8.7 USB supply isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
8.8 Power supply reconfiguration . . . . . . . . . . . . . . . . . . . . . . . . 62
8.9 Removal of the IRS23364D bootstrap diodes. . . . . . . . . . . . . . . . 62
8.10 Hall effect sensor interfacing . . . . . . . . . . . . . . . . . . . . . . . . 62
8.11 ADC Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
8.12 PC GUI motor setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
8.13 libopenstm32 port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
8.14 Control algorithm refinement . . . . . . . . . . . . . . . . . . . . . . . 64
8.15 Road legalising the Ant . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

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A 65
A.1 Schematic for OUBMC . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
A.2 PCB for OUBMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
A.3 BOM for OUBMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

B 75
B.1 Solidworks Ant Prototype Design . . . . . . . . . . . . . . . . . . . . . 75

C 77
C.1 OUBMC Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

References 78

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List of Tables

6.1 Unbranded Chinese BLDC Controller Test Drive . . . . . . . . . . . . . 50

6.2 BLDC Controller Comparison . . . . . . . . . . . . . . . . . . . . . . . 52

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List of Figures

1.1 Distance travelled per New Zealander per day. . . . . . . . . . . . . . . 2

2.1 Brushed DC motor at two different rotational positions. . . . . . . . . . 6

2.2 BLDC motor at two different rotational positions. . . . . . . . . . . . . 7
2.3 AC induction motor at two different rotational positions. . . . . . . . . 9
2.4 E-bike Hub motor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5 H-bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.6 The first stage of AC current generation. . . . . . . . . . . . . . . . . . 12
2.7 The second stage of AC current generation. . . . . . . . . . . . . . . . 12
2.8 Motor Commutation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.1 The Ant chassis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 E-bike Hub motor disassembled . . . . . . . . . . . . . . . . . . . . . . 17
3.3 An Unbranded Chinese BLDC Controller . . . . . . . . . . . . . . . . . 18

4.1 Examples of Trapezoidal PWM modulation . . . . . . . . . . . . . . . . 20

4.2 Induced Hall Effect Sensor Noise . . . . . . . . . . . . . . . . . . . . . 21
4.3 IGBT Gate Antenna Loop Parasitics . . . . . . . . . . . . . . . . . . . 22
4.4 OUBMC PCB bottom layer . . . . . . . . . . . . . . . . . . . . . . . . 23
4.5 The IL515 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.6 The IRS2336x Driver Family . . . . . . . . . . . . . . . . . . . . . . . . 27
4.7 TIM1 signal path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.8 TIM2 signal path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.9 FT2232H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.10 TL2575 5V regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.11 System Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

5.1 Basic Flow Chart of OUBMC firmware . . . . . . . . . . . . . . . . . . 40

5.2 TIM1 Trigger Interrupt Firmware Flow Chart . . . . . . . . . . . . . . 42
5.3 TIM1 Commutate Interrupt Firmware Flow Chart . . . . . . . . . . . . 43
5.4 SysTick Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

6.1 Hall Effect Sensor Output Rotated By Hand . . . . . . . . . . . . . . . 48

6.2 Hall Effect Sensor Output Driven . . . . . . . . . . . . . . . . . . . . . 49
6.3 GPS Plot Of Ant Test Drive . . . . . . . . . . . . . . . . . . . . . . . . 51
6.4 OUBMC Ant Trial 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.5 OUBMC Ant Trial 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.6 OUBMC Ant Trial 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

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8.1 The ADuM4160. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
8.2 The Kelly Controller GUI. . . . . . . . . . . . . . . . . . . . . . . . . . 63

A.1 CPU module schematic for OUBMC . . . . . . . . . . . . . . . . . . . 65

A.2 FTDI module schematic for OUBMC . . . . . . . . . . . . . . . . . . . 66
A.3 Isolation module schematic for OUBMC . . . . . . . . . . . . . . . . . 67
A.4 MOSFET Driver module schematic for OUBMC . . . . . . . . . . . . . 67
A.5 H-bridge and Power modules schematic for OUBMC . . . . . . . . . . . 68
A.6 Current sensing module schematic for OUBMC . . . . . . . . . . . . . 69
A.7 OUBMC PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
A.8 Top-layer of OUBMC PCB . . . . . . . . . . . . . . . . . . . . . . . . . 70
A.9 Bottom-layer of OUBMC PCB . . . . . . . . . . . . . . . . . . . . . . . 71
A.10 Top-Overlay of OUBMC PCB . . . . . . . . . . . . . . . . . . . . . . . 72
A.11 OUBMC Enclosure Faceplate . . . . . . . . . . . . . . . . . . . . . . . 73
A.12 OUBMC BOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

B.1 Otago University Ant Test chassis . . . . . . . . . . . . . . . . . . . . . 75

B.2 Ant chassis prototype design . . . . . . . . . . . . . . . . . . . . . . . . 76

x
Chapter 1

Introduction

This project’s aim is to create an Open-source brushless DC motor controller for a

proof of concept vehicle. The vehicle was designed and developed by the author and
University of Otago Physics Department engineer Richard Sparrow.
In recent years the need for short range travel has become more evident. A study
by Abley, Chou, and Douglass (1) shows that the average daily distance travelled by all
New Zealanders is less than 50Km. Figure 1.1 shows the distance travelled per person
per day by age and gender as discovered by Abley, Chou, and Douglass (1). These
findings could possibly allow an opening for small short range electric vehicles (EVs)
to replace their fossil fuel counterparts. There is much speculation as to the reasons for
the EV’s lack of success. Most engineers believe the EV’s short comings have been the
lack of suitable fuel storage technologies (6) and inefficiencies in generating electricity
for storage. It is for these reasons EV technology is better suited to short-range travel.
It is proposed that by tailoring an EV for short-range travel a viable alternative to the
common car will be created.

1
Figure 1.1: Distance travelled per New Zealander per day, categorised by age group and gender.
Image taken from National travel profiles part A: description of daily travel patterns(1).

1.1 Project Specification

Earlier analysis of electric vehicles by the author lead to a conclusion that the en-
ergy storage technology (batteries) is the factor limiting the range of electric vehicles.
Therefore battery and energy storage technology must improve before battery electric
vehicles can compete with Internal Combustion Engines (ICE). However, a short range
electric vehicle can be competitive using modern inexpensive technology. As the issues
posed by peak oil and climate change become more significant alternative transport
options will become more relevant.
The primary objective for this project is to create an open-source brushless DC
motor controller specifically for a short range electric vehicle. The project may act
as a platform for future development and improvement of Brushless Direct Current
(BLDC) motor control efficiency. The motor controller specifications are:

ˆ Environment: The electric vehicle is intended to be a prototype test vehicle.

Therefore the motor controller must interface with a PC while on the vehicle.
During testing the vehicle will be subjected to a range of environmental condi-
tions. Precautions must be taken to situate the controller in a splash proof area

2
 of the vehicle with a suitable enclosure compliant with IP69K standard 1 .

ˆ Performance: The electric vehicle is intended to fit into the New Zealand Land
Transport Safety Authority LB2 vehicle classification. Therefore, the prototype
is required to limit output power to 2Kw at the wheel and have a maximum speed
of 50KPh. The motor controller must operate safely and handle all possible error
states with minimal user interaction.

ˆ Flexibility: The motor controller should have the ability to be used to control
BLDC motors with a variety of sizes and power ratings up to 2Kw. Due to the
fact that all motors acquired by the Otago University Electronics Department
contained Hall effect sensors. The motor controller must accommodate Hall effect
sensor based control.

1
Water proofing is not achievable due to USB mini B connector limitation.

3
Chapter 2

Background

Electric vehicle (EV) technology is not new, it originated as early as the 1830’s with
Robert Anderson’s electric carriage. In 1899 the La Jamais Contente, an EV, became
the first car to exceed 100km/h (6). Over time EV technology has become more refined.
Despite this the EV is yet to claim any significant portion of the personal vehicle
market. Climate change, rising fuel costs and an increased demand for efficiency have
been driving factors for investigations into alternate powertrains to the ICE. This has
resulted in six different varieties of electric or hybrid vehicle combinations as stated
in the book Electric vehicle technology explained (6). Many modern test vehicles are
actually reverting to the original Anderson’s electric carriage in-hub motor design.
PML Flightlink, Subaru, Volvo and Hydro-Quebec (a Canadian electric utility firm)
1
are manufacturers who are developing concept cars based on this technology (10).
Modern refinements in motor technology supplemented with regenerative braking and
traction control are helping to reduce the EV’s negative features and increase their
range.

2.1 Electric Vehicle Motors

The type of electric motor used depends on design restrictions and economics. The
three main categories of motor are alternating current (AC), brushed direct current
(DC) and brushless direct current (BLDC). The names of these motors initially de-
scribed their control electronics, which can be misleading sometimes because most
electric motors actually use an alternating current to control their speed (4). When
selecting an electric motor for use in an EV a good measure of performance is specific
1
These concept cars are in both production and testing stages

4
power (kW/kg) (6). This standard unit is relevant for any type of EV, be it a car,
e-bike, bus or industrial vehicle. Motor efficiency is also relevant during EV motor
selection.
Typically motor efficiency will increase with motor size. This is because copper
losses due to heat in the motor windings can be more easily managed in larger mo-
tors (6). The loss equations are explained below.

ˆ Copper losses caused by resistance P = I 2 R create heat. This is the largest

inefficiency in small motors. The copper losses can also be defined by the motor
constant and the torque Copper losses = kc T 2 .

ˆ Iron losses in the rotor magnet’s. These are hysteresis and eddy current losses.
These are proportional to the change of magnetic frequency in the iron magnets
core. Iron losses = ki ω.

ˆ Friction losses to rotor bearings, brushes and or cooling fans.

f rictional losses = Tf ω wind losses = kw ω 3 .

ˆ Other losses involved in controlling the motor (control circuit losses) C.

Losses = kw ω 3 + ki ω + kc T 2 + C (2.1)

Using loss equation (2.1) an EV designer can classify the motor’s efficiency and
select the best option for the task. EV designers must understand the motor type and
control methods to understand how losses occur and how they may be reduced.

2.1.1 DC motors
DC motors are available in two types, brushed and brushless. DC motors are the most
commonly used motor in EVs because the electronics required to control them are
relatively simple (6).

5
Figure 2.1: Brushed DC motor at two different rotational positions. Zero Emission (14) SeriesDC
images 1 and 3, 2008.

There are three types of brushed DC motors although only one is considered for EV
use due to its control over speed and torque. This motor is known as the ‘separately
excited’ DC motor. The other two types, ‘series DC’ and the ‘shunt’ will not be
discussed here.
The brushed DC motor applies an electrical current via brushes to a commutator 2 .
This allows the current direction in the armature to alternate as it rotates. The rotation
of the armature is caused by an electromagnetic force (EMF) created between the
electrical current in the armature and the magnetic field in the stator 3 . Because the
motor is controlled using brushes which touch a moving surface they degrade with time
and require servicing. The brushes also create debris so they may not be suitable in
potentially hazardous areas such as around lead acid batteries. The following variables
are used to classify the motor. Armature current, motor torque and speed are calculated
using equations (2.3) and (2.4) as defined in Larminie’s book. (6)

ˆ Km = Motor constant.

ˆ Φ = Total magnetic flux passing through armature coil.

ˆ Es = Supply voltage.

ˆ Eb = BEMF voltage.

ˆ Ra = Armature resistance.
2
The commutator is a mechanical device that electrically switches current directions in the windings
as it rotates.
3
The stator is a casing surrounding the armature, it contains a number of strong magnets.

6
 ˆ ω = Angular speed.

ˆ I = Current through armature.

ˆ T = Torque about rotor axle.

Equation (2.2) gives the Back Electromotive Force (BEMF) voltage using the angular
speed ω and the motor constant Km .

Eb = Km Φω (2.2)

The current through the armature of a separately excited DC motor is given in equa-
tion (2.3).
V Es − Eb Es Km Φ
I= = = = ω (2.3)
Ra Ra Ra Ra
The torque about the rotor axle of a separately excited DC motor is shown by equa-
tion (2.4).
Km ΦEs (Km Φ)2
T = − ω (2.4)
Ra Ra
James Larminie’s book describes how motor damage due to excessive current and
torque can be reduced;

”Except for very small motors, the low speed torque is reduced, either by the
electronic controller, or by the internal resistance of the battery supplying
the motor. Otherwise the currents would be extremely high, and would
damage the motor.” (6) pg 145.

2.1.2 Brushless DC motors

Figure 2.2: BLDC motor at two different rotational positions. Zero Emission (14) BLDC images 1
and 3, 2008.

7
The brushless DC (BLDC) motor differs from the brushed DC motor because it has
no commutator plus the rotor armature is replaced by a permanent magnet. This
increases the weight of moving parts but also reduces the amount of servicing required.
The stator of a BLDC motor contains coils that create an electromagnetic field (EMF)
between themselves and the rotor. The difficulty arises with controlling the motor
as alternating current must be present in the coils to allow the motor to rotate. An
electronic controller is required to create the alternating current using a direct current
input. The controller cycles the current to rotate the rotor, therefore, the controller
needs feedback from the motor for each phase to be engaged. Feedback is often supplied
in the form of a rotary encoder, Hall effect sensors or sensor-less techniques 4 .
The book Energy Efficient Electric Motors discusses the pros and cons of the BLDC
motor.

“Main advantages of the BLDC motor drives are high efficiency, low main-
tenance and long life, low noise, control simplicity, low weight, and compact
construction. On the other hand, the main disadvantages of the BLDC mo-
tor drives are high cost of the permanent magnet materials, the problem of
demagnetization, limited extended speed and constant power range.” (4)
pg 271.

Many of these aforementioned issues have been addressed when selecting a motor for
the short range electric vehicle.

2.1.3 AC motors
5
AC motors are often called induction motors or squirrel cage motors and are similar
to BLDC having magnets and coils. However, AC motors differ because the magnets
are on the stator and the coils are on the rotor. Generally an AC motor has a lighter
rotor weight due to its squirrel cage shape allowing a reduced amount of iron.
4
Emadi (4) suggests the use of EMF feedback techniques for rotor position sensing to reduce
hardware costs.
5
The name squirrel (4) cage comes from the similarity of the rotor and cages used for squirrels to
exercise.

8
Figure 2.3: AC induction motor commonly known as a squirrel cage motor at two different rotational
positions. Zero Emission (14) AC induction images 1 and 3, 2008.

The most efficient motor type for EV purposes would be a Multi-speed AC motor,
which is able to have tuned characteristics. The National Electrical Manufacturers
Association (NEMA) specify that motors are to be categorized by torque, slip and
current ratings. Multi-speed AC motors are tuned to reach the desired characteristics
by having multiple windings about the stator changing the number of motor poles. AC
Motor efficiency may range from 73-93 percent for motors between 1-250hp (4).

2.1.4 Hub Motors

Hub motors have been widely available for electric bikes and scooters for some time.
However, their use in car and other passenger vehicles requires further development
and testing before being ready for broad use (10). Hub motors reduce the need for
extra mechanical gearing, drive-shafts and clutches. This reduces the overall cost of
building an EV, the need for servicing mechanical parts plus reduces vehicle weight.
Hub motor designs often utilise a modified AC design. The armature or rotor has a
modified squirrel cage design with three control phase cables running through the axle.
The outer casing stator contains magnets and rotates about the stationary armature
as the current changes direction.

9
 Figure 2.4: E-bike Hub motor resembles both an AC induction motor and a BLDC motor.

2.2 Electric Vehicle Motor Control

There are a large variety of commercial electronic motor controllers on the market
today. The range varies from industrial controllers for heating, ventilation, and air
conditioning (HVAC) AC motors to multi speed BLDC controllers for EVs. The range
of EV motor controllers is also vast, ranging from low powered 500 W BLDC motors
through to 122 kW brushed motors. An interesting development in recent times has
been the manufacture of motor controllers for electric bikes (E-bikes) and other small
vehicles. These may prove ideal as a substitute for short range Internal Combustion
Engine (ICE) vehicles.
The control method used by any motor controller varies depending on the require-
ments and performance characteristics of the vehicle. BLDC motors commonly use
speed, torque and commutation time or a combination of all three as feedback mech-
anisms to the controller. The feedback allows the motor controller to compensate and
reach a controller dedicated set point efficiently. These motor controller algorithms are
designed to dictate end user experience. The user controls the set speed or the accel-
eration (via torque control), which contributes to the efficiency of the vehicle. But the
user does not contribute to the motor controller switching efficiency. The switching
efficiency is dictated by the algorithm that controls the current in each motor phase.
An efficient switching algorithm or modulation scheme can reduce motor noise and
heat dissipation while increasing regenerative gain. The paper ’Influence of PWM

10
schemes and commutation methods for DC and brushless motors and drives’ by Ohm
and Oleksuk (7) defines several modulation schemes while describing how to best ad-
vance the efficiency of the motor. Studies by Ohm and Oleksuk (7) and Wu et al.
(18) show that sinusoidal control of three phase BLDC motors is the most efficient
control method. The studies also conclude that if a trapezoidal modulation scheme
can replicate sinusoidal control, efficiency will be increased (18). The authors show
that trapezoidal BLDC motor control is so common that chip designers have created
dedicated integrated circuits (ICs) with legacy modulation schemes, but none (at the
time of writing) have replicated the efficiency of sinusoidal control (7).

2.3 H-bridge Inverter

The H-bridge inverter see figure 2.5 is the major module in three phase motor control
when using a direct current (DC) supply. The MOSFETs are individually switched to
allow current into the motor winding. Figure 2.5 demonstrates the use of an H-bridge
inverter with Insulated-gate bipolar transistors (IGBT) rather than MOSFETs. Both
transistor types MOSFET and IGBT are compatible with the IRS23364D H-bridge
driver.

Figure 2.5: H-bridge: The H-bridge is used as a three phase bridge inverter. In this figure it is
interfaced with the IRS23364D a MOSFET, IGBT driver. Image acquired from IRS2336xD HIGH
VOLTAGE 3 PHASE GATE DRIVER IC (12).

11
 Figure 2.6 demonstrates current flowing into the motor phase IU when MOSFET
Q1 is switched on and then through the parallel diode of MOSFET Q2 when Q1 is
switched off.

Figure 2.6: The first stage of AC current generation. Image acquired from IRS2336xD HIGH
VOLTAGE 3 PHASE GATE DRIVER IC (12).

The second half of the AC signal is created when the current flows into the phase
from another set of MOSFETs in the H-bridge. This is demonstrated using figure 2.7.
Current flows from the phase IV and into the positive DC bus via the parallel diode of
MOSFET Q3 when Q4 is switched off. This continues to flow when Q4 is switched on.

Figure 2.7: The second stage of AC current generation. Image acquired from IRS2336xD HIGH
VOLTAGE 3 PHASE GATE DRIVER IC (12).

The current flows from one phase to another due to motor configuration. Figure 2.8

12
shows a motor with a star configuration. The motor phases are connected at a central
point allowing current to flow between them. Delta configuration is the other type
available for motors. An article by Pillay, Harley, and Odendal (9) concludes that Star
configuration is better than Delta for suppressing voltage spikes when using a current
source inverter.

2.3.1 BEMF
During commutation Back Electromotive Force (BEMF) is induced on the motor phase
that is inactive. BEMF is created by magnets moving past the coil, a voltage is
induced as described by Faraday’s law of induction 6 . BEMF is therefore proportional
to motor speed and determined by the motor constant Km . Brown (3) suggests in his
article Brushless DC Motor Control Made Easy, that;

”In an ideal motor, R and L are zero, and the motor will spin at a rate such
that the BEMF exactly equals the applied voltage.” (3)

This means that the series inductance and resistance of each motor phase is almost
negligible resulting in very large start-up and BEMF currents. The BEMF current can
be described using equation (2.3).

2.4 Motor Feedback

As mentioned in section 2.1.2 BLDC motor controllers vary in position feedback mech-
anisms. Rotary encoders, Hall effect sensors or BEMF, (see subsection 2.3.1 ) generate
position and timing information for the commutation process. The commutation pro-
cess is a speed dependent time frame when the motor controller switches control from
one motor phase to another using the selected modulation scheme. The figure 2.8
shows how during each commutation current is allowed to flow through the next mo-
tor coil forcing the motor to pull in the direction of the vector to the next position.
The torque generated at each commutation is directly related to the voltage across the
motor winding see equation (2.4).
6
Faraday’s law of induction describes EMF generation by change in magnetic flux.

13
Figure 2.8: Motor Commutation: Commutation current is allowed to flow through the next motor
coil forcing the motor to pull forward to the next position and phase commute. Image acquired from
Brushless DC Motor Control Made Easy (3)

14
Chapter 3

The Test Vehicle

3.1 Chassis
The chassis for the Otago University BLDC motor controller is called the Ant. The
Ant is based on the light weight structure of a go-kart. The Ant is designed to easily
interface with a variety of E-bike in-hub motors and motor controllers without signifi-
cant modification. The motor is mounted on the rear of the test vehicle in a slot based
on a motor cycle swing arm. The configuration of the Ant is a tadpole tricycle with two
front wheels and one rear. The rear wheel is the hub motor and the two front wheels
are used for steering. Attention has been paid to place the moment of the vehicle in
a forward central position to prevent tipping. As a prototype vehicle the Ant has not
yet achieved the necessary standards for New Zealand road use class LB2. Therefore,
testing was performed on private roads.
Initial designs of the Ant were done using Solidworks 2008 CAD (computer aided
design) software. A number of prototype design images for the Ant chassis were pro-
duced. These designs use a tadpole 2-1 wheel configuration and vary in size and pas-
senger positioning. The final design (figure 3.1) was chosen for its simplicity, reduced
size and weight. This design was taken from a previous model created by the project
engineer Richard Sparrow and scaled to fit the design brief. The included designs were
created by the author as simple design examples (Appendix B.1a).

15
 Figure 3.1: The Ant chassis fitted with 2Kw E-bike hub motor.

3.2 The Motor

A broad range of electric motors were available to test with the Otago BLDC motor
controller. Two E-bikes were purchased by the Electronics department to study the
types of controller and motors available to consumers. One was powered by a 500w
BLDC motor with an internal centrifugal clutch system commonly used on petrol 50cc
scooters. The other used 500W hub motor similar to that described in chapter 2
section 2.1.4 with in-hub gearing. Both E-bikes were tested by the author and it was
decided that both were under powered for the project specifications. Neither E-bike
attained the town speed limit and both displayed poor hill climbing characteristics.
As stated, section 1.1 the power train should be capable of delivering sufficient power
to accelerate the vehicle to 50Kph. The motor controller and motor must run safely
and efficiently up to 2Kw power output1 while delivering good low speed torque. This
proved the necessity to acquire new motors. The two new motors originated from
China but only one was accompanied with performance documentation. The motor
with unknown performance specification (2Kw motor) was assumed to have a 2Kw
power rating, whereas the other had a 3Kw rating. This 3Kw motor was supplied by
Kelly Controller LLC. Due to the availability of motor specification data for the 3Kw
1
The legal maximum for class LB2 vehicles in New Zealand.

16
motor it was planned to use this as the benchmark device. Unfortunately, one of the
Hall effect sensors was damaged during controller testing preventing further use of this
motor. The 2Kw in-hub motor was then used.
The motor was compatible with all four of the test controllers and fitted with three
Hall effect sensors positioned at 120°electrical separation. The motors were disassem-
bled to view the internal workings, access the number of poles and further classify the
motor.

Figure 3.2: E-bike Hub motor disassembled.

The inner workings of the motor most closely resemble an AC squirrel cage motor.
The number of poles is 23 and the stationary internal resistance is < 1 ohm from one
phase cable to another. The wheel circumference is 129cm.

3.3 Motor Controller

Comparisons were made between a variety of off the shelf motor controllers. These
were based around five areas of interest and were performed to give insight into market
devices and aid in the design process. Performance (includes power rating), features,
physical size, control method and usability were the categories for comparison. The
top two controllers are described below.

3.3.1 KEB48301 E-bike brush-less motor controller.

The KEB48301 E-bike brush-less motor controller is a 48v 3Kw motor controller that
can accommodate both 60°and 120°hall sensor interfacing. Software is included with the
controller which allows for programming of the device through a RS232 port. Control

17
methods, maximum power rating, battery voltage monitoring, regenerative braking,
reverse speed and current limiting can all be programmed from the software GUI. This
motor controller was used by the designer as a base for the Otago University BLDC
Motor Controller (OUBMC).

3.3.2 An Unbranded Chinese BLDC Controller

Two other controllers were used for initial test purposes. These came in two formats, a
more expensive potted version and the cheaper non-potted controller 3.3 both are rated
at 2Kw. Neither of these devices included documentation, installation instructions or
control adjustments. Both devices arrived in sealed water tight aluminium enclosures.
Both devices worked with the 120°layout of the 2Kw hub motor. It is unknown if the
controllers operate with a 60°Hall sensor configuration.

Figure 3.3: An Unbranded Chinese BLDC Controller.

18
Chapter 4

Motor Controller Design

The E-bike motors initially acquired for the Ant included Hall effect sensors1 , therefore
closed-loop Hall effect based control was chosen for the control method. The closed loop
control algorithm allows for various feedback methods while using Hall effect sensors2 .
Trapezoidal modulation was selected to control the motor phases as it is less difficult
to implement than other methods. Trapezoidal modulation is performed entirely us-
ing predefined Pulse Width Modulation (PWM) behaviours. It allows the software
designer to alter the efficiency of the motor, tailoring control for individual motors.
Motor voltage is controlled by varying the duty cycle of a PWM signal modulated in
the trapezoidal signal. An example of PWM trapezoidal modulation is included in
figure 4.1 Another method of controlling the motor speed is by forcing motor commu-
tation and therefore the rotational period. Further control methods such as vector field
control require additional sensors as documented in the section 8.5.
1
All five of the motors acquired by the Otago Electronics Department have Hall effect sensors.
2
Hall effect sensors are used for rotor position and current sensing in this design

19
Figure 4.1: Examples of Trapezoidal PWM modulation: Image acquired from Brushless DC Motor
Control Made Easy (3).

4.1 Design considerations

A BLDC motor controller design for a motor with a 35-72V range delivering 2000W3
incorporates high and low voltage componentry on the same printed circuit board
(PCB). It is likely that components on the PCB will see voltage spikes in excess of
100V. This extreme variation in voltage will destroy the lower voltage elements on the
PCB. Therefore precautions must be taken to avoid destruction of the sensitive logic
level devices that operate at CMOS or TTL voltages (0-3.3V or 0-5V). There are many
other design considerations that must be taken into account to ensure an effective and
functional design. Some of these considerations are:

ˆ Aliasing and parasitic noise.

ˆ PCB layout.

ˆ Isolation electronics.

ˆ Current control.
3
The intended motor voltage is 48V.

20
 ˆ Efficient use of high power devices.

ˆ Negative going transient voltages.

4.1.1 Aliasing and Parasitic Noise.

BLDC motors are very noisy systems. The constant variation of voltage dV /dt by
Pulse Width Modulation (PWM) generates spikes on the motor phases and battery
buses. Large voltage spikes can be seen on the motor phases at the beginning of each
trapezoid, see figure 4.1. The voltage spike occurs during periods of large current
change dI/dt, when the MOSFET switch turns on and current rushes into the motor
coil. Current noise within the motor phases also induces noise on the Hall effect sensor
cabling that runs parallel to them. Figure 4.2 shows the noise in the Hall effect sensors
after RC filtering. The image also shows each commutation on the digital outputs of
the processor for reference of each commutation.

Figure 4.2: Induced Hall Effect Sensor Noise: The image shows two Hall effect sensors along with
digital trapezoidal processor outputs, recorded during low speed motor control.

Parts of the H-bridge drive circuitry can behave like an antenna due to current
loops in the high side HOX and sample voltage VSX , see figure 4.3 . This current loop

21
enables electromagnetic (EM) coupling reducing MOSFET gate control and allowing
4
possible self turn-on. RG a gate resistor and parallel gate diodes as noted on the
IRS2236x demo board can be used to reduce the occurrence of these gate drive loops
and parasitic auto-inductance.

Figure 4.3: This figure shows the gate antenna loop parasitics of an IGBT. These are similar to those
that occur in the MOSFETs used in this thesis. Image acquired from IRS2336xD HIGH VOLTAGE
3 PHASE GATE DRIVER IC (12).

4.1.2 PCB Layout

Many of the design considerations are relevant to PCB layout, and can be solved by
using correct layout techniques. Often there are trade-offs between the best case layout
technique and the desired layout, due to physical restraints. The Otago University
BLDC motor controller (OUBMC) PCB layout is a balance between the desired size
of the physical enclosure, electronic isolation, circuit flow and functionality. Galvanic
isolation of low power control electronics has not been achieved in the final PCB layout
and requires component changes in future designs. The current design OUBMC rev
1.0 separates power electronics and control electronics using magnetic isolators, which
are connected by a common ground positioned away from the high current path. Issues
may arise from this design as negative going spikes could occur in the ground circuit as
the motor rotates and BEMF currents produced. The resultant momentary increase of
voltage across all ICs is likely to cause component damage. An attempt has been made
to reduce the effect of the negative going voltage spikes by positioning the DGND away
from the AGND high power ground loop path.
4
RG is shown in the Powerboard schematic as R27-R32

22
Figure 4.4: OUBMC PCB bottom layer: This image shows the digital ground plane (DGND) on
the left.

4.1.3 Isolation of high voltage components

The high voltage powerboard module consists of MOSFETs, driver ICs, isolation and
noise suppression circuitry. Also present on the powerboard module are high voltage
and current sensing devices. The 48V power supply will be created using four 12V
batteries. The 12V, 5V and 3.3V supplies are derived from 48V and are contained
within another module known as the power electronics module. Attention has been paid
to limit the complexity and component count of the MOSFET and MOSFET driver
module. The selected MOSFET driver comes in two alternatives, both options allow
for TTL connectivity but only one guarantees that the TTL levels are not exceeded by
using internal clamping diodes. Unfortunately this option has an inverted control logic
increasing programming complexity. Isolation is not guaranteed by the MOSFET driver
therefore isolation options like magnetic isolators or opto-isolators are appropriate.
Opto-isolators were used for high voltage control signals during the initial development
stage but have been replaced in the final design. The magnetic isolators NVE IL515
were chosen for package size, number of channels per package and price. The isolators
can be used to interface between the STM32 and MOSFET driver. The figure 4.5 shows
the interfacing between CPU and MOSFET driver with voltages converted from 3.3V

23
to 5V. Although the CPU has a 5V absolute maximum rating the isolators are used
to level shift and protect it from reaching this threshold. It was also noted that opto-
isolators have a limited life span where as the magnetic isolator does not. The IL515
is a four channel unidirectional magnetic isolator capable of speeds up to 2 Mbps (15)

Figure 4.5: This image is part of the schematic for the OUBMC.

4.1.4 MOSFET Driver

The MOSFET driver’s main requirement is to boost the H-bridge gate signals from
CMOS levels to that required for switching the MOSFET it’s full gate source voltage
range. This requirement cannot be achieved by interfacing the power MOSFETs and
the micro-controller. The basis for selecting a MOSFET driver over discrete electronics
is to reduce the component count and simplify the design. The IRS23364D is selected
over it’s IRS2336 counterpart due to the added feature of integrated 5.2V Zener clamp
on the CMOS interface pins5 . The IRS23364D has negated High, Low and Fault input
pins, requiring an inverted control waveform. The IRS2336 family of MOSFET drivers
have numerous integrated features that will aid the design including;

ˆ Undervoltage lockout

ˆ Integrated bootstrap
5
The IRS23364(D) caused numerous interfacing problems during the testing phase otago-bldc rev
0.1

24
 ˆ Shoot-through protection

ˆ Advanced input filter 6

ˆ Separate logic and power ground

ˆ Negative transient voltage toleration

ˆ Fault reporting and programmable fault clear timer

ˆ Separate enable

ˆ Switching and timing relationships 7

ˆ Over-temperature shutdown protection

ˆ Over-current protection8

Although the IRS2336x family has many fault and signal management functions in-
cluded in its design, some of these features are handled by the microprocessor. The
IRS23364D was primarily chosen for the following functions.

Undervoltage Lockout The undervoltage lockout feature monitors both VCC and
VBS allowing the IRS2336 to Enable/Disable the power circuitry. The device datasheet
states.

Upon power-up, should the VCC voltage fail to reach the VCCU V + 9 threshold,
the IC will not turn-on. Additionally, if the VCC voltage decreases below the
VCCU V − threshold during operation, the undervoltage lockout circuitry will
recognize a fault condition and shut down the high and low side gate drive
outputs, and the FAULT pin will transition to the low state to inform the
controller of the fault condition. Upon power-up, should the VBS voltage
fail to reach the VBSU V threshold, the IC will not turn-on. Additionally,
if the VBS voltage decreases below the VBSU V threshold during operation,
the undervoltage lockout circuitry will recognize a fault condition, and shut
down the high-side gate drive outputs of the IC. (12) pg 22.

This feature prevents low voltage MOSFET switching and an inherent loss of power
due to conduction while the motor is idle.
6
Includes short-pulse / noise rejection.
7
Including channel matched propagation delays.
8
The IRS2336x family utilises a comparator for over-current protection only.
9
VCCU V + is the VCC Under Voltage positive reference.

25
Integrated Bootstrap The integrated bootstrap feature of the IRS2336(D) is de-
signed to reduce component count further by supplying an internal boot FET to deliver
the required gate charge to the high-side drive stage. This feature is only available in
the IRS23364D therefore was not part of the first revision PCB architecture. The
rev1.0 has external bootstrap capacitors and diodes, but due to the pin compatibility
of the IRS2336(D) family of ICs the rev1.0 PCB is now populated with a IRS23364D.
Therefore future design revisions allow for a reduced component count by using the
IRS23364D.

Shoot-through Protection Shoot-through Protection is desired to prevent simul-

taneous activation of both the high and low side driver, resulting in a short-circuit
guard. Although the STM32 TIM1 output has an automatic deadtime input that is
variable, it is comforting that the circuit is protected from software error.

Separate Enable The driver enable switch is used in this design as an emergency
shutdown. This control is interfaced via an output on the STM32. The STM32 takes
an input from a switch placed on the dash of the ANT which is used to control the
driver enable.

26
Figure 4.6: A typical schematic for the IRS2336x using IGBTs for the H-bridge. The motor controller
used in this thesis uses the H-bridge design outlined in figure (A.5). Image acquired from IRS2336xD
HIGH VOLTAGE 3 PHASE GATE DRIVER IC (12).

4.1.5 MOSFETs
The H-bridge section was over engineered for the specification of the motor controller,
because it may have future requirements for larger motors. Therefore the STP80NF12
was chosen as a base for the H-bridge. The STP80NF12 fundamental specifications
are:

ˆ Drain-Source Voltage: VDS = 120V

ˆ Constant Current @ 100°C: ID = 60A

ˆ Peak diode recovery voltage slope: 10V /ns

ˆ Drain-Source Resistance: < 0.0018Ω

The drain-source voltage of the STP80NF12 was selected so that it will always
remain above the positive bus voltage even during voltage spikes. If the MOSFETs
were to be damaged by over voltage, motor control would be affected, possibly catas-
trophically. Therefore the design includes a transient voltage suppression (TVS) diode

27
to protect both the MOSFETs and the positive battery bus. The design also includes
decoupling capacitors for all power supplies and the battery bus. The Otago University
BLDC schematic allows for three sets of parallel MOSFETs, eighteen in total giving
a range of power possibilities for future developers. To reach the 2 kW specification
version 1.0 of the motor controller has only twelve MOSFETs populated. This allows
for two MOSFETs in parallel for every Hi-side Lo-side pair. Each pair of parallel MOS-
FETs is expected to share in excess of 50 A to reach the goal of 2 kW output at the
wheel. The parallel MOSFETs will not create much heat during their on period as the
Drain-Source resistance is very low, see equation (4.1).

P = 252 x0.0018 (4.1)

P = 1.125W (4.2)

The power dissipated changes considerably as heat is produced in the MOSFET. This
is due to the changed internal resistance. The data sheet for the MOSFET shows
that with a Gate-Source voltage of 10 V the Drain-Source resistance can reach 2Ω (13)
while Drain currents of 40 A can flow. As more heat is dissipated the internal resistance
increases resulting in thermal run away. The equivalent power loss as heat is shown in
equation (4.3). This would never happen as the component would likely be destroyed
or de-soldered by its own heat.
P = 252 x2 (4.3)

P = 1250W (4.4)

Although the data sheet for the STP80NF12 states an absolute maximum heat
dissipation of 300 W, this statement is only possible with very good heat-sinking.
Equation 4.5 taken from Thermal Resistance Theory and Practice is used to calcu-
late the maximum power that the MOSFET can dissipate with information from the
STP80NF12 data sheet (8). The following variables are used in the calculation.

ˆ Pv = The power dissipated by the device.

ˆ Tj = The maximum junction temperature of the device.

ˆ Tamax = The ambient air temperature.

ˆ Rθj−a = Thermal resistance junction-ambient max

28
 (Tj − Tamax )
Pv = (4.5)
Rθj−a

(175 − 70)
Pv = = 1.68W (4.6)
62.5
This shows that heat-sinking is a necessity for this design. It also shows that having
MOSFETs in parallel is helpful in reducing the risk of thermal run away.

4.2 Micro-controller
The STM32F103R6 (STM32), a 64 pin ARM cortex m3 processor, is the micro-
controller at the heart of the motor controller. The STM32 is ideal for this design as
it contains designated motor control circuitry. The STM32 implementation is shown
in appendix A.1 for the Otago University BLDC motor controller. The STM32 Perfor-
mance line embeds timers and ADC features that are perfectly suited to three-phase
brushless motor control (2). The advanced control PWM timer offers:

ˆ Six outputs

ˆ Dead-time generation

ˆ Edge-aligned and center-aligned waveforms

ˆ Emergency stop and synchronisation capability with the dual ADC

The dual ADC architecture allows simultaneous sample and hold with 12-bit reso-
lution, 1 µs conversion time (2). This feature is ideal for power consumption sampling
as voltage and current values can be sampled in parallel. The STM32 contains a nested
vector interrupt controller (NVIC) allowing priority to be given to certain interrupts
such as the timers described in section 4.2.1.

4.2.1 Timers
The STM32F103R6 micro processor has two timers that will be used as designated
timers for the motor controller. TIM1 the primary advanced timer outputs three high-
side PWM signals and three complementary low-side signals. These control signals are
used by the MOSFET driver to generate three phase AC signals for motor control.
TIM2 is the Hall effect sensor interface. This interface records the motor speed and

29
derives the commutation signal for TIM1. The timers have separately variable clock
speeds up to 72MHz with 16-bit control, input/output compare and PWM outputs.
The STM32 also has a dedicated SysTick timer which is a 24-bit down counter with a
vector controllable interrupt.

TIM1

TIM1 is set as a designated timer output. It has 4 independent channels, three of

which are used for the generation of the PWM signals derived to control the motor
torque. The first three channels on TIM1 are designed for motor control and include
designated NOT outputs 1,2,3. These six outputs in total are used to create a three
phase waveform for driving the BLDC motor. The microcontroller TIM1 modulates a
10
PWM signal on six outputs at a frequency defined by an interrupt. During the
testing phase the SysTick was used to generate the commutation interrupt. This
interrupt technique is known as forced commutation and is used to force the motor
to rotate at a set speed without increasing the voltage across the motor windings. The
SysTick interrupt was later replaced with hall sensors.

TIM1 control is derived from an external clock running at 8 MHz. The internal
PLL is then set to generate a 72 MHz clock for the system. TIM1 uses this clock to
create a time base period for the output PWM signals. In this case the modulated
PWM frequency is 20 kHz and is chosen to be outside the human audible frequency
range. The PWM duty cycle determines the motor speed or torque by restricting the
current applied to the motor phases. This duty cycle is manipulated by the throttle
read on an ADC and sent via DMA to the capture and compare registers in TIM1.
The PWM signals are commutated by a Hall effect sensor interrupt, triggered by motor
movement. During a commutation the next output control waveform is loaded from
the TIM1 shadow registers allowing for instant transition between commutations.
10
TIM1 outputs 1,2,3 and outputs N1, N2, N3.

30
Figure 4.7: Motor control path shown in red. Image acquired from RM0008 STM32 data sheet and
highlighted for Otago University BLDC motor controller TIM1 (16).

The dead time (DTG) register is set enabling dead-time between commutations.
Dead-time allows the switches to settle between commutations preventing conduction
of adjacent FETs. Each commutation is generated by the TIM1 slave mode controller
trigger interrupt, which is internally driven by the hall effect sensor (TIM2) master
mode controller.

31
TIM2

TIM2 control TIM2 also derives its counter from the 72 MHz PLL clock and uses the
internal prescaler to maximise the counter cycle. The hall effect sensors are coupled
internally via an XOR then directed to the slave mode controller. The slave mode
controller is also configured in master mode and generates an update for TIM1.

Figure 4.8: TIM2 is the input for the hall effect sensors. The signal path for the timer is shown in
red. Image acquired from RM0008 STM32 data sheet and highlighted for Otago University BLDC
motor controller TIM2 (16).

32
4.2.2 SysTick timer
The SysTick timer is used as a supervisor timer for the motor controller. Its purpose
is to run specific software routines at set time intervals. The SysTick is firmware con-
trolled with a firmware defined priority lower than the TIM1 and USART functionality.
The SysTick firmware section 5.4.5 describes the modules function in depth.

4.2.3 ADC
The analog to digital converter (ADC) in the STM32 has dual 12-bit, 1 µs A/D con-
verters with up to 16 channels. It has a conversion range of 0 to 3.6 V and dual-sample
and hold capability. The STM32 also has a built in temperature sensor which can be
accessed via the ADC. The ADC module is used to sample the bus current and voltage
as well as the throttle and motor controller internal ambient temperature.

4.3 Safety and Control

Monitoring of motor current and voltage under all conditions is required to reduce
motor and controller damage. The motor voltage and current is monitored via the
STM32 dual ADCs. The voltage is scaled by a voltage divider to an absolute maximum
of 3.3 V while the current is read through a Hall effect current sensor. The ACS758xCB
Hall effect based current sensor is a linear capable of sampling currents up to 100 A
with an output of 20 mV/A . The motor-controller current surge and voltage control are
implemented in firmware. The main function of the ComControl class is to adequately
limit motor current at low speeds as suggested in Larminie’s book, quote 2.1.1. The
class is also designed to read and set motor state flags for monitoring, motor movement,
wheel direction, battery voltage and current. If a motor state flag is tripped a fault
code is sent via USART. The PCB is to be modified in future revisions to allow for an
LED to give the user feedback.

4.4 FTDI Programming and Communication

The main PC interface is via an FT2232H IC designed and manufactured by Future
Technology Devices International (FTDI). This device offers a plethora of features only
three of which are needed for this design. The FTDI device serves as the main Joint
Test Action Group (JTAG) programmer and debugger. This added feature allows the

33
motor controller to be programmed in the field and reduces the need for extra costly
hardware. The FTDI also has another interface enabled as a Universal Synchronous
Asynchronous Receiver Transmitter (USART) allowing debugging, data logging and
general communication between PC and motor controller. The FT2232H also functions
as an Electrically Erasable Programmable Read-Only Memory (EEPROM) interface
allowing the motor controller identification to be programmed.

Figure 4.9: The FT2232H is the main interface IC for Otago University BLDC motor controller.

4.5 Power Electronics

The power electronics section of the motor controller has the function of producing 12
V, 5 V and 3.3 V from the 48 V battery array. A Bell 07CR-12S12L DC/DC converter

34
in a 1/8 brick package creates the 12 V supply which was initially intended to be used
to power the Ant lighting system. The 12 V supply is also used to power the MOSFET
driver circuit and the 5 V and 3.3 V supplies. The 5 V supply (IC9) is a switching (buck)
step-down regulator used on the motor controller as a TO-220 package. It is capable of
delivering up to 1 A at 5 V and operates on a unregulated input range of 7-40 V. IC9
supplies the Hall sensors, throttle, isolators and the 3.3 V supply. The figure 4.10 show
the proper schematic diagram for the TL2575. As mentioned in subsection 8.1.3 there
is a mistake in the schematic around IC9 therefore PCB modifications have been made
and a correction to the schematic following figure 4.10 is advised for future revisions.

Figure 4.10: The TL2575 5V regulator is used on the Otago University BLDC motor controller.
This image is a typical application circuit from the TL2572 data sheet (5).

The 3.3V supply (IC10) A.5 is generated using the LT1129-3.3 a low dropout reg-
ulator in as a SOT-223 package on the motor controller. This supply will power two
isolators IC5 and IC6 along with the FT2232 and the STM32.

4.6 PCB Redesign

The next version of the OUBMC requires numerous PCB modifications, these are
documented in chapter 8.

4.7 System Overview

(Figure 4.11) contains a hierarchical overview of the system outlined in this thesis.
The design is divided into three sections vehicle hardware, controller hardware and

35
controller firmware. The figure iterates system interfaces and communication direction
within these interfaces.

36
Figure 4.11: System diagram of the motor controller outlined in this thesis. The diagram is divided
into three sections vehicle hardware, controller hardware and controller firmware. Designed in yEd
flowchart editor.
37
Chapter 5

Firmware Design

5.1 Firmware Design Specifications

The motor controller hardware is designed for flexibility. Therefore the software should
reflect similar aspects. At the heart of the controller is the STM32F103R6 ARM
Cortex M3 microprocessor. Currently the Firmware is designed in the C programming
language and can be flashed to the micro processor via USB mini b cable and openocd1 .
JTAG debugging can be completed using OpenOCD and the GNU project debugger
(GDB) or another JTAG device via CON2 if the FT2232H IC is removed. These
features allow for flexible programming and debugging while the motor controller is in
its enclosure. Due to the hardware flexibility the software will be required to specify
all motor constraints as well as keeping within safe working limits of the chosen motor.
The software must also restrain the motor to keep the vehicle within Land Transport
New Zealand LB2 specifications. The benefits of this design are;

ˆ Motors are interchangeable (within the hardware voltage and current specifica-
tions).

ˆ Variable maximum speed and torque.

ˆ Maximum achievable motor efficiency.

ˆ Adjustable control schemes.

The motor controller firmware revision 1.0 is designed allow the motor controller
to achieve basic tasks such as:
1
Open On-Chip Debugging software, compatible with the with FT2232H IC

38
 ˆ Generate three phase BLDC motor control signals for a motor with hall feedback.

ˆ Initial control using trapezoidal PWM schemes.

ˆ Real-time power consumption analysis of motor.

ˆ Motor and control electronics error detection.

ˆ User interfaces, on/off, forward and reverse.

ˆ Throttle control.

ˆ Data recording and USART debugging.

ˆ GDB JTAG debugging.

Extend control specifications for revision 1.0.

ˆ A variety of control schemes.

ˆ Output motor consumption data for efficiency studies via UART (FTDI chip).

ˆ Acceleration control and top speed limiting.

ˆ Emergency freewheel.

5.2 Firmware Design and Testing Phases

Initial firmware design and testing was completed on two different Olimex development
boards both based around the STM32F103R6 micro processor. The STM32-H103 and
STM32-P103 were chosen as cost effective simple development board solutions. The
development boards were accompanied with the IAR Embedded Workbench EWARM
kickstart 5.11 software packaged with the STMicroelectronics (ST) stm32f10xfwlib
V2.0.3 firmware library. The software provided an environment to speed up develop-
ment time by including libraries and examples. The final firmware version is included as
an Eclipse project compiled using CodeSourcery G++ lite for the ARM-EABI-NONE
target 2 . The firmware is based on stm32f10xfwlib V3.0.0 firmware library and code
supplied by Open-BLDC3 and released under the GNU General Public License version
3.
2
ARM-EABI-NONE means the ARM embedded application binary interface with firmware running
directly on the device i.e. no operating system.
3
Open BrushLess DC Motor Controller is created by Piotr Esden-Tempski and the Open-BLDC
team.

39
5.3 Motor Initialisation
The basic flow of the motor controller firmware is detailed in figure 5.1. Motor ini-
tialisation occurs then the systems nested vector interrupt controller is left to handle
imminent interrupt signals.

SysTick();
Main(); Check motor status(); USART interrupt();
Initialise system CPU(); Update Speed = 0 Send motor status flags();
If stationary then
Generate Trigger Flag();
Else reset Flags
Send USART Data();

Commutation control.
Initialise motor peripherals();
Reset status flags();

Throttle, Ignition and Hall Sensor

Forward/Reverse Trigger
controls

Clear trigger Flag();

Read ADC();
Check Ignition();
Get Position();

NO
Not Rotating
Hall State Check(); TIM2 Hall sensor
Reload Next Expected
True? output();
Hall Phase();

YES

Generate
COM Flag();

Clear COM Flag,

Commutate();
Set ACC limit();
Set next Commutate();
Update Speed();

Figure 5.1: Basic Flow Chart of OUBMC firmware.

5.4 Interesting OUBMC Control Algorithms

The following subsections outline the processes involved in the motor controller firmware.
The motor control process is separated into 6 main areas these are:

ˆ TIM1: Sets motor output.

40
 ˆ TIM2: Reads Hall sensor input.

ˆ ADC: Reads throttle, voltage, temperature and current.

ˆ Commutation control: Sets status codes, checks motor status and controls error
handling.

ˆ SysTick: Calls motor status and USART routines and checks motor speed if
required.

ˆ USART: Transmits either motor data or motor status codes.

ˆ LED: Displays motor status to user via LED (hardware yet to be installed).

5.4.1 TIM1
TIM1 has two interrupts that are active in OUBMC rev 1.0, these are the TIM1 trigger
and the TIM1 commutation interrupts. The figure 5.2 demonstrates how the firmware
checks for the appropriate motor states before generating a commutation interrupt. It
is planned to alter this routine in the future as mentioned in subsection 5.4.2, this will
enable the motor torque to be more effectively utilised. The trigger interrupt performs
the tasks of reading the ADCs, checking the ignition switch, motor position and motor
direction.

41
 Trigger Interrupt();

Clear Trigger Flag

Read ADCs();

Check Ignition switch();

Ignition Disable Motor Driver,

switch LED Error Code,
enabled? NO Set Motor Freewheel

YES

Read Hall Sensor Position();

Check direction();

Expected NO
direction Reload the next step();
OK?

YES

NO
Wheel
moving?

YES

Set rotation flag yes();

Set rotation flag no(); Set rotation flag yes();
(likely going backwards)

Generate commutation
interrupt();

Figure 5.2: TIM1 Trigger Interrupt Firmware Flow Chart.

The TIM1 commutation interrupt pulls the previously set PWM scheme phase
from the TIM1 compare registers, which enables the next phase of commutation. The
controller then checks the motor speed chooses an acceleration rate dependent on that
speed. If the motor is greater than maximum speed the acceleration rate is set to a
negative value. The motor controller then proceeds to load the shadow registers with
the next expected commutation value, sets the SpeedCheck and LastHallPhase flags
and calculates the motor speed using the TIM2 capture and compare register. Figure
5.3 characterises the TIM1 commutation interrupt process.

42
 Commutate interrupt();

Clear Commutate Flag

Commutate();
(Load shadow registers)

Set acceleration rate limit();

Motor NO Set acceleration rate

moving? to stationary limit();

YES
Return;

YES Speed NO Set acceleration rate

Set cruise(); >
to moving limit();
MaxSpeed?

Return; Return;

Load next step();

(into shadow registers)

Set CheckSpeed flag

and LastHallPhase

Calculate Speed

return;

Figure 5.3: TIM1 Commutate Interrupt Firmware Flow Chart.

In future revisions of the firmware the set acceleration rate limit method could use
lookup tables as a more precise form of feedback control.

5.4.2 TIM2
TIM2 operates solely as a triggering device. As of OUBMC rev 1.0 the timer counts
upwards until it receives a signal from the Hall sensors4 . At that stage the timer
captures the count and generates a trigger event for TIM1. These processes are all
performed by defined hardware motor control which is set during initialisation. In
future firmware revisions it would be advantageous to move a number of routines to
4
The received signal is an XOR of the three Hall sensor inputs.

43
the TIM2 interrupt handler. The routines should be run after a variable delay to allow
for change in motor speed. The ADC read routine and the trigger generate routine
should be run at separate delay periods. This allows the wheel to reach an optimum
rotational angle for maximum torque before commutation. The ADC delay would
allow the ADC to read current and voltage data at defined times in the AC cycle
either avoiding peak spikes or targeting them. This type of feedback allows the motor
to be tuned for its best performance and efficiency. The ability to vary the period of
power readings can also help to define the best motor control scheme.

5.4.3 ADC
The STM32 has two independent 12-bit ADCs which can be programmed in dual mode.
The ADCs are initialised to sample in dual mode on four channels. These four channels
the current, voltage throttle and CPU temperature are transferred via direct memory
access (DMA)5 to a preset size table. The four channels are transferred as two 32-bit
variables then separated back into four 16-bit variables during an averaging and scaling
routine. The ADC and DMA operate in trigger mode allowing them to start at a set
time in the motor control algorithm. As of OUBMC firmware rev1.0 The ADC sample
routine is called from the TIM1 trigger interrupt.

5.4.4 Commutation Control

The Commutation Control module (Com control ) uses the STM32 Bit-Band region
to set motor flags according to motor status. The Bit-Band region in the STM32
allows the processor to access a memory location alias to read and write a bit without
disturbing other bits within the 16-bit word. This means the motor controller can
access information about individual motor control flags while another process may be
accessing the entire 16-bit word. The motor status flags are:

ˆ Forward: bit 0

ˆ Rotating: bit 1

ˆ BatCurrentOk: bit 2

ˆ BatVoltageOk: bit 3

ˆ MotorStatusOk: bit 4
5
DMA transfers data directly from one memory location to another without any CPU actions (11).

44
 ˆ HallStateFlag: bit 5

ˆ DirectionOk: bit 6

ˆ FreeWheeling: bit 7

ˆ CheckSpeed: bit 8

These bits are assigned to a variable called flags and can be accessed via the bit name
or the variable. The Commutation Control module is called by the main routine after
processor clocks are initialised. At this stage Com control initialises the peripherals
and sets the control flags. The SysTick can then interrupt at its predefined period.

5.4.5 SysTick
The SysTick operates as a motor controller supervisor. It has a vector interrupt priority
lower than that of TIM1, therefore priority motor features such as motor position
sensing and commutation can occur uninterrupted. The SysTick will operate at a set
period of 0.1 seconds and can be interrupted by the Hall sensor at any time. It does
not have a flag, therefore it will skip an interrupt if the higher priority interrupts are
active. The main function of the SysTick supervisor routine is to help start the motor
when it is stationary, but the routine also monitors that the motor current and voltage
limits are not exceeded The SysTick flow diagram shown in figure 5.4 demonstrates
the supervisor functionality. The supervisor checks the motor status and sets a status
flag. If the status flag is set the routine proceeds. If the status flag is not set a number
of error checking routines are run and the status is presented to the user via an LED.
These error checking and LED routines are not entirely functional in the OUBMC
rev 1.0. The supervisor continues by monitoring a speed check flag and incrementing
a counter. If the speed needs to be checked it sets the speed to 0 and generates a
Hall sensor trigger interrupt. This interrupt allows the motor to rotate if the user is
applying throttle. The SysTick supervisor finally calls a USART send data routine
enabling data logging if the USART flag is set.

45
 Supervisor();
Interrupt Routine
0.1 sec intervals

Motor Status
Checks(); Disable Motor Driver

LED Error Code

Ignition switch NO
enabled?
Set Motor Freewheel

YES

SpeedCheck NO
Increment Counter
Flag Set?

YES

Clear Flag, NO Generate Trigger

Speed > 0? Interrupt

YES

NO
Usart Counter
Increment Counter
Set?

YES Return

Clear counter
USART send
motor data();

Figure 5.4: SysTick Flow Chart: The SysTick operates as a motor controller supervisor.

5.4.6 USART
The USART module is primarily used for data logging but has been used heavily during
the development stage for debugging. The USART is set to run at 19200 baud with
8-bits per word and 1 stop bit. The USART is set to use no hardware flow control. The
USART module is able to send and receive data. OUBMC firmware rev 1.0 supports
data logging over USART. This includes the capture of throttle, CPU temperature,
battery current and voltage along with motor speed. The motor status flags can be
requested over USART by connecting a terminal and typing g. The USART is set to
a lower priority vector interrupt than TIM1 but higher than the SysTick.

46
Chapter 6

Results

The final design has performance based results for each area of the project separated
into sections. The results are both quantitative and qualitative for the differing areas
of the design. This allows the project to develop toward a definitive goal in future
revisions of the design.

6.1 Motor Control Signals

The first tests of the motor controller were performed on the bench. Initial results
identify that there are noise issues with the Hall effect sensor interfacing. The two
images captured on an Agilent Technologies 54642D oscilloscope shows the differences
in Hall effect sensor output with the motor rotated by hand 6.1 and motor driven by
the controller 6.2.

47
Figure 6.1: Hall Effect Sensor Output Rotated By Hand. The image shows Hall effect sensor inputs
on digital channels 6, 7 and 8. Trapezoidal PWM signals are shown on digital outputs 0-5 for reference.

These results are critical to motor performance as the Hall effect sensors should
only trigger at specific time periods relative to motor speed. If the Hall effect sensors
trigger at the incorrect wheel position or time frame motor control is effected. Figure 6.2
shows 20KHz switching noise modulated on the Hall effect sensor outputs. Section 8.10
outlines changes that will help reduce noise on the Hall sensor outputs.

48
Figure 6.2: Hall Effect Sensor Output Driven. The image shows Hall effect sensor inputs on analog
channels 1 and 2. Trapezoidal PWM signals are shown on digital outputs 0-5 for reference.

49
6.1.1 Driven Performance
A road test was performed using the Ant a 2 kW motor and the Unbranded Chinese
BLDC Controller 3.3.2, this test shows the range and performance of the vehicle using
cheap 40Ahr lead acid batteries1 . The data from the test drive was logged using GPS
and the loop track is shown in figure 6.3.

Lap Voltage Distance Time

0 54V 0km 0min
1 51.4V 5.37km 9.57min
2 50.6V 10.75km 18.59min
3 50.0V 16.12km 27.59min
4 49.5V 21.49km 37.28min
5 48.8V 26.87km 46.17min
6 48.2V 32.24km 56.02min

Table 6.1: Unbranded chinese BLDC controller test drive.

1
Other battery types could be used dependant on desired travel range or battery cost.

50
Figure 6.3: GPS plot of Ant test drive.

51
6.1.2 Motor Controller Comparison
The performance of the Ant while using the Kelly KEB48301 controller 3.3.1 was
remarkably good once configuration was complete. The controller enabled the Ant to
reach a top speed of 50 kph and acceleration from stationary was the best of all three
motor controllers. However hill starting capabilities remain a weak point, possibly due
to current limitations in the controller. The KEB48301 ranked highly for features with
software controlling almost all aspects of the controller, current limits, under voltage
and regenerative braking are examples of its flexibility. The size of the KEB48301 is
compact and the housing is well made and sturdy. Control methods for the KEB48301
are speed or torque based but PWM modulation schemes are not selectable and the
controller has an LED to monitor controller state. The Unbranded Chinese controller
seems to be targeting a different market. However its performance was acceptable
reaching speeds slightly below the speed limit. During the Ant range test 6.1 it reached
a distance of 32km before showing signs of performance loss 2 . The Unbranded Chinese
controller had no extra features. It only had on/off, accelerate and a brake cut-out
control. The size of the Unbranded Chinese motor controller was much larger than the
other two with the controller PCB taking up half of the enclosure space as shown in
figure 3.3.

Motor Controller Performance Features Size Control Methods Usability

Kelly KEB48301 5 5 4 5 5
Unbranded Chinese 4 1 2 1 3

Table 6.2: BLDC controller comparison. Each category is ranked on

a scale from 1 to 5.

6.1.3 OUBMC Tests

The following results were taken during short trial runs using the Ant, 2kw motor and
the OUBMC. The results are taken from feedback logged using the OUBMC ADCs
and transferred over USART. The best quality data sampled is on the throttle input
while the other inputs have large noise spikes and variation. These issues should be
resolved in future revisions as mentioned in section 8.11. Firmware averaging or a set
delay period are also possible solutions to these problems. Figure 6.4 shows the Ant
2
At 32km there was a reduction in the maximum speed.

52
accelerating to a speed of 34Kph on a down hill slope as show by the current and
throttle voltages.

Figure 6.4: OUBMC Ant Trial 1.

Trial two shows the Ant OUBMC combination while pulsing the throttle. A speed
of approximately 50 Kph is reached at around the 100 second mark. Note the current
reaches almost 40A at the 80 second mark. At the 80 second point the motor controller
is supplying approximately 1500W to the motor This is approaching the goal of 2Kw.
A point of interest is the voltage as it occasionally exceeds 80V, this may be a very
short spike on the bus as demonstrated in figure 4.1 at the beginning of the 100%, 75%
and 50% PWM waveforms.

53
 Figure 6.5: OUBMC Ant Trial 2.

Trial three shows the Ant OUBMC combination with the throttle input scaled by 10
times. The throttle scaling reveals the delay in acceleration created by the acceleration
limiter. The throttle output is also helpful for noting motor trends such as those shown
by the voltage and current about the 40 second mark in figure 6.6. The current and
throttle voltage about the 40 second mark in figure 6.6 are behaving as expected but
the bus voltage is not. Under periods of acceleration it may be expected that the bus
voltage would drop as current was drawn from the battery. The raw data reveals that
the motor has 2.5Kw across its terminals at the 41 second point.

54
 Figure 6.6: OUBMC Ant Trial 3

Due to noise issues and time constraints the Ant was never tested with the OUBMC
on a dynamometer. The author intends to review the PCB design following the list of
changes in chapter 8 to further test the OUBMC design in the future.

55
Chapter 7

Conclusion

7.1 Motor Controller Design

Brushless motor controller design is not simple, it requires many precautions including
voltage isolation, noise filtering and heat sinking. The current design functions but
needs more work to achieve the set goal. Chapter 8 outlines the changes required for
the motor controller to function safely. After damaging a Hall effect sensor in the 3Kw
motor and analysing the Hall effect sensor outputs of the 2Kw motor, figure 6.2 the
interfacing technique must be changed.

7.2 OUBMC Design

The results show specific areas of the OUBMC that require work, these include sam-
pling of the current and voltage bus. Changing aspects of the firmware design, could
allow samples to be taken after a delay allowing the inrush current and voltage to
settle giving a realistic reading. This delay period should also be used to trigger the
motor. Triggering should happen within a constrained TIM2 counter period this will
remove any Hall sensor error and allow the motor to be aligned for maximum torque.
Once interfacing issues are corrected the motor controller switching efficiency can be
monitored and adjustments to the PWM trapezoidal schemes can be made. The final
stage of controller development may include dynamometer tests to tune power at the
wheel and therefore view system efficiency.

56
7.3 Commuting Via Short Range Electric Vehicle
The road test using the Ant and Unbranded Chinese BLDC Controller was successful
and when paired with the KEB48301 the Ant showed that it was capable of achieving
the project specification. This prototype vehicle has helped the author and others in
the Otago University Electronics Department realise that with further development
commuting via short range electric vehicle is possible. This has result has seen the
department invest time in designing a road legal Ant chassis for the further development
of the product. The OUBMC schematic, PCB, software and Ant chassis design will be
revised and made Open-source to allow others to help progress the design.

57
Chapter 8

Future Revisions

The Author believes that further revisions of OUBMC may be used as a learning
platform for students. Future versions of OUBMC may include.

ˆ Hardware: Required modifications on current PCB.

ˆ Hardware: Hardware current limiting.

ˆ Hardware: Removal of Bell DC converter.

ˆ Hardware: Lights driven by external circuitry.

ˆ Hardware: Phase voltage detection.

ˆ Hardware: LED user feedback.

ˆ Hardware: USB supply isolation.

ˆ Hardware: Power supply reconfiguration.

ˆ Hardware: Removal of the IRS23364D bootstrap diodes.

ˆ Hardware: Hall effect sensor interfacing.

ˆ Hardware: ADC Decoupling.

ˆ Software: PC GUI motor setup.

ˆ Software: libopenstm32 port.

ˆ Software: Control algorithm refinement.

ˆ Chassis: Road legalising the Ant.

58
8.1 Required Modifications on current PCB
Several modifications are required on the OUBMC rev 1.0 these are:

ˆ USART communication.

ˆ Removal of IC7.

ˆ Corrections to IC9.

ˆ Hall effect sensor interfacing

8.1.1 USART communication

The USART communication protocol requires two signal lines transmit (TX) and re-
cieve (RX). These two signals have been connected wrong in the schematic. Modifica-
tions have been made to the PCB and communication is functional. The Modifications
are made using thin wire with a non-conductive coating.

8.1.2 Removal of IC7

IC7 is a magnetic isolation IC (IL515). It is not required for the throttle or current
sense inputs but could have possible future use for the reverse and brake switches. The
test device PCB has IC7 removed and the tracks are bridged with thin wire. Series
resistors of 1K have been added to terminate the reverse and brake switches while
voltage divider is added to the throttle to divide the maximum possible voltage to 3V.
The current sense IC (IC3) is also terminated with a 1K resistor.

8.1.3 Corrections to IC9

A mistake in the schematic has lead to modification of the PCB around IC9 the 5V
converter. Pins 5 and 2 are swapped.

8.1.4 Hall effect sensor interfacing

Hall effect sensor noise has been a major setback for the firmware design and debugging
stages of the motor controller build. The Hall effect sensors require heavy filtering on
each input pin. The filter used on the rev 1.0 PCB uses an R-C filter with a cut off
frequency of 300Hz. In future PCB revisions, previsions should be made for an R-C
filter and a pull-up resistor, as many Hall effect sensors require this.

59
8.2 Hardware current limiting
The IRS2236 has included fault circuitry designed to protect the H-Bridge from over
current and high temperature. This circuitry is not initially implemented due to de-
signer oversight. This design has a separate device for current detection the ACS758,
which outputs current data to the STM32. The problem with this design is that current
control relies entirely on software implementation and its correct functionality. The
next revision should implement hardware current limiting either using the internal
comparator of the IRS2236 or similar circuitry. An appropriate circuit could include
the ACS758 as the required current shunt for the IRS2336, therefore enabling software
current monitoring also.

8.3 Removal of Bell DC Converter

The inclusion of the Bell 07CR-12S12L allows for total integration of lighting systems
for the Ant into the motor-controller. The problems arose when designing a heat sink
for the controller. The Bell converter is designed to be placed within a position of air
flow, yet the motor controller must be sealed. The total power budget of the Bell (140
W) also exceeds the requirements for lighting the Ant if using LED or halogen lights.
Therefore the next revision of the motor controller PCB should replace the Bell DC
converter with a low power surface mount (SMD) or through hole tab device. This
arrangement would allow for controlled heat dissipation and reduction in PCB size
while using a sealed enclosure.

8.4 Lights driven by external circuitry

By creating another power system for the Ant lighting, motor controller costs will be
reduced and the efficiency of the motor controller can be improved. The motor control
application does not require a high power 12V system. Therefore the OUBMC design
should diverge from the lighting circuitry and be tailored specifically for motor control
applications.

60
8.5 Phase voltage detection
The addition of voltage and or current detection of each phase would allow for new
control algorithms to be used i.e. vector control. The new control algorithm may
allow the motor to have better electrical efficiency as a more rounded knowledge of
the motors performance can be gained from more feedback. This will enable switching
noise and phase ringing to be reduced by methods such as synchronous rectification.

8.6 LED user feedback

Led light pipes could be placed in the enclosure allowing SMD LEDs to be used as user
feedback. Feedback features could vary with the use of a single or tri-colour LEDs.
The tri-colour LED could represent all motor states through the variety of possible
colours. Where as the single colour LED could use a CPU timer to generate different
frequency blinks to represent motor state.

8.7 USB supply isolation

Isolation of the USB interface has been poorly designed in this OUBMC rev 1.0. The
isolation of the USB requires that the USB host power and ground only is used to
power the interfacing side. This prevents any current from entering the USB host
and damaging the expensive circuitry. Figure 8.1 displays a typical application of the
ADuM4160, an IC designed for USB isolation and a perfect candidate for the next
revision of OUBMC.

Figure 8.1: The ADuM4160 is a perfect USB isolation ic separating the USB host from both power
and ground.

61
8.8 Power supply reconfiguration
The use of regulators on rev 1.0 of the motor-controller is ineffective in ground plane
isolation therefore in ideal cases the regulators would be replaced with isolating DC/DC
converters. The proposed design would use a regulator to reduce the voltage from 48V
to 12V. This allows the IRS2336 to remain on the common ground while a DC/DC
converter could be used to isolate the 5V or 3.3V power and ground rails.

8.9 Removal of the IRS23364D bootstrap diodes.

As explained in subsection 4.1.4, the rev 1.0 motor controller PCB was designed for the
IRS2336 MOSFET driver. The IRS23364D does not require bootstrap diodes and has
inverted control logic therefore the bootstrap diodes can be removed. This leaves PCB
space that can be used for hardware safety features like those suggested in section 8.2.

8.10 Hall effect sensor interfacing

Due to induced noise on the Hall effect sensor outputs changes must be made to the
interfacing method use on the OUBMC PCB. The changes include current supply
limiting for the Hall effect sensors and pull up resistors on the Hall sensor outputs.
Test points are also required just prior to the STM32 Hall effect sensor input/output
(IO) pins to provide a simple debugging option.

8.11 ADC Decoupling

The reduction of noise on the current and voltage sense ADC channels should be a
priority. This can be achieved by altering the values of the decoupling capacitors C37
and C38.

8.12 PC GUI motor setup

The addition of a PC GUI for the motor controller would aid in the configuration of
variables such as speed or torque control, motor power rating and hall sensor configu-
ration. The Kelly motor controller was supplied with an RS232 port for programming
some of the aforementioned variables. A screenshot of the Kelly Controller GUI is

62
provided for an indication of the simplicity and functionality of such a GUI (see fig-
ure 8.2).

Figure 8.2: The Kelly Controller GUI is used to program the controller variables at setup time.
Image borrowed from the KEB48301 user manual (17).

8.13 libopenstm32 port

To create a truly Open-source implementation of OUBMC the firmware would be
ported from the STM32 firmware libraries to the libopenstm32 libraries. This was not
implemented initially as libopenstm32 was non-existent during rev 1.0 design. Also a
number of the hardware features remain unavailable at the date writing. An advan-
tage of Open-source code is that other developers can continue work on the design of
firmware control algorithms and therefore enhance the end product.

63
8.14 Control algorithm refinement
The main functionality of the Otago BLDC motor-controller depends on efficient algo-
rithms, yet much improvement may be devoted to improving the firmware algorithms
and structure. The main areas of focus for improvement should be start-up and trig-
ger timing algorithms along with improvement of the error checking routines. If the
hardware was revised then many new control routines could also be added to refine the
efficiency of the motor.

8.15 Road legalising the Ant

Future improvements for the Ant include lights, indicators, brakes (on every wheel),
suspension and a light weight body. Some of these designs have already been started
and final stages such as the light weight body may be offered to university design
students as an assignment.

64
Appendix A

A.1 Schematic for OUBMC

Figure A.1: CPU module schematic for OUBMC: Images printed using Protel 99 se

65
Figure A.2: FTDI module schematic for OUBMC: Images printed using Protel 99 se

66
 Figure A.3: Isolation module schematic for OUBMC: Images printed using Protel 99 se

Figure A.4: MOSFET Driver module schematic for OUBMC: Images printed using Protel 99 se

67
 (a) H-Bridge module (b) Power module

Figure A.5: H-bridge and Power modules schematic for OUBMC: Images printed using Protel 99 se
68
Figure A.6: Current sensing module schematic for OUBMC: Images printed using Protel 99 se

A.2 PCB for OUBMC

Figure A.7: OUBMC PCB: Images printed using Protel 99 se

69
Figure A.8: Top-layer of PCB: The top-layer layout accentuates the separation of high power
electronics situated at the top left flowing right then down to the negative battery terminal. The flow
of the control electronics originates at the mini-B USB connector and flows down first through the
FTDI chip to the STM32 then through the isolation barrier to the MOSFET driver. Images printed
from Gerbv gerber viewer version 2.4.0

70
Figure A.9: Bottom-layer of OUBMC PCB: The bottom-layer layout demonstrates the use of a
ground plane for low voltage control electronics. No ground plane is used for the high power circuitry.
This is advised to reduce noise coupling (12). Images printed from Gerbv gerber viewer version 2.4.0

71
Figure A.10: Top-Overlay of OUBMC PCB: The top-overlay is simple and uniform, all components
aligned in rows and columns pin 1 to the top left of the PCB allowing for easy debugging and assembly.
The overlay also presents the use of six MOSFETs per phase. This parallel technique is chosen to
reduce the load on each component package while increasing the maximum throughput. Images printed
from Gerbv gerber viewer version 2.4.0

72
Figure A.11: OUBMC Enclosure Faceplate: Images printed using Protel 99 se

73
A.3 BOM for OUBMC

Bill of Material for PCB2.PCB

On 27/04/2010 at 9:39:18 a.m.

Comment Pattern Quantity Components

------------------------------------------------------------------------------
07CR-12S12L 07CR-12S12L 1 IC1 BEL DCDC CONVERTER
0E 805 2 R26, R36
100nF >16V 805 16 C1, C3, C4, C5, C6, C7, C8
C9, C11, C12, C25, C26, C27
C28, C29, C30
100nF 100V 805 3 C17, C18, C19
100nF 10V 805 1 C37
10K 5% 805 8 R17, R18, R19, R20, R21, R22
R23, R24
10nF 805 1 C31
12k 1% 805 1 R2
12MHz C7M 1 X3
150nF >25V 805 3 C32, C33, C34
1k 5% 805 11 R1, R5, R6, R9, R10, R11, R12
R13, R14, R15, R16
1nF 16V 805 5 C10, C20, C24, C35, C38
20PIN JTAG IDC20 1 CON2
220E 5% 805 2 R3, R4
2200uF 100V RB7.6-15 3 C21, C22, C23
27pF 10V 805 2 C15, C16
2M 5% 805 1 R25
300E 5% 805 6 R27, R28, R29, R30, R31, R32
3M 1% 805 1 R7
3u3 6V3 TANTALUM-A 4 C2, C13, C14, C39
5E 5% 805 3 R33, R34, R35
5KPXX P600 1 D1
80K6 805 1 R8
ACS750LCA-050 ACS75050 1 IC3
Cap Pol1 CAPPR1.5-4x5 2 C36, C40
10uF 6.3V TANTALUM-A 1 C41
CRYSTAL C3B 1 IC8
Diode 1N5819 DIO18.84-9.6x5.6 1 D5
Fast recovery diode SMA 3 D2, D3, D4
FT2232HL LQFP64_N 1 IC4
Ferrite bead 805 2 L1, L2
IL515 SOIC16W 3 IC5, IC6, IC7
330uH 1A 10X10 1 L3
IRS23364D SOIC28W 1 X8
LED 805D 2 LED1, LED2
LT1129CST-5 SOT-223 1 IC10
MINI-USB-TYPEB-SMT USBMINIBSMT 1 CON1
POWER-CON POWER-CON 5 CON3, CON4, CON5, CON6, CON7
STM32F103RBT6 LQFP64_N 1 IC2
STP80NF12 TO-220 18 M1, M2, M3, M4, M5, M6, M7
M8, M9, M10, M11, M12, M13
M14, M15, M16, M17, M18
TL2575 TO-220-5 1 IC9
TP BIGLOOP 22 TP1, TP2, TP3, TP4, TP5, TP6
TP7, TP8, TP9, TP10, TP11
TP12, TP13, TP14, TP15, TP16
TP17, TP18, TP19, TP20, TP21
TP22

Figure A.12: OUBMC BOM: The motor-controller bill of materials as exported from protel 99 se.
The BOM has then been processed in gedit and printed to pdf.

74
Appendix B

B.1 Solidworks Ant Prototype Design

A selection of prototype design images for the Ant chassis, produced in solidworks 2008
design suite.

(a) Test Chassis Prototype Design (b) Test Chassis Final Design

Figure B.1: Otago University Ant Test chassis: The test chassis resembles a three wheel go-kart.

75
Figure B.2: Ant chassis prototype design: These designs were intended to be capable of carrying
two people.

76
Appendix C

C.1 OUBMC Firmware

The firmware for this project is available in the attached media in the rear cover. The
firmware is written in C and built using the Code Sourcery G++ Lite 2010q1-188
toolchain. An Eclipse project is supplied along with make files. Much of the project is
based on the Open-BLDC project written by Piotr Esden-Tempski and other supporters
of the Open-BLDC project. An overview of the project is available by launching the file
/otagoBLDC/BLDC src/html/main.html in an web browser. This documentation
is produced using doxygen 1.6.3

77
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79