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  • Sualaptop365.edu - VN - Lenovo ThinkPad S5-S540 VIUS6 LA-A171P r10

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    Herman Toothrot
    138 views46 pages
    The document is a schematic for the VIUS6 laptop model featuring an Intel Shark Bay ULT processor and AMD SUN XT S3 GPU. It details the laptop's memory configuration including two DDR3L SO-DIMM slots supporting DDR3 1600 MHz memory. The schematic also outlines the laptop's display and port connections including eDP, HDMI, DisplayPort and audio components. It is confidential Compal Electronics property and contains their trade secret information.

    Original Description:

    schematic for ThinkPad S5-S540

    Original Title

    sualaptop365.edu.vn_Lenovo ThinkPad S5-S540 VIUS6 LA-A171P r10

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    © © All Rights Reserved

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    The document is a schematic for the VIUS6 laptop model featuring an Intel Shark Bay ULT processor and AMD SUN XT S3 GPU. It details the laptop's memory configuration including two DDR3L SO-DIMM slots supporting DDR3 1600 MHz memory. The schematic also outlines the laptop's display and port connections including eDP, HDMI, DisplayPort and audio components. It is confidential Compal Electronics property and contains their trade secret information.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
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    138 views46 pages

    Sualaptop365.edu - VN - Lenovo ThinkPad S5-S540 VIUS6 LA-A171P r10

    Uploaded by

    Herman Toothrot
    The document is a schematic for the VIUS6 laptop model featuring an Intel Shark Bay ULT processor and AMD SUN XT S3 GPU. It details the laptop's memory configuration including two DDR3L SO-DIMM slots supporting DDR3 1600 MHz memory. The schematic also outlines the laptop's display and port connections including eDP, HDMI, DisplayPort and audio components. It is confidential Compal Electronics property and contains their trade secret information.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
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    of 46

    A B C D E

    Compal Confidential
    Model Name: VIUS6
    File Name: LA-A171P
    1 1

    2
    Compal Confidential 2

    Guinness-2 M/B Schematics Document


    Intel Shark Bay ULT Processor with DDR3L
    +AMD SUN XT S3 GPU

    3
    REV:1.0_Final 3

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2013/02/20 Deciphered Date 2012/07/01 Title
    SHEMATIC. MB AA171
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    sualaptop365.edu.vn
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    4019OJ
    Date: Friday, February 28, 2014 Sheet: 1 of 46
    A B C D E
    A B C D E

    Compal confidential

    AMD SUN XT Memory BUS A-ch DDR3L-SO-DIMM X1


    1
    23mm* 23mm PCIE x4 DDR3 1600 MHz (1.35V) page 16 1

    DDR3*4
    VRAM 128M*16
    page 18~25
    eDP
    Memory BUS B-ch DDR3L-SO-DIMM X1
    page 17
    eDP Connector DDR3 1600 MHz (1.35V)

    page 26

    2Channel Speacker
    HDMI Connector HDMI Intel
    page 28
    page 27 DDI x1 Shark Bay Audio Codec
    HD Audio Digital Mic
    Display Port (Docking)
    ULT (15W) page 26
    2 DP 2
    page 28
    BGA
    (Sub-Board) page 33 PCIE x1 Audio Combo Jack
    page 28
    port 3

    USB 3.0
    (Sub-Board)
    Card Reader PCI-E 2.97GT/s USB Port 3.0 (Charger)
    Realtek7 RTS522 page 33 (Sub-Board)
    page 33 USB 2.0
    SPI USB Port 3.0
    I2C page 31
    LAN
    Realtek RTL8111GUS SATA
    page 29 SPI ROM page 5~15 USB Port 3.0 (Docking)
    page 33 (Sub-Board)
    page 8
    3 3

    RJ45 Conn Touch Screen


    Security ROM LPC BUS TPM
    page 29 page 26
    page 33
    page 8
    CMOS Camera
    EC page 26
    PCI Express Mini Card PCI-E(WLAN) NFC Conn. SM Bus ENE KB9012
    WLAN / WiMAX / BT USB(BT) page 34
    page 31 page 33 Finger Printer
    page 32

    Int.KBD G-Sensor SATA 3.0 HDD CONN


    page 32 page 30
    with BKLIT page 30 (Sub-Board)
    Sub-Board List:
    Click Pad Thermal Sensor WWAN/ m-SATA SSD
    LS-9671P I/O Board page 32 Fintek F75303M NGFF (B-type) Card
    4
    LS-A171P Card Reader Board CPU & RAM page 31 page 30
    4

    LS-9673P HDD Board Track Point


    page 32
    LS-9676P Power on Board
    LS-9677P Hall Sensor Board Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    MB Block Diagram
    Size Document Number Rev

    sualaptop365.edu.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Custom
    4019OJ D

    Date: Friday, February 28, 2014 Sheet 2 of 46


    A B C D E
    1 2 3 4 5

    Voltage Rails
    SIGNAL
    STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
    *
    +5VS Full ON HIGH HIGH HIGH HIGH ON ON ON ON
    +3VS
    power +1.5VS S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
    plane +5VALW +3VM
    +CPU_CORE
    +1.35V +VGA_CORE S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
    B+ +1.05VM
    +VCC_GFXCORE_AXG
    A +3VALW +1.8VS S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF A
    (SBA Only)
    +0.675VS
    State +1.05VS
    BOARD ID Table USB 2.0 Port Table
    USB 2.0 Port 3 External
    Board ID PCB Revision USB Port

    O O 0 0.1 0 USB 3.0 Port (I/O Board)


    S0 O O O M3 Supported 1
    1 USB 3.0 Port (MB)
    2 2
    *
    O USB 3.0 Port (Docking)
    S3 O O O X M3 Supported
    3 3 Mini Card (WLAN/BT)
    4 4 Touch Screen
    O 5
    S5 S4/AC O O X X M3 Supported
    5 Camera
    6 6 FPR
    7
    S5 S4/ Battery only X X X X 7 WWAN
    S5 S4/AC & Battery
    don't exist X X X X
    BOM Structure Table
    B B
    BTO Item BOM Structure
    USB 3.0 Port Table
    Connector ME@ PCIE Port Table
    EC SM Bus1 address Unpop @
    Port
    Device Address HEX 1
    AMD GPU DIS@ USB 3.0 Port (I/O Board)
    Smart Battery 0001 011X b 16H Port Lane
    Charger 0001 011X b 12H Intel UMA UMA@ 2 USB 3.0 Port (MB)
    MARS GPU MARS@ 3 USB 3.0 Port (Docking) 1
    TPM TPM@ 4 2 LAN
    SIM SIM@ 3 WLAN
    EC SM Bus2 address Either SBA@ or NOSBA@
    SBA SBA@ 4 Cardreader
    Non-SBA NOSBA@ 0
    Device Address HEX
    Thermal Fintek F75303M 1001 101X b 9AH
    Either SWR@ or LDO@
    LAN Switching mode SWR@ SATA Port Table 1
    Thermal ON-semi ADM1032 0100 110X b 4CH
    LAN LDO mode LDO@ 5 GPU
    Sinaptics Inter Touch Click Pad 0010 110X b 2CH 2
    VRAM Option X76@ Port
    3
    Samsung VRAM X76S@
    Either X76S@ or X76M@ Micron VRAM X76M@ 3 0
    AOAC Mount AOAC@ 2 1
    PCH SM Bus address 6
    EMI un-Mount @EMI@ 1 NGFF SSD 2
    EMI Mount EMI@
    C
    Device Address HEX 0 HDD 3 C
    DDR DIMM1 1001 000X b A0H
    DDR DIMM2 1001 000X b A4H
    Securyti ROM 1010 100X b A8H
    CPU PCB
    U1 U1 U1 U1 U1 ZZZ

    LA-A171P

    Haswell ULT 2+2 0.8GHz Haswell ULT 2+2 1.2GHz Haswell ULT 2+3 0.2GHz Haswell ULT 1.5GHz Haswell ULT 1.4GHz DA PCB
    CPU1@ CPU2@ CPU3@ CPU4@ CPU5@ DAZ0YW00100
    SA00006G100 SA000067H20 SA00006SJ20 SA00006ST30
    SA000067010

    VRAM
    U1 U1 U1 U1 U1 ZZZ2

    Haswell ULT 1.6GHz Haswell ULT 1.7GHz Haswell ULT 1.8GHz Haswell ULT 1.3GHz Haswell ULT 1.7GHz C0 MICRON_512MB
    CPU6@ CPU7@ CPU8@ CPU9@ CPU10@ X76M@
    SA00006SM40 SA00006SX40 SA00006SL50 SA00006NM30 SA00006SS20 X7646039L01

    U1 U1 U1 U1 U1 ZZZ1

    D D

    Haswell ULT 1.7GHz C0 Haswell ULT 1.6GHz C0 Haswell ULT 1.7GHz C0 Haswell ULT 1.7GHz C0 Haswell ULT 1.7GHz C0 Samsung_512MB
    CPU11@ CPU12@ CPU13@ CPU14@ CPU15@ X76S@
    SA00006SX50 SA00006SM70 SA00006SL60 SA00006SL60 SA00006SS60 X7646039L02

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Notes List
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

    sualaptop365.edu.vn 4019OJ
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 3 of 46
    1 2 3 4 5
    5 4 3 2 1

    [AC Mode] [DC Mode]


    AC_IN BATT+

    AC_PRESENT AC_PRESENT

    B+ B+

    +3VLP/+VL +3VLP/+VL
    T=10ms
    D EN_5V/EN_3V moniter AC_IN (51_ON) ON/OFFBTN# D

    +5VALW/+3VALW EN_5V/EN_3V T=10ms Moniter ON/OFFBTN#

    ON/OFFBTN# +5VALW/+3VALW
    T=10ms Moniter ON/OFFBTN# rising edge
    EC_RSMRST# EC_RSMRST# T=10ms Moniter ON/OFFBTN# and EN_3/5V both of risgin edge

    SUSCLK
    SUSCLK
    PBTN_OUT# 20ms
    T=110ms Moniter ON/OFFBTN# rising edge PBTN_OUT# 20ms T=110ms Moniter ON/OFFBTN# rising edge

    PM_SLP_S5# Montier PBTN_OUT# falling edge.

    PM_SLP_S4#
    C C
    PM_SLP_S3#

    DDR_VTT_PG_CTRL

    +0.675VS

    SYSON T=10ms After PM_SLP_S4# moniter PBTN_OUT# immediately, After PM_SLP_S4# falling edge

    +1.35V

    SUSP# T=10ms After PM_SLP_S3# moniter SYSON rising edge. immediately, After PM_SLP_S3# falling edge

    +5VS

    +3VS

    +1.5VS

    +1.05VS
    B B

    VCCST_PG_PWR (VCCST Powr Good from PWR IC)

    VCCST_PG_EC (ALL_SYS_PWRGD,non CPU code VR) T=10ms After VCCST_PG_PWR rising edge, OD pin immediately, After SUSP# falling edge

    VR_ON immediately, After VCCST_PG_PWRT & VCCST_PG_EC rising edge

    +CPU_CORE Vboot

    VGATE

    PCH_PWROK T=10ms After VCCST_PG_EC rising edge immediately, After SUSP# falling edge

    H_CPUPWRGD

    SYS_PWROK T=99ms After VCCST_PG_EC assertion immediately, After SUSP# falling edge

    PCH_PLTRST#

    After CPUPWRGD/PCH_PWRGD/SYS_PWROK assertion

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2013/02/20 Deciphered Date 2012/07/01 Title
    Power Sequence
    sualaptop365.edu.vn
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    4019OJ D

    Date: Friday, February 28, 2014 Sheet 4 of 46


    5 4 3 2 1
    5 4 3 2 1

    DDI/ MSIC/ XDP

    D D

    HASWELL_MCP_E
    U1A @

    C54 C45
    [33] CPU_DP1_N0 DDI1_TXN0 EDP_TXN0 EDP_TXN0 [26]
    C55 B46
    [33] CPU_DP1_P0 DDI1_TXP0 EDP_TXP0 EDP_TXP0 [26]
    DP to Docking (2 lane) B58 A47
    [33] CPU_DP1_N1 DDI1_TXN1 EDP_TXN1 EDP_TXN1 [26]
    C58 B47
    [33] CPU_DP1_P1 DDI1_TXP1 EDP_TXP1 EDP_TXP1 [26]
    B55
    A55 DDI1_TXN2 C47
    A57 DDI1_TXP2 EDP_TXN2 C46
    B57 DDI1_TXN3 EDP_TXP2 A49
    DDI1_TXP3 DDI EDP EDP_TXN3 B49
    C51 EDP_TXP3
    [27] CPU_DP2_N0 DDI2_TXN0 +VCCIOA_OUT
    C50 A45 EDP_AUXN [26]
    [27] CPU_DP2_P0 DDI2_TXP0 EDP_AUXN
    C53 B45 EDP_AUXP [26]
    [27] CPU_DP2_N1 DDI2_TXN1 EDP_AUXP
    HDMI B54
    [27] CPU_DP2_P1 DDI2_TXP1
    C49 D20 EDP_COMP R1 1 2 24.9_0402_1%
    [27] CPU_DP2_N2 DDI2_TXN2 EDP_RCOMP
    B50 A43 CPU_INV_PWM R31 1 @ 2 0_0402_5%
    [27] CPU_DP2_P2 DDI2_TXP2 EDP_DISP_UTIL INVPWM [26,9]
    A53
    [27] CPU_DP2_N3 DDI2_TXN3
    B53
    [27] CPU_DP2_P3 DDI2_TXP3
    EDP_COMP: Trace width=20 mils,Spacing=25mil,Max length=100mils

    1 OF 19 Rev1p2
    C C

    +1.05VS HASWELL_MCP_E
    U1B @
    1

    H_CPUPWRGD T111 @ D61


    R2 T2 @ K61 PROC_DETECT MISC
    62_0402_5% N62 CATERR J62 XDP_PRDY# T102 @
    [34] H_PECI PECI PRDY
    1 K62 XDP_PREQ#
    C2222 JTAG
    PREQ E60 XDP_TCK
    2

    100P_0402_50V8J PROC_TCK E61 XDP_TMS


    @EMI@ R3 1 2 56_0402_5% H_PROCHOT#_R K63 PROC_TMS E59 XDP_TRST#
    2 [34,36,37,38] H_PROCHOT# PROCHOT PROC_TRST
    THERMAL F63 XDP_TDI
    PROC_TDI F62 XDP_TDO
    PROC_TDO
    B ESD R6 1 2 10K_0402_5% H_CPUPWRGD C61 B
    PROCPWRGD PWR
    J60 XDP_BPM#0 T16 @
    BPM#0 H60 XDP_BPM#1 T107 @
    BPM#1 H61 XDP_BPM#2 T15 @
    +1.35V BPM#2 H62 XDP_BPM#3 T97 @
    SM_RCOMP0 AU60 BPM#3 K59 XDP_BPM#4 T98 @
    SM_RCOMP1 AV60 SM_RCOMP0 DDR3 BPM#4 H63 XDP_BPM#5 T99 @
    DDR3 Compensation Signals SM_RCOMP1 BPM#5
    SM_RCOMP2 AU61 K60 XDP_BPM#6 T100 @
    SM_RCOMP2 BPM#6
    1

    DIMM_DRAMRST# AV15 J61 XDP_BPM#7 T101 @


    [16,17] DIMM_DRAMRST# SM_DRAMRST BPM#7
    R29 DDR_PG_CTRL AV61
    [16] DDR_PG_CTRL SM_PG_CNTL1
    470_0402_5%

    2 OF 19FINAL
    PU/PD for JTAG signals
    Rev1p2
    2

    DIMM_DRAMRST#
    +1.05VS

    XDP_TMS R15 1 @ 2 51_0402_5%

    DDR3 Compensation Signals XDP_TDI R16 1 @ 2 51_0402_5%

    XDP_PREQ# R17 1 @ 2 51_0402_5%


    DDR3 Compensation Signals:
    XDP_TDO R18 1 @ 2 51_0402_5%
    20 mils to comp signals
    25 mils to non-comp signals
    500 mil for Max trace length XDP_TCK R25 1 2 51_0402_5%

    XDP_TRST# R28 1 @ 2 51_0402_5%


    A A
    R9 1 2 200_0402_1% SM_RCOMP0
    R10 1 2 120_0402_1% SM_RCOMP1
    R11 1 2 100_0402_1% SM_RCOMP2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(1/11) DDI,MSIC,XDP
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 5 of 46
    5 4 3 2 1
    5 4 3 2 1

    Memory I/F

    D D

    [16] DDR_A_D[0..63] [17] DDR_B_D[0..63]

    [16] DDR_A_MA[0..15] [17] DDR_B_MA[0..15]

    [16] DDR_A_DQS#[0..7] [17] DDR_B_DQS#[0..7]

    [16] DDR_A_DQS[0..7] [17] DDR_B_DQS[0..7]

    HASWELL_MCP_E HASWELL_MCP_E
    U1C @ U1D @

    DDR_A_D0 AH63 AU37


    SA_DQ0 SA_CLK#0 SA_CLK_DDR#0 [16]
    DDR_A_D1 AH62 AV37 DDR_B_D0 AY31 AM38
    SA_DQ1 SA_CLK0 SA_CLK_DDR0 [16] SB_DQ0 SB_CK#0 SB_CLK_DDR#0 [17]
    DDR_A_D2 AK63 AW36 DDR_B_D1 AW31 AN38
    SA_DQ2 SA_CLK#1 SA_CLK_DDR#1 [16] SB_DQ1 SB_CK0 SB_CLK_DDR0 [17]
    DDR_A_D3 AK62 AY36 DDR_B_D2 AY29 AK38
    SA_DQ3 SA_CLK1 SA_CLK_DDR1 [16] SB_DQ2 SB_CK#1 SB_CLK_DDR#1 [17]
    DDR_A_D4 AH61 DDR_B_D3 AW29 AL38
    SA_DQ4 SB_DQ3 SB_CK1 SB_CLK_DDR1 [17]
    DDR_A_D5 AH60 AU43 DDR_B_D4 AV31
    SA_DQ5 SA_CKE0 DDRA_CKE0_DIMMA [16] SB_DQ4
    DDR_A_D6 AK61 AW43 DDR_B_D5 AU31 AY49
    SA_DQ6 SA_CKE1 DDRA_CKE1_DIMMA [16] SB_DQ5 SB_CKE0 DDRB_CKE0_DIMMA [17]
    DDR_A_D7 AK60 AY42 DDR_B_D6 AV29 AU50
    SA_DQ7 SA_CKE2 SB_DQ6 SB_CKE1 DDRB_CKE1_DIMMA [17]
    DDR_A_D8 AM63 AY43 DDR_B_D7 AU29 AW49
    DDR_A_D9 AM62 SA_DQ8 SA_CKE3 DDR_B_D8 AY27 SB_DQ7 SB_CKE2 AV50
    DDR_A_D10 AP63 SA_DQ9 AP33 DDR_B_D9 AW27 SB_DQ8 SB_CKE3
    SA_DQ10 SA_CS#0 DDRA_CS0_DIMMA# [16] SB_DQ9
    DDR_A_D11 AP62 AR32 DDR_B_D10 AY25 AM32
    SA_DQ11 SA_CS#1 DDRA_CS1_DIMMA# [16] SB_DQ10 SB_CS#0 DDRB_CS0_DIMMA# [17]
    DDR_A_D12 AM61 DDR_B_D11 AW25 AK32
    SA_DQ12 SB_DQ11 SB_CS#1 DDRB_CS1_DIMMA# [17]
    DDR_A_D13 AM60 AP32 DDRA_ODT0 T4 @ DDR_B_D12 AV27
    DDR_A_D14 AP61 SA_DQ13 SA_ODT0 DDR_B_D13 AU27 SB_DQ12 AL32 DDRB_ODT0 T5 @
    C
    DDR_A_D15 AP60 SA_DQ14 AY34 DDR_B_D14 AV25 SB_DQ13 SB_ODT0 C
    SA_DQ15 SA_RAS DDR_A_RAS# [16] SB_DQ14
    DDR_A_D16 AP58 AW34 DDR_B_D15 AU25 AM35
    SA_DQ16 SA_WE DDR_A_WE# [16] SB_DQ15 SB_RAS DDR_B_RAS# [17]
    DDR_A_D17 AR58 AU34 DDR_B_D16 AM29 AK35
    SA_DQ17 SA_CAS DDR_A_CAS# [16] SB_DQ16 SB_WE DDR_B_WE# [17]
    DDR_A_D18 AM57 DDR_B_D17 AK29 AM33
    SA_DQ18 SB_DQ17 SB_CAS DDR_B_CAS# [17]
    DDR_A_D19 AK57 AU35 DDR_B_D18 AL28
    SA_DQ19 SA_BA0 DDR_A_BS0 [16] SB_DQ18
    DDR_A_D20 AL58 AV35 DDR_B_D19 AK28 AL35
    SA_DQ20 SA_BA1 DDR_A_BS1 [16] SB_DQ19 SB_BA0 DDR_B_BS0 [17]
    DDR_A_D21 AK58 AY41 DDR_B_D20 AR29 AM36
    SA_DQ21 SA_BA2 DDR_A_BS2 [16] SB_DQ20 SB_BA1 DDR_B_BS1 [17]
    DDR_A_D22 AR57 DDR_B_D21 AN29 AU49
    SA_DQ22 SB_DQ21 SB_BA2 DDR_B_BS2 [17]
    DDR_A_D23 AN57 3 OF 19 AU36 DDR_A_MA0 DDR_B_D22 AR28 4 OF 19
    DDR_A_D24 AP55 SA_DQ23 SA_MA0 AY37 DDR_A_MA1 DDR_B_D23 AP28 SB_DQ22 AP40 DDR_B_MA0
    DDR_A_D25 AR55 SA_DQ24 SA_MA1 AR38 DDR_A_MA2 DDR_B_D24 AN26 SB_DQ23 SB_MA0 AR40 DDR_B_MA1
    DDR_A_D26 AM54 SA_DQ25 SA_MA2 AP36 DDR_A_MA3 DDR_B_D25 AR26 SB_DQ24 SB_MA1 AP42 DDR_B_MA2
    DDR_A_D27 AK54 SA_DQ26 SA_MA3 AU39 DDR_A_MA4 DDR_B_D26 AR25 SB_DQ25 SB_MA2 AR42 DDR_B_MA3
    DDR_A_D28 AL55 SA_DQ27 SA_MA4 AR36 DDR_A_MA5 DDR_B_D27 AP25 SB_DQ26 SB_MA3 AR45 DDR_B_MA4
    DDR_A_D29 AK55 SA_DQ28 SA_MA5 AV40 DDR_A_MA6 DDR_B_D28 AK26 SB_DQ27 SB_MA4 AP45 DDR_B_MA5
    DDR_A_D30 AR54 SA_DQ29 SA_MA6 AW39 DDR_A_MA7 DDR_B_D29 AM26 SB_DQ28 SB_MA5 AW46 DDR_B_MA6
    DDR_A_D31 AN54 SA_DQ30 SA_MA7 AY39 DDR_A_MA8 DDR_B_D30 AK25 SB_DQ29 SB_MA6 AY46 DDR_B_MA7
    DDR_A_D32 AY58 SA_DQ31 SA_MA8 AU40 DDR_A_MA9 DDR_B_D31 AL25 SB_DQ30 SB_MA7 AY47 DDR_B_MA8
    DDR_A_D33 AW58 SA_DQ32 SA_MA9 AP35 DDR_A_MA10 DDR_B_D32 AY23 SB_DQ31 SB_MA8 AU46 DDR_B_MA9
    DDR_A_D34 AY56 SA_DQ33 SA_MA10 AW41 DDR_A_MA11 DDR_B_D33 AW23 SB_DQ32 SB_MA9 AK36 DDR_B_MA10
    DDR_A_D35 AW56 SA_DQ34 DDR CHANNEL A SA_MA11 AU41 DDR_A_MA12 DDR_B_D34 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47 DDR_B_MA11
    DDR_A_D36 AV58 SA_DQ35 SA_MA12 AR35 DDR_A_MA13 DDR_B_D35 AW21 SB_DQ34 SB_MA11 AU47 DDR_B_MA12
    DDR_A_D37 AU58 SA_DQ36 SA_MA13 AV42 DDR_A_MA14 DDR_B_D36 AV23 SB_DQ35 SB_MA12 AK33 DDR_B_MA13
    DDR_A_D38 AV56 SA_DQ37 SA_MA14 AU42 DDR_A_MA15 DDR_B_D37 AU23 SB_DQ36 SB_MA13 AR46 DDR_B_MA14
    DDR_A_D39 AU56 SA_DQ38 SA_MA15 DDR_B_D38 AV21 SB_DQ37 SB_MA14 AP46 DDR_B_MA15
    DDR_A_D40 AY54 SA_DQ39 AJ61 DDR_A_DQS#0 DDR_B_D39 AU21 SB_DQ38 SB_MA15
    DDR_A_D41 AW54 SA_DQ40 SA_DQSN0 AN62 DDR_A_DQS#1 DDR_B_D40 AY19 SB_DQ39 AW30 DDR_B_DQS#0
    DDR_A_D42 AY52 SA_DQ41 SA_DQSN1 AM58 DDR_A_DQS#2 DDR_B_D41 AW19 SB_DQ40 SB_DQSN0 AV26 DDR_B_DQS#1
    DDR_A_D43 AW52 SA_DQ42 SA_DQSN2 AM55 DDR_A_DQS#3 DDR_B_D42 AY17 SB_DQ41 SB_DQSN1 AN28 DDR_B_DQS#2
    DDR_A_D44 AV54 SA_DQ43 SA_DQSN3 AV57 DDR_A_DQS#4 DDR_B_D43 AW17 SB_DQ42 SB_DQSN2 AN25 DDR_B_DQS#3
    DDR_A_D45 AU54 SA_DQ44 SA_DQSN4 AV53 DDR_A_DQS#5 DDR_B_D44 AV19 SB_DQ43 SB_DQSN3 AW22 DDR_B_DQS#4
    DDR_A_D46 AV52 SA_DQ45 SA_DQSN5 AL43 DDR_A_DQS#6 DDR_B_D45 AU19 SB_DQ44 SB_DQSN4 AV18 DDR_B_DQS#5
    DDR_A_D47 AU52 SA_DQ46 SA_DQSN6 AL48 DDR_A_DQS#7 DDR_B_D46 AV17 SB_DQ45 SB_DQSN5 AN21 DDR_B_DQS#6
    DDR_A_D48 AK40 SA_DQ47 SA_DQSN7 DDR_B_D47 AU17 SB_DQ46 SB_DQSN6 AN18 DDR_B_DQS#7
    DDR_A_D49 AK42 SA_DQ48 AJ62 DDR_A_DQS0 DDR_B_D48 AR21 SB_DQ47 SB_DQSN7
    B B
    DDR_A_D50 AM43 SA_DQ49 SA_DQSP0 AN61 DDR_A_DQS1 DDR_B_D49 AR22 SB_DQ48 AV30 DDR_B_DQS0
    DDR_A_D51 AM45 SA_DQ50 SA_DQSP1 AN58 DDR_A_DQS2 DDR_B_D50 AL21 SB_DQ49 SB_DQSP0 AW26 DDR_B_DQS1
    DDR_A_D52 AK45 SA_DQ51 SA_DQSP2 AN55 DDR_A_DQS3 DDR_B_D51 AM22 SB_DQ50 SB_DQSP1 AM28 DDR_B_DQS2
    DDR_A_D53 AK43 SA_DQ52 SA_DQSP3 AW57 DDR_A_DQS4 DDR_B_D52 AN22 SB_DQ51 SB_DQSP2 AM25 DDR_B_DQS3
    DDR_A_D54 AM40 SA_DQ53 SA_DQSP4 AW53 DDR_A_DQS5 DDR_B_D53 AP21 SB_DQ52 SB_DQSP3 AV22 DDR_B_DQS4
    DDR_A_D55 AM42 SA_DQ54 SA_DQSP5 AL42 DDR_A_DQS6 DDR_B_D54 AK21 SB_DQ53 SB_DQSP4 AW18 DDR_B_DQS5
    DDR_A_D56 AM46 SA_DQ55 SA_DQSP6 AL49 DDR_A_DQS7 DDR_B_D55 AK22 SB_DQ54 SB_DQSP5 AM21 DDR_B_DQS6
    DDR_A_D57 AK46 SA_DQ56 SA_DQSP7 DDR_B_D56 AN20 SB_DQ55 SB_DQSP6 AM18 DDR_B_DQS7
    DDR_A_D58 AM49 SA_DQ57 AP49 DDR_B_D57 AR20 SB_DQ56 SB_DQSP7
    SA_DQ58 SM_VREF_CA SM_DIMM_VREFCA [16] SB_DQ57
    DDR_A_D59 AK49 AR51 DDR_B_D58 AK18
    SA_DQ59 SM_VREF_DQ0 SA_DIMM_VREFDQ [16] SB_DQ58
    DDR_A_D60 AM48 AP51 DDR_B_D59 AL18
    SA_DQ60 SM_VREF_DQ1 SB_DIMM_VREFDQ [17] SB_DQ59
    DDR_A_D61 AK48 DDR_B_D60 AK20
    DDR_A_D62 AM51 SA_DQ61 DDR_B_D61 AM20 SB_DQ60
    DDR_A_D63 AK51 SA_DQ62 DDR_B_D62 AR18 SB_DQ61
    SA_DQ63 DDR_B_D63 AP18 SB_DQ62
    SB_DQ63

    Rev1p2 Rev1p2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(2/11) DDRIII
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 6 of 46
    5 4 3 2 1
    5 4 3 2 1

    RTC/ SATA/ XDP

    D D

    [30] SM_INTRUDER#

    PCH_RTCX1

    +RTCVCC +RTCVCC +RTCVCC


    R33 1 2 10M_0402_5% PCH_RTCX2
    HASWELL_MCP_E
    U1E @

    1
    Y1
    1 2 R37 R36
    20K_0402_1% 20K_0402_1% PCH_RTCX1 AW5
    32.768KHZ_12.5PF_1TJF125DP1A000D PCH_RTCX2 AY5 RTCX1
    R35 1 2 1M_0402_5% SM_INTRUDER# AU6 RTCX2 J5 SATA_PRX_DTX_N0 [30]

    2
    PCH_INTVRMEN AV7 INTRUDER RTC SATA_RN0/PERN6_L3 H5
    INTVRMEN SATA_RP0/PERP6_L3 SATA_PRX_DTX_P0 [30]
    1 1 PCH_SRTCRST# AV6 B15 HDD
    SRTCRST SATA_TN0/PETN6_L3 SATA_PTX_DRX_N0 [30]
    C3 C4 PCH_RTCRST# AU7 A15
    RTCRST SATA_TP0/PETP6_L3 SATA_PTX_DRX_P0 [30]
    15P_0402_50V8J 15P_0402_50V8J
    1 1 J8 SATA_PRX_DTX_N1 [30]
    SATA_RN1/PERN6_L2
    2

    2
    C 2 2 C
    C5 JME2 C2 JME1 H8 SATA_PRX_DTX_P1 [30]
    SATA_RP1/PERP6_L2
    1U_0603_10V6K

    1U_0603_10V6K
    SHORT PADS SHORT PADS A17 mSATA
    SATA_TN1/PETN6_L2 SATA_PTX_DRX_N1 [30]
    @ @ B17
    SATA_PTX_DRX_P1 [30]
    1

    1
    2 2 SATA_TP1/PETP6_L2
    HDA_BIT_CLK AW8 J6
    HDA_SYNC AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
    HDA_RST# AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
    HDA_SDIN0 AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15
    CMOS ME CMOS [28] HDA_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1
    AU12 AUDIO SATA
    HDA_SDOUT AU11 HDA_SDI1/I2S1_RXD F5
    +RTCVCC AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5
    AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17
    HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 SATA RComp within 500 mils
    JME2 Short PAD placement to Bottom side. AY8 D17
    R39 2 1 330K_0402_5% PCH_INTVRMEN I2S1_SCLK SATA_TP3/PETP6_L0
    R40 2 @ 1 330K_0402_5%
    5 OF 19 V1 EC_SMI#
    SATA0GP/GPIO34 EC_SMI# [34]
    U1 TS_PRSNC# TS_PRSNC# [10,26]
    SATA1GP/GPIO35 V6 PCH_GPIO36 +1.05VS_ASATA3PLL
    SATA2GP/GPIO36 PCH_GPIO36 [10]
    AC1 PCH_GPIO37 PCH_GPIO37 [10]
    T108 @ PCH_JTAG_RST# AU62 SATA3GP/GPIO37
    INTVRMEN (+1.05VA) PCH_TRST
    PCH_JTAG_TCK AE62 A12
    H：Integrated VRM enable T120 @ PCH_JTAG_TDI AD61 PCH_TCK SATA_IREF L11
    * L：Integrated VRM disable T113 @ PCH_JTAG_TDO AE61 PCH_TDI
    PCH_TDO
    RSVD
    RSVD
    K10
    T119 @ PCH_JTAG_TMS AD62 JTAG C12 SATA_RCOMP R43 1 2 3.01K_0402_1%
    AL11 PCH_TMS SATA_RCOMP U3 PCH_SATALED#
    RSVD SATALED PCH_SATALED# [10]
    AC4
    T106 @ PCH_TCK_JTAGX AE63 RSVD
    AV2 JTAGX
    RSVD
    RTC Battery
    +RTCVCC +RTCBATT Rev1p2

    B [34] ME_FLASH R53 1 @ 2 0_0402_5% B


    W=20mils

    1
    C179 Closed to U1
    1U_0402_6.3V6K EMI
    RP14
    2 1 8 HDA_SDOUT
    [28] HDA_SDOUT_AUDIO
    [28] HDA_SYNC_AUDIO 2 7 HDA_SYNC
    [28] HDA_RST_AUDIO# 3 6 HDA_RST#
    [28] HDA_BITCLK_AUDIO 4 5 HDA_BIT_CLK
    Safty suggestion remove EE side ,Keep PWR side
    33_8P4R_5%
    1 EMI@
    C5211
    68P_0402_50V8J
    @EMI@
    2

    +3VALW_PCH
    RF

    1 @ 2 HDA_SDOUT
    R5181 1K_0402_5%

    HDA_SDOUT
    ME debug mode,this signal has a weak internal PD
    Low = Disabled (Default) HDA_BIT_CLK
    * High = Enabled [Flash Descriptor Security Overide]
    1

    RA38
    A A
    33_0402_5%
    @EMI@
    2

    PH/ PD for PCH JTAG


    CA79
    22P_0402_50V8J
    @EMI@
    R86 1 @ 2 51_0402_5% PCH_JTAG_TCK
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2013/02/20 2012/07/01 Title
    EMI
    Issued Date Deciphered Date HSW MCP(3/11) RTC,SATA,XDP
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 7 of 46
    5 4 3 2 1
    5 4 3 2 1

    CLK/ SPI/ SMBUS

    XTAL24_IN
    HASWELL_MCP_E 2 1 1M_0402_5%
    U1F @ R87 XTAL24_OUT

    Y2
    24MHZ_12PF_7V24000020
    D C43 A25 XTAL24_IN D
    C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT 1 3
    PCH_GPIO18 U2 CLKOUT_PCIE_P0 XTAL24_OUT 1 3
    [10] PCH_GPIO18 PCIECLKRQ0/GPIO18 +1.05VS_AXCK_LCPLL GND GND
    K21 1 1
    CLK_PCIE_LAN# B41 RSVD M21 C6 C7
    [29] CLK_PCIE_LAN# CLKOUT_PCIE_N1 RSVD 2 4

    15P_0402_50V8J

    15P_0402_50V8J
    GLAN CLK_PCIE_LAN A41 C26 XCLK_BIASREF R91 1 2 3.01K_0402_1%
    [29] CLK_PCIE_LAN CLKOUT_PCIE_P1 DIFFCLK_BIASREF
    [10,29] LAN_CLKREQ# LAN_CLKREQ# Y5
    PCIECLKRQ1/GPIO19 C35 R5182 1 2 10K_0402_5% 2 2
    CLK_PCIE_WLAN# C41 CLOCK TESTLOW_C35 C34 R93 1 2 10K_0402_5%
    [31] CLK_PCIE_WLAN# CLKOUT_PCIE_N2 TESTLOW_C34
    WLAN CLK_PCIE_WLAN B42 AK8 R94 1 2 10K_0402_5%
    [31] CLK_PCIE_WLAN CLKOUT_PCIE_P2 TESTLOW_AK8
    [10,31] WLAN_CLKREQ# WLAN_CLKREQ# AD1 SIGNALS AL8 R95 1 2 10K_0402_5%
    PCIECLKRQ2/GPIO20 TESTLOW_AL8
    CLK_PCIE_CR# B38 AN15 CLKOUT_LPC0 R96 2 1 22_0402_5%
    [33] CLK_PCIE_CR# CLKOUT_PCIE_N3 CLKOUT_LPC_0 CK_LPC_KBC [34]
    Card Reader CLK_PCIE_CR C37 AP15 CLKOUT_LPC1 R97 2 TPM@ 1 22_0402_5%
    [33] CLK_PCIE_CR CLKOUT_PCIE_P3 CLKOUT_LPC_1 CLK_PCI_TPM [33]
    [10,33] CR_CLKREQ# CR_CLKREQ# N1 R99 2 @ 1 22_0402_5%
    PCIECLKRQ3/GPIO21 CLK_PCI_DB [33]
    B35 CLK_BCLK_ITP# T21 @
    CLK_PEG_VGA# A39 CLKOUT_ITPXDP_N A35 CLK_BCLK_ITP T26 @
    [19] CLK_PEG_VGA# CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
    dGPU CLK_PEG_VGA B39
    [19] CLK_PEG_VGA CLKOUT_PCIE_P4
    [20] PEG_CLKREQ# PEG_CLKREQ# U5
    PCIECLKRQ4/GPIO22
    B37
    A37 CLKOUT_PCIE_N5 6 OF 19
    PCH_GPIO23 T2 CLKOUT_PCIE_P5
    [10] PCH_GPIO23 PCIECLKRQ5/GPIO23

    Rev1p2 +3VALW_PCH

    RP13
    SMBCLK 1 8
    SMBDATA 2 7
    SML1DATA 3 6
    SML1CLK 4 5

    2.2K_0804_8P4R_5%
    SML0CLK R122 1 2 2.2K_0402_5%
    C C
    SML0DATA R123 1 2 2.2K_0402_5%
    HASWELL_MCP_E
    U1G @

    LPC_AD0 AU14 AN2 BNFC_IRQ#


    [33,34] LPC_AD0 LAD0 SMBALERT/GPIO11 BNFC_IRQ# [10,33]
    LPC_AD1 AW12 AP2 SMBCLK
    [33,34] LPC_AD1 LAD1 SMBCLK
    LPC_AD2 AY12 LPC AH1 SMBDATA
    [33,34] LPC_AD2 LAD2 SMBDATA
    PCH_SPI_CLK_R0 R106 1 EMI@ 2 33_0402_5% LPC_AD3 AW11 AL2 PCH_GPIO60
    [33,34] LPC_AD3 LAD3 SML0ALERT/GPIO60 PCH_GPIO60 [10]
    LPC_FRAME# AV12 SMBUS AN1 SML0CLK
    [33,34] LPC_FRAME# LFRAME SML0CLK
    PCH_SPI_CLK_R1 R107 1 SBA@ 2 33_0402_5% AK1 SML0DATA
    SML0DATA AU4 PCH_GPIO73
    SML1ALERT/PCHHOT/GPIO73
    SML1CLK/GPIO75
    AU3 SML1CLK
    PCH_GPIO73 [10] SMBus :SPD/PCIe/Security/TP/NFC
    AH3 SML1DATA
    RA39 2 @EMI@ 1 33_0402_5% PCH_SPI_CLK AA3 SML1DATA/GPIO74
    PCH_SPI_CS0# Y7 SPI_CLK AF2 T18 @
    PCH_SPI_CS1# Y4 SPI_CS0 CL_CLK AD2 T19 @
    +3VM AC2 SPI_CS1 SPI C-LINK CL_DATA AF4 T20 @
    1 1 SPI_CS2 CL_RST
    C5212 C5214 CA80 PCH_SPI_MOSI AA2
    68P_0402_50V8J 68P_0402_50V8J 22P_0402_50V8J PCH_SPI_MISO AA4 SPI_MOSI +3VS +3VS
    @EMI@ @EMI@ @EMI@ R5001 1 2 1K_0402_1% PCH_SPI_WP# Y6 SPI_MISO
    2 2 R5002 1 2 1K_0402_1% PCH_SPI_HOLD# AF1 SPI_IO2
    RF EMI SPI_IO3

    2
    R132 R133
    2.2K_0402_5% 2.2K_0402_5%

    2
    7 OF 19 Rev1p2

    1
    SMBDATA 6 1 PCH_SMB_DATA [16,17,30,31,32,33]
    Q3A
    2N7002KDWH_SOT363-6

    5
    SBA - 2 SPI Device = 33 ohm - P/N: SD309330A80 SMBCLK 3 4 PCH_SMB_CLK [16,17,30,31,32,33]
    B B
    Non-SBA - 1 SPI Device = 15 ohm - P/N: SD300001P00 Q3B
    RP4 2N7002KDWH_SOT363-6

    RP4
    PCH_SPI_MOSI_0 1 8 PCH_SPI_MOSI
    PCH_SPI_WP0# 2 7 PCH_SPI_WP#
    PCH_SPI_MISO_0 3 6 PCH_SPI_MISO 15_8P4R_5%
    PCH_SPI_HOLD0# 4 5 PCH_SPI_HOLD# NOSBA@
    SD300001P00
    33_8P4R_5%
    Security ROM SML1 Bus :EC/Sensors
    SBA@
    RP5
    PCH_SPI_MOSI_1 1 8
    PCH_SPI_WP1# 2 7
    PCH_SPI_MISO_1 3 6
    PCH_SPI_HOLD1# 4 5 +3VS +3VS

    33_8P4R_5% SPI ROM


    SBA@ 1st: SA00004MK00 PU 2.2K at EC side (+3VS)

    2
    2nd: SA00004ML00
    SML1CLK 6 1
    SPI ROM (8M) +3VM U11
    EC_SMB_CK2 [20,32,34]

    SPI ROM 8MB 1 8 Q2417A


    2 NC VCC 7 2N7002KDWH_SOT363-6
    1st: SA000039A20 - Winbond NC WP 1
    U8 PLT_RST_BUF# 3 6 PCH_SMB_CLK C91
    [19,29,31,33,34,9] PLT_RST_BUF# PROT# SCL

    5
    0.1U_0402_16V4Z
    2nd: SA000046400 - E-ON PCH_SPI_CS0# 1
    CS# VCC
    8 4
    GND SDA
    5 PCH_SMB_DATA
    PCH_SPI_MISO_0 2 7 PCH_SPI_HOLD0# 1
    SPI ROM 4MB PCH_SPI_WP0# 3 DO(IO1) HOLD#(IO3) 6 PCH_SPI_CLK_R0 C8 PCA24S08D_SO8 2 SML1DATA 3 4
    WP#(IO2) CLK EC_SMB_DA2 [20,32,34]
    1st: SA00003K800 - Winbond 4 5 PCH_SPI_MOSI_0 0.1U_0402_16V4Z
    GND DI(IO0) Q2417B
    2nd: SA00004LI00 - E-ON 2
    W25Q64FVSSIG_SO8 2N7002KDWH_SOT363-6
    A A

    SPI ROM (4M) +3VM

    U2202
    PCH_SPI_CS1# 1 8
    PCH_SPI_MISO_1 2 CS# VCC 7 PCH_SPI_HOLD1# Security Classification Compal Secret Data Compal Electronics, Inc.
    PCH_SPI_WP1# 3 SO HOLD# 6 PCH_SPI_CLK_R1 2013/02/20 2012/07/01 Title
    4 WP#
    GND
    SCLK
    SI
    5 PCH_SPI_MOSI_1
    Issued Date Deciphered Date HSW MCP(4/11) CLK,SPI,SMBUS
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    32M W25Q32BVSSIG SOIC 8P Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    SBA@ Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 8 of 46
    5 4 3 2 1
    5 4 3 2 1

    PM/ GPIO/ DDI +RTCVCC

    2
    R134
    330K_0402_5%

    1
    DSWODVREN
    Note: SUSACK# and SUSWARN# can be tied together if EC does not want to involve
    in the handshake mechanism for the Deep Sleep state entry and exit.

    1
    D CAN be NC ,if not support Deep Sx D
    DPWROK: Tired toghter with RSMRST# that do not support Deep Sx R139
    330K_0402_5%
    HASWELL_MCP_E @
    U1H @

    2
    @ T115

    SYSTEM POWER MANAGEMENT

    [10] PCH_GPIO30 R135 1 @ 2 0_0402_5% SUSACK#_R AK2 AW7 DSWODVREN


    SYS_RESET# AC3 SUSACK DSWVRMEN AV5 EC_RSMRST#
    [10] SYS_RESET# SYS_RESET DPWROK DSWODVREN - On Die DSW VR Enable
    [34] SYS_PWROK SYS_PWROK AG2 AJ5 PCH_PCIE_WAKE# PCH_PCIE_WAKE# [10,29]
    SYS_PWROK WAKE
    [34]
    [34]
    PCH_PWROK
    PCH_APWROK R146 1 SBA@ 2 0_0402_5%
    PCH_PWROK
    PCH_APWROK_R
    AY7
    AB5 PCH_PWROK * L：Disable
    H：Enable (default)
    PLT_RST# AG7 APWROK V5 PCH_GPIO32
    PLTRST CLKRUN/GPIO32 PCH_GPIO32 [10]
    AG4 PCH_GPIO61
    SUS_STAT/GPIO61 PCH_GPIO61 [10]
    R147 1 NOSBA@2 0_0402_5% AE6 SUSCLK
    SUSCLK/GPIO62 SUSCLK [34]
    AP5 PM_SLP_S5#
    SLP_S5/GPIO63 PM_SLP_S5# [34]
    [34] EC_RSMRST# EC_RSMRST# AW6
    PCH_GPIO30 AV4 RSMRST
    PBTN_OUT# AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6 PM_SLP_S4#
    [34] PBTN_OUT# PWRBTN SLP_S4 PM_SLP_S4# [34]
    AC_PRESENT_R AJ8 AT4 PM_SLP_S3#
    ACPRESENT/GPIO31 SLP_S3 PM_SLP_S3# [34]
    [10] PCH_GPIO72 PCH_GPIO72 AN4 AL5 PM_SLP_A#
    BATLOW/GPIO72 SLP_A PM_SLP_A# [34,35,41]
    @ T109 PM_SLP_S0# AF3 AP4 PM_SLP_SUS# T110 @
    PCH_GPIO29 AM5 SLP_S0 SLP_SUS AJ7 PM_SLP_LAN# T112 @ T117 @
    [10] PCH_GPIO29 SLP_WLAN/GPIO29 SLP_LAN T118 @
    2

    R149
    8 OF 19 Rev1p2
    10K_0402_5%
    1

    C C

    PCH_BATLOW# Need pull high to VCCDSW3_3


    (If no deep Sx , connect to VCCSUS3_3) R155
    0_0402_5%
    1 @ 2

    +3VALW_PCH +3VS
    1

    5
    R643 PLT_RST# 2

    P
    200K_0402_5% B 4
    Y PLT_RST_BUF# [19,29,31,33,34,8]
    1 1
    D2 A

    1
    C2223
    2

    [34,36,38] ACIN 1 2 AC_PRESENT_R 100P_0402_50V8J U5 R159

    3
    MC74VHC1G08DFT2G_SC70-5 100K_0402_5%
    2 @EMI@ @
    RB751V-40_SOD323-2

    2
    ESD

    B B

    HASWELL_MCP_E
    U1I @

    R150 1 @ 2 0_0402_5% EDP_BKCTL B8 B9


    [26,5] INVPWM EDP_BKLCTL DDPB_CTRLCLK +3VS
    A9 C9 DDI1_CTRL_DATA
    [34] ENBKL EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA
    C6 D9 DDI2_CTRL_CK
    [26] PCH_ENVDD EDP_VDDEN DDPC_CTRLCLK DDI2_CTRL_CK [27]
    D11 DDI2_CTRL_DATA
    DDPC_CTRLDATA DDI2_CTRL_DATA [27]
    DDI1_CTRL_DATA R310 1 2 2.2K_0402_5%

    WLBT_OFF_5# U6 DDI2_CTRL_DATA R311 1 2 2.2K_0402_5%


    [10,31] WLBT_OFF_5# PIRQA/GPIO77
    DGPU_PWR_EN P4 C5 DDI1_AUXN
    [10,21,42,45] DGPU_PWR_EN PIRQB/GPIO78 DDPB_AUXN DDI1_AUXN [33]
    DGPU_HOLD_RST# N4 DISPLAY B6 DDI2_CTRL_CK R312 1 2 2.2K_0402_5%
    [10,19] DGPU_HOLD_RST# PIRQC/GPIO79 DDPC_AUXN
    WLBT_OFF_51# N2 B5 DDI1_AUXP
    [10,31] WLBT_OFF_51# PIRQD/GPIO80 DDPB_AUXP DDI1_AUXP [33]
    @ T27 AD4 A6
    PME GPIO DDPC_AUXP
    DDPB_CTRLDATA: Port B Detected
    [10,26] TS_ON TS_ON U7 DDPC_CTRLDATA: Port C Detected
    PCH_GPIO52 L1 GPIO55
    [10] PCH_GPIO52 GPIO52
    [10] PCH_GPIO54 PCH_GPIO54 L3 C8 DDI1_DP_HPD [33] * 1: Port B or C is detected
    PCH_GPIO51 R5 GPIO54 DDPB_HPD A8
    [10] PCH_GPIO51 GPIO51 DDPC_HPD DDI2_HDMI_HPD [27] 0: Port B or C is not detected
    [10] PCH_GPIO53 PCH_GPIO53 L4 D6 EDP_HPD [26] Port have internal PD
    GPIO53 EDP_HPD

    9 OF 19 Rev1p2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(5/11) PM,GPIO,DDI
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 9 of 46
    5 4 3 2 1
    5 4 3 2 1

    +3VS
    +3VS
    GPIO/ LPIO
    1 8 PCH_GPIO0
    2 7 PCH_GPIO54 [9] R193 1 2 10K_0402_5% MSATA_DEVSLP1
    3 6 PCH_GPIO90
    4 5 PCH_GPIO92

    RP17 10K_8P4R_5%
    +3VS

    1 8 BNFC_PRSNT#
    2 7 TS_INT#
    D 3 6 PCH_GPIO5 I2C1_SDA R114 2 1 1K_0402_5% D
    4 5 PCH_GPIO1 +3VALW_PCH
    I2C1_SCL R115 2 1 1K_0402_5%
    RP16 10K_8P4R_5%
    R712 1 2 1K_0402_1% EC_WAKE#

    1 8 PCH_GPIO37 [7]
    2 7 PCH_GPIO49 GPIO15 : TLS Confidentiality
    3 6 SYS_RESET# [9]
    4 5 1: Intel ME TLS with confidentiality +1.05VS
    WLAN_CLKREQ# [31,8]
    RP20 10K_8P4R_5%
    * 0: Intel ME TLS with no confidentiality
    Port have internal PD CHECK Power plane,for VGA thermtrip

    1
    1 8 3G_OFF# HASWELL_MCP_E
    U1J @ R179
    2 7 CR_CLKREQ# [33,8] 1K_0402_1%
    3 6 PCH_GPIO83
    4 5 PCH_GPIO32 [9]

    2
    RP21 10K_8P4R_5% PCH_GPIO76 P1 D60 H_THERMTRIP# R720 1 @ 2 0_0402_5%
    BMBUSY/GPIO76 THERMTRIP VGA_THRMTRIP# [20]
    DOCK_PRSNT# AU2 V4
    [33] DOCK_PRSNT# GPIO8 RCIN/GPIO82 KB_RST# [34]
    PCH_GPIO12 AM7 T4 SERIRQ SERIRQ [33,34]
    1 8 EC_WAKE# AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPIRCOMP R185 1 2 49.9_0402_1%
    WLBT_OFF_51# [31,9] [34] EC_WAKE# GPIO15 PCH_OPI_RCOMP
    2 7 PCH_GPIO76 WWAN_PWRON# Y1 MISC AF20
    [30] WWAN_PWRON# GPIO16 RSVD
    3 6 PCH_GPIO23 [8] PCH_GPIO17 T3 AB21
    4 5 PCH_GPIO17 PCH_GPIO24 AD5 GPIO17 RSVD
    PCH_GPIO27 AN5 GPIO24
    RP22 10K_8P4R_5% PCH_GPIO28 AD7 GPIO27
    PCH_GPIO26 AN3 GPIO28
    GPIO26 R6 PCH_GPIO83
    1 8 mSATA_DETEC# PCH_GPIO56 AG6 GSPI0_CS/GPIO83 L6 PCH_GPIO84
    2 7 PCH_GPIO68 PCH_GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6 PCH_GPIO85
    3 6 PCH_GPIO69 PCH_GPIO58 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 PCH_GPIO86
    4 5 PCH_GPIO4 PCH_GPIO59 AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 DGPU_PRSNT#
    PCH_GPIO44 AK4 GPIO59 GSPI1_CS/GPIO87 L5 PCH_GPIO88
    C
    RP18 10K_8P4R_5% PCH_GPIO47 AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7 PCH_GPIO89 C
    PCH_GPIO48 U4 GPIO47 GSPI1_MISO/GPIO89 K2 PCH_GPIO90
    PCH_GPIO49 Y3 GPIO48 GSPI_MOSI/GPIO90 J1 PCH_GPIO91
    1 8 PCH_GPIO94 TS_INT# P3 GPIO49 UART0_RXD/GPIO91 K3 PCH_GPIO92
    [26] TS_INT# GPIO50 UART0_TXD/GPIO92
    2 7 PCH_GPIO93 PCH_GPIO71 Y2 J2 PCH_GPIO93
    3 6 PCH_GPIO2 PCH_GPIO13 AT3 HSIOPC/GPIO71 10 OF 19 LPIO UART0_RTS/GPIO93 G1 PCH_GPIO94
    4 5 PCH_GPIO91 PCH_GPIO14 AH4 GPIO13 UART0_CTS/GPIO94 K4 PCH_GPIO0
    PCH_GPIO25 AM4 GPIO14 UART1_RXD/GPIO0 G2 PCH_GPIO1
    RP19 10K_8P4R_5% PCH_GPIO45 AG5 GPIO25 UART1_TXD/GPIO1 J3 PCH_GPIO2
    PCH_GPIO46 AG3 GPIO45 UART1_RST/GPIO2 J4 PCH_GPIO3
    GPIO46 UART1_CTS/GPIO3 F2 PCH_GPIO4
    1 8 PCH_GPIO9 AM3 I2C0_SDA/GPIO4 F3 PCH_GPIO5
    PCH_GPIO18 [8] GPIO9 I2C0_SCL/GPIO5
    2 7 PCH_GPIO48 EC_SCI# AM2 1.8V rail G4 I2C1_SDA R718 1 @ 2 0_0402_5%
    [34] EC_SCI# GPIO10 I2C1_SDA/GPIO6 I2C1_SDA_TPNL [26]
    3 6 WWAN_PWRON# HDD_DEVSLP0 P2 F1 I2C1_SCL R719 1 @ 2 0_0402_5%
    [30] HDD_DEVSLP0 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 I2C1_SCL_TPNL [26]
    4 5 PCH_GPIO71 mSATA_DETEC# C4 E3 BNFC_PRSNT# BNFC_PRSNT# [33]
    [30] mSATA_DETEC# SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64
    MSATA_DEVSLP1 L2 F4 BNFC_ON
    [30] MSATA_DEVSLP1 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 BNFC_ON [33]
    RP24 10K_8P4R_5% 3G_OFF# N5 D3 PCH_GPIO66
    [30] 3G_OFF# DEVSLP2/GPIO39 SDIO_D0/GPIO66
    SPKR V2 E4 PCH_GPIO67
    [28] SPKR SPKR/GPIO81 SDIO_D1/GPIO67 C3 PCH_GPIO68
    1 8 SERIRQ SDIO_D2/GPIO68 E2 PCH_GPIO69
    2 7 SDIO_D3/GPIO69 +3VS
    TS_ON [26,9]
    3 6 WLBT_OFF_5# [31,9]
    Rev1p2
    4 5 DGPU_PWR_EN [21,42,45,9]

    2
    RP25 10K_8P4R_5% R707
    10K_0402_5%
    UMA@
    1 8 HDD_DEVSLP0

    1
    2 7 PCH_GPIO52 [9] DGPU_PRSNT#
    3 6 PCH_SATALED# [7]

    2
    4 5 KB_RST#
    R708
    RP26 10K_8P4R_5% 10K_0402_5%
    M/B Type DIS@
    B B

    1
    1 8 PCH_GPIO53 [9] 1: UMA
    2 7 PCH_GPIO36 [7] 0: dGPU
    3 6 PCH_GPIO85 +3VS
    4 5 TS_PRSNC# [26,7]
    RP23 10K_8P4R_5% RP1
    4 5
    3 6 PCH_GPIO89 +3VS
    1 8 PCH_GPIO3 2 7 PCH_GPIO51 [9]
    2 7 PCH_GPIO67 1 8 LAN_CLKREQ# [29,8]
    3 6 DGPU_HOLD_RST# [19,9] PCH_GPIO86 R710 1 @ 2 1K_0402_1%
    4 5 +3VALW_PCH 10K_8P4R_5%
    R711 1 2 1K_0402_1%
    RP37 10K_8P4R_5%

    +3VALW_PCH 1 8 PCH_GPIO29 [9]


    2 7 PCH_GPIO84
    3 6 PCH_GPIO88 GSPI0_MOSI / GPIO86 : Boot BIOS Strap
    4 5 PCH_GPIO24
    1 8 PCH_GPIO30 [9] 1: LPC BUS
    2 7 RP33 10K_8P4R_5% 0: SPI BUS (default)
    3
    4
    6
    5 PCH_GPIO59
    PCH_GPIO43
    PCH_GPIO73
    [11]
    [8] *Port have internal PD
    1 8 PCH_GPIO72 [9]
    RP29 10K_8P4R_5% 2 7 PCH_GPIO25
    3 6 PCH_GPIO27
    4 5 PCH_GPIO12 +3VS
    1 8 PCH_GPIO42 [11]
    2 7 PCH_GPIO14 RP15 10K_8P4R_5%
    3 6 PCH_GPIO46 PCH_GPIO66 R189 1 @ 2 4.7K_0402_5%
    4 5 PCH_GPIO47
    1 8 PCH_GPIO44
    RP32 10K_8P4R_5% 2 7 PCH_GPIO58
    3 6 PCH_PCIE_WAKE# [29,9] SDIO_D0 / GPIO66 : Top-Block Swap Override
    A A
    4 5 PCH_GPIO56
    1 8 PCH_GPIO57 1: Enable
    2 7 PCH_GPIO13 RP31 10K_8P4R_5% 0: Disable
    3
    4
    6
    5 DOCK_PRSNT#
    PCH_GPIO41 [11] * Port have internal PD
    1 8 PCH_GPIO28
    RP27 10K_8P4R_5% 2 7 PCH_GPIO45
    3 6 PCH_GPIO9
    4 5
    1 8 PCH_GPIO60 [8]
    PCH_GPIO61 [9] Security Classification Compal Secret Data Compal Electronics, Inc.
    2 7 RP35 10K_8P4R_5% 2013/02/20 2012/07/01 Title
    3 6 EC_SCI#
    USB_OC0# [11,31,33] Issued Date Deciphered Date HSW MCP(6/11) GPIO,LPIO
    4 5 BNFC_IRQ# [33,8] R709
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    10K_0402_5% Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    RP30 10K_8P4R_5% 2 1 PCH_GPIO26 Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 10 of 46
    5 4 3 2 1
    5 4 3 2 1

    PCIE/ USB

    D D

    HASWELL_MCP_E
    U1K @

    [19] PCIE_PRX_DTX_N5_L0 PCIE_PRX_DTX_N5_L0 F10 AN8 USB20_N0


    PERN5_L0 USB2N0 USB20_N0 [33]
    [19] PCIE_PRX_DTX_P5_L0 PCIE_PRX_DTX_P5_L0 E10 AM8 USB20_P0 USB2/3 IO (IO board)
    PERP5_L0 USB2P0 USB20_P0 [33]
    CC250 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L0 C23 AR7 USB20_N1
    [19] PCIE_PTX_C_DRX_N5_L0 PETN5_L0 USB2N1 USB20_N1 [31]
    [19] PCIE_PTX_C_DRX_P5_L0 CC243 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L0 C22 AT7 USB20_P1 USB2/3 IO (Main Board)
    PETP5_L0 USB2P1 USB20_P1 [31]
    PCIE_PRX_DTX_N5_L1 F8 AR8 USB20_N2
    [19] PCIE_PRX_DTX_N5_L1 PERN5_L1 USB2N2 USB20_N2 [33]
    PCIE_PRX_DTX_P5_L1 E8 AP8 USB20_P2 USB2/3 IO (Docking)
    [19] PCIE_PRX_DTX_P5_L1 PERP5_L1 USB2P2 USB20_P2 [33]
    CC245 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L1 B23 AR10 USB20_N3
    [19] PCIE_PTX_C_DRX_N5_L1 PETN5_L1 USB2N3 USB20_N3 [31]
    dGPU CC247 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L1 A23 AT10 USB20_P3 Mini Card(WLAN+BT)
    [19] PCIE_PTX_C_DRX_P5_L1 PETP5_L1 USB2P3 USB20_P3 [31]
    PCIE_PRX_DTX_N5_L2 H10 AM15 USB20_N4
    C [19] PCIE_PRX_DTX_N5_L2 PERN5_L2 USB2N4 USB20_N4 [26] C
    PCIE_PRX_DTX_P5_L2 G10 AL15 USB20_P4 Touch Screen
    [19] PCIE_PRX_DTX_P5_L2 PERP5_L2 USB2P4 USB20_P4 [26]

    [19] PCIE_PTX_C_DRX_N5_L2 CC249 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L2 B21 AM13 USB20_N5


    USB20_N5 [26]
    CC244 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L2 C21 PETN5_L2 USB2N5 AN13 USB20_P5
    [19] PCIE_PTX_C_DRX_P5_L2 PETP5_L2 USB2P5 USB20_P5 [26] Camera
    PCIE_PRX_DTX_N5_L3 E6 AP11 USB20_N6
    [19] PCIE_PRX_DTX_N5_L3 PERN5_L3 USB2N6 USB20_N6 [32]
    PCIE_PRX_DTX_P5_L3 F6 AN11 USB20_P6 FPR
    [19] PCIE_PRX_DTX_P5_L3 PERP5_L3 USB2P6 USB20_P6 [32]
    CC246 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L3 B22 AR13 USB20_N7
    [19] PCIE_PTX_C_DRX_N5_L3 PETN5_L3 USB2N7 USB20_N7 [30]
    CC248 1 DIS@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L3 A21 AP13 USB20_P7 WWAN
    [19] PCIE_PTX_C_DRX_P5_L3 PETP5_L3 11 OF 19 USB2P7 USB20_P7 [30]

    [31] PCIE_PRX_DTX_N3 PCIE_PRX_DTX_N3 G11


    PCIE_PRX_DTX_P3 F11 PERN3 G20
    [31] PCIE_PRX_DTX_P3 PERP3 USB3RN1 USB3_RX1_N_BTB [33]
    H20 USB3_RX1_P_BTB [33]
    1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N3 C29 USB3.0 P1 USB3RP1
    WLAN [31] PCIE_PTX_C_DRX_N3 C29
    C30 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P3 B30 PETN3 PCIe USB C33
    USB2/3 IO(IO board)
    [31] PCIE_PTX_C_DRX_P3 PETP3 USB3TN1 USB3_TX1_N_BTB [33]
    B34
    USB3TP1 USB3_TX1_P_BTB [33]
    [33] PCIE_PRX_DTX_N4 PCIE_PRX_DTX_N4 F13
    PCIE_PRX_DTX_P4 G13 PERN4 E18
    [33] PCIE_PRX_DTX_P4 PERP4 USB3RN2 USB3_RX2_N [31]
    F18 USB3_RX2_P [31]
    USB3RP2
    Card Reader [33] PCIE_PTX_C_DRX_N4 C31 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N4 B29 USB3.0 P2
    USB2/3 (Main Board)
    C5241 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P4 A29 PETN4 B33
    [33] PCIE_PTX_C_DRX_P4 PETP4 USB3TN2 USB3_TX2_N [31]
    A33
    USB3TP2 USB3_TX2_P [31]
    [33] USB3_RX3_N USB3_RX3_N G17
    USB3_RX3_P F17 PERN1/USB3RN3
    [33] USB3_RX3_P PERP1/USB3RP3
    USB 2/3 (Docking) USB3_TX3_N C30 USB3.0 P3 / PCIE P1
    [33] USB3_TX3_N USB3_TX3_P C31 PETN1/USB3TN3 AJ10 USBRBIAS R233 1 2 22.6_0402_1% CAD note:
    [33] USB3_TX3_P PETP1/USB3TP3 USBRBIAS AJ11
    USBRBIAS Route single-end 50-ohms and max 450-mils length.
    [29] PCIE_PRX_DTX_N2 PCIE_PRX_DTX_N2 F15 AN10 Avoid routing next to clock pins or under stitching capacitors.
    PCIE_PRX_DTX_P2 G15 PERN2/USB3RN4 RSVD AM10
    [29] PCIE_PRX_DTX_P2 PERP2/USB3RP4 RSVD Recommended minimum spacing to other signal traces is 15 mils
    USB3.0 P4 / PCIE P2
    LAN [29] PCIE_PTX_C_DRX_N2 C856 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N2 B31
    C857 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P2 A31 PETN2/USB3TN4
    [29] PCIE_PTX_C_DRX_P2 PETP2/USB3TP4
    B AL3 USB_OC0# B
    OC0/GPIO40 USB_OC0# [10,31,33]
    AT1 PCH_GPIO41
    +1.05VS_AUSB3PLL OC1/GPIO41 PCH_GPIO41 [10]
    AH2 PCH_GPIO42
    OC2/GPIO42 PCH_GPIO42 [10]
    E15 AV3 PCH_GPIO43
    RSVD OC3/GPIO43 PCH_GPIO43 [10]
    E13
    R235 1 2 3.01K_0402_1% PCIE_RCOMP A27 RSVD
    B27 PCIE_RCOMP
    PCIE_IREF

    Rev1p2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(7/11) PCIE,USB
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 11 of 46
    5 4 3 2 1
    5 4 3 2 1

    Power

    +CPU_CORE
    +1.35V HASWELL_MCP_E
    U1L @ 32A
    1.4A
    L59 C36
    +1.05VS J58 RSVD VCC C40
    RSVD VCC C44
    D D
    AH26 VCC C48
    VDDQ VCC
    1

    CAD Note: PU resistor should be close to CPU. AJ31 C52


    R286 AJ33 VDDQ VCC C56
    10K_0402_5%
    Pull-High at Power side. AJ37 VDDQ VCC E23
    AN33 VDDQ VCC E25
    AP43 VDDQ VCC E27
    2

    AR48 VDDQ VCC E29


    AY35 VDDQ VCC E31
    VCCST_PG_EC AY40 VDDQ VCC E33
    +CPU_CORE AY44 VDDQ VCC E35
    AY50 VDDQ VCC E37
    VDDQ VCC E39
    Define EC OD pin, need double confirm. VCC
    F59 E41
    N58 VCC VCC E43
    +VCCIOA_OUT AC58 RSVD VCC E45
    RSVD VCC E47
    VCCSENSE E63 VCC E49
    [43] VCCSENSE VCC_SENSE VCC
    @ T38 AB23 E51
    @ T87 +VCCIO_OUT_R A59 RSVD VCC E53
    E20 VCCIO_OUT VCC E55
    AD23 VCCIOA_OUT VCC E57
    AA23 RSVD 12 OF 19 VCC F24
    AE59 RSVD VCC F28
    SVID ALERT +1.05VS RSVD VCC
    VCC
    F32
    H_CPU_SVIDALRT# L62 F36
    VR_SVID_CLK N63 VIDALERT VCC F40
    [43] VR_SVID_CLK VIDSCLK VCC
    H_CPU_SVIDDATA L63 F44
    VIDSOUT VCC
    1

    [34] VCCST_PG_EC VCCST_PG_EC B59 HSW ULT POWER F48


    R252 VR_ON F60 VCCST_PWRGD VCC F52
    [43] VR_ON VR_EN VCC
    75_0402_5% [43] VGATE VGATE C59 F56
    VR_READY VCC G23
    R254 D63 VCC G25
    2

    43_0402_1% CPU_PWR_DEBUG H59 VSS VCC G27


    2 1 H_CPU_SVIDALRT# P62 PWR_DEBUG VCC G29
    C [43] VR_SVID_ALRT# VSS VCC C
    @ T39 P60 G31
    @ T40 P61 RSVD_TP VCC G33
    @ T41 N59 RSVD_TP VCC G35
    Place the PU resistors close to CPU RSVD_TP VCC
    @ T42 N61 G37
    @ T43 T59 RSVD_TP VCC G39
    @ T44 AD60 RSVD VCC G41
    @ T45 AD59 RSVD VCC G43
    @ T46 AA59 RSVD VCC G45
    @ T47 AE60 RSVD VCC G47
    SVID DATA +1.05VS
    TBD RSVD VCC
    @ T48 AC59 G49
    @ T49 AG58 RSVD VCC G51
    +1.05VS @ T50 U59 RSVD VCC G53
    @ T51 V59 RSVD VCC G55
    RSVD VCC
    1

    G57
    R256 AC22 VCC H23
    110_0402_5% +CPU_CORE AE22 VCCST VCC J23
    AE23 VCCST VCC K23
    R257 VCCST VCC K57
    2

    0_0402_5% AB57 VCC L22


    2 @ 1 H_CPU_SVIDDATA AD57 VCC VCC M23
    [43] VR_SVID_DAT VCC VCC
    AG57 M57
    C24 VCC VCC P57
    C28 VCC VCC U57
    Place the PU resistors close to CPU VCC VCC
    C32 W57
    VCC VCC
    Rev1p2

    +1.05VS
    B B
    2

    R253
    150_0402_1%
    1

    CPU_PWR_DEBUG

    VDDQ DECOUPLING
    2

    R255 +1.35V
    10K_0402_5%
    @
    1

    1 C35 1 C36 1 C37 1 C38 1 C5242 1 C40 1 C41 1 C42 1 C43 1 C44

    2.2U_0402_6.3V6M

    2.2U_0402_6.3V6M

    2.2U_0402_6.3V6M

    2.2U_0402_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    For XDP Debug only
    2 2 2 2 2 2 2 2 2 2

    +1.35V @ CRB:
    470UF/2V/7343 *2 (Un-mount)
    A
    10UF/6.3V/0603 * 6 A
    2.2UF/6.3V/0402 * 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(8/11) Power
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 12 of 46
    5 4 3 2 1
    5 4 3 2 1

    Power

    +RTCVCC
    <1mA
    +1.05VS +1.05VS_AUSB3PLL
    41mA
    L1
    D 2.2UH_LQM2MPN2R2NG0L_30% D
    1 2 1 1
    C54 C55

    1U_0402_6.3V6K

    0.1U_0402_16V4Z
    1 1
    C59 C58 2 2
    100U_1206_6.3V6M 1U_0402_6.3V6K
    2 2

    +1.05VS_ASATA3PLL
    42mA +3VALW_PCH
    63/62mA
    1838mA
    L2
    2.2UH_LQM2MPN2R2NG0L_30%

    1
    1 2 +1.05VS
    R264
    1 1 0_0603_5%
    @
    C65 C63 Close to M9 Close to K9, L10

    2
    2
    100U_1206_6.3V6M
    2
    1U_0402_6.3V6K 130311 Modify
    1 C53 1 C49 1 C50 1
    @ C51

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K
    +1.05VS_APLLOPI
    57mA 1U_0402_6.3V6K

    L3 2 2 2 2
    2.2UH_LQM2MPN2R2NG0L_30% 18mA 658mA
    1 2 HASWELL_MCP_E
    U1M @
    1
    K9 +RTCVCC C52 +3VM +1.05VM
    1 1 VCCHSIO
    C5243 C5244 L10 0.1U_0402_16V4Z
    100U_1206_6.3V6M 1U_0402_6.3V6K M9 VCCHSIO
    +1.05VS_ASATA3PLL +1.05VS_AUSB3PLL N8 VCCHSIO mPHY AH11 2
    @ VCC1_05 VCCSUS3_3
    2 2 P9 RTC AG10
    B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT
    C
    B11 VCCUSB3PLL DCPRTC C
    VCCSATA3PLL
    +1.05VS_AXCK_DCB
    200mA +1.05VS_APLLOPI
    1
    C57
    L4 Y20 SPI Y8
    VCCHDA=11mA RSVD VCCSPI 0.1U_0402_16V4Z 1741/1632mA
    2.2UH_LQM2MPN2R2NG0L_30% AA21 OPI
    1 2 VCCDSW3_3= 114mA W21 VCCAPLL 2@
    +3VALW_PCH VCCAPLL AG14 +1.05VS
    VCCASW AG13
    1 1 Close to AH10 Close to AH14 VCCASW
    C84 C83
    100U_1206_6.3V6M 1U_0402_6.3V6K @ T53 J13 USB3
    1 1 1
    DCPSUS3 J11 C62 C61 C5245
    2 2 2 2 VCC1_05
    C81 C75 H11 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
    1U_0402_6.3V4Z 1U_0402_6.3V4Z AH14 AXALIA/HDA VCC1_05 H15
    @ VCCHDA VCC1_05 AE8 2 2 2
    1 1 VCC1_05 AF22
    +1.05VS_AXCK_LCPLL
    31mA VCC1_05
    @ T55 AH13 VRM/USB2/AZALIA AG19 +PCH_VCCDSW
    L5 DCPSUS2 CORE DCPSUSBYP AG20
    2.2UH_LQM2MPN2R2NG0L_30% DCPSUSBYP AE9 +1.05VM
    1 2 13 OF 19 VCCASW AF9
    Close to V8 VCCASW
    41mA AC9 AG8
    +3VS AA9 VCCSUS3_3 VCCASW AD10 T58 @
    1 1 VCCSUS3_3 DCPSUS1
    C86 C85 AH10 AD8 T59 @
    VCCDSW3_3 DCPSUS1 1 C67 1 C66 1
    +1.5VS

    1U_0402_6.3V6K
    100U_1206_6.3V6M V8 GPIO/LCC @

    22U_0603_6.3V6M
    1U_0402_6.3V6K 1 VCC3_3 3mA
    C82 W9 C64
    2 2 22U_0603_6.3V6M VCC3_3 J15
    VCCTS1_5 1U_0402_6.3V6K
    THERMAL SENSOR K14 2 2 2
    2 VCC3_3 K16
    +1.05VS_AXCK_DCB VCC3_3

    +1.05VS_AXCK_LCPLL J18
    K19 VCCCLK SDIO/PLSS U8
    A20 VCCCLK VCCSDIO T9 +3VS +3VS
    +1.05VS VCCACLKPLL VCCSDIO 17mA
    J17
    R21 VCCCLK
    T21 VCCCLK LPT LP POWER
    B
    VCCCLK 1 C73 1 C71 B

    1U_0402_6.3V6K

    0.1U_0402_16V4Z
    K18 SUS OSCILLATOR AB8 T56 @
    +3VALW_PCH M20 RSVD DCPSUS4
    1 1 RSVD
    C88 C87 V21 +1.05VS
    AE20 RSVD AC20 2 2
    1U_0402_6.3V6K

    1U_0402_6.3V6K

    AE21 VCCSUS3_3 RSVD AG16


    2 2 VCCSUS3_3 USB2 VCC1_05 AG17
    VCC1_05 1 C76

    1U_0402_6.3V6K
    1
    C78
    22U_0603_6.3V6M
    Rev1p2 2
    2
    Close to R21 Close to J17
    Close to AC9,AA9,
    AE20,AE21

    Only availible on External Suspend VR powered.


    DcpSus1= 109mA
    DcpSus2= 25mA
    DcpSus3= 10mA
    DcpSus4= 1mA

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(9/11) Power
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 13 of 46
    5 4 3 2 1
    5 4 3 2 1

    GND

    D D

    HASWELL_MCP_E HASWELL_MCP_E
    U1N @ U1O @ U1P @ HASWELL_MCP_E
    H17
    A11 AJ35 AP22 AV59 D33 VSS H57
    A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
    A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
    A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59
    A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63
    A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
    A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
    A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
    A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15
    A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17
    A52 VSS VSS AJ58 AP54 VSS VSS AW44 D46 VSS VSS L18
    A56 VSS VSS AJ60 AP57 VSS VSS AW47 D47 VSS VSS L20
    AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
    AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
    AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
    C
    AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22 C
    AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
    AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
    AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
    AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
    AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
    AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
    AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
    AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS 16 OF 19 VSS T1
    AE58 VSS 14 OF 19 VSS AL31 AT35 VSS 15 OF 19 VSS AY4 E17 VSS VSS T58
    AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
    AF12 VSS VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
    AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
    AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9
    AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
    AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
    AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
    AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
    AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
    AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
    AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
    AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
    AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
    AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
    AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
    AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
    AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
    AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62
    VSS VSS VSS VSS VSS VSS_SENSE VSSSENSE [43]
    AH24 AN23 AU33 C11 AH16
    AH28 VSS VSS AN31 AU51 VSS VSS C14 Rev1p2 VSS
    AH30 VSS VSS AN32 AU53 VSS VSS C18
    AH32 VSS VSS AN35 AU55 VSS VSS C20
    AH34 VSS VSS AN36 AU57 VSS VSS C25
    AH36 VSS VSS AN39 AU59 VSS VSS C27
    AH38 VSS VSS AN40 AV14 VSS VSS C38
    B B
    AH40 VSS VSS AN42 AV16 VSS VSS C39
    AH42 VSS VSS AN43 AV20 VSS VSS C57
    AH44 VSS VSS AN45 AV24 VSS VSS D12
    AH49 VSS VSS AN46 AV28 VSS VSS D14
    AH51 VSS VSS AN48 AV33 VSS VSS D18
    AH53 VSS VSS AN49 AV34 VSS VSS D2
    AH55 VSS VSS AN51 AV36 VSS VSS D21
    AH57 VSS VSS AN52 AV39 VSS VSS D23
    AJ13 VSS VSS AN60 AV41 VSS VSS D25
    AJ14 VSS VSS AN63 AV43 VSS VSS D26
    AJ23 VSS VSS AN7 AV46 VSS VSS D27
    AJ25 VSS VSS AP10 AV49 VSS VSS D29
    AJ27 VSS VSS AP17 AV51 VSS VSS D30
    AJ29 VSS VSS AP20 AV55 VSS VSS D31
    VSS VSS VSS Rev1p2 VSS

    Rev1p2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(10/11) GND
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 14 of 46
    5 4 3 2 1
    1
    RSVD

    HASWELL_MCP_E U1R HASWELL_MCP_E


    U1Q @

    DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3 N23


    DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 T52 @ RSVD R23
    @ T54 AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 RSVD T23
    DAISY_CHAIN_NCTF_AY60 AT2 RSVD
    DC_TEST_AY61_AW61 AY61 A60 T57 @ RSVD U10
    DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 AU44 RSVD
    DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61 RSVD
    DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 AV44
    @ T61 B2 A62 T62 @ RSVD
    DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 D15
    DC_TEST_A3_B3 B3 AV1 T64 @ RSVD AL1
    DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 T66 @ RSVD AM11
    DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2 RSVD AP7
    DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 F22 RSVD
    B63 AW3 DC_TEST_AY3_AW3 RSVD AU10
    DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 H22 RSVD
    DC_TEST_C1_C2 C1 AW61 DC_TEST_AY61_AW61 RSVD AU15
    DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 J21 RSVD
    C2 AW62 DC_TEST_AY62_AW62 RSVD AW14
    DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 T75 @ RSVD AY14
    DAISY_CHAIN_NCTF_AW63
    Rev1p2 RSVD
    17 OF 19 18 OF 19
    Rev1p2

    U1S @ HASWELL_MCP_E

    @ T63 CFG0 AC60 AV63


    @ T65 CFG1 AC62 CFG0 RSVD_TP AU63
    @ T67 CFG2 AC63 CFG1 RSVD_TP
    CFG3 AA63 CFG2
    CFG3
    CFG Straps for Processor
    CFG4 AA60 C63
    @ T70 CFG5 Y62 CFG4 RSVD_TP C62
    @ T71 CFG6 Y61 CFG5 RSVD_TP B43
    @ T72 CFG7 Y60 CFG6 RSVD
    @ T73 CFG8 V62 CFG7 A51 CFG3 R273 1 @ 2 1K_0402_1%
    @ T74 CFG9 V61 CFG8 RSVD_TP B51
    @ T76 CFG10 V60 CFG9 RSVD_TP
    @ T77 CFG11 U60 CFG10 L60
    @ T78 CFG12 T63 CFG11 RESERVED RSVD_TP
    A @
    @
    T79
    T80
    CFG13
    CFG14
    T62
    T61
    CFG12
    CFG13 RSVD
    N60 A
    CFG14 CFG3 - Physical Debug Enable (DFX Privacy)
    @ T81 CFG15 T60 W23
    CFG15 RSVD Y22 1: DISABLED
    @ T82 CFG16 AA62 RSVD AY15 OPI_COMP
    CFG16 PROC_OPI_RCOMP 0: ENABLED; SET DFX ENABLED BIT IN DEBUG INTERFACE MSR.
    @ T83 CFG18 U63 CFG3 have internal PU.
    @ T84 CFG17 AA61 CFG18 AV62
    @ T85 CFG19 U62 CFG17 19 OF 19 RSVD D58
    CFG19 RSVD
    CFG_RCOMP V63 P22
    CFG_RCOMP VSS N21
    A5 VSS
    RSVD P20
    E1 RSVD R20 CFG4 R274 1 2 1K_0402_1%
    D1 RSVD RSVD
    J20 RSVD
    H18 RSVD
    TD_IREF B12 RSVD
    TD_IREF
    Rev1p2 CFG4 - Display Port Presence Strap
    1 : Disabled; No Physical Display Port attached
    to Embedded Display Port
    0 : Enabled; An external Display Port device is
    connected to the Embedded Display Port
    CFG4 have internal PH.

    R275 2 1 49.9_0402_1% CFG_RCOMP

    R276 2 1 49.9_0402_1% OPI_COMP

    R277 2 1 8.2K_0402_5% TD_IREF

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2013/02/20 2012/07/01 Title
    Issued Date Deciphered Date HSW MCP(11/11) RSVD
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    sualaptop365.edu.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    4019OJ
    Date: Friday, February 28, 2014 Sheet 15 of 46

    1
    A B C D E

    SA_DIMM_VREFDQ [6]
    DIMM A
    +1.35V
    +1.35V +1.35V
    DDR_A_DQS#[0..7] [6]
    JDIMM1

    1
    R278
    +V_DDR_REFA 1
    3 VREF_DQ VSS
    2
    4 DDR_A_D9
    All VREF traces should DDR_A_DQS[0..7] [6]
    1.8K_0402_1% DDR_A_D13 5 VSS
    DQ0
    DQ4
    DQ5
    6 DDR_A_D12 have 10 mil trace width DDR_A_D[0..63] [6]
    +1.35V
    R279 DDR_A_D8 7 8
    2_0402_1% 9 DQ1 VSS 10 DDR_A_DQS#1
    DDR_A_MA[0..15] [6]

    2
    1 2 11 VSS DQS0# 12 DDR_A_DQS1
    13 DM0 DQS0 14
    1 1
    VSS VSS
    1

    C115 1 C92 1 C89 DDR_A_D14 15 16 DDR_A_D15 1 C97 1 C98 1 C99 1 C100 1 C93 1 C94 1 C95 1 C96
    DQ2 DQ6

    2.2U_0402_6.3V6M

    0.1U_0402_16V4Z

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K
    0.022U_0402_16V7K @ DDR_A_D10 17 18 DDR_A_D11
    DQ3 DQ7

    1
    19 20
    1 2

    R282 DDR_A_D29 21 VSS VSS 22 DDR_A_D25


    1.8K_0402_1% 2 2 DDR_A_D28 23 DQ8 DQ12 24 DDR_A_D24 2 2 2 2 2 2 2 2
    R7 25 DQ9 DQ13 26
    DDR_A_DQS#3 27 VSS VSS 28
    24.9_0402_1%
    2 DDR_A_DQS3 29 DQS1# DM1 30 DIMM_DRAMRST# DIMM_DRAMRST# [17,5]
    31 DQS1 RESET# 32
    2

    DDR_A_D30 33 VSS VSS 34 DDR_A_D27


    DDR_A_D31 35 DQ10 DQ14 36 DDR_A_D26
    37 DQ11 DQ15 38
    DDR_A_D44 39 VSS VSS 40 DDR_A_D45
    DQ16 DQ20
    CRB1.0 0.1uF *1 /2.2uF *1 DDR_A_D41 41
    43 DQ17 DQ21
    42
    44
    DDR_A_D40

    2.2uF (reserved) DDR_A_DQS#5 45 VSS


    DQS2#
    VSS
    DM2
    46
    DDR_A_DQS5 47 48 +1.35V
    49 DQS2 VSS 50 DDR_A_D42
    DDR_A_D43 51 VSS DQ22 52 DDR_A_D46
    DDR_A_D47 53 DQ18 DQ23 54
    55 DQ19 VSS 56 DDR_A_D52
    DDR_A_D51 57 VSS DQ28 58 DDR_A_D53 C101 C102 C103
    DQ24 DQ29 1 C104

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    220U_B2_2.5VM_R35
    DDR_A_D50 59 60 1 1 1 Layout Note:
    61 DQ25 VSS 62 DDR_A_DQS#6 +
    63 VSS DQS3# 64 DDR_A_DQS6 @ @ Place near JDIMM1
    65 DM3 DQS3 66
    VSS VSS 2 2 2 2
    Everage by each side
    DDR_A_D49 67 68 DDR_A_D54
    DDR_A_D48 69 DQ26 DQ30 70 DDR_A_D55
    DQ27 DQ31
    71
    VSS VSS
    72
    CRB1.0 10uF *8 /1uF *8

    [6] DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA [6]


    75 CKE0 CKE1 76
    2
    77 VDD VDD 78 DDR_A_MA15 2
    DDR_A_BS2 79 NC A15 80 DDR_A_MA14
    [6] DDR_A_BS2 BA2 A14
    81 82
    DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
    DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
    87 A9 A7 88 +0.675VS
    DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6
    DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
    93 A5 A4 94
    DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2
    DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
    99 A1 A0 100
    VDD VDD 1 C108 1 C109 1 C110 1 C111

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K
    [6] SA_CLK_DDR0 SA_CLK_DDR0 101 102 SA_CLK_DDR1 SA_CLK_DDR1 [6] Layout Note:
    SA_CLK_DDR#0 103 CK0 CK1 104 SA_CLK_DDR#1
    [6] SA_CLK_DDR#0 CK0# CK1# SA_CLK_DDR#1 [6] Place near JDIMM1.203,204
    105 106
    DDR_A_MA10 107 VDD VDD 108 DDR_A_BS1 +1.35V 2 2 2 2
    A10/AP BA1 DDR_A_BS1 [6]
    [6] DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_RAS# [6]
    BA0 RAS#
    111
    VDD VDD
    112 CRB1.0 10uF *1 /1uF *4

    1
    [6] DDR_A_WE# DDR_A_WE# 113 114 DDRA_CS0_DIMMA# DDRA_CS0_DIMMA# [6]
    DDR_A_CAS# 115 WE# S0# 116 SA_ODT0 R287
    [6] DDR_A_CAS# CAS# ODT0
    117 118 1.8K_0402_1%
    DDR_A_MA13 119 VDD VDD 120 SA_ODT1
    DDRA_CS1_DIMMA# 121 A13 ODT1 122 +VREF_CA R288
    [6] DDRA_CS1_DIMMA#

    2
    123 S1# NC 124 2_0402_1%
    125 VDD VDD 126 +VREF_CA 1 2
    TEST VREF_CA SM_DIMM_VREFCA [6]
    127 128
    DDR_A_D0 129 VSS VSS 130 DDR_A_D5
    DQ32 DQ36 1 C105 1 C106

    1
    2.2U_0402_6.3V6M

    0.1U_0402_16V4Z
    DDR_A_D1 131 132 DDR_A_D4 @ C114
    133 DQ33 DQ37 134 0.022U_0402_16V7K
    DDR_A_DQS#0 135 VSS VSS 136

    1 2
    DDR_A_DQS0 137 DQS4# DM4 138 2 2
    DQS4 VSS

    1
    139 140 DDR_A_D3
    DDR_A_D2 141 VSS DQ38 142 DDR_A_D7 R289 R5
    DDR_A_D6 143 DQ34 DQ39 144 1.8K_0402_1%
    DQ35 VSS 24.9_0402_1%
    3 145 146 DDR_A_D18 3
    DDR_A_D21 147 VSS DQ44 148 DDR_A_D19

    2
    DDR_A_D20 149 DQ40 DQ45 150
    151 DQ41 VSS 152 DDR_A_DQS#2
    153 VSS DQS5# 154 DDR_A_DQS2
    155 DM5 DQS5 156
    DDR_A_D17 157 VSS VSS 158 DDR_A_D22
    DQ42 DQ46
    DDR_A_D16 159
    161 DQ43 DQ47
    160
    162
    DDR_A_D23
    CRB1.0 0.1uF *1 /2.2uF *1
    DDR_A_D36 163 VSS VSS 164 DDR_A_D37 2.2uF (reserved)
    DDR_A_D33 165 DQ48 DQ52 166 DDR_A_D32
    167 DQ49 DQ53 168
    DDR_A_DQS#4 169 VSS VSS 170
    DDR_A_DQS4 171 DQS6# DM6 172
    173 DQS6 VSS 174 DDR_A_D35
    DDR_A_D34 175 VSS DQ54 176 DDR_A_D39
    DDR_A_D38 177 DQ50 DQ55 178
    179 DQ51 VSS 180 DDR_A_D63
    DDR_A_D62 181 VSS DQ60 182 DDR_A_D59
    DDR_A_D58 183 DQ56 DQ61 184 +1.35V
    185 DQ57 VSS 186 DDR_A_DQS#7
    187 VSS DQS7# 188 DDR_A_DQS7 R285
    189 DM7 DQS7 190 66.5_0402_1%
    VSS VSS 1
    +3VS +0.675VS DDR_A_D60 191 192 DDR_A_D56 C90 1 2
    DQ58 DQ62 +5VALW +1.35V SB_ODT0 [17]
    DDR_A_D61 193 194 DDR_A_D57 0.1U_0402_16V4Z
    195 DQ59 DQ63 196 R290
    DDRA_SA0 197 VSS VSS 198 2 66.5_0402_1%
    SA0 EVENT#

    1
    199 200 PCH_SMB_DATA PCH_SMB_DATA [17,30,31,32,33,8] 1 2
    VDDSPD SDA SB_ODT1 [17]
    DDRA_SA1 201 202 PCH_SMB_CLK PCH_SMB_CLK [17,30,31,32,33,8] U7 R283
    203 SA1 SCL 204 1 5 220K_0402_5% Q9 R281
    VTT VTT +0.675VS NC VCC LBSS138LT1G_SOT-23-3 66.5_0402_1%

    1
    205 206 2 D 1 2 SA_ODT0
    [5] DDR_PG_CTRL

    2
    GND1 GND2 A
    1

    1 C112 1 C113 207 208 4 2


    BOSS1 BOSS2 Y
    0.1U_0402_16V4Z

    2.2U_0402_6.3V6M

    @ R259 R258 3 G R284


    10K_0402_5% 10K_0402_5% LCN_DAN06-K4406-0103 GND 66.5_0402_1%
    S

    3
    4 4
    ME@ 74AUP1G07GW_TSSOP5 M_A_B_DIMM_ODT 1 2 SA_ODT1
    2 2
    CHANNEL A /TYPE :Reverse / H:4mm
    2

    DDR_VTT_PG_CTRL [40]
    CHA SPD ADDRESS IS OxA0
    CHA TS ADDRESS IS Ox30
    CRB1.0 0.1uF *1 /2.2uF *1
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2013/02/20 2012/07/01 Title
    P/N:SP07000LT00 Issued Date Deciphered Date DDRIII DIMMA
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 16 of 46
    A B C D E
    A B C D E

    SB_DIMM_VREFDQ [6]
    DIMM B
    +1.35V
    +1.35V +1.35V
    DDR_B_DQS#[0..7] [6]
    JDIMM2

    1
    R5175
    +V_DDR_REFB 1
    3 VREF_DQ VSS
    2
    4 DDR_B_D12
    All VREF traces should DDR_B_DQS[0..7] [6]
    1.8K_0402_1% DDR_B_D8 5 VSS
    DQ0
    DQ4
    DQ5
    6 DDR_B_D9 have 10 mil trace width DDR_B_D[0..63] [6]
    +1.35V
    R5176 DDR_B_D14 7 8
    2_0402_1% 9 DQ1 VSS 10 DDR_B_DQS#1
    DDR_B_MA[0..15] [6]

    2
    1 2 11 VSS DQS0# 12 DDR_B_DQS1
    13 DM0 DQS0 14
    1 1
    VSS VSS
    1

    C5217 1 C5218 1 C5224 DDR_B_D10 15 16 DDR_B_D13 1 C5219 1 C5225 1 C5226 1 C5220 1 C5221 1 C5222 1 C5223 1 C5227
    DQ2 DQ6

    2.2U_0402_6.3V6M

    0.1U_0402_16V4Z

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K
    0.022U_0402_16V7K @ DDR_B_D11 17 18 DDR_B_D15
    DQ3 DQ7

    1
    19 20
    1 2

    R5177 DDR_B_D28 21 VSS VSS 22 DDR_B_D25


    1.8K_0402_1% 2 2 DDR_B_D29 23 DQ8 DQ12 24 DDR_B_D24 2 2 2 2 2 2 2 2
    R5178 25 DQ9 DQ13 26
    DDR_B_DQS#3 27 VSS VSS 28
    24.9_0402_1%
    2 DDR_B_DQS3 29 DQS1# DM1 30 DIMM_DRAMRST# DIMM_DRAMRST# [16,5]
    31 DQS1 RESET# 32
    2

    DDR_B_D26 33 VSS VSS 34 DDR_B_D30


    DDR_B_D27 35 DQ10 DQ14 36 DDR_B_D31
    37 DQ11 DQ15 38
    DDR_B_D40 39 VSS VSS 40 DDR_B_D45
    DQ16 DQ20
    CRB1.0 0.1uF *1 /2.2uF *1 DDR_B_D41 41
    43 DQ17 DQ21
    42
    44
    DDR_B_D44

    2.2uF (reserved) DDR_B_DQS#5 45 VSS


    DQS2#
    VSS
    DM2
    46
    DDR_B_DQS5 47 48 +1.35V
    49 DQS2 VSS 50 DDR_B_D47
    DDR_B_D46 51 VSS DQ22 52 DDR_B_D43
    DDR_B_D42 53 DQ18 DQ23 54
    55 DQ19 VSS 56 DDR_B_D61
    DDR_B_D56 57 VSS DQ28 58 DDR_B_D60 C5228 C5229 C5230
    DQ24 DQ29 1 C5231

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    220U_B2_2.5VM_R35
    DDR_B_D57 59 60 1 1 1 Layout Note:
    61 DQ25 VSS 62 DDR_B_DQS#7 +
    63 VSS DQS3# 64 DDR_B_DQS7 @ @ Place near JDIMM1
    65 DM3 DQS3 66
    VSS VSS 2 2 2 2
    Everage by each side
    DDR_B_D59 67 68 DDR_B_D63
    DDR_B_D58 69 DQ26 DQ30 70 DDR_B_D62
    DQ27 DQ31
    71
    VSS VSS
    72
    CRB1.0 10uF *8 /1uF *8

    [6] DDRB_CKE0_DIMMA DDRB_CKE0_DIMMA 73 74 DDRB_CKE1_DIMMA DDRB_CKE1_DIMMA [6]


    75 CKE0 CKE1 76
    2
    77 VDD VDD 78 DDR_B_MA15 2
    DDR_B_BS2 79 NC A15 80 DDR_B_MA14
    [6] DDR_B_BS2 BA2 A14
    81 82
    DDR_B_MA12 83 VDD VDD 84 DDR_B_MA11
    DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
    87 A9 A7 88 +0.675VS
    DDR_B_MA8 89 VDD VDD 90 DDR_B_MA6
    DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
    93 A5 A4 94
    DDR_B_MA3 95 VDD VDD 96 DDR_B_MA2
    DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
    99 A1 A0 100
    VDD VDD 1 C5232 1 C5233 1 C5234 1 C5235

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K
    [6] SB_CLK_DDR0 SB_CLK_DDR0 101 102 SB_CLK_DDR1 SB_CLK_DDR1 [6] Layout Note:
    SB_CLK_DDR#0 103 CK0 CK1 104 SB_CLK_DDR#1
    [6] SB_CLK_DDR#0 CK0# CK1# SB_CLK_DDR#1 [6] Place near JDIMM1.203,204
    105 106
    DDR_B_MA10 107 VDD VDD 108 DDR_B_BS1 2 2 2 2
    A10/AP BA1 DDR_B_BS1 [6]
    [6] DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS# DDR_B_RAS# [6]
    BA0 RAS#
    DDR_B_WE#
    111
    113 VDD VDD
    112
    114 DDRB_CS0_DIMMA#
    CRB1.0 10uF *1 /1uF *4
    [6] DDR_B_WE# WE# S0# DDRB_CS0_DIMMA# [6]
    [6] DDR_B_CAS# DDR_B_CAS# 115 116 SB_ODT0 SB_ODT0 [16]
    117 CAS# ODT0 118
    DDR_B_MA13 119 VDD VDD 120 SB_ODT1 +VREF_CA
    A13 ODT1 SB_ODT1 [16]
    [6] DDRB_CS1_DIMMA# DDRB_CS1_DIMMA# 121 122
    123 S1# NC 124
    125 VDD VDD 126 +VREF_CA
    127 TEST VREF_CA 128
    DDR_B_D4 129 VSS VSS 130 DDR_B_D5
    DQ32 DQ36 1 C5236 1 C5237

    2.2U_0402_6.3V6M

    0.1U_0402_16V4Z
    DDR_B_D1 131 132 DDR_B_D0 @ 1128 Check CAP Q'ty
    133 DQ33 DQ37 134
    DDR_B_DQS#0 135 VSS VSS 136
    DDR_B_DQS0 137 DQS4# DM4 138 2 2
    139 DQS4 VSS 140 DDR_B_D2
    DDR_B_D3 141 VSS DQ38 142 DDR_B_D6
    DDR_B_D7 143 DQ34 DQ39 144
    145 DQ35 VSS 146 DDR_B_D16
    3 3
    DDR_B_D21 147 VSS DQ44 148 DDR_B_D17
    DDR_B_D20 149 DQ40 DQ45 150
    151 DQ41 VSS 152 DDR_B_DQS#2
    153 VSS DQS5# 154 DDR_B_DQS2
    155 DM5 DQS5 156
    DDR_B_D22 157 VSS VSS 158 DDR_B_D19
    DQ42 DQ46
    DDR_B_D23 159
    161 DQ43 DQ47
    160
    162
    DDR_B_D18
    CRB1.0 0.1uF *1 /2.2uF *1
    DDR_B_D36 163 VSS VSS 164 DDR_B_D37 2.2uF (reserved)
    DDR_B_D33 165 DQ48 DQ52 166 DDR_B_D32
    167 DQ49 DQ53 168
    DDR_B_DQS#4 169 VSS VSS 170
    DDR_B_DQS4 171 DQS6# DM6 172
    173 DQS6 VSS 174 DDR_B_D34
    DDR_B_D35 175 VSS DQ54 176 DDR_B_D38
    DDR_B_D39 177 DQ50 DQ55 178
    179 DQ51 VSS 180 DDR_B_D51
    DDR_B_D52 181 VSS DQ60 182 DDR_B_D55
    DDR_B_D49 183 DQ56 DQ61 184
    185 DQ57 VSS 186 DDR_B_DQS#6
    187 VSS DQS7# 188 DDR_B_DQS6
    189 DM7 DQS7 190
    +3VS +0.675VS DDR_B_D48 191 VSS VSS 192 DDR_B_D54
    DDR_B_D53 193 DQ58 DQ62 194 DDR_B_D50
    195 DQ59 DQ63 196
    DDRB_SA0 197 VSS VSS 198
    199 SA0 EVENT# 200 PCH_SMB_DATA
    VDDSPD SDA PCH_SMB_DATA [16,30,31,32,33,8]
    R5179 1 2 10K_0402_5% DDRB_SA1 201 202 PCH_SMB_CLK PCH_SMB_CLK [16,30,31,32,33,8]
    203 SA1 SCL 204
    VTT VTT +0.675VS
    205 206
    GND1 GND2
    1

    1 C5238 1 C5239 207 208


    BOSS1 BOSS2
    0.1U_0402_16V4Z

    2.2U_0402_6.3V6M

    @ R5180
    10K_0402_5% LCN_DAN06-K4406-0103
    4 4
    ME@
    2 2
    CHANNEL B /TYPE :Reverse / H:4mm
    2

    CHB SPD ADDRESS IS OxA4


    CHB TS ADDRESS IS Ox34
    CRB1.0 0.1uF *1 /2.2uF *1
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2013/02/20 2012/07/01 Title
    P/N:SP07000LT00 Issued Date Deciphered Date DDRIII DIMMA
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 17 of 46
    A B C D E
    1 2 3 4 5

    A A

    Power-Up/Down Sequence
    1. All the ASIC supplies must reach their respective nominal voltages within 20 ms
    of the start of the ramp-up sequence, though a shorter ramp-up duration is
    preferred. The maximum slew rate on all rails is 50 mV/µs.

    2. The external pull ups on the DDC/AUX signals (if applicable) should ramp up
    before or after both VDDC and VDD_CT have ramped up.
    3. VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC
    should reach 90% before VDD_CT starts to ramp up (or vice versa).
    4. For power down, reversing the ramp-up sequence is recommended.

    PLT_RST#

    VDDR3(3.3VGS) AND
    PCH GATE
    PLT_RST_VGA# PERSTB GPU
    PCIE_VDDC(0.95V)
    B B
    GPIO50 DGPU_HOLD_RST

    VDDR1(1.5VGS) GPIO54 DGPU_PWR_EN

    TACH0/GPIO17 DGPU_PWROK

    VDDC/VDDCI(1.12V)

    VDD_CT(1.8V)
    NOT DGPU_PWR_EN#

    PERSTb
    +3VS +3VS_VGA
    REFCLK MOS 1

    Straps Reset +3VS +0.95VS_VGA +1.8VS +1.8VS_VGA


    Regulator 2 MOS 5
    Straps Valid
    C B+ +VGA_CORE +1.5VS +1.5VS_VGA C

    PWM 4 MOS 3
    Global ASIC Reset

    T4+16clock

    CPU part

    D D

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_Note
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 18 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    PCIE/ DP

    DIS@
    U666A U?
    A A

    [11] PCIE_PTX_C_DRX_P5_L0 PCIE_PTX_C_DRX_P5_L0 AF30 AH30 PCIE_PRX_C_DTX_P5_L0 C5187 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_P5_L0
    PCIE_RX0P PCIE_TX0P PCIE_PRX_DTX_P5_L0 [11]
    [11] PCIE_PTX_C_DRX_N5_L0 PCIE_PTX_C_DRX_N5_L0 AE31 AG31 PCIE_PRX_C_DTX_N5_L0 C5188 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_N5_L0
    PCIE_RX0N PCIE_TX0N PCIE_PRX_DTX_N5_L0 [11]

    [11] PCIE_PTX_C_DRX_P5_L1 PCIE_PTX_C_DRX_P5_L1 AE29 AG29 PCIE_PRX_C_DTX_P5_L1 C5189 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_P5_L1
    PCIE_RX1P PCIE_TX1P PCIE_PRX_DTX_P5_L1 [11]
    [11] PCIE_PTX_C_DRX_N5_L1 PCIE_PTX_C_DRX_N5_L1 AD28 AF28 PCIE_PRX_C_DTX_N5_L1 C5190 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_N5_L1
    PCIE_RX1N PCIE_TX1N PCIE_PRX_DTX_N5_L1 [11]

    [11] PCIE_PTX_C_DRX_P5_L2 PCIE_PTX_C_DRX_P5_L2 AD30 AF27 PCIE_PRX_C_DTX_P5_L2 C5191 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_P5_L2
    PCIE_RX2P PCIE_TX2P PCIE_PRX_DTX_P5_L2 [11]
    [11] PCIE_PTX_C_DRX_N5_L2 PCIE_PTX_C_DRX_N5_L2 AC31 AF26 PCIE_PRX_C_DTX_N5_L2 C5192 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_N5_L2
    PCIE_RX2N PCIE_TX2N PCIE_PRX_DTX_N5_L2 [11]

    [11] PCIE_PTX_C_DRX_P5_L3 PCIE_PTX_C_DRX_P5_L3 AC29 AD27 PCIE_PRX_C_DTX_P5_L3 C5193 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_P5_L3
    PCIE_RX3P PCIE_TX3P PCIE_PRX_DTX_P5_L3 [11]
    [11] PCIE_PTX_C_DRX_N5_L3 PCIE_PTX_C_DRX_N5_L3 AB28 AD26 PCIE_PRX_C_DTX_N5_L3 C5194 2 1 DIS@ 0.1U_0402_16V7K PCIE_PRX_DTX_N5_L3
    PCIE_RX3N PCIE_TX3N PCIE_PRX_DTX_N5_L3 [11]

    AB30 AC25
    AA31 PCIE_RX4P PCIE_TX4P AB25
    PCIE_RX4N PCIE_TX4N

    AA29 Y23
    Y28 PCIE_RX5P PCIE_TX5P Y24
    PCIE_RX5N PCIE_TX5N
    No Use GPU Display Port outpud
    Y30 AB27
    W31 PCIE_RX6P PCIE_TX6P AB26 DIS@
    PCIE_RX6N PCIE_TX6N U666F

    W29 Y27
    B
    V28 PCIE_RX7P PCIE_TX7P Y26 B
    PCIE_RX7N PCIE_TX7N AB11
    VARY_BL AB12
    V30 W24 DIGON
    U31 NC#V30 NC#W24 W23
    NC#U31 NC#W23

    U29 V27 AL15


    T28 NC#U29 NC#V27 U26 TXCAP_DPA3P AK14
    NC#T28 NC#U26 TXCAM_DPA3N

    PCI EXPRESS INTERFACE


    AH16
    T30 U24 TX0P_DPA2P AJ15
    R31 NC#T30 NC#U24 U23 TX0M_DPA2N
    NC#R31 NC#U23 AL17
    TX1P_DPA1P AK16
    R29 T26 TX1M_DPA1N
    P28 NC#R29 NC#T26 T27 AH18
    NC#P28 NC#T27 TX2P_DPA0P AJ17
    TX2M_DPA0N
    P30 T24 AL19
    N31 NC#P30 NC#T24 T23 NC_TXOUT_L3P AK18
    NC#N31 NC#T23 NC_TXOUT_L3N

    N29 P27 TMDP


    M28 NC#N29 NC#P27 P26
    NC#M28 NC#P26 AH20
    TXCBP_DPB3P AJ19
    M30 P24 TXCBM_DPB3N
    L31 NC#M30 NC#P24 P23 AL21
    NC#L31 NC#P23 TX3P_DPB2P AK20
    TX3M_DPB2N
    L29 M27 AH22
    K30 NC#L29 NC#M27 N26 TX4P_DPB1P AJ21
    NC#K30 NC#N26 TX4M_DPB1N
    C AL23 C
    TX5P_DPB0P AK22
    TX5M_DPB0N
    CLOCK
    CLK_PEG_VGA AK30 AK24
    [8] CLK_PEG_VGA PCIE_REFCLKP NC_TXOUT_U3P
    CLK_PEG_VGA# AK32 216-0841009 A0 SUN XT S3
    AJ23
    [8] CLK_PEG_VGA# PCIE_REFCLKN ? +0.95VS_VGA NC_TXOUT_U3N

    CALIBRATION
    Y22 R5159 1 DIS@ 2 1.69K_0402_1%
    PCIE_CALR_TX
    216-0841009 A0 SUN XT S3
    R1400 1 DIS@ 2 1K_0402_5% N10 AA22 R717 1 DIS@ 2 1K_0402_1% ?
    TEST_PG PCIE_CALR_RX

    PLT_RST_VGA# AL27
    PERSTB

    +3VS_VGA

    U6
    MC74VHC1G08DFT2G_SC70-5
    5

    D D
    DIS@
    2
    P

    [29,31,33,34,8,9] PLT_RST_BUF# B 4 PLT_RST_VGA#


    1 Y
    [10,9] DGPU_HOLD_RST# A
    G
    1

    1
    3

    R168 R163
    100K_0402_5% 100K_0402_5%
    @ DIS@
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2

    Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_PCIE/DP
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 19 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    DIS@

    MSIC U666B U?

    AF2
    Resistor Divider Lookup Lable +1.8VS_VGA
    NC#AF2 AF4
    PS_0[3:1]=001 Strap Name :
    NC#AF4
    R_pu (ohm) R_pd (ohm) Bitd [3:1] PS_0[5:4]=11

    1
    1 N9 AG3 PS_0[1]  ROM_CONFIG[0]
    T201 DBG_DATA16 NC#AG3
    1 L9 AG5 R5165
    T202 DBG_DATA15 NC#AG5
    1 AE9 8.45K_0402_1%
    T203
    1 Y11 DBG_DATA14 DPA
    AH3
    NC 4.75k 000 DIS@
    PS_0[2]  ROM_CONFIG[1]
    T204 DBG_DATA13 NC#AH3
    1 AE8 AH1
    T205 8.45k 2k 001 PS_0[3]  ROM_CONFIG[2]

    2
    1 AD9 DBG_DATA12 NC#AH1 PS_0
    T206 DBG_DATA11
    1 AC10 AK3 4.53k 2k 010 PS_0[4]  N/A
    T207 DBG_DATA10 NC#AK3

    1
    1 AD7 AK1 1
    T208 DBG_DATA9 NC#AK1
    1 AC8 DVO 6.98k 4.99k 011 C5210 R5166 PS_0[5]  AUD_PORT_CONN_PINSTRAP[0]
    T209 DBG_DATA8
    1 AC7 AK5 0.68U_0402_4VX6S 2K_0402_1%
    A T210 DBG_DATA7 NC#AK5 A
    1 AB9 AM3 4.53k 4.99k 100 @ DIS@
    T211 DBG_DATA6 NC#AM3 2
    1 AB8
    T212

    2
    1 AB7 DBG_DATA5 AK6
    T213
    1 AB4 DBG_DATA4 NC#AK6 AM5
    3.24k 5.62k 101
    T214 DBG_DATA3 NC#AM5
    1 AB2
    T215
    1 Y8 DBG_DATA2 DPB
    AJ7
    3.4k 10k 110
    T216 DBG_DATA1 NC#AJ7
    1 Y7 AH6 4.75k NC 111
    T217 DBG_DATA0 NC#AH6
    AK8 0402 1% resistors are equired
    +3VS_VGA NC#AK8 AL7 +1.8VS_VGA
    NC#AL7 PS_1[3:1]=000 Strap Name :
    Capacitor Divider Lookup Lable PS_1[5:4]=11

    1
    W6
    V6 NC#W6 R5167
    PS_1[1]  STRAP_BIF_GEN3_EN_A
    NC#V6

    1
    DIS@ DIS@ V4 8.45K_0402_1%
    R327 R328 AC6 NC#V4 U5
    Cap (nF) Bitd [5:4] @
    PS_1[2]  TRAP_BIF_CLK_PM_EN
    10K_0402_5% 10K_0402_5% AC5 NC#AC5 NC#U5
    PS_1[3]  N/A

    2
    NC#AC6 W3 PS_1
    NC#W3 680nF 00
    2

    AA5 V2 PS_1[4]  STRAP_TX_CFG_DRV_FULL_SWING

    2
    NC#AA5 NC#V2

    1
    AA6
    6 1 VGA_SMB_DA3 NC#AA6 DPC
    Y4
    82nF 01 C5207
    1
    R5168
    [32,34,8] EC_SMB_DA2 NC#Y4 W5 0.68U_0402_4VX6S 4.75K_0402_1%
    PS_1[5]  STRAP_TX_DEEMPH_EN
    Q2416A NC#W5 10nF 10 @ DIS@
    DIS@ U1 AA3 2
    NC 11

    2
    W1 NC#U1 NC#AA3 Y2
    NC#W1 NC#Y2
    5

    U3
    Y6 NC#U3 J8
    3 4 VGA_SMB_CK3 AA1 NC#Y6 NC#J8
    [32,34,8] EC_SMB_CK2 NC#AA1
    Q2416B
    2N7002KDWH_SOT363-6
    DIS@ +1.8VS_VGA
    PS_2[3:1]=000 Strap Name :
    I2C
    PS_2[5:4]=01

    1
    R1
    R3 SCL R5185
    PS_2[1]  N/A
    SDA 4.75K_0402_1%
    AM26 @
    PS_2[2]  N/A
    B R AK26 B
    GENERAL PURPOSE I/O PS_2[3]  STRAP_BIOS_ROM_EN

    2
    U6 AVSSN#AK26 PS_2
    SMBus Add: 0X41 U10 GPIO_0 AL25
    GPIO_1 G PS_2[4]  STRAP_BIF_VGA_DIS

    1
    T10 AJ25 1
    VGA_SMB_DA3 U8 GPIO_2 AVSSN#AJ25 C5203 R5164
    D2416 DIS@ VGA_SMB_CK3 U7 SMBDATA AH24 0.082U_0402_16V6K 4.75K_0402_1%
    PS_2[5]  N/A
    1 2 VGA_AC_BATT T9 SMBCLK B AG25 @ DIS@
    [34,42] VGA_AC_DET GPIO_5_AC_BATT AVSSN#AG25 2
    T8

    2
    RB751V-40_SOD323-2 T7 GPIO_6 DAC1 AH26 R322 1 MARS@ 2 499_0402_1%
    P10 GPIO_7_BLON HSYNC AJ27
    P4 GPIO_8_ROMSO VSYNC
    P2 GPIO_9_ROMSI +1.8VS_VGA
    N6 GPIO_10_ROMSCK AD22
    N5 GPIO_11 RSET L50 MARS@
    N3 GPIO_12 AG24 +AVDD 187mA 1 2
    Y9 GPIO_13 AVDD AE22 BLM15BD121SN1D_0402 +1.8VS_VGA
    GPU_VID1 N1 GPIO_14_HPD2 AVSSQ PS_3[3:1]=000 Strap Name :
    [42] GPU_VID1 GPIO_15_PWRCNTL_0
    M4 AE23 PS_3[5:4]=11
    GPIO_16 VDD1DI

    1
    @ R6 AD23 PS_3[1]  BOARD_CONFIG[0] (Memory ID)
    VGA_DPLUS C323 1 2 1000P_0402_50V7K VGA_DMINUS W10 GPIO_17_THERMAL_INT VSS1DI
    GPIO_18 1 C436 1 C413 1 C437 R5174

    10U_0603_6.3V6M
    MARS@

    1U_0402_6.3V4Z
    MARS@

    1U_0402_6.3V4Z
    MARS@
    T116 @ GPIO19_CTF M2 FutureASIC/SEYMOUR/PARK 8.45K_0402_1% PS_3[2]  BOARD_CONFIG[1] (Memory ID)
    GPU_VID2 P8 GPIO_19_CTF AM12 X76@
    [42] GPU_VID2 GPIO_20_PWRCNTL_1 CEC_1
    GPU_VID5 P7 PS_3[3]  BOARD_CONFIG[2] (Memory ID)
    [42] GPU_VID5

    2
    +3VS_VGA N8 GPIO_21 2 2 2 PS_3
    GPU_VID4 AK10 GPIO_22_ROMCSB AK12
    [42] GPU_VID4 GPIO_29 RSVD#AK12 PS_3[4]  AUD_PORT_CONN_PINSTRAP[1]

    1
    GPU_VID3 AM10 AL11 1
    [42] GPU_VID3 GPIO_30 RSVD#AL11
    U2410 @ PEG_CLKREQ# N7 AJ11 C5206 R5169
    1 2 VGA_DPLUS
    [8] PEG_CLKREQ# CLKREQB RSVD#AJ11 0.68U_0402_4VX6S 2K_0402_1%
    PS_3[5]  AUD_PORT_CONN_PINSTRAP[2]
    VDD1 D+ JTAG_TRSTB L6 @ X76@
    6 3 VGA_DMINUS JTAG_TDI L5 JTAG_TRSTB 2

    2
    ALERT# D- JTAG_TCK L3 JTAG_TDI
    4 8 VGA_SMB_CK3 JTAG_TMS L1 JTAG_TCK AL13
    [10] VGA_THRMTRIP# THERM# SCLK 1 JTAG_TMS GENLK_CLK
    C5213 @ T86
    @T86 1 JTAG_TDO K4 AJ13
    5 7 VGA_SMB_DA3 68P_0402_50V8J TESTEN K7 JTAG_TDO GENLK_VSYNC
    GND SDATA @EMI@ AF24 TESTEN
    1 2 NC#AF24
    C2506 RF AG13
    0.1U_0402_16V4Z ADM1032ARMZ_MSOP8 SWAPLOCKA AH12
    @ AB13 SWAPLOCKB
    C 2 W8 GENERICA C
    W9 GENERICB Memory ID R_pu (ohm) R_pd (ohm)
    W7 GENERICC AC19 PS_0 Memory Type Configuration Size
    AD10 GENERICD PS_0 PS_3[3..1] R5174 R5169
    +1.8VS_VGA AJ9 GENERICE AD19 PS_1
    AL9 NC#AJ9 PS_1 8.45k 2k Samsung K4W2G1646E‐BC1A
    NC#AL9 AE17 PS_2 0 0 1 gDDR3‐2133 1GB
    PS_2 SD000000680 SD034200180 P/N: SA000068U00
    1

    +3VS_VGA AC14
    R331 @ T218
    @T218 1 PX_EN AB16 HPD1 AE20 PS_3
    PX_EN PS_3 4.53k 2k Micron  MT41J128M16JT‐093G
    R1444 1 DIS@ 2 1K_0402_1% VGA_AC_BATT
    499_0402_1%
    0 1 0 gDDR3‐2000 1GB
    DIS@
    AE19 SD034453180 SD034200180 P/N: SA000067500
    2

    +VREFG_GPU AC16 TS_A


    RP34 @ DBG_VREFG 6.98k 4.99k Samsung K4W4G1646B‐HC11
    0 1 1 gDDR3‐1866 2GB
    1

    1 8 JTAG_TRSTB
    2 7 JTAG_TDI R333
    1
    C322 SD000002680 SD034499180 P/N: SA000068R00
    3 6 JTAG_TMS 249_0402_1% 0.1U_0402_10V6K
    4 5 JTAG_TCK DIS@ DIS@
    DDC/AUX
    AE6 4.53k 4.99k Micron MT41K256M16HA‐107G: E
    2 PLL/CLOCK DDC1CLK AE5 1 0 0 gDDR3‐1866 2GB
    SD034453180 SD034499180 P/N: SA000065D00
    2

    10K_8P4R_5% DDC1DATA
    AD2
    AUX1P AD4
    R1443 1 DIS@ 2 10K_0402_5% PEG_CLKREQ# AUX1N
    AC11
    R1439 1 DIS@ 2 1K_0402_5% TESTEN DDC2CLK AC13
    DDC2DATA
    XTALIN AM28 AD13
    XTALOUT AK28 XTALIN AUX2P AD11
    XTALOUT AUX2N
    @ T219 1 XO_IN AC22 AD20
    @ T220 1 XO_IN2 AB22 XO_IN NC#AD20 AC20
    XO_IN2 NC#AC20
    AE16
    NC#AE16 AD16
    NC#AD16
    SEYMOUR/FutureASIC AC1
    R349 DIS@ VGA_DPLUS T4 DDCVGACLK AC3
    10M_0402_5% +1.8VS_VGA VGA_DMINUS T2 DPLUS THERMAL DDCVGADATA
    D XTALIN 1 2 XTALOUT DMINUS D
    L54 DIS@
    BLM15BD121SN1D_0402 GPIO28 R5
    Y6 DIS@ 1 2 13mA +TSVDD AD17 GPIO28_FDO
    4 3 AC17 TSVDD
    NC OSC TSVSS
    1 C414 1 C421 1 C438
    2
    10U_0603_6.3V6M
    DIS@

    1U_0402_6.3V4Z
    DIS@

    0.1U_0402_10V6K
    DIS@

    1 2
    OSC NC R1442
    2 27MHZ_10PF_7V27000050 2 10K_0402_5% 216-0841009 A0 SUN XT S3
    C341 SJ100009700 C350 2 2 2 ?
    DIS@
    8.2P_0402_50V8B 8.2P_0402_50V8B
    Security Classification Compal Secret Data Compal Electronics, Inc.
    1

    DIS@ DIS@ Enable MLPS


    1 1 Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01 SUN_MSIC
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev

    sualaptop365.edu.vn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date:
    4019OJSheet
    Friday, February 28, 2014 20 of 46
    1 2 3 4 5
    1 2 3 4 5

    VS_VGA +5VALW +3VS +3VS_VGA


    PWR/GND
    1 C5515 1 C5633

    10U_0603_6.3V6M
    @

    0.1U_0402_10V7K
    @
    1
    Q5405 DIS@
    R5297 AO3413_SOT23-3 2 2
    330K_0402_5%

    D
    DIS@ 3 1

    1
    R5475

    G
    2
    A 10K_0402_5% R5533 A
    DGPU_PWR_EN# 1 DIS@ 2 470_0603_5%
    @

    6 2
    Q5406B
    R5478 1 DIS@ 2 270K_0402_5% 5 2N7002KDWH_SOT363-6 1 C5517 C5479
    [10,42,45,9] DGPU_PWR_EN

    0.1U_0402_10V7K
    DIS@
    DIS@ 10K_0402_5%
    2 1 @ 2 DGPU_PWR_EN#

    4
    Q5406A
    2 2N7002KDWH_SOT363-6 1 C5521

    0.1U_0402_10V7K
    DIS@ @

    +1.5VS +5VS +1.8VS


    +1.8VS_VGA
    DIS@
    U5302 DIS@ J558 @ U666E U?
    1 14 1.8VSVGA 2 1
    R5482 2 VIN1 VOUT1 13 2 1
    110K_0402_5% VIN1 VOUT1 JUMP_43X79
    B 1 C5522 1 C5520 1 C5634 B

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    DIS@

    0.1U_0402_10V7K
    @
    DGPU_PWR_EN 1 DIS@ 2 3 12 @ AA27 A3
    ON1 CT1 AB24 GND GND A30
    4 11 AB32 GND GND AA13
    VBIAS GND 2 2 2 AC24 GND GND AA16
    5 10 AC26 GND GND AB10
    ON2 CT2 AC27 GND GND AB15
    6 9 1.5VSVGA AD25 GND GND AB6
    7 VIN2 VOUT2 8 AD32 GND GND AC9
    1 C5524 VIN2 VOUT2 GND GND
    0.1U_0402_10V7K
    DIS@

    AE27 AD6
    15 +1.5VS_VGA +1.8VS_VGA AF32 GND GND AD8
    GPAD 370mA (HDMI) No Use GPU Display Port outpuT AG27 GND GND AE7
    2 TPS22966DPUR_SON14_2X3 J559 @ R319 AH32 GND GND AG12
    2 1 0_0603_5% 188mA (Display Port) K28 GND GND AH10
    2 1 1 @ 2 +DP_VDDR U666G DIS@ K32 GND GND AH28
    U?
    JUMP_43X79 L27 GND GND B10
    1 C5516 1 C5523 1 C5628 GND GND

    10U_0603_6.3V6M
    DIS@

    10U_0603_6.3V6M
    @

    0.1U_0402_10V7K
    @
    DP POWER NC/DP POWER M32 B12
    N25 GND GND B14
    1 C446 1 C447 GND GND

    1U_0402_6.3V4Z

    0.1U_0402_10V6K
    @ @ AG15 AE11 N27 B16
    2 2 2 AG16 DP_VDDR#AG15 NC#AE11 AF11 P25 GND GND B18
    AF16 DP_VDDR#AG16 NC#AF11 AE13 P32 GND GND B20
    2 2 AG17 DP_VDDR#AF16 NC#AE13 AF13 R27 GND GND B22
    AG18 DP_VDDR#AG17 NC#AF13 AG8 T25 GND GND B24
    AG19 DP_VDDR#AG18 NC#AG8 AG10 T32 GND GND B26
    AF14 DP_VDDR#AG19 NC#AG10 U25 GND GND B6
    DP_VDDR#AF14 U27 GND GND B8
    V32 GND GND C1
    W25 GND GND C32
    W26 GND GND E28
    +0.95VS_VGA AG20 AF6 W27 GND GND F10
    AG21 DP_VDDC#AG20 NC#AF6 AF7 Y25 GND GND F12
    R320 AF22 DP_VDDC#AG21 NC#AF7 AF8 Y32 GND GND F14
    0_0603_5% 280mA AG22 DP_VDDC#AF22 NC#AF8 AF9 GND GND F16
    1 @ 2 +DP_VDDC AD14 DP_VDDC#AG22 NC#AF9 GND F18
    DP_VDDC#AD14 GND F2
    GND F20
    C C
    M6 GND F22
    1 C450 1 C451 GND GND

    1U_0402_6.3V4Z

    0.1U_0402_10V6K
    @ @ AG14 AE1 N13 F24
    AH14 DP_VSSR NC#AE1 AE3 N16 GND GND F26
    AM14 DP_VSSR NC#AE3 AG1 N18 GND GND F6
    2 2 AM16 DP_VSSR NC#AG1 AG6 N21 GND GND
    GND F8
    AM18 DP_VSSR NC#AG6 AH5 P6 GND GND G10
    AF23 DP_VSSR NC#AH5 AF10 P9 GND GND G27
    AG23 DP_VSSR NC#AF10 AG9 R12 GND GND G31
    AM20 DP_VSSR NC#AG9 AH8 R15 GND GND G8
    AM22 DP_VSSR NC#AH8 AM6 R17 GND GND H14
    AM24 DP_VSSR NC#AM6 AM8 R20 GND GND H17
    AF19 DP_VSSR NC#AM8 AG7 T13 GND GND H2
    AF20 DP_VSSR NC#AG7 AG11 T16 GND GND H20
    AE14 DP_VSSR NC#AG11 T18 GND GND H6
    DP_VSSR T21 GND GND J27
    T6 GND GND J31
    U15 GND GND K11
    AF17 AE10 U17 GND GND K2
    DPAB_CALR NC#AE10 U20 GND GND K22
    U9 GND GND K6
    V13 GND GND
    V16 GND
    216-0841009 A0 SUN XT S3 GND
    ? V18
    Y10 GND
    Y15 GND
    Y17 GND
    Y20 GND
    R11 GND A32
    T11 GND VSS_MECH AM1
    AA11 GND VSS_MECH AM32
    M12 GND VSS_MECH
    N11 GND
    V11 GND
    GND
    D D

    216-0841009 A0 SUN XT S3
    ?

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_Power/GND
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 21 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    POWER

    A
    +VGA_CORE 10uF 1uF 0.1uF A

    VDDC TBD 5 (1@) 10 (2@) 0 DIS@


    U666D +1.8VS_VGA
    +1.5VS_VGA
    U?
    100mA
    AM30 +PCIE_PVDD
    VDDCI 3.5A 1 3 0 1.5A PCIE_PVDD

    PCIE
    MEM I/O

    C380

    C387

    C394
    H13 AB23 1 1 1
    H16 VDDR1 NC#AB23 AC23
    VDDR1 NC#AC23

    C365

    C367

    C375

    C370

    C371

    C372

    C373

    C374

    C389

    C390

    C391

    C381

    C392
    H19 AD24
    J10 VDDR1 NC#AD24 AE24

    10U_0603_6.3V6M

    0.1U_0402_10V6K
    1U_0402_6.3V4Z
    1 1 1 1 1 1 1 1 1 1 1 1 1 VDDR1 NC#AE24 2 2 2
    J23 AE25
    +0.95VS_VGA 10uF 1uF 0.1uF J24 VDDR1 NC#AE25 AE26

    DIS@

    DIS@

    DIS@
    J9 VDDR1 NC#AE26 AF25

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    2 2 2 2 2 2 2 2 2 2 2 2 2 K10 VDDR1 NC#AF25 AG26
    VDDR1 NC#AG26

    @
    K23

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@
    PCIE_VDDC 2.5A 2 (1@) 5 (1@) 0 K24 VDDR1
    K9 VDDR1 L23
    L11 VDDR1 PCIE_VDDC L24
    L12 VDDR1 PCIE_VDDC L25
    BIF_VDDC 1.4A 0 0 0 L13 VDDR1 PCIE_VDDC L26
    L20 VDDR1 PCIE_VDDC M22 +0.95VS_VGA
    L21 VDDR1 PCIE_VDDC N22 2.5A
    L22 VDDR1 PCIE_VDDC N23
    SPLL_VDDC 100mA 1 1 1 VDDR1 PCIE_VDDC

    C384

    C386

    C398

    C399

    C383

    C403

    C388
    N24
    PCIE_VDDC R22
    PCIE_VDDC 1 1 1 1 1 1 1
    T22
    +1.8VS_VGA 13mA LEVEL PCIE_VDDC U22
    L56 DIS@ TRANSLATION PCIE_VDDC V22

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    1 2 +VDD_CT AA20 PCIE_VDDC 2 2 2 2 2 2 2
    +1.5VS_VGA 10uF 1uF 0.1uF VDD_CT

    @
    AA21

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@
    BLM15BD121SN1D_0402
    VDD_CT

    C404

    C405

    C422
    AB20 AA15
    B
    AB21 VDD_CT CORE VDDC N15 B
    1 1 1 VDD_CT VDDC N17
    VDDR1 1.5A 3 5 5 +3VS_VGA L24 VDDC R13
    0_0402_5% 25mA I/O VDDC R16

    10U_0603_6.3V6M

    0.1U_0402_10V6K
    1U_0402_6.3V4Z
    2 2 2 1 @ 2 +VDDR3 AA17 VDDC R18
    AA18 VDDR3 VDDC Y21

    DIS@

    DIS@

    DIS@
    VDDR3 VDDC

    C410

    C428

    C429
    AB17 T12
    AB18 VDDR3 VDDC T15 +VGA_CORE
    +1.8VS_VGA 10uF 1uF 0.1uF 1 1 1
    +1.8VS_VGA VDDR3 VDDC T17 TBD
    L25 @ 300mA V12 VDDC T20
    VDDR4 VDDC

    C423

    C424

    C425

    C426

    C431

    C432

    C415

    C416

    C417

    C418

    C419

    C420

    C449

    C448
    1 2 +VDDR4 Y12 U13

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    2 2 2 BLM15BD121SN1D_0402 U12 VDDR4 VDDC U16
    PCIE_PVDD 100mA 1 1 1 VDDR4 VDDC 1 1 1 1 1 1 1 1 1 1 1 1 1 1

    @
    U18

    DIS@

    DIS@
    VDDC V21
    VDDC V15

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    VDDC V17 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    MPLL_PVDD 130mA 1 1 1 VDDC

    @
    V20

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@
    VDDC

    POWER
    Y13
    VDDC Y16
    VDDC Y18
    SPLL_PVDD 75mA 1 1 1 VDDC AA12
    VDDC M11
    VDDC N12
    VDDC U11
    VDDR4 (300mA) 0 0 0 VDDC
    +1.8VS_VGA
    L51 DIS@ 130mA PLL
    1 2 +MPLL_PVDD
    VDD_CT 13mA 1 1 1 +0.95VS_VGA
    C406

    C407

    C433

    BLM15BD121SN1D_0402 R398
    1 1 1
    1.4A 0_0805_5%
    R21 +BIF_VDDC 1 @ 2
    BIF_VDDC U21
    +TSVDD 13mA 1 1 1 BIF_VDDC
    10U_0603_6.3V6M

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    2 2 2 L8
    +1.8VS_VGA MPLL_PVDD
    DIS@

    DIS@

    DIS@

    C
    L52 DIS@ 75mA +VGA_CORE
    C

    +DP_VDDR 0 0 0 1 2 +SPLL_PVDD
    ISOLATED
    CORE I/O
    3.5A (DDR3)
    C408

    C409

    BLM15BD121SN1D_0402 C434 M13


    VDDCI

    C466

    C465

    C460

    C461
    1 1 1 H7 M15
    SPLL_PVDD VDDCI M16
    +DP_VDDC 0 0 0 VDDCI M17
    1 1 1 1
    +0.95VS_VGA VDDCI M18
    10U_0603_6.3V6M

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    2 2 2 L53 DIS@ 100mA VDDCI M20

    10U_0603_6.3V6M

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    1 2 H8 VDDCI M21 2 2 2 2
    DIS@

    DIS@

    DIS@

    +SPLL_VDDC
    SPLL_VDDC VDDCI

    C411

    C412

    C435
    N20

    DIS@

    DIS@

    DIS@

    DIS@
    BLM15BD121SN1D_0402
    J7 VDDCI
    +3VS_VGA 10uF 1uF 0.1uF 1 1 1 SPLL_PVSS

    10U_0603_6.3V6M

    0.1U_0402_10V6K
    1U_0402_6.3V4Z
    2 2 2
    VDDR3 25mA 0 2 (1@) 1 216-0841009 A0 SUN XT S3

    DIS@

    DIS@

    DIS@
    ?

    D D

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_Power
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 22 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    MEM I/F

    M_DA[63..0]
    [24,25] M_DA[63..0]
    A A
    M_MA[15..0]
    [24,25] M_MA[15..0]
    M_DQM[7..0]
    [24,25] M_DQM[7..0]
    M_DQS[7..0]
    [24,25] M_DQS[7..0]
    M_DQS#[7..0]
    [24,25] M_DQS#[7..0]
    DIS@
    U666C U?

    GDDR5/DDR3 GDDR5/DDR3
    M_DA0 K27 K17 M_MA0
    M_DA1 J29 DQA0_0 MAA0_0/MAA_0 J20 M_MA1
    +1.5VS_VGA +1.5VS_VGA M_DA2 H30 DQA0_1 MAA0_1/MAA_1 H23 M_MA2
    M_DA3 H32 DQA0_2 MAA0_2/MAA_2 G23 M_MA3
    M_DA4 G29 DQA0_3 MAA0_3/MAA_3 G24 M_MA4
    M_DA5 F28 DQA0_4 MAA0_4/MAA_4 H24 M_MA5
    DQA0_5 MAA0_5/MAA_5
    1

    1
    M_DA6 F32 J19 M_MA6
    R363 R365 M_DA7 F30 DQA0_6 MAA0_6/MAA_6 K19 M_MA7
    40.2_0402_1% 40.2_0402_1% M_DA8 C30 DQA0_7 MAA0_7/MAA_7 G20 M_MA13
    DIS@ DIS@ M_DA9 F27 DQA0_8 MAA0_8/MAA_13 L17 M_MA15
    M_DA10 A28 DQA0_9 MAA0_9/MAA_15
    2

    2
    M_DA11 C28 DQA0_10 J14 M_MA8
    +MVREFDA +MVREFSA M_DA12 E27 DQA0_11 MAA1_0/MAA_8 K14 M_MA9
    M_DA13 G26 DQA0_12 MAA1_1/MAA_9 J11 M_MA10
    M_DA14 D26 DQA0_13 MAA1_2/MAA_10 J13 M_MA11
    DQA0_14 MAA1_3/MAA_11
    1

    1 1 M_DA15 F25 H11 M_MA12


    R364 C467 R457 C514 M_DA16 A25 DQA0_15 MAA1_4/MAA_12 G11 M_BA2
    DQA0_16 MAA1_5/MAA_BA2 M_BA2 [24,25]
    100_0402_1% 1U_0402_6.3V4Z 100_0402_1% 1U_0402_6.3V4Z M_DA17 C25 J16 M_BA0
    DQA0_17 MAA1_6/MAA_BA0 M_BA0 [24,25]
    DIS@ DIS@ DIS@ DIS@ M_DA18 E25 L15 M_BA1
    2 2 DQA0_18 MAA1_7/MAA_BA1 M_BA1 [24,25]
    M_DA19 D24 G14 M_MA14
    2

    M_DA20 E23 DQA0_19 MAA1_8/MAA_14 L16

    MEMORY INTERFACE
    M_DA21 F23 DQA0_20 MAA1_9/RSVD
    B
    M_DA22 D22 DQA0_21 E32 M_DQM0 B
    M_DA23 F21 DQA0_22 WCKA0_0/DQMA0_0 E30 M_DQM1
    M_DA24 E21 DQA0_23 WCKA0B_0/DQMA0_1 A21 M_DQM2
    M_DA25 D20 DQA0_24 WCKA0_1/DQMA0_2 C21 M_DQM3
    M_DA26 F19 DQA0_25 WCKA0B_1/DQMA0_3 E13 M_DQM4
    M_DA27 A19 DQA0_26 WCKA1_0/DQMA1_0 D12 M_DQM5
    M_DA28 D18 DQA0_27 WCKA1B_0/DQMA1_1 E3 M_DQM6
    M_DA29 F17 DQA0_28 WCKA1_1/DQMA1_2 F4 M_DQM7
    M_DA30 A17 DQA0_29 WCKA1B_1/DQMA1_3
    M_DA31 C17 DQA0_30 H28 M_DQS0
    M_DA32 E17 DQA0_31 EDCA0_0/QSA0_0 C27 M_DQS1
    R5160 DIS@ R455 DIS@ M_DA33 D16 DQA1_0 EDCA0_1/QSA0_1 A23 M_DQS2
    49.9_0402_1% 10_0402_1% M_DA34 F15 DQA1_1 EDCA0_2/QSA0_2 E19 M_DQS3
    1 2 2 1 DRAM_RST M_DA35 A15 DQA1_2 EDCA0_3/QSA0_3 E15 M_DQS4
    [24,25] DRAM_RST# DQA1_3 EDCA1_0/QSA1_0
    M_DA36 D14 D10 M_DQS5
    M_DA37 F13 DQA1_4 EDCA1_1/QSA1_1 D6 M_DQS6
    DQA1_5 EDCA1_2/QSA1_2
    1

    1 M_DA38 A13 G5 M_DQS7


    C469 R5161 M_DA39 C13 DQA1_6 EDCA1_3/QSA1_3
    120P_0402_50V8J 5.1K_0402_1% M_DA40 E11 DQA1_7 H27 M_DQS#0
    DIS@ DIS@ M_DA41 A11 DQA1_8 DDBIA0_0/QSA0_0B A27 M_DQS#1
    2 M_DA42 C11 DQA1_9 DDBIA0_1/QSA0_1B C23 M_DQS#2
    2

    M_DA43 F11 DQA1_10 DDBIA0_2/QSA0_2B C19 M_DQS#3


    M_DA44 A9 DQA1_11 DDBIA0_3/QSA0_3B C15 M_DQS#4
    M_DA45 C9 DQA1_12 DDBIA1_0/QSA1_0B E9 M_DQS#5
    M_DA46 F9 DQA1_13 DDBIA1_1/QSA1_1B C5 M_DQS#6
    M_DA47 D8 DQA1_14 DDBIA1_2/QSA1_2B H4 M_DQS#7
    M_DA48 E7 DQA1_15 DDBIA1_3/QSA1_3B
    M_DA49 A7 DQA1_16 L18 VRAM_ODT0
    Place close to GPU (within 25mm) DQA1_17 ADBIA0/ODTA0 VRAM_ODT0 [24]
    M_DA50 C7 K16 VRAM_ODT1
    and place componment close to each other M_DA51 F7 DQA1_18 ADBIA1/ODTA1 VRAM_ODT1 [25]
    M_DA52 A5 DQA1_19 H26 M_CLK0
    DQA1_20 CLKA0 M_CLK0 [24]
    M_DA53 E5 H25 M_CLK#0
    DQA1_21 CLKA0B M_CLK#0 [24]
    M_DA54 C3
    M_DA55 E1 DQA1_22 G9 M_CLK1
    DQA1_23 CLKA1 M_CLK1 [25]
    C M_DA56 G7 H9 M_CLK#1 C
    DQA1_24 CLKA1B M_CLK#1 [25]
    M_DA57 G6
    M_DA58 G1 DQA1_25 G22 M_RAS#0
    DQA1_26 RASA0B M_RAS#0 [24]
    M_DA59 G3 G17 M_RAS#1
    DQA1_27 RASA1B M_RAS#1 [25]
    M_DA60 J6
    M_DA61 J1 DQA1_28 G19 M_CAS#0
    DQA1_29 CASA0B M_CAS#0 [24]
    M_DA62 J3 G16 M_CAS#1
    DQA1_30 CASA1B M_CAS#1 [25]
    M_DA63 J5
    DQA1_31 H22 M_CS#0
    CSA0B_0 M_CS#0 [24]
    +MVREFDA K26 J22
    +MVREFSA J26 MVREFDA CSA0B_1
    MVREFSA G13 M_CS#1
    CSA1B_0 M_CS#1 [25]
    J25 K13
    R5162 1 DIS@ 2 120_0402_1% K25 NC#J25 CSA1B_1
    MEM_CALRP0 K20 M_CKE0
    CKEA0 M_CKE0 [24]
    J17 M_CKE1
    CKEA1 M_CKE1 [25]
    G25 M_WE#0
    WEA0B M_WE#0 [24]
    DRAM_RST L10 H10 M_WE#1
    DRAM_RST WEA1B M_WE#1 [25]
    R460 @ 1 2 51.1_0402_1% C515 @1 2 0.1U_0402_16V4Z K8
    R373 @ 1 2 51.1_0402_1% C517 @1 2 0.1U_0402_16V4Z L7 CLKTESTA
    CLKTESTB

    216-0841009 A0 SUN XT S3
    ?

    Route 50ohms single-ended/100ohm diff and keep short


    debug only, for clock observation,if not need, DNI.

    D D

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_MEM
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 23 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    MEM Lower 32-bits


    M_DA[63..0]
    [23,25] M_DA[63..0]
    M_MA[15..0]
    [23,25] M_MA[15..0]
    M_DQM[7..0]
    [23,25] M_DQM[7..0]
    M_DQS[7..0]
    [23,25] M_DQS[7..0]
    M_DQS#[7..0] +1.5VS_VGA +1.5VS_VGA
    [23,25] M_DQS#[7..0]
    A A

    1
    DIS@ DIS@
    R452 R463
    4.99K_0402_1% U1406 4.99K_0402_1% U1407

    2
    +FBA_VREF0 M8 E3 M_DA17 +FBA_VREF1 M8 E3 M_DA30
    +FBA_VREFDQ0 H1 VREFCA DQL0 F7 M_DA23 +FBA_VREFDQ1 H1 VREFCA DQL0 F7 M_DA27
    VREFDQ DQL1 F2 M_DA21 VREFDQ DQL1 F2 M_DA31
    DQL2 DQL2

    1
    1 M_MA0 N3 F8 M_DA22 1 M_MA0 N3 F8 M_DA24
    DIS@ DIS@ M_MA1 P7 A0 DQL3 H3 M_DA18 DIS@ DIS@ M_MA1 P7 A0 DQL3 H3 M_DA29
    R453 C472 M_MA2 P3 A1 DQL4 H8 M_DA19 R464 C540 M_MA2 P3 A1 DQL4 H8 M_DA26
    4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA16 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA28
    2 M_MA4 P8 A3 DQL6 H7 M_DA20 2 M_MA4 P8 A3 DQL6 H7 M_DA25

    2
    M_MA5 P2 A4 DQL7 M_MA5 P2 A4 DQL7
    M_MA6 R8 A5 M_MA6 R8 A5
    M_MA7 R2 A6 D7 M_DA5 M_MA7 R2 A6 D7 M_DA8
    M_MA8 T8 A7 DQU0 C3 M_DA3 M_MA8 T8 A7 DQU0 C3 M_DA14
    +1.5VS_VGA M_MA9 R3 A8 DQU1 C8 M_DA4 +1.5VS_VGA M_MA9 R3 A8 DQU1 C8 M_DA9
    M_MA10 L7 A9 DQU2 C2 M_DA1 M_MA10 L7 A9 DQU2 C2 M_DA12
    M_MA11 R7 A10/AP DQU3 A7 M_DA6 M_MA11 R7 A10/AP DQU3 A7 M_DA10
    A11 DQU4 A11 DQU4
    1

    1
    M_MA12 N7 A2 M_DA0 M_MA12 N7 A2 M_DA15
    DIS@ M_MA13 T3 A12 DQU5 B8 M_DA7 DIS@ M_MA13 T3 A12 DQU5 B8 M_DA11
    R466 M_MA14 T7 A13 DQU6 A3 M_DA2 R468 M_MA14 T7 A13 DQU6 A3 M_DA13
    4.99K_0402_1% M_MA15 M7 A14 DQU7 4.99K_0402_1% M_MA15 M7 A14 DQU7
    A15/BA3 +1.5VS_VGA A15/BA3 +1.5VS_VGA
    2

    2
    +FBA_VREFDQ0 +FBA_VREFDQ1
    M_BA0 M2 B2 M_BA0 M2 B2
    [23,25] M_BA0 BA0 VDD BA0 VDD
    M_BA1 N8 D9 M_BA1 N8 D9
    [23,25] M_BA1 BA1 VDD BA1 VDD
    1

    1
    1 M_BA2 M3 G7 1 M_BA2 M3 G7
    [23,25] M_BA2 BA2 VDD BA2 VDD
    DIS@ DIS@ K2 DIS@ DIS@ K2
    R465 C5248 VDD K8 R467 C5249 VDD K8
    4.99K_0402_1% 0.1U_0402_10V6K VDD N1 4.99K_0402_1% 0.1U_0402_10V6K VDD N1
    2 M_CLK0 J7 VDD N9 2 M_CLK0 J7 VDD N9
    [23] M_CLK0
    2

    2
    B
    M_CLK#0 K7 CK VDD R1 M_CLK#0 K7 CK VDD R1 B
    [23] M_CLK#0 CK VDD CK VDD
    M_CKE0 K9 R9 M_CKE0 K9 R9
    [23] M_CKE0 CKE/CKE0 VDD +1.5VS_VGA CKE/CKE0 VDD +1.5VS_VGA

    VRAM_ODT0 K1 A1 VRAM_ODT0 K1 A1
    [23] VRAM_ODT0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
    M_CS#0 L2 A8 M_CS#0 L2 A8
    [23] M_CS#0 CS/CS0 VDDQ CS/CS0 VDDQ
    M_RAS#0 J3 C1 M_RAS#0 J3 C1
    [23] M_RAS#0 RAS VDDQ RAS VDDQ
    M_CAS#0 K3 C9 M_CAS#0 K3 C9
    [23] M_CAS#0 CAS VDDQ CAS VDDQ
    M_WE#0 L3 D2 M_WE#0 L3 D2
    [23] M_WE#0 WE VDDQ WE VDDQ
    E9 E9
    VDDQ F1 VDDQ F1
    M_DQS2 F3 VDDQ H2 M_DQS3 F3 VDDQ H2
    M_DQS0 C7 DQSL VDDQ H9 M_DQS1 C7 DQSL VDDQ H9
    DQSU VDDQ DQSU VDDQ

    M_DQM2 E7 A9 M_DQM3 E7 A9
    M_DQM0 D3 DML VSS B3 M_DQM1 D3 DML VSS B3
    DMU VSS E1 DMU VSS E1
    VSS G8 VSS G8
    M_DQS#2 G3 VSS J2 M_DQS#3 G3 VSS J2
    M_DQS#0 B7 DQSL VSS J8 M_DQS#1 B7 DQSL VSS J8
    DQSU VSS M1 DQSU VSS M1
    VSS M9 VSS M9
    VSS P1 VSS P1
    T2 VSS P9 DRAM_RST# T2 VSS P9
    [23,25] DRAM_RST# RESET VSS RESET VSS
    T1 T1
    L8 VSS T9 L8 VSS T9
    ZQ/ZQ0 VSS ZQ/ZQ0 VSS
    1

    1
    J1 B1 J1 B1
    M_CLK0 DIS@ L1 NC/ODT1 VSSQ B9 DIS@ L1 NC/ODT1 VSSQ B9
    M_CLK#0 R454 J9 NC/CS1 VSSQ D1 R456 J9 NC/CS1 VSSQ D1
    243_0402_1% L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8
    NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
    2

    2
    VSSQ VSSQ
    1

    C E8 E8 C
    R5171 R5170 VSSQ F9 VSSQ F9
    40.2_0402_1% 40.2_0402_1% VSSQ G1 VSSQ G1
    DIS@ DIS@ VSSQ G9 VSSQ G9
    VSSQ VSSQ
    2

    96-BALL 96-BALL
    SDRAM DDR3 SDRAM DDR3
    K4W1G1646E-HC12_FBGA96 K4W1G1646E-HC12_FBGA96
    1 X76@ X76@
    DIS@
    C506
    0.01U_0402_16V7K
    2 +1.5VS_VGA
    +1.5VS_VGA
    U1406 side
    U1407 side
    C491

    C512

    C511

    C519

    C510

    C521

    C532

    C520

    C480

    C481

    C482

    C485

    C483

    C531

    C486

    C490

    C496

    C497

    C498

    C499

    C518

    C533

    C516

    C474

    C475

    C476

    C477

    C478

    C534

    C479
    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    10U_0603_6.3V6M

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    @

    @
    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    10U_0603_6.3V6M

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    @

    @
    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@
    D D

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_VRAM
    Size Document Number
    A Lower Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 24 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    MEM Upper 32-bits


    M_DA[63..0]
    [23,24] M_DA[63..0] +1.5VS_VGA
    M_MA[15..0] +1.5VS_VGA
    [23,24] M_MA[15..0]

    1
    M_DQM[7..0]
    [23,24] M_DQM[7..0]

    1
    DIS@
    M_DQS[7..0] DIS@ R461
    [23,24] M_DQS[7..0]
    R458 4.99K_0402_1% U1409
    M_DQS#[7..0] 4.99K_0402_1% U1408
    [23,24] M_DQS#[7..0]

    2
    A +FBA_VREF3 M8 E3 M_DA49 A

    2
    +FBA_VREF2 M8 E3 M_DA38 +FBA_VREFDQ3 H1 VREFCA DQL0 F7 M_DA53
    +FBA_VREFDQ2 H1 VREFCA DQL0 F7 M_DA36 VREFDQ DQL1 F2 M_DA51
    VREFDQ DQL1 DQL2

    1
    F2 M_DA37 1 M_MA0 N3 F8 M_DA54
    DQL2 A0 DQL3

    1
    1 M_MA0 N3 F8 M_DA35 DIS@ DIS@ M_MA1 P7 H3 M_DA50
    DIS@ DIS@ M_MA1 P7 A0 DQL3 H3 M_DA39 R462 C539 M_MA2 P3 A1 DQL4 H8 M_DA55
    R459 C473 M_MA2 P3 A1 DQL4 H8 M_DA32 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA48
    4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA34 2 M_MA4 P8 A3 DQL6 H7 M_DA52

    2
    2 M_MA4 P8 A3 DQL6 H7 M_DA33 M_MA5 P2 A4 DQL7

    2
    M_MA5 P2 A4 DQL7 M_MA6 R8 A5
    M_MA6 R8 A5 M_MA7 R2 A6 D7 M_DA60
    M_MA7 R2 A6 D7 M_DA41 M_MA8 T8 A7 DQU0 C3 M_DA58
    M_MA8 T8 A7 DQU0 C3 M_DA44 M_MA9 R3 A8 DQU1 C8 M_DA62
    M_MA9 R3 A8 DQU1 C8 M_DA43 M_MA10 L7 A9 DQU2 C2 M_DA56
    M_MA10 L7 A9 DQU2 C2 M_DA45 M_MA11 R7 A10/AP DQU3 A7 M_DA63
    M_MA11 R7 A10/AP DQU3 A7 M_DA42 M_MA12 N7 A11 DQU4 A2 M_DA57
    M_MA12 N7 A11 DQU4 A2 M_DA46 M_MA13 T3 A12 DQU5 B8 M_DA61
    M_MA13 T3 A12 DQU5 B8 M_DA40 M_MA14 T7 A13 DQU6 A3 M_DA59
    M_MA14 T7 A13 DQU6 A3 M_DA47 M_MA15 M7 A14 DQU7
    +1.5VS_VGA M_MA15 M7 A14 DQU7 +1.5VS_VGA A15/BA3 +1.5VS_VGA
    A15/BA3 +1.5VS_VGA
    M_BA0 M2 B2
    BA0 VDD
    1

    1
    M_BA0 M2 B2 M_BA1 N8 D9
    [23,24] M_BA0 BA0 VDD BA1 VDD
    DIS@ M_BA1 N8 D9 DIS@ M_BA2 M3 G7
    [23,24] M_BA1 BA1 VDD BA2 VDD
    R470 M_BA2 M3 G7 R472 K2
    [23,24] M_BA2 BA2 VDD VDD
    4.99K_0402_1% K2 4.99K_0402_1% K8
    VDD K8 VDD N1
    2

    2
    +FBA_VREFDQ2 VDD N1 +FBA_VREFDQ3 M_CLK1 J7 VDD N9
    M_CLK1 J7 VDD N9 M_CLK#1 K7 CK VDD R1
    [23] M_CLK1 CK VDD CK VDD
    M_CLK#1 K7 R1 M_CKE1 K9 R9
    [23] M_CLK#1 CK VDD CKE/CKE0 VDD
    1

    1
    M_CKE1 K9 R9 +1.5VS_VGA
    1 [23] M_CKE1 CKE/CKE0 VDD 1
    DIS@ DIS@ +1.5VS_VGA DIS@ DIS@
    R469 C5250 R471 C5251 VRAM_ODT1 K1 A1
    4.99K_0402_1% 0.1U_0402_10V6K VRAM_ODT1 K1 A1 4.99K_0402_1% 0.1U_0402_10V6K M_CS#1 L2 ODT/ODT0 VDDQ A8
    2 [23] VRAM_ODT1 ODT/ODT0 VDDQ 2 CS/CS0 VDDQ
    M_CS#1 L2 A8 M_RAS#1 J3 C1
    [23] M_CS#1
    2

    2
    B
    M_RAS#1 J3 CS/CS0 VDDQ C1 M_CAS#1 K3 RAS VDDQ C9 B
    [23] M_RAS#1 RAS VDDQ CAS VDDQ
    M_CAS#1 K3 C9 M_WE#1 L3 D2
    [23] M_CAS#1 CAS VDDQ WE VDDQ
    M_WE#1 L3 D2 E9
    [23] M_WE#1 WE VDDQ VDDQ
    E9 F1
    VDDQ F1 M_DQS6 F3 VDDQ H2
    M_DQS4 F3 VDDQ H2 M_DQS7 C7 DQSL VDDQ H9
    M_DQS5 C7 DQSL VDDQ H9 DQSU VDDQ
    DQSU VDDQ
    M_DQM6 E7 A9
    M_DQM4 E7 A9 M_DQM7 D3 DML VSS B3
    M_DQM5 D3 DML VSS B3 DMU VSS E1
    DMU VSS E1 VSS G8
    VSS G8 M_DQS#6 G3 VSS J2
    M_DQS#4 G3 VSS J2 M_DQS#7 B7 DQSL VSS J8
    M_DQS#5 B7 DQSL VSS J8 DQSU VSS M1
    DQSU VSS M1 VSS M9
    VSS M9 VSS P1
    M_CLK1 VSS P1 DRAM_RST# T2 VSS P9
    M_CLK#1 DRAM_RST# T2 VSS P9 RESET VSS T1
    [23,24] DRAM_RST# RESET VSS VSS
    T1 L8 T9
    L8 VSS T9 ZQ/ZQ0 VSS
    ZQ/ZQ0 VSS
    1

    1
    R5173 R5172 J1 B1
    NC/ODT1 VSSQ
    1

    40.2_0402_1% 40.2_0402_1% J1 B1 DIS@ L1 B9


    DIS@ DIS@ DIS@ L1 NC/ODT1 VSSQ B9 R444 J9 NC/CS1 VSSQ D1
    R410 J9 NC/CS1 VSSQ D1 243_0402_1% L9 NC/CE1 VSSQ D8
    2

    243_0402_1% L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2

    2
    NCZQ1 VSSQ E2 VSSQ E8
    2

    VSSQ E8 VSSQ F9
    VSSQ F9 VSSQ G1
    1 VSSQ VSSQ
    DIS@ G1 G9
    C507 VSSQ G9 VSSQ
    0.01U_0402_16V7K VSSQ 96-BALL
    2 96-BALL SDRAM DDR3
    C SDRAM DDR3 K4W1G1646E-HC12_FBGA96 C
    K4W1G1646E-HC12_FBGA96 X76@
    X76@

    +1.5VS_VGA +1.5VS_VGA

    U1408 side U1409 side
    C495

    C525

    C524

    C526

    C513

    C527

    C536

    C528

    C504

    C508

    C505

    C509

    C529

    C535

    C530

    C492

    C501

    C502

    C503

    C500

    C523

    C538

    C522

    C487

    C484

    C488

    C489

    C493

    C537

    C494
    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    10U_0603_6.3V6M

    10U_0603_6.3V6M
    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K
    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z

    1U_0402_6.3V4Z
    @

    @
    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@

    DIS@
    D D

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    SUN_VRAM
    Size Document Number
    A Upper Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 25 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    Touch Screen Conn eDP Panel Conn

    EMI
    R167 1 EMI@ 2 0_0402_5% +3VS

    R166 1 EMI@ 2 0_0402_5%

    1
    A R674 A
    L2402 @EMI@ 100K_0402_5%
    WCM-2012-900T_4P @
    USB20_N5 3 4 USB20_N5_R C553
    [11] USB20_N5

    2
    3 4 0.1U_0402_10V6K
    P/N:SP01000TF10 [5] EDP_AUXN 1 2 CPU_eDP_AUXN
    USB20_P5 2 1 USB20_P5_R
    [11] USB20_P5 2 1
    C552
    +3VS F10 +3VS_CRTS 0.1U_0402_10V6K
    2A_32V_0438001.WR
    PIN12 1 2 CPU_eDP_AUXP
    [5] EDP_AUXP
    W=20mils

    1
    1 2 JLVDS2 PIN10
    1 +3VALW_LOGO R673
    2 1 100K_0402_5%
    [10,9] TS_ON 2
    3 @
    4 3
    [11] USB20_N4 1

    2
    5 4 C2476
    [11] USB20_P4 5
    6 100P_0402_50V8J
    7 6 @EMI@
    [10] I2C1_SCL_TPNL 7 2
    8
    [10] I2C1_SDA_TPNL 8
    9
    [10] TS_INT# 9
    10 RF
    [10,7] TS_PRSNC# 10
    1 11
    C2111 12 GND
    0.1U_0402_10V6K GND
    @ E&T_4260K-F10N-00L
    PIN1
    2 ME@
    +3VS B+ +LEDVDD
    PIN11 F3
    3A_32V_0438003.WR W=20mils
    1 2
    1
    C2103
    0.1U_0402_10V6K
    B
    2
    1
    C2113 P/N:SP010023710 B
    4.7U_0805_25V6-K
    Place closed to JLVDS1 @
    2
    JLVDS1
    30 31
    29 30 GND 32 PIN31
    28 29 GND 33 PIN1
    27 28 GND 34
    26 27 GND 35
    INVPWM 25 26 GND 36
    [5,9] INVPWM
    BKOFF# 24 25 GND PIN33
    LCD Panel EDP_HPD 23 24
    F4 1 2 3A_32V_0438003.WR 22 23
    [34] BKOFF# +LCDVDD_CONN 22
    21
    CPU_eDP_AUXN 20 21
    20

    1
    CPU_eDP_AUXP 19 PIN34
    HPD Inversion for eDP 18 19
    18
    R2115 17
    [30,34] LOGO_LED# 17
    10K_0402_5% A LOGO RED LIGHT +3VALW R1237 1 2 750_0402_1% +3VALW_LOGO 16
    16
    +3VS F5 1 2 1A_32V_0438001.WR +3VS_CMOS 15
    2 USB20_N5_R 14 15
    USB20_P5_R 13 14
    12 13 PIN35
    DMIC & CAMERA 11 12
    For power on screen flash issue [28] DMIC_CLK 11
    10
    [28] DMIC_DATA 10
    EDP_HPD 9
    [9] EDP_HPD 9
    8
    7 8
    DMIC_CLK 6 7 PIN36
    5 6
    DMIC_DATA 1 2 EDP_C_TXN1 4 5
    [5] EDP_TXN1 C555 0.1U_0402_16V7K
    C554 1 2 EDP_C_TXP1 3 4
    [5] EDP_TXP1 0.1U_0402_16V7K
    3
    1

    LCD Panel [5] EDP_TXN0 C557 1 2 0.1U_0402_16V7K EDP_C_TXN0 2


    2 PIN32 PIN30
    C R677 C556 1 2 0.1U_0402_16V7K EDP_C_TXP0 1 C
    [5] EDP_TXP0 1
    100K_0402_5% C1138 C1140
    1

    1
    1000P_0402_50V7K
    @EMI@

    1000P_0402_50V7K
    @EMI@

    ACES_50203-03001-002
    ME@
    2

    EMI

    Camera Modual POWER CIRCUIT


    DMIC & CAMERA Touch PANEL
    module pin define module pin define
    CMOS SUSPEND 2.4mA No SIGNAL No I2C USB
    LCD POWER CIRCUIT
    +3VS_CMOS 1 VCC (3.3V) 1,2 VCC (3.3V) VCC (3.3V)
    SS table +3VS +LCDVDD +LCDVDD_CONN
    2 D- 3 Reset Reset
    L2102 EMI@
    Css Tss U2412 FBMA-L11-201209-221LMA30T_0805 W=60mils
    W=60mils 1 1 2 1
    3 D+ 4 SDA NC
    5 VOUT C2114
    0.1uF 100mS VIN EMI 4 GND_CAM 5 SCL NC
    0.1U_0402_10V6K
    10nF 10mS 2 @
    1
    1 4 GND
    1 C2109 1 C2124
    2 5 GND_DMIC 6 INT NC
    SS
    0.1U_0402_10V6K

    4.7U_0805_10V4Z

    1nF 1mS C2101 C2110


    4.7U_0805_10V4Z 0.1U_0402_10V6K 3 6 MIC_C 7 NC D-
    D
    Open or 2 @ EN D
    1mS 2 2 7 MIC_D 8 NC D+
    tied to APL3512ABI-TRG_SOT23-5 @2
    VIN 8 MIC_VCC 9,10 GND GND
    PCH_ENVDD
    [9] PCH_ENVDD

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    eDP Connector
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 26 of 46
    1 2 3 4 5
    1 2 3 4 5

    HDMI + Re-driver
    +3VS

    C32 1 2 0.1U_0402_10V6K

    C39 1 2 0.01U_0402_16V7K

    15
    21
    26
    40
    46
    2
    A U3 A

    VCC1
    VCC2
    VCC3
    VCC4
    VCC5
    VCC6
    [5] CPU_DP2_P3 C295 1 2 0.1U_0402_16V7K PCH_DPB_P3_C 39
    C294 1 2 PCH_DPB_N3_C 38 IN1p
    [5] CPU_DP2_N3 0.1U_0402_16V7K
    1 2 PCH_DPB_P2_C 42 IN1n +5VS +HDMI_VCC +5VS_HDMI
    [5] CPU_DP2_P2 C548 0.1U_0402_16V7K
    C545 1 2 PCH_DPB_N2_C 41 IN2p
    [5] CPU_DP2_N2 0.1U_0402_16V7K
    1 2 PCH_DPB_P1_C 45 IN2n 22 HDMI_CLK+_CK F5002
    [5] CPU_DP2_P1 C542 0.1U_0402_16V7K D5015
    C541 1 2 PCH_DPB_N1_C 44 IN3p OUT1p 23 HDMI_CLK-_CK 1.1A_6V_SMD1812P110TF
    [5] CPU_DP2_N1 0.1U_0402_16V7K
    1 2 PCH_DPB_P0_C 48 IN3n OUT1n 19 HDMI_TX0+_CK 2 1 1 2
    [5] CPU_DP2_P0 C544 0.1U_0402_16V7K
    C543 1 2 PCH_DPB_N0_C 47 IN4p OUT2p 20 HDMI_TX0-_CK
    [5] CPU_DP2_N0 0.1U_0402_16V7K
    IN4n OUT2n 16 HDMI_TX1+_CK
    OUT3p 17 HDMI_TX1-_CK RB491D_SC59-3 C708
    OUT3n

    1
    Internal PD 100Kohm 13 HDMI_TX2+_CK 0.1U_0402_10V6K
    OUT4p

    2
    2
    14 HDMI_TX2-_CK
    HDMI_DET 30 OUT4n R525 R523

    2
    +3VS HPD_SINK 1.5K_0402_5%
    P/N:SM070001S00 1.5K_0402_5%

    R5184 1 2 4.7K_0402_5% HDMI_DDC_EN 32

    1
    1
    HDMI_DDCBUF 34 DDC_EN
    DDCBUF HDMI_CLK+_CK 1 2 HDMI_CLK+_CONN JHDMI ME@
    25 7 1 2 HDMI_DET 19
    OE# HPDX DDI2_HDMI_HPD [9] HP_DET
    L38 WCM-2012HS-900T 18
    HDMI_CLK-_CK EMI@ 4 3 HDMI_CLK-_CONN 17 +5V
    4 3 HDMIDAT_R 16 DDC/CEC_GND
    8 HDMICLK_R 15 SDA
    SDA DDI2_CTRL_DATA [9] SCL
    HDMIDAT_R 29 9 HDMI_TX0+_CK 1 2 HDMI_TX0+_CONN 14
    SDA_SINK SCL DDI2_CTRL_CK [9] 1 2 Reserved
    HDMICLK_R 28 13
    +3VS HDMI_PIO 4 SCL_SINK L36 WCM-2012HS-900T HDMI_CLK-_CONN 12 CEC 20
    PIO CK- GND

    1
    1 HDMI_TX0-_CK EMI@ 4 3 HDMI_TX0-_CONN 11 21
    R102 1 2 4.7K_0402_5% HDMI_ASQ1 12 ASQ0 R103 4 3 HDMI_CLK+_CONN 10 CK_shield GND 22
    HDMI_APD 11 ASQ1 100K_0402_5% HDMI_TX0-_CONN 9 CK+ GND 23
    HDMI_EMI0 27 APD @ HDMI_TX1+_CK 1 2 HDMI_TX1+_CONN 8 D0- GND
    HDMI_EMI1 33 EMI0 1 2 HDMI_TX0+_CONN 7 D0_shield

    2
    EMI1 L37 WCM-2012HS-900T HDMI_TX1-_CONN 6 D0+
    B
    6 HDMI_TX1-_CK EMI@ 4 3 HDMI_TX1-_CONN 5 D1- B
    HDMI_PEQ 3 REXT 4 3 HDMI_TX1+_CONN 4 D1_shield
    PEQ D1+
    GND1
    GND2
    GND3
    GND4
    GND5
    GND6
    GND7
    GND8
    10 HDMI_TX2-_CONN 3
    HDMI_PRE 35 CEXT HDMI_TX2+_CK 1 2 HDMI_TX2+_CONN 2 D2-
    PRE 1 2 HDMI_TX2+_CONN 1 D2_shield
    D2+
    1

    1 PS8171QFN48G_QFN48_7X7 L35 WCM-2012HS-900T


    5
    18
    24
    31
    36
    37
    43
    49
    R70 C60 HDMI_TX2-_CK EMI@ 4 3 HDMI_TX2-_CONN LOTES_ABA-HDM-022-P07
    499_0402_1% 2.2U_0402_6.3V6M 4 3

    2
    EMI
    2

    DC232000B10
    TYPE A Connector

    PIN23 PIN22

    +3VS +3VS
    19
    18
    15
    R57 1 @ 2 4.7K_0402_5% HDMI_PEQ R82 1 2 4.7K_0402_5% HDMI_PRE 16
    17
    R77 1 @ 2 4.7K_0402_5% R61 1 @ 2 4.7K_0402_5%

    R74 1 @ 2 4.7K_0402_5% HDMI_PIO R84 1 @ 2 4.7K_0402_5% HDMI_EMI0

    R85 1 @ 2 4.7K_0402_5% R81 1 @ 2 4.7K_0402_5% 5


    4
    C R58 1 @ 2 4.7K_0402_5% HDMI_APD R83 1 @ 2 4.7K_0402_5% HDMI_EMI1 3 C
    2
    R60 1 @ 2 4.7K_0402_5% R71 1 @ 2 4.7K_0402_5% 1
    R92 1 2 4.7K_0402_5% HDMI_DDCBUF

    R101 1 @ 2 4.7K_0402_5% PIN20 PIN21

    PS8171 setting table PRE:


    TMDS output driver pre-emphasis level setting.
    L: No pre-emphasis (default)
    H: Low level pre-emphasis is added
    PEQ: M: High level pre-emphasis is added D35 EMI@ D39 EMI@ D33 EMI@
    TMDS inputs equalization control, HDMICLK_R 1 1 109 HDMICLK_R HDMI_CLK-_CONN 1 1 109 HDMI_CLK-_CONN HDMI_TX2+_CONN 1 1 109 HDMI_TX2+_CONN

    L: Mid level EQ (Default) HDMIDAT_R 2 2 98 HDMIDAT_R HDMI_CLK+_CONN 2 2 98 HDMI_CLK+_CONN HDMI_TX2-_CONN 2 2 98 HDMI_TX2-_CONN


    H: High level EQ EMI0/ EMI1: HDMI_DET 4 4 77 HDMI_DET HDMI_TX0-_CONN 4 4 77 HDMI_TX0-_CONN HDMI_TX1+_CONN 4 4 77 HDMI_TX1+_CONN
    M: Low level EQ EMI reduction and filter setting.
    +5VS_HDMI 5 5 66 +5VS_HDMI HDMI_TX0+_CONN 5 5 66 HDMI_TX0+_CONN HDMI_TX1-_CONN 5 5 66 HDMI_TX1-_CONN
    [1,0] = HL: No EMI reduction (default)
    3 3 3 3 3 3
    0 = HIGH: Increased rise/fall time
    PIO: MID: Increased rise/fall time, 2nd 8 8 8
    Programmable I/O setting. 1 = LOW: EMI filter setting 1 DFN2510P10E DFN2510P10E DFN2510P10E
    D
    L: HPD = HPD_SINK @ 3.3V CMOS output (default) MID: Reserved D
    H: HPD= HPD_SINK# (inverted HPD) @ 0.9V
    P/N: SC300001Y00
    APD: DDCBUF: ESD
    Automatic power down management (APD) DDC Active Buffer enable and setting.
    L: Automatic power down disable LOW: No DDC active buffer,
    H: Automatic power down enable (default) passive DDC level shifting (default)
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Title
    M: Reserved HIGH: Active DDC buffer enable, setting 1 Issued Date 2013/02/20 Deciphered Date 2012/07/01
    HDMI CONN
    MID: Active DDC buffer enable, setting 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 27 of 46
    1 2 3 4 5
    1 2 3 4 5

    Audio ALC283
    +5VDDA_CODEC +5VS +3VS +3VDD_CODEC +IOVDD_CODEC +3VS
    L39 RA5 RA6
    0_0603_5% 0_0603_5% 0_0603_5%
    1 @ 2 1 @ 2 1 @ 2

    1 1

    1
    +5VS +5VS_PVDD C1226 C1227 C1228
    600ohms @100MHz 2A 1 1
    RA3 C1231 C1230 0.1U_0402_16VK7 1U_0402_6.3V6K 0.1U_0402_16VK7
    A 0_0805_5% P/N: SM01000EE00 0.1U_0402_16VK7 4.7U_0603_6.3V6K @ A

    2
    1 @ 2 2 2
    2 2
    1 1 1 Place near Pin1 Place near Pin9
    C1234 C1235 C1240 Place near Pin26

    4.7U_0603_6.3V6K

    0.1U_0402_16VK7

    0.1U_0402_16VK7
    +3VDD_CODEC
    2 2 2 +IOVDD_CODEC
    +1.5VS_AVDD2 +1.5VS
    RA4
    0_0402_5%
    1 @ 2 Fix Hum Noise +3VS +3VLP

    (HDA 3.3V only) EXT_MIC_SLEEVE

    1
    1
    Place near Pin25 C1232 RA10 RA11

    3
    1U_0402_6.3V6K 100K_0402_5% 100K_0402_5%
    @
    2

    2
    Place near Pin40 5

    41

    46

    26

    40
    1

    9
    +MIC2-VREFO UA1

    6
    Q5407B

    DVDD-IO

    PVDD1

    PVDD2

    AVDD1

    AVDD2
    DVDD

    4
    RA12 2N7002KDWH_SOT363-6
    10K_0402_5%
    HDA_RST_AUDIO# 1 2 2
    1

    22
    LINE1-L(PORT-C-L)

    1
    RA2 RA1 21 43 SPK_L1- CA12 Q5407A

    1
    2.2K_0402_5% 2.2K_0402_5% LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPK_L2+ 1U_0402_6.3V6K
    24 SPK-OUT-L+ @
    Wide=40mils

    2
    23 LINE2-L(PORT-E-L) 45 SPK_R2+
    2

    LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPK_R1-


    EXT_MIC_RING2 17 SPK-OUT-R-
    EXT_MIC_SLEEVE 18 MIC2-L(PORT-F-L) /RING2
    MIC2-R(PORT-F-R) /SLEEVE 32 HP_L
    31 HPOUT-L(PORT-I-L) 33 HP_R
    B
    30 LINE1-VREFO-L HPOUT-R(PORT-I-R) B

    2
    LINE1-VREFO-R
    SYNC
    10
    6
    HDA_SYNC_AUDIO
    HDA_BITCLK_AUDIO
    HDA_SYNC_AUDIO [7]
    Combo Jack Conn. P/N:DC231208070
    [26] DMIC_DATA GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO [7]
    L21 1 EMI@ 2 SBY100505T-301Y-N DMIC_CLK_R 3
    [26] DMIC_CLK GPIO1/DMIC-CLK
    130206 Correct Reference
    JHP1 ME@
    RA15 1 @ 2 0_0402_5% PDB 47 5 HDA_SDOUT_AUDIO 7
    [34]
    [7]
    EC_MUTE#
    HDA_RST_AUDIO# 11 PDB
    RESETB
    ALC283-CG SDATA-OUT
    SDATA-IN
    8 HDA_SDIN0_AUDIO RA16 1 2 22_0402_5%
    HDA_SDOUT_AUDIO
    HDA_SDIN0 [7]
    [7]
    EXT_MIC_RING2 3

    48 HP_L RA42 1 2 47_0402_5% HP_OUTL 1


    PC_BEEP 12 SPDIF-OUT/GPIO2
    PCBEEP 16 +MIC2-VREFO
    PLUG_IN RA18 1 2 39.2K_0402_1% PLUG_IN_R 13 MONO-OUT 5
    14 SENSE A
    SENSE B 29
    CA23 2 1 1U_0402_6.3V6K CBP 37 MIC2-VREFO PLUG_IN 6
    CBN 35 CBP 7 LDO3 CA22 2 1 4.7U_0603_6.3V6K
    CBN LDO3-CAP 39 LDO2 CA24 2 1 4.7U_0603_6.3V6K HP_R RA43 1 2 47_0402_5% HP_OUTR 2
    +3VDD_CODEC LDO2-CAP 27 LDO1 CA25 2 1 4.7U_0603_6.3V6K EXT_MIC_SLEEVE 4
    36 LDO1-CAP
    CPVDD SINGA_2SJ3080-003111F
    28 CA27 1 2 1U_0402_6.3V6K
    20 VREF normal-open type
    1 CPVREF
    CA32 15 JDREF RA20 1 2 20K_0402_1%
    JDREF
    4.7U_0603_6.3V6K

    19 34 CPVEE
    MIC-CAP CPVEE
    2 C358 C360
    1

    1
    1000P_0402_50V7K
    EMI@

    1000P_0402_50V7K
    EMI@
    4 CA30
    49 DVSS 25 1U_0402_6.3V6K
    Thermal PAD AVSS1
    1

    1 38

    2
    CA31 RA23 AVSS2 2
    4.7U_0603_6.3V6K

    0_0402_5% ALC283-CG_MQFN48_6X6 J2404 @


    @ 2 1
    2
    2

    C 2MM C
    EMI GNDA

    Internal Speaker
    C1253
    0.1U_0402_16VK7 PC Beep EMI P/N:SP02000TS00
    EMI 1 2
    EC Beep [34] BEEP#
    Rdc < 0.05 ohms JSPK1
    HDA_RST_AUDIO# C1255 R1124 C1147 W=40mils W=40mils 6
    HDA_BITCLK_AUDIO 0.1U_0402_16VK7 1K_0402_5% 0.1U_0402_16V7K Rated Current > 2A 5 GND2
    DMIC_CLK 1 2 PC_BEEP_C_R 1 2 PC_EEP_C 1 2 PC_BEEP GND1
    PCH Beep [10] SPKR
    SPK_R1- R1356 1 EMI@ 2 0_0603_5% SPK_R1-_CONN 4
    4
    1

    3
    RA26 RA28 R1131 SPK_R2+ R1357 1 EMI@ 2 0_0603_5% SPK_R2+_CONN 2 3
    27_0402_5% 10K_0402_5% 1 2
    33_0402_5% 1
    @EMI@ @EMI@ @ SPK_L1- R1358 1 EMI@ 2 0_0603_5% SPK_L1-_CONN
    ACES_50271-0040N-001
    2

    1 SPK_L2+ R1359 1 EMI@ 2 0_0603_5% SPK_L2+_CONN ME@


    CA69 CA75 CA76
    22P_0402_50V8J 33P_0402_50V8J 22P_0402_50V8J
    @EMI@ @EMI@ @EMI@
    2
    EXT_MIC_RING2 C1135 C1136 C1137 C1139

    1
    1000P_0402_50V7K
    @EMI@

    1000P_0402_50V7K
    @EMI@

    1000P_0402_50V7K
    @EMI@

    1000P_0402_50V7K
    @EMI@
    ESD EXT_MIC_SLEEVE
    HP_OUTL
    HP_OUTR

    2
    D D
    D2402 @EMI@
    R1549 1 @EMI@ 2 0_0402_5% SPK_R1-_CONN 1 4 SPK_L1-_CONN
    I/O1 I/O3
    3

    D2417 EMI@ D2418 EMI@


    R1550 1 @EMI@ 2 0_0402_5% EMI
    3

    R1551 1 @EMI@ 2 0_0402_5% 2 5


    GND VDD
    R1561 1 @EMI@ 2 0_0402_5%
    Security Classification Compal Secret Data Compal Electronics, Inc.
    1

    SPK_R2+_CONN 3 6 SPK_L2+_CONN
    I/O2 I/O4 YSDA0502C_SOT23-3 YSDA0502C_SOT23-3 Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    1

    GND GNDA AZC099-04S.R7G_SOT23-6


    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Audio Codec ALC283
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 28 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    LAN RTL8111GUS
    +3_LAN Rising time (10%~90%) >0.5mS and <100mS

    +3VALW +3V_LAN
    370mA
    W=60mils J1203 @
    1 2
    1 2 LDO@
    A JUMP_43X39 R1240 1 2 0_0603_5% A
    W=60mils W=60mils +LAN_VDD10
    SWR@
    +LAN_REGOUT L1201 1 2 2.2UH +-5% NLC252018T-2R2J-N

    +3V_LAN
    +3V_LAN +LAN_VDDREG
    1 C1263 1 C1245 1 C1248 1 C1266 1 C1267 1 C1268

    2
    0.1U_0402_16V4Z

    .1U_0402_16V7K

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    LDO@ C1185 C1183 @ @
    R1239 1 @ 2 0_0603_5% 4.7U_0603_6.3V6K 0.1U_0402_16V4Z
    1 C5247 1 C5246 SWR@ SWR@

    1
    2 2 2 2 2 2

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    +3V_LAN

    2
    C1249 C1260
    4.7U_0603_6.3V6K 0.1U_0402_16V4Z 2 2
    SWR@ 2 SWR@

    1
    R2220 1 @ 2 10K_0402_5% LAN_WAKE#

    ( Should be place within 200 mils ) C1245 close to Pin 22 and others for Pin 3,8,30
    These caps close to U1201 : Pin 23 These caps close to U1201 : Pin 11,32 These components close to U1201 : Pin 24 1uF reserved on Pin 20

    +3VS
    C1239 R1236
    12P_0402_50V8J 0_0402_5% U1201
    XTLI_R 1 @ 2 XTLI

    2
    1
    R1238
    Y1201 C1238/ C1236 Close to Pin 17/18. 1K_0402_5%
    1
    25MHZ_10PF_7V25000014
    2

    1
    B GND LAN_MDI0+ 1 17 PCIE_PRX_C_DTX_P2 C1238 1 2 .1U_0402_16V7K PCIE_PRX_DTX_P2 ISOLATEB B
    MDIP0 HSOP PCIE_PRX_DTX_P2 [11]
    LAN_MDI0- 2 18 PCIE_PRX_C_DTX_N2 C1236 1 2 .1U_0402_16V7K PCIE_PRX_DTX_N2
    MDIN0 HSON PCIE_PRX_DTX_N2 [11]

    1
    +LAN_VDD10 3 19 PLT_RST_BUF#
    AVDD10 PERSTB PLT_RST_BUF# [19,31,33,34,8,9]
    4 LAN_MDI1+ 4 20 ISOLATEB R1242
    GND LAN_MDI1- 5 MDIP1 ISOLATEB 21 LAN_WAKE# R1244 1 @ 2 0_0402_5% 15K_0402_5%
    MDIN1 LANWAKEB EC_PME# [34]
    LAN_MDI2+ 6 22 +LAN_VDD10
    3 LAN_MDI2- 7 MDIP2 DVDD10 23 +LAN_VDDREG R1245 1 @ 2 0_0402_5%
    PCH_PCIE_WAKE# [10,9]

    2
    C1237 +LAN_VDD10 8 MDIN2 VDDREG 24 +LAN_REGOUT
    12P_0402_50V8J 3 LAN_MDI3+ 9 AVDD10 REGOUT 25 LANLINK_STATUS#
    XTLO R1243 LAN_MDI3- 10 MDIP3 LED2 26 LAN_GPIO T60 @
    0_0402_5% +3V_LAN 11 MDIN3 LED1/GPIO 27 LAN_ACTIVITY#
    1 @ 2 LAN_CLKREQ#_R 12 AVDD33 LED0 28 XTLO
    [10,8] LAN_CLKREQ# CLKREQB CKXTAL1
    13 29 XTLI R1235
    [11] PCIE_PTX_C_DRX_P2 HSIP CKXTAL2
    14 30 +LAN_VDD10 2.49K_0402_1%
    [11] PCIE_PTX_C_DRX_N2 HSIN AVDD10
    15 31 LAN_RSET 1 2
    [8] CLK_PCIE_LAN REFCLK_P RSET
    16 32 +3V_LAN
    [8] CLK_PCIE_LAN# REFCLK_N AVDD33 33
    GND

    RTL8111GUS-CG_QFN32_4X4

    R1260
    TS1202 75_0402_5%
    +V_DAC 1 24 MCT1 1 2 RJ45_GND
    TCT1 MCT1 ESD D1207 EMI@ RJ-45 Conn.
    LAN_MDI0+ 2 23 RJ45_MDO0+ LAN_MDI0- 6 3 LAN_MDI1+
    TD1+ MX1+ I/O4 I/O2 P/N:DC231211131 +3V_LAN
    C LAN_MDI0- 3 22 RJ45_MDO0- R1259 C
    TD1- MX1- 75_0402_5%
    4 21 MCT2 1 2 5 2
    TCT2 MCT2 VDD GND
    LAN_MDI1+ 5 20 RJ45_MDO1+ JRJ45 ME@
    TD2 MX2+ R1241 9 14
    LAN_MDI1- 6 19 RJ45_MDO1- R1257 LAN_MDI0+ 4 1 LAN_MDI1- 510_0402_5% Yellow LED+ GND 13
    TD2- MX2- I/O3 I/O1 GND PIN16
    75_0402_5% LAN_ACTIVITY# 2 1 10 PIN17
    7 18 MCT3 1 2 AZC099-04S.R7G_SOT23-6 Yellow LED-
    TCT3 MCT3 RJ45_MDO0+ 1
    LAN_MDI2+ 8 17 RJ45_MDO2+ PR1+
    TD3+ MX3+ 1
    @ C1270 RJ45_MDO0- 2 9
    LAN_MDI2- 9 16 RJ45_MDO2- R1258 D1208 EMI@ 220P_0402_50V7K PR1-
    TD3- MX3- 75_0402_5% LAN_MDI2- 6 3 LAN_MDI3+ RJ45_MDO1+ 3 10
    10 15 MCT4 1 2 I/O4 I/O2 2 PR2+ 1
    TCT4 MCT4 RJ45_MDO2+ 4 LANGND1 2
    LAN_MDI3+ 11 14 RJ45_MDO3+ PR3+ 3
    TD4+ MX4+ 5 2 RJ45_MDO2- 5 4
    LAN_MDI3- 12 13 RJ45_MDO3- VDD GND PR3- 5
    TD4- MX4- RJ45_MDO1- 6 6
    1 PR2-
    1 7
    C1288 350UH_IH-160 C1289 EMI@ LAN_MDI2+ 4 1 LAN_MDI3- RJ45_MDO3+ 7 8
    0.01U_0402_16V7K 100P_1206_2KV8J I/O3 I/O1 PR4+ 11
    2 AZC099-04S.R7G_SOT23-6 RJ45_MDO3- 8 12
    2 PR4- 13
    R1246 11
    510_0402_5% Green LED+
    EMI LANLINK_STATUS# 2 1 12 PIN15
    Green LED-
    PIN14
    SANTA_130456-401
    1
    @ C1265
    220P_0402_50V7K
    2
    D D

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LAN RTL8111GS
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 29 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    SATA HDD BTB Conn APS G-Sensor


    P/N:SP011208141
    +3VALW +3VS +3VLP

    JBTB2
    1 2
    C2001 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0_C 3 1 2 4
    A A
    [7] SATA_PTX_DRX_P0 3 4
    C2002 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0_C 5 6
    [7] SATA_PTX_DRX_N0 5 6
    7 8 LID_SW# [34]
    C2003 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N0_C 9 7 8 10
    [7] SATA_PRX_DTX_N0 9 10 HDD_DEVSLP0 [10]
    C2004 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P0_C 11 12
    [7] SATA_PRX_DTX_P0 11 12 5VS_HDD +5VS
    13 14
    13 14

    1
    15 16
    [34] HDD_DETECT# 15 16
    C LOGO RED LIGHT 17 18 J2401 @ R2402
    [26,34] LOGO_LED# 17 18
    19 20 2 1 100K_0402_5%
    19 20 2 1
    21 22 JUMP_43X79 U2401

    2
    23 G G 24
    G G 2 12 VOUTX R2403 1 2 56K_0402_5%
    [34] GS_SELFTEST ST Xout GS_VOUTX [34]
    ACES_50185-02041-001 10 VOUTY R2404 1 2 56K_0402_5%
    +3VS +3VS_GS Yout GS_VOUTY [34]
    ME@ 8
    Zout
    R2405 1 @ 2 0_0603_5% 14
    5VS_HDD 15 Vs
    +3VALW Vs
    1 C2411 1 C2414 1 C2415 1 C2412

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K

    0.1U_0402_10V6K
    1 C2413 1 C2410 1
    PIN1 PIN19 NC

    10U_0603_6.3V6M

    0.1U_0402_10V6K
    R2406 1 2 0_0603_5% 4
    3 NC 9
    5 COM NC 11 2 2 2 2
    1 1 1 2 2 COM NC
    C2403 C2405 C2406 PIN21 PIN23 6
    COM NC
    13
    1000P_0402_50V7K 1U_0402_6.3V6K 10U_0603_6.3V6M J2402 @ 7 16
    @ @ @ 2 1 COM NC
    2 2 2
    PIN22 PIN24 2MM LIS34ALTR_LGA16_4X4

    APS_GND APS_GND APS_GND APS_GND


    Place near by JBTB2 PIN2 PIN20

    B B

    NGFF mSATA/WWAN Conn +1.5VS


    WWAN PWR Control
    +3VS

    1
    R5003 D17 @EMI@
    10K_0402_5% UIM_VPP 1 4 UIM_RST
    CH1 CH4

    2
    WWAN_PWRON
    2 5
    Vn Vp

    1
    D
    [10] 3G_OFF#
    R731 1 @ 2 0_0402_5% 3G_OFF1# P/N:DC021209061 2
    WWAN_PWRON# [10]
    R732 1 @ 2 0_0402_5% 3G_OFF2# G UIM_DATA 3 6 UIM_CLK
    Q5001 CH2 CH3
    S
    C J6 @ +3VS 2N7002K_SOT23-3 CM1293-04SO_SOT23-6 C

    3
    JNGFF1 ME@ JUMP_43X79 SIM@
    1 2 1 2
    [10] mSATA_DETEC# Presence IND 3.3VAUX 1 2
    3 4 ESD
    5 GND 3.3VAUX 6 WWAN_PWRON
    7 GND Full-Card-PWR-Off# 8 3G_OFF1#
    [11] USB20_P7 USBD+ W_DISABLE#1
    9 10
    [11] USB20_N7 USBD- LED#1/DAS/DSS#
    11 12
    13 GND KEY 14
    15 KEY KEY 16
    17 KEY KEY 18
    19 KEY KEY 20
    21 KEY Audio0 22
    [34] WWAN_SSD WWAN/SSD IND Audio1
    23 24
    25 RESERVED Audio2 26 3G_OFF2# +UIM_PWR
    27 RESERVED Audio3 28
    29 GND UIM-RFU 30 UIM_RST
    31 PERn1/USB30Rx-/SSIC-RxN UIM-RESET 32 UIM_CLK
    33 PERp1/USB30Rx+/SSIC-RxP UIM-CLK 34 UIM_DATA
    35 GND UIM-DATA 36 +UIM_PWR +UIM_PWR +3VS
    37 PETn1/USB30Tx-/SSIC-TxN UIM-PWR 38 MSATA_DEVSLP1 D18 @EMI@
    PETp1/USB30Tx+/SSIC-TxP DEVSLP MSATA_DEVSLP1 [10]
    39 40 PCH_SMB_CLK JSIM1 W=40mils 3
    GND GNSS0 PCH_SMB_CLK [16,17,31,32,33,8]
    C2409 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 41 42 PCH_SMB_DATA R546 4 1 1
    [7] SATA_PRX_DTX_P1 PERn0/SATA-B+ GNSS1 PCH_SMB_DATA [16,17,31,32,33,8] GND VCC
    C2408 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 43 44 10K_0402_5% UIM_VPP 5 2 UIM_RST 2
    [7] SATA_PRX_DTX_N1 PERp0/SATA-B- GNSS2 VPP RST
    45 46 2 @ 1 UIM_DATA 6 3 UIM_CLK C703 C705
    GND GNSS3 I/O CLK

    1
    4.7U_0805_10V4Z
    SIM@

    0.1U_0402_16V4Z
    SIM@
    C69 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 47 48 UIM_DET 7 DAN217T146_SC59-3
    [7] SATA_PTX_DRX_N1 PETn0/SATA-A- GNSS4 DET
    C70 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 49 50
    [7] SATA_PTX_DRX_P1 PETp0/SATA-A+ PERST#
    51 52

    2
    53 GND CLKREQ# 54
    55 REFCLKN PEWake# 56 8
    57 REFCLKP NC 58 GND 9
    59 GND NC 60 GND
    [7] SM_INTRUDER# ANTCTL0 COEX3 ESD
    61 62
    63 ANTCTL1 COEX2 64
    ANTCTL2 COEX1
    1

    65 66 UIM_DET
    D D 67 ANTCTL3 SIM detect 68 D
    2 INTRUDER 69 Reset# SUSCLK 70 TAITW_PMPAT6-06GLBS7N14H0
    G 71 PEDET 3.3VAUX 72 ME@
    73 GND 3.3VAUX 74
    S
    Q2308 75 GND 3.3VAUX
    3

    2N7002K_SOT23-3 USB30 IND


    +RTCVCC 77 76
    GND1 GND2
    R1502
    1M_0402_5% JAE_SM3Z-S067U215A Security Classification Compal Secret Data Compal Electronics, Inc.
    1 2 INTRUDER Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HDD/NGFF/G-Sensor
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 30 of 46
    1 2 3 4 5
    1 2 3 4 5

    USB30 Conn

    ESD
    D2401 EMI@ +USB_VCCA
    USB20_P1_C_R 1 4
    I/O1 I/O3
    +USB_VCCA
    A
    P/N: SM070001S00 x 2 A

    2 5 1
    GND VDD

    1
    L2405 EMI@ + C2434 C1146
    WCM-2012HS-900T 1000P_0402_50V7K
    3 6 USB20_N1_C_R 3 4 USB3_RX2_RC_N 220U_6.3V_M EMI@ EMI
    [11] USB3_RX2_N

    2
    I/O2 I/O4 3 4 2
    AZC099-04S.R7G_SOT23-6
    +5VALW +USB_VCCA 2 1 USB3_RX2_RC_P
    P/N: SM070000K00 [11] USB3_RX2_P 2 1
    U34 JUSB1 ME@
    1 8 L2401 EMI@ 5 13
    2 GND VOUT 7 WCM-2012HS-900T 4 SSRX- GND 12
    3 VIN VOUT 6 USB20_N1 3 4 USB20_N1_C_R 6 GND GND 11
    VIN VOUT [11] USB20_N1 3 4 SSRX+ GND
    4 5 USB_OC0# 2 10
    [34] USB_ON# EN FLG USB_OC0# [10,11,33] D- GND
    7
    G547I2P81U_MSOP8 USB20_P1 2 1 USB20_P1_C_R 3 GND
    Low Active [11] USB20_P1 2 1 D+

    1
    D2410 EMI@ C771 C770 8
    SSTX-

    0.1U_0402_10V6K
    USB3_TX2_RC_P 1 1 109 USB3_TX2_RC_P 1000P_0402_50V7K 1
    @ C2444 L2404 EMI@ 9 VBUS

    2
    USB3_TX2_RC_N 2 2 98 USB3_TX2_RC_N 0.1U_0402_16V7K WCM-2012HS-900T SSTX+
    1 2 USB3TXDN2 3 4 USB3_TX2_RC_N SINGA_2UB4016-160101F
    [11] USB3_TX2_N 3 4
    USB3_RX2_RC_P 4 4 77 USB3_RX2_RC_P

    USB3_RX2_RC_N 5 5 66 USB3_RX2_RC_N 1 2 USB3TXDP2 2 1 USB3_TX2_RC_P


    [11] USB3_TX2_P 2 1
    3 3 C2445
    0.1U_0402_16V7K EMI
    8 P/N:DC23300AUB0
    DFN2510P10E

    P/N: SC300001Y00
    B B

    WLAN Mini Card

    Mini-Express Card for WLAN +3VS_WLAN +1.5VS +3VS_WLAN +1.5VS


    J2403 For NOAOAC
    Mini-Express Card(WLAN/BT) PN:TDB J2408 For AOAC (Default N/A)
    Need check WLAN/BT module OFF pin 1 C2452 1 C2455
    +3VS +3VS_WLAN

    10U_0603_6.3V6M

    0.1U_0402_10V6K
    JMINI1 ME@ J2403 NOAOAC@
    BELLWETHER_80161-1021 2 2 JUMP_43X79
    WLAN_WAKE# 1 2 1 2
    [34] WLAN_WAKE# 1 2 4 1 2
    C 3 C
    WLBT_OFF_5# 5 3 4 6
    [10,9] WLBT_OFF_5# 5 6 8
    WLAN_CLKREQ# 7
    [10,8] WLAN_CLKREQ# 7 8 10
    9
    11 9 10 12 +3VALW +3VS_WLAN
    [8] CLK_PCIE_WLAN# 11 12 14
    13
    [8] CLK_PCIE_WLAN 13 14 16
    15 J2408 @
    17 15 16 18 JUMP_43X79
    19 17 18 20 RF_OFF# 1 2
    19 20 22 RF_OFF# [34] 1 2
    21 PLT_RST_BUF#
    21 22 24 PLT_RST_BUF# [19,29,33,34,8,9]
    23
    [11] PCIE_PRX_DTX_N3 23 24 26
    25
    [11] PCIE_PRX_DTX_P3 25 26 28
    27
    29 27 28 30 PCH_SMB_CLK 3 1
    29 30 32 PCH_SMB_CLK [16,17,30,32,33,8]
    31 PCH_SMB_DATA
    [11] PCIE_PTX_C_DRX_N3 31 32 34 PCH_SMB_DATA [16,17,30,32,33,8]
    33
    [11] PCIE_PTX_C_DRX_P3 33 34 36
    35 Q2403 AOAC@
    +3VS_WLAN 35 36 38 USB20_N3 [11]
    37 R2411 AP2301GN-HF_SOT23-3
    USB20_P3 [11]

    2
    39 37 38 40 150K_0402_5%
    41 39 40 42 1 AOAC@ 2
    41 42 44 [34] AOAC_PWREN#
    43
    45 43 44 46
    45 46 48 1
    47 C2422
    R2432 1 2 100_0402_1% 49 47 48 50 0.01U_0402_16V7K
    [33,34] EC_TX_P80_DATA 49 50 52
    R2433 1 2 100_0402_1% 51 AOAC@
    [33,34] EC_RX_P80_CLK 51 52 2
    G1
    G2
    1

    R2470 1 2 1K_0402_5%
    [10,9] WLBT_OFF_51#
    53
    54

    R2435
    100K_0402_5%
    2

    D For EC to detect debug card  insert. D

    NEW(apply compal PN)


    Mini Card Power Rating PIN2 159SBBA32010NNN PIN52
    Power Primary Power (mA) Auxiliary Power (mA)
    Peak Normal Normal
    +3VS 1000 750
    Security Classification Compal Secret Data Compal Electronics, Inc.
    PIN53 PIN54 Issued Date 2013/02/20 Deciphered Date 2012/07/01 Title
    +3V 330 250 250 (wake enable) USB-3.0/MINI-PCIE/G-Sensor
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    +1.5VS 500 375 5 (Not wake enable) Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    PIN1 PIN51 Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 31 of 46
    1 2 3 4 5
    1 2 3 4 5

    Int KB Conn Track Point Click PAD


    KSI[0..7]
    [34] KSI[0..7]
    KSO[0..17] P/N:DC021206252 P/N:SP01001BF00
    [34] KSO[0..17]
    +5VS_TPCP +5VS
    F6
    JKB1 ME@ 1A_32V_0438001.WR
    A KSI1 1
    1
    2 1 +5VS_TPCP PN:SP01001BX00 A
    KSI7 2 1
    KSI6 3 2
    KSO9 4 3 C2508 JCP1 ME@
    KSI4 5 4 0.1U_0402_10V6K 1
    KSI5 6 5 2 R2469 1 @ 2 0_0402_5% 2 1
    6 [16,17,30,31,33,8] PCH_SMB_CLK 2
    KSO0 7 3
    KSI2 8 7 JTP1 ME@ TP_DATA2 4 3
    KSI3 9 8 TP_DATA2 1 TP_CLK2 5 4
    KSO5 10 9 TP_RESET 2 1 R2471 1 @ 2 0_0402_5% 6 5
    10 2 [16,17,30,31,33,8] PCH_SMB_DATA 6
    KSO1 11 3 7
    KSI0 12 11 4 3 CP_RESET# 8 7
    12 4 [34] CP_RESET# 8
    KSO2 13 5 TP_CLK 9
    13 5 [34] TP_CLK 9
    KSO4 14 TP_CLK2 6 TP_DATA 10
    14 6 [34] TP_DATA 10
    KSO7 15 7 TP_RESET 11 13
    15 7 [34] TP_RESET 11 GND
    KSO8 16 8 BYPASS 12 14
    +3VS 16 8 [34] BYPASS 12 GND
    KSO6 17 KB_LED_DET# 9
    17 [34] KB_LED_DET# 9
    KSO3 18 10 1 1 ACES_51522-01201-001
    KSO12 19 18 KB_LED_PWM 11 10 13 C2474 C2475
    19 [34] KB_LED_PWM 11 GND1
    1 KSO13 20 12 14 100P_0402_50V8J 100P_0402_50V8J
    F12 KSO14 21 20 12 GND2 @ @
    1A_32V_0438001.WR KSO11 22 21 2 2
    KSO10 23 22 JAE_FL10F012HA1
    KSO15 24 23
    2

    Vcc 3V for LEDs 25 24


    KB LED1 - Fn R2234 2 1 100_0402_1% KB_LED1_FN 26 25
    [34] KB_LED1 26 +5VS
    KB LED2 - F1 R2235 2 1 649_0402_1% KB_LED2_F1 27
    [34] KB_LED2 27 +3VS
    KB LED3 - F4 R2238 2 1 649_0402_1% KB_LED3_F4 28
    [34] KB_LED3 28
    Fn (S9) KSI8 29
    [34] KSI8 29
    D17 (GND) 30 R2240 2 1 10K_0402_5% KB_LED_DET# R2443 1 2 4.7K_0402_5% TP_CLK2
    KSO16 31 30 33
    KSO17 32 31 GND1 34
    PIN1 PIN12 R2444 1 2 4.7K_0402_5% TP_DATA2
    32 GND2 +5VS
    JAE_FL10F032HA2 R2447 1 @ 2 10K_0402_5% CP_RESET#
    R2226 2 1 10K_0402_5% TP_RESET PIN13 PIN14
    B Conn. B

    Pin1 Pin32 ESD TP_DATA2 ESD TP_CLK

    TP_CLK2 Pin Pin TP_DATA


    12 1

    2
    Pin33 Conn. Pin34
    D2409
    Cable D2408
    PJDLC05_SOT23-3 PJDLC05_SOT23-3
    @EMI@ @EMI@

    Pin Pin
    32 1

    1
    Cable PN: SCA00000U10 PN: SCA00000U11

    THRM Sensor Finger Print CONN.


    +3VS
    +3VS +3VS
    Fintek thermal sensor Track Point pin define Click PAD pin define

    1
    C
    NO Signal NO Signal C
    1

    placed near by VRAM R2448


    F7
    1A_32V_0438001.WR P/N:SP01000Z300
    U2407 10K_0402_5%
    @ 1 IPD DATA 1 GND

    2
    JFP1 ME@
    2 IPD RST 2 SMB CLK
    2

    1 10 EC_SMB_CK2 1
    VDD SMCLK EC_SMB_CK2 [20,34,8] 1
    REMOTE1+ 2 9 EC_SMB_DA2
    [11] USB20_P6
    2
    3 2 3 NC 3 NC
    DP1 SMDATA EC_SMB_DA2 [20,34,8] [11] USB20_N6 3 4 NC 4 DATA-TP
    1 4
    C2498 REMOTE1- 3 8 R2450 5 4
    0.1U_0402_10V6K DN1 ALERT# 0_0402_5% 6 5 5 NC 5 CLK-TP
    4 7 1 2 6
    2
    REMOTE2+
    DP2/DN3 THERM#
    @
    MAINPWON [34,39]
    7
    6 IPD CLK 6 SMB-DATA
    REMOTE2- 5 6 8 GND 7 GND 7 VDD
    DN2/DP3 GND GND
    ACES_88514-00601-071 8 VCC5 8 RESET
    F75303M_MSOP10 9 BKLITE DEC 9 CLK
    10 LED VCC5 10 DATA
    Address 1001_101xb FP module pin define 11 LED PWM 11 TP4RST
    2nd source (CDK1167) 12 LED GND 12 BYPASS
    SA000029210-->EMC1403-2-AIZL-TR No SIGNAL

    1 +3.3VCC
    REMOTE1+ BOTTOM DDR3 REMOTE1,2 (+/-) :
    Close U2407 2 D+
    1

    REMOTE1+ C Trace width/space:10/10 mil 3 D-


    1 @ C2500 2 Q2407
    2200P_0402_25V7K B MMST3904-7-F_SOT323-3 Trace length:<8" 4 GND
    2

    C2502 E
    5 GND
    3

    D D
    2200P_0402_25V7K REMOTE1-
    2 REMOTE1- 6 NC
    REMOTE2+
    1
    REMOTE2+ BOTTOM CPU D/D
    C2504
    1

    2200P_0402_25V7K C
    2 REMOTE2- @ C2505 2 Q2408 Security Classification Compal Secret Data Compal Electronics, Inc.
    2200P_0402_25V7K B MMST3904-7-F_SOT323-3 Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    2

    E
    KB/CP/TP/FP/Thermal Sensor
    3

    REMOTE2-
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 32 of 46
    1 2 3 4 5
    1 2 3 4 5

    PWRBTN Conn NFC Module Pin define


    +3VS

    1.IP/VBAT

    1
    +3VLP
    F8
    2.IP/VDDIO 1A_32V_0438001.WR

    1
    R2453
    3.IO/I2C-SDA [10,8] BNFC_IRQ#

    2
    100K_0402_5% JNFC1
    VDDIO_NFC 1
    D2412 4.I/I2C-SCL 2 1

    2
    2

    1
    RB751V-40_SOD323-2 PCH_SMB_DATA 3

    A
    ON/OFFBTN# 1 2
    ON/OFF [34] 5.G/GND D
    2 BNFC_IRQ
    [16,17,30,31,32,8]
    [16,17,30,31,32,8]
    PCH_SMB_DATA
    PCH_SMB_CLK
    PCH_SMB_CLK 4
    5
    3
    4
    A
    5
    6.O/IRQ-NFC S
    G
    Q2309
    BNFC_IRQ
    BNFC_PRSNT#
    6
    7 6
    [10] BNFC_PRSNT# 7
    ON TOP ON BOTTOM JPWR ME@
    7.O/NFC_Presence# 2N7002K_SOT23-3
    [10] BNFC_ON
    BNFC_ON 8

    3
    8
    2

    1 9
    J2407 J2405 2 1 10 9
    2 8.I/REG_UP 10

    1
    SHORT PADS SHORT PADS 3 5 11
    1

    4 3 G1 6 R7457 11
    4
    ACES_50504-0040N-001
    G2 9.OP/VDD_Ext_SE 100K_0402_5% 12
    13 GND1
    10.IP/UIM_PWR GND2

    2
    ACES_50506-01101-001
    11.IO/SWP ME@

    P/N:SP01000Z300

    P/N:SP01001BY00
    I/O Board Conn
    Connector: 0.5A / pin
    FAN Conn +3VS

    JBTB1 ME@
    Adap+

    1
    1 2
    R5138 3 1 2 4
    5 3 4 6
    100K_0402_5% [34] AOU_STATUS# 5 6
    C5204 7 8
    [36] ADP_ID_Dok 7 8
    0.1U_0402_16V7K 9 10
    [10] DOCK_PRSNT#

    2
    +3VS +5VS 1 2 DPA_AUX_N 11 9 10 12
    B [9] DDI1_AUXN [38] DOCK_CONSUMP 11 12 B
    13 14
    [34] 5VALW_DOCK_ON 15 13 14 16
    +5VALW 15 16
    1

    C5205 17 18
    R2449 F9 0.1U_0402_16V7K 19 17 18 20
    10K_0402_5% 1A_32V_0438001.WR 1 2 DPA_AUX_P 21 19 20 22
    [9] DDI1_AUXP 21 22
    @ +3VS 23 24
    23 24

    1
    25 26
    2

    R5163 27 25 26 28
    P/N:SP02000CV00 100K_0402_5% ON/OFFBTN# 29 27
    29
    28
    30
    30
    USB3_RX3_P [11]
    +5VS_FAN 31 32
    [34] AOU_CTL2 31 32 USB3_RX3_N [11]
    JFAN1 33 34 USB3.0 to Docking

    2
    W=40mils 7 ME@ [34] AOU_CTL3 35 33 34 36
    6 GND2 [10,11,31] USB_OC0# 37 35 36 38 USB3_TX3_P [11]
    5 GND1 [34] AOU_EN mDP_HPD 39 37 38 40 USB3_TX3_N [11]
    [34] EC_FAN_ID 5 39 40
    +5VS_FAN 4 41 42
    4 41 42 USB3_RX1_P_BTB [11]
    3 43 44
    [34] EC_TACH 3 +5VS [5] CPU_DP1_P0 43 44 USB3_RX1_N_BTB [11]
    2 45 46 USB3.0 to Connector
    2 [5] CPU_DP1_N0 45 46
    1 47 48
    [34] EC_FAN_PWM 1 47 48 USB3_TX1_P_BTB [11]
    DP 49 50
    [5] CPU_DP1_P1 49 50 USB3_TX1_N_BTB [11]
    1 1 ACES_50281-00501-001 51 52
    [5] CPU_DP1_N1 51 52

    1
    C2503 C2499 53 54
    53 54 USB20_P2 [11]
    1000P_0402_50V7K 1U_0402_6.3V6K R5119 DPA_AUX_N 55 56 USB2.0 to Docking
    55 56 USB20_N2 [11]

    2
    @ 1M_0402_5% DPA_AUX_P 57 58
    2 2@ 57 58 USB20_P0 [11]

    G
    @ 59 60 USB2.0 to Connector
    59 60 USB20_N0 [11]

    2
    3 1 mDP_HPD 61 62
    [9] DDI1_DP_HPD GND GND

    1
    63 64

    D
    65 GND GND 66
    Q109 R5140 GND GND
    2N7002K_SOT23-3 100K_0402_5%
    ACES_50050-06071-001

    2
    PIN5 PIN1
    C C

    TPM Debug Conn Card Reader Conn


    +3VS

    P/N:SP02000QS00
    +3VS_CRTS
    C645 1 C589
    1
    0.1U_0402_10V6K
    TPM@

    10U_0603_6.3V6M
    TPM@

    JCR1 ME@
    +3VS +3VALW 1
    +3VS 2 1
    2

    2 JDB3 ME@ 3 2
    1 4 3
    1 [11] PCIE_PRX_DTX_P4 4
    1

    2 5
    2 [11] PCIE_PRX_DTX_N4 5
    U10 TPM@ R680 3 6
    1 24 0_0402_5% LPC_FRAME# 4 3 7 6
    NC VPS 4 [8] CLK_PCIE_CR 7
    2 10 @ LPC_AD3 5 8
    NC VPS 5 [8] CLK_PCIE_CR# 8
    3 LPC_AD2 6 9
    2

    7 NC 28 LPC_PD# LPC_AD1 7 6 10 9
    PP LPCPD# 7 [11] PCIE_PTX_C_DRX_P4 10
    27 SERIRQ LPC_AD0 8 11
    SERIRQ SERIRQ [10,34] 8 [11] PCIE_PTX_C_DRX_N4 11
    6 26 LPC_AD0 PLT_RST_BUF# 9 12
    NC LAD0 LPC_AD0 [34,8] 9 12
    9 23 LPC_AD1 10 13
    VNC LAD1 LPC_AD1 [34,8] [8] CLK_PCI_DB 10 [10,8] CR_CLKREQ# 13
    22 LPC_FRAME# [31,34] EC_TX_P80_DATA 11 13 PLT_RST_BUF# 14
    LFRAME# LPC_FRAME# [34,8] 11 GND 14
    4 20 LPC_AD2 12 14
    GND LAD2 LPC_AD2 [34,8] [31,34] EC_RX_P80_CLK 12 GND
    11 17 LPC_AD3 0110 Add decoupling CAP (68pF) by RF. 15
    GND LAD3 LPC_AD3 [34,8] GND
    18 16
    GND 25 ACES_85201-1205N GND
    D
    5 NC 21 CLK_PCI_TPM CVILU_CI1114M1HR0-LF D
    NC LCLK CLK_PCI_TPM [8]
    8 19
    12 VNC NC 15
    13 NC NC
    14 NC 16 PLT_RST_BUF#
    NC LRESET# PLT_RST_BUF# [19,29,31,34,8,9]
    ST33ZP24AR28PVSP_TSSOP28

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PBTN/FAN/TPM/RTC/IO Board
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 33 of 46
    1 2 3 4 5
    1 2 3 4 5

    EC KB9012 Vcc 3.3V +/- 5%


    R2210 100K +/- 1%
    Board ID R2213 VAD_BID min V AD_BID typ VAD_BID max EC AD
    +3VLP +3VALW_EC +EC_AVCC

    KB9012 A4 v.22 SDV 0K +/- 5% 0.000V 0.300V 0x00 - 0x0B


    R313 L2201
    0_0603_5% 0_0603_5% 12K +/- 1%
    1 @ 2 1 @ 2
    FVT 0.347V 0.354V 0.360V 0x0C - 0x1C
    GPIO W/O internal-PH: SIT 15K +/- 1% 0.423V 0.430V 0.438V 0x1D - 0x26
    1 1
    C2202 C2201 20K +/- 1%
    1. GPIO44 6. GPIO4B 1 C2203 1 C2204 1 C2205 1 C2206 1 C2208 1 C2207 1000P_0402_50V7K 0.1U_0402_16V4Z
    SVT 0.541V 0.550V 0.559V 0x27 - 0x30

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    1000P_0402_50V7K

    1000P_0402_50V7K
    @ @ @
    A 2. GPIO45 7. GPIO4E 2 2 A
    ECAGND +3VALW_EC
    3. GPIO46 8. GPIO4F 2 2 2 2 2 2

    4. GPIO47 9. GPIO50

    1
    R2210
    5. GPIO4A 10.GPIO5B 100K_0402_1%

    111
    125
    22
    33
    96

    67
    9
    U2201 SD028000080 - S RES 1/16W O +-5% 0402

    2
    BRDID

    EC_VDD0
    EC_VDD/VCC
    EC_VDD/VCC
    EC_VDD/VCC
    EC_VDD/VCC

    EC_VDD/VCC

    EC_VDD/AVCC
    SD028120280 - S RES 1/16W 12K +-5% 0402

    1
    R2213
    SD028150280 - S RES 1/16W 15K +-5% 0402
    [30] HDD_DETECT#
    HDD_DETECT# 1
    GATEA20/GPIO00 GPIO0F
    21 LOGO_LED#
    LOGO_LED# [26,30]
    20K_0402_5% SD028200280 - S RES 1/16W 20K +-5% 0402
    KB_RST# 2 23 BEEP#
    [10] KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# [28]
    SERIRQ 3 26 WLAN_WAKE#
    [10,33] SERIRQ WLAN_WAKE# [31]

    2
    LPC_FRAME# 4 SERIRQ GPIO12 27 ACOFF
    [33,8] LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF [38]
    LPC_AD3 5
    [33,8] LPC_AD3 LPC_AD3
    LPC_AD2 7 PWM Output
    +3VALW_EC [33,8] LPC_AD2 LPC_AD2
    LPC_AD1 8 63 BATT_TEMP
    [33,8] LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP [37]
    LPC_AD0 10 LPC & MISC 64 GS_VOUTX
    [33,8] LPC_AD0 LPC_AD0 GPIO39 GS_VOUTX [30]
    65 ADP_I
    ADP_I/GPIO3A ADP_I [37,38]
    R2205 CK_LPC_KBC 12 AD Input 66 GS_VOUTY
    [8] CK_LPC_KBC CLK_PCI_EC GPIO3B GS_VOUTY [30]
    330K_0402_5% PLT_RST_BUF# 13 75 BRDID
    [19,29,31,33,8,9] PLT_RST_BUF# PCIRST#/GPIO05 GPIO42
    1 2 EC_RST# 37 76 CP_RESET#
    EC_RST# IMON/GPIO43 CP_RESET# [32]
    EC_SCI# 20
    [10] EC_SCI# EC_SCII#/GPIO0E
    ADP_65W 38
    [37,38] ADP_65W GPIO1D
    1 68 AOU_CTL2
    DAC_BRIG/GPIO3C AOU_CTL2 [33]
    C2210 70 EC_FAN_ID
    EN_DFAN1/GPIO3D EC_FAN_ID [33]
    0.1U_0402_10V6K DA Output 71 AOU_CTL3
    IREF/GPIO3E AOU_CTL3 [33]
    KSI0 55 72
    2 KSI0/GPIO30 CHGVADJ/GPIO3F AOAC_PWREN# [31]
    KSI1 56
    KSI2 57 KSI1/GPIO31
    KSI3 58 KSI2/GPIO32 83 EC_MUTE#
    KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# [28]
    KSI4 59 84 USB_ON#
    B KSI4/GPIO34 USB_EN#/GPIO4B USB_ON# [31] B
    KSI5 60 85 KB_LED_DET#
    KSI5/GPIO35 CAP_INT#/GPIO4C KB_LED_DET# [32]
    KSI6 61 PS2 Interface 86 DGPU_PWROK
    KSI6/GPIO36 EAPD/GPIO4D DGPU_PWROK [42]
    KSI7 62 87 TP_CLK
    KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK [32]
    KSO0 39 88 TP_DATA
    KSO[0..17] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA [32]
    If +3VS leakage on S3 mode KSO1 40
    [32] KSO[0..17] KSO1/GPIO21
    +3VALW_EC Please check EC_MUTE# KSO2 41
    KSI[0..8] KSO3 42 KSO2/GPIO22 97 PTC_PROTECT
    [32] KSI[0..8] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 PTC_PROTECT [37]
    KSO4 43 98 VGA_AC_DET
    KSO4/GPIO24 WOL_EN/GPXIOA01 VGA_AC_DET [20,42]
    KSO5 44 99 ME_FLASH
    R2225 1 2 100K_0402_5% WWAN_SSD KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 NTC_V
    ME_FLASH [7]
    +3VALW_EC
    KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 NTC_V [37]
    KSO7/GPIO27 SPI Device Interface
    R2202 1 @ 2 10K_0402_5% EC_MUTE# KSO8 47
    KSO8/GPIO28

    1
    KSO9 48 119 WWAN_SSD
    KSO9/GPIO29 SPIDI/GPIO5B WWAN_SSD [30]
    R2218 1 @ 2 10K_0402_5% Turbo_V KSO10 49 120 PM_SLP_A# R2229
    KSO10/GPIO2A SPIDO/GPIO5C PM_SLP_A# [35,41,9]
    KSO11 50 SPI Flash ROM 126 BYPASS 100K_0402_5%
    KSO11/GPIO2B SPICLK/GPIO58 BYPASS [32]
    R2219 1 @ 2 10K_0402_5% NTC_V KSO12 51 128 KB_LED2
    KSO12/GPIO2C SPICS#/GPIO5A KB_LED2 [32]
    KSO13 52

    2
    R2204 1 2 100K_0402_5% HDD_DETECT# KSO14 53 KSO13/GPIO2D ADP_65W
    KSO15 54 KSO14/GPIO2E 73 ENBKL
    KSO15/GPIO2F ENBKL/GPIO40 ENBKL [9]

    1
    R2203 1 2 100K_0402_5% LID_SW# KSO16 81 74 ADP_ID
    KSO16/GPIO48 PECI_KB930/GPIO41 ADP_ID [36]
    KSO17 82 89 KSI8 R2230 @
    R2457 1 2 10K_0402_5% KSI8 KSO17/GPIO49 FSTCHG/GPIO50 90 AOU_EN 100K_0402_5%
    BATT_CHG_LED#/GPIO52 AOU_EN [33]
    91 AOU_STATUS#
    CAPS_LED#/GPIO53 AOU_STATUS# [33]
    EC_SMB_CK1 77 GPIO 92 PCH_APWROK
    [37,38] EC_SMB_CK1 PCH_APWROK [9]

    2
    EC_SMB_DA1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93 VCCST_PG_PWR
    [37,38] EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 VCCST_PG_PWR [41]
    EC_SMB_CK2 79 SM Bus 95 SYSON
    [20,32,8] EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON [40]
    EC_SMB_DA2 80 121 SYS_PWROK
    [20,32,8] EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 SYS_PWROK [9]
    +3VS +3VALW_EC 127 PM_SLP_S4#
    PM_SLP_S4#/GPIO59 PM_SLP_S4# [9]

    RP36 PM_SLP_S3# 6 100 EC_RSMRST# +5VALW


    [9] PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# [9]
    5 4 EC_SMB_CK1 PM_SLP_S5# 14 101 EC_WAKE#
    [9] PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_WAKE# [10]
    6 3 EC_SMB_DA1 EC_SMI# 15 102 Turbo_V
    [7] EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 Turbo_V [37,38]
    7 2 EC_SMB_CK2 KB_LED3 16 103 H_PROCHOT#_EC USB_ON# R2209 1 2 10K_0402_5%
    [32] KB_LED3 GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC [37]
    C 8 1 EC_SMB_DA2 TP_RESET 17 104 MAINPWON C
    [32] TP_RESET GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON [32,39]
    VCCST_PG_EC 18 GPO 105 BKOFF#
    [12] VCCST_PG_EC GPIO0C BKOFF#/GPXIOA08 BKOFF# [26] +5VS
    2.2K_0804_8P4R_5% RF_OFF# 19 GPIO 106 PBTN_OUT#
    [31] RF_OFF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# [9]
    KB_LED_PWM 25 107 EN_5V
    [32] KB_LED_PWM EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 EN_5V [39]
    R2456 1 2 10K_0402_5% EC_SMI# EC_TACH 28 108 ADP_90W
    [33] EC_TACH FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 ADP_90W [37,38]
    EC_PME# 29 TP_CLK R2211 1 2 4.7K_0402_5%
    [29] EC_PME# EC_PME#/GPIO15
    R2452 1 @ 2 10K_0402_5% EC_FAN_PWM EC_TX_P80_DATA 30
    [31,33] EC_TX_P80_DATA EC_TX/GPIO16
    EC_RX_P80_CLK 31 110 ACIN TP_DATA R2212 1 2 4.7K_0402_5%
    [31,33] EC_RX_P80_CLK EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN [36,38,9]
    R2451 1 2 10K_0402_5% EC_TACH PCH_PWROK 32 112 EN_3V
    [9] PCH_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EN_3V [39]
    EC_FAN_PWM 34 114 ON/OFF
    [33] EC_FAN_PWM SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF [33]
    GS_SELFTEST 36 GPI 115 LID_SW# ADP_90W R2228 1 @ 2 100K_0402_5%
    [30] GS_SELFTEST NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# [30]
    116 SUSP#
    SUSP#/GPXIOD05 SUSP# [35,40,41,42,45]
    117 KB_LED1 BATT_TEMP C2211 1 @ 2 100P_0402_50V8J
    GPXIOD06 KB_LED1 [32]
    C2220 @ 1 2 100P_0402_50V8J EC_SMB_CK2 118 EC_PECI 1 2
    [33] 5VALW_DOCK_ON PECI_KB9012/GPXIOD07 H_PECI [5]
    AGND/AGND
    122 R2245 43_0402_1% ACIN C2212 1 @ 2 100P_0402_50V8J
    C2221 @ 1 2 100P_0402_50V8J EC_SMB_DA2 R2221 1 @ 2 0_0402_5% SUSCLK_R 123 XCLKI/GPIO5D 124 +V18R
    GND/GND
    GND/GND
    GND/GND
    GND/GND

    [9] SUSCLK XCLKO/GPIO5E V18R


    1
    GND0

    C2214
    4.7U_0805_10V4Z
    1

    KB9012QF A4 LQFP 128P_14X14 2


    1
    11
    24
    35
    94
    113

    69

    R2223 C2213
    100K_0402_5% 20P_0402_50V8
    R2239 1 2 10K_0402_5% PCH_PWROK @ @ ECAGND
    2 ECAGND [37]
    PROCHOT
    2

    R2217 1 2 100K_0402_5% ENBKL R2233


    1 @ 2 0_0402_5%
    L2202 0_0603_5% VR_HOT# 1 @ 2
    [43] VR_HOT# H_PROCHOT# [36,37,38,5]

    1
    D Q2202
    H_PROCHOT#_EC 2 2N7002K_SOT23-3
    G
    S
    D D

    3
    2 SW4 1
    SN111005800
    by ME drawing
    PWR_RESET 4 3
    [39] PWR_RESET SKRBAAE010_4P
    Security Classification Compal Secret Data
    Title
    Compal Electronics, Inc.
    GND
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    EC ENE-KB9012
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJSheet 34 of 46
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014
    1 2 3 4 5
    1 2 3 4 5

    DC/DC I/F
    +5VALW TO +5VS
    PJ703 Short => NOSBA
    +3VALW TO +3VS PJ703 Open => SBA
    Rds(on) VGS=4.5V,ID=8.5A,7mOhm(Max)
    +5VS_LOAD +5VS
    +1.05VM +1.05VS
    J510 @
    1 2 130322 Modify to 1uF after tested.
    1 2 J703 @ 130322 Modify to 0ohm
    A JUMP_43X79 1 C2307 1 C2308 1 2 A
    1 2

    10U_0805_10V4Z

    10U_0603_6.3V6M
    @
    JUMP_43X79
    +3VALW +5VALW C5258

    1
    2 2

    10U_0603_6.3V6M
    SBA@
    8 1
    7 2
    U2301 VL +5VALW +5VALW 6 3

    2
    1 14 5
    R2313 2 VIN1 VOUT1 13
    VIN1 VOUT1

    1
    W=10mils 200K_0402_5% Q407 C5256 C5255

    1
    10U_0603_6.3V6M
    @

    1U_0402_6.3V6K
    SBA@
    1 2 5VS_GATE 3 12 C2326 1 @ 2 1U_0402_6.3V6K R2304 TPC8A03-H_SO8
    [34,40,41,42,45] SUSP# ON1 CT1 100K_0402_5% SBA@
    R2318 4 11 SBA@

    2
    VBIAS GND

    1
    470K_0402_5%

    2
    1 2 3VS_GATE 5 10 C2325 1 @ 2 1U_0402_6.3V6K R2309 R2305 R5103 2 @ 1 0_0402_5%
    ON2 CT2 100K_0402_5% 100K_0402_5%

    3
    6 9 SBA@ @
    C2322 C2309 7 VIN2 VOUT2 8 1

    2
    VIN2 VOUT2
    1

    1
    0.01U_0402_16V7K

    0.01U_0402_16V7K
    C5257
    15 SUSP 5 Q5304B 0.1U_0402_10V6K
    GPAD 2N7002KDWH_SOT363-6 SBA@
    L
    2

    6
    TPS22966DPUR_SON14_2X3 SBA@ 2

    4
    +3VSLOAD +3VS
    SUSP# 2 Q5304A
    2N7002KDWH_SOT363-6
    +3VALW +5VALW J511 @ SBA@

    1
    1
    1 2
    1 2 R2307
    JUMP_43X79 1 C2324 1 C2323 10K_0402_5%

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    @ @
    1 C2316 1 C2318 1 C2306 1 C2305

    2
    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    @ @
    2 2

    B 2 2 2 2 B

    +3VALW TO +3VALW(PCH AUX Power)

    +3VALW +3VALW_PCH

    J2301
    40mil 1 2
    40mil
    1 2

    JUMP_43X79
    @

    C C

    +3VALW TO +3VM (SBA)

    +3VALW +3VM +3VS

    +0.675VS
    R174 1NOSBA@ 2 0_0402_5%
    +5VALW VL

    1
    S

    3 1 R2314
    D

    22_0603_5%
    1

    @
    R143 R142 Q119 C5253 R351
    G
    2

    1 2
    1
    10U_0603_6.3V6M

    SBA@

    47K_0402_1% 47K_0402_1% SI2301BDS-T1-E3_SOT23-3 390_0402_5%


    @ SBA@ SBA@ @
    R5102 D
    2

    10K_0402_5% 2 SUSP
    PM_SLP_A 1 SBA@ 2 G
    3

    S
    Q2307

    3
    6

    1 C546 2N7002K_SOT23-3
    0.1U_0402_10V6K

    SBA@

    5 PM_SLP_A @

    2 Q2418A Q2418B
    [34,41,9] PM_SLP_A#
    4

    D 2 D
    2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6
    SBA@ SBA@
    1

    For Intel S3 Power Reduction

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2013/02/20 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DC Interface
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom D
    4019OJ
    sualaptop365.edu.vn
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Friday, February 28, 2014 Sheet 35 of 46
    1 2 3 4 5
    5 4 3 2 1

    VIN
    1 2 ADP_ID
    Adap+

    1000P_0603_50V7

    100P_0603_50V8

    100P_0603_50V8

    1000P_0603_50V7
    PL101
    AC Adapter 45W 65W 90W

    1
    PC101

    PC102

    PC103

    PC104
    SMB3025500YA_2P
    R(ohm) 118 287 549
    ADP_ID(V) 0.449 0.913 1.395

    2
    [33] ADP_ID_Dok
    D
    Detection <=0.663, <=1.134, <=1.618 D

    -Voltage(V) >0.234 >0.693 >1.172


    PR101
    @
    1 2

    0_0402_5% 11/28-PC107 must be pop


    PR106
    750_0402_1%

    @ 680P_0603_50V7K
    1 2
    +3VALW ADP_ID [34]

    .1U_0402_16V7K
    A/D

    1
    PC107

    PC108
    2

    C C

    +5VS BATT_TEMP_1 [37]

    +3VALW

    2
    [34,37,38,5] H_PROCHOT#

    47K_0402_1%
    +CHGRTC

    PR119

    10K_0402_1%
    @ PU101A

    2N7002KDW-2N_SOT363-6

    PR117
    PR111 AS393MTR-E1 SO 8P OP

    8
    1K_0603_5% PR112 @
    1 2 1 2 @ PC109 3 1 2

    P
    +

    PQ102A
    2 2 1 1 PR120

    1
    PD103 0_0603_5% O 2 0_0402_5%
    -

    G
    1.5M_0402_5%
    2 @ 0.022U_0402_16V7K

    1N4148WS-7-F_SOD323-2
    1

    100K_0402_1%
    100P_0402_50V8J
    +RTCBATT 1

    1
    PR115
    3

    PR116
    JRTC1 @

    PC111
    1 2 1

    2
    1

    PD105
    S SCH DIO BAS40CW SOT-323 2 @

    1
    1K_0402_5% 3 2
    B B
    PR113 4 GND +5VS
    GND

    ACES_50271-0020N-001

    H_PROCHOT#
    @

    2
    +3VLP

    47K_0402_1%
    PR118
    2N7002KDW-2N_SOT363-6
    3

    8
    PC110 5

    P
    +

    PQ102B
    5 2 1 7
    O 6 ACIN [34,38,9]
    -

    G
    0.022U_0402_16V7K

    1N4148WS-7-F_SOD323-2
    4

    1.5M_0402_5%
    PU101B

    4
    AS393MTR-E1 SO 8P OP

    PR114
    PD104

    1
    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-DCIN
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    sualaptop365.edu.vn
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 36 of 46
    5 4 3 2 1
    5 4 3 2 1

    JBATT1
    65/90 W: 8.66 K
    1 45 W: 3.76 K
    1 2 [34,38] ADP_I
    2 PH201 under CPU botten side :

    1
    3
    3 4 PD201
    4 5 EC_SMDA
    5 CPU thermal protection at 93 degree C

    3.74K_0402_1%
    6 EC_SMCA @
    6

    1
    7
    7

    PR206
    8

    3
    8

    1
    9
    9

    100_0402_1%
    10
    GND

    1
    11 1 2
    BATT_TEMP [34]

    2
    GND

    100_0402_1%
    PR208 +EC_AVCC

    PR201
    D 10K_0402_5% D

    2
    ACES_51202-00901-001 Turbo_V [34,38]

    2.94K_0402_1%
    PR202
    1 2 +3VLP
    2
    PR212 1.2V
    @

    1
    6.49K_0402_1%

    PR204
    BATT_TEMP_1 [36]

    7.87K_0402_1%
    2N7002KDW-2N_SOT363-6
    PR207

    2
    10K_0402_1%
    EC_SMB_DA1 [34,38]

    2
    PR220
    NTC_V [34]

    2N7002KDW-2N_SOT363-6
    EC_SMB_CK1 [34,38]

    PQ202A

    1
    2

    1
    VMB2 VMB VMB1 PR233 [34,38] ADP_90W

    2
    10K_0402_1%

    10K_0402_1%
    PQ202B
    PF201 PL201 0.01_1206_1% PH201

    PR210

    PR211
    12A_65V_451012MRL SMB3025500YA_2P
    1 2 1 2 1 4 5 100K_0402_1%_TSM0B104F4251RZ
    BATT+ [34,38] ADP_65W

    2
    1000P_0603_50V7

    0.01U_0603_25V7K
    2 3

    1
    @

    DCN
    DCP
    PC201

    PC202
    2

    2
    VL

    [34,37] ECAGND
    1

    PR221 [34,37] ECAGND [34] H_PROCHOT#_EC


    0_0402_5%
    C C
    @
    2

    PU201
    1 8
    VCC TMSNS1 PH201: Temp. Rman. Rnor. Rmin. (Kohm)
    PC207 2 7
    GND RHYST1
    2

    3 6 TMSNS2
    0.1U_0603_25V7K OT1 TMSNS2 @
    PR235
    93 7.3419 7.0792 6.8253
    1

    4 5
    OT2 RHYST2 2 1
    [34] PTC_PROTECT G718TM1U_SOT23-8 [37] VCP
    0_0402_5%
    @ PR240 PR237
    @PR237
    @

    PU202 150K_0402_1% 100K_0402_1%


    1 6 2 1VCP_1 2 1
    REF Out

    2 5 DCN
    GND IN-

    VMB1 3 4 DCP
    V+ IN+
    1
    0.1U_0603_25V7K

    INA199A1DCKR_SC70-6~D
    PC209

    B B
    +5VS

    +5VS

    221K_0402_1%
    2
    H_PROCHOT# [34,36,38,5]

    PR244

    2
    +3VS
    @ PR234
    PR236 0_0402_5%

    1
    1.8M_0402_1%
    1 2

    1
    1
    PR241
    Posestor 100K_0402_1% PR243

    8
    20K_0402_1% PU203A

    1
    1 2 3 D

    P
    PR230

    2
    PR224 PR225 PR226 [37] VCP + 1 2
    1 2 1 2 1 2 TMSNS21 2 2 O G
    VL -

    G
    S

    3
    220P_0402_50V8J
    1K_0402_50% 316K_0402_1% LM393DR_SO8~D PQ205

    4
    1K_0402_50% 1K_0402_50%

    316K_0402_1%
    DMN65D8LW-7_SOT323-3~D

    1
    100P_0402_50V8J

    PC212
    1
    PR229 PR231 PR232 +3VLP

    1
    PR239

    PC210
    1 2 1 2 1 2

    2
    1

    1K_0402_50% 1K_0402_50% 1K_0402_50%

    2
    2
    100K_0402_1%
    PR223

    PR222 2
    100K_0402_1%
    2

    Battery Protection Circuit for Turbo Mode


    1

    A A
    MOS_OTP [39]

    MOS_OTP:
    PQ203 Default:High
    2N7002KW_SOT323-3
    Active :Low Security Classification Compal Secret Data Compal Electronics, Inc.
    1

    D
    PTC_PROTECT2 Title
    G PTC_PROTECT:
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    S PWR-BATTERY CONN/OTP
    3

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Default:Low AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    sualaptop365.edu.vn DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    Active :High MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 37 of 46
    5 4 3 2 1
    5 4 3 2 1

    DCR 換成 15m ohm,CP,Throttling....need redefine with EC B+ PQ302


    AO4407A_SO8
    P3 1 8
    PQ301 P2 PQ304
    SH00000AA00 2 7
    AO4407A_SO8 AO4423L SO8 3 6
    8 1 1 8 PR302 5
    VIN 7 2 2 7 1UH_PCMB061H-1R0MS_7A_20% 0.015_1206_1%
    6 3 3 6 PL301 10/19 : reserve for RF demand

    4
    5 5 1 2 1 4
    BATT+

    10U_0805_25V6K

    10U_0805_25V6K
    2 3

    2200P_0402_50V7K
    10U_0805_25V6K

    10U_0805_25V6K
    68P_0402_50V8J

    4.7U_0805_25V6-K
    D D

    2
    PQ306 ACP_1 ACN_1
    PR311 VIN

    2
    47K_0402_5%

    PC305

    @ PC302
    1 2
    1

    200K_0402_1%

    15_0402_1%

    15_0402_1%

    @ PC329

    PC306

    PC307

    @ PC308

    PC309
    0.1U_0603_25V7K
    2 1

    1
    1

    1
    PR301

    DTA144EUA_SC70-3 PC304

    1
    3

    PC301

    PR305

    PR317

    PR322
    5600P_0402_25V7K
    200K_0402_1%
    V1
    2

    47K_0402_5%
    2

    2
    PR329

    PR308
    11/20 PC305 must be pop 1 2
    DOCK_CONSUMP [33]
    1

    2
    10_0402_1% PR310
    1

    1
    220K_0402_1%
    P2-1 ACN

    1
    V1 2 12/04 Lenovo demand

    1
    PQ307 ACP

    DTC115EUA_SC70-3 PC310 PC311


    2
    3

    1 2 1 2

    0.039U_0603_25V7
    PQ311
    6

    1
    PQ309 D
    1

    1
    150K_0402_1%

    PC313
    0.1U_0402_25V6 0.01U_0402_25V7K DTC115EUA_SC70-3 2 PACIN_2

    3
    PR313

    PQ310A ACPRN G

    2N7002W-T/R7_SOT323-3
    2 2N7002KDW-2N_SOT363-6 1 2 P2 S

    3
    PC312
    1

    VIN 0.1U_0402_25V6

    C C
    392K_0402_1%
    1
    P2-2

    10_1206_5%
    PACIN_2

    5
    6
    7
    8
    PR316
    2N7002KDW-2N_SOT363-6

    1
    [34,37] ADP_I

    PQ313
    AO4466L_SO8
    PR319
    3
    PQ310B

    ACOK

    CMPIN

    CMPOUT

    ACP

    ACN
    PR320
    PR318 PR335
    2

    47K_0402_1% 21

    1
    PACIN 1 2 5 1 2 6 TP 1 2 4
    ACDET PC315
    1

    59K_0402_1% PC316 20 1 2 0_0603_5%


    4

    PC314 1 2 7 VCC PL302


    PR333 IOUT 10UH +-20% PCMB104T-100MS 6A PR321
    0.1U_0603_25V7K
    2

    3
    2
    1
    10K_0603_1% 100P_0603_50V8 19 1U_0603_25V6K 0.01_1206_1%
    1 2 [34,37] EC_SMB_DA1 8 PU301 PHASE
    [34] ACOFF SDA
    12/04 added 10K ohm BQ24737RGRR_VQFN20_3P5X3P5 LX_CHG 1 2 1
    CHG 4
    2

    18 DH_CHG
    HIDRV
    1

    5
    6
    7
    8
    [34,37] EC_SMB_CK1 9 2 3
    SCL SA000051W00

    1
    PQ314
    AO4466L_SO8

    4.7_1206_5%
    PD301 PR323 PC317 @

    PR324
    1SS355_SOD323-2 PR325 2.2_0603_5% 0.047U_0603_25V7M

    10U_0805_25V6K

    10U_0805_25V6K
    1 2 10 17 BST_CHG 1 2 2 1 SRP SRN
    1

    ILIM BTST
    1

    16251_SN
    2 +3VALW 316K_0402_1%
    PD302
    PR326 4

    LODRV

    1
    PC318

    PC320
    VIN 1 2ACOFF-1 PQ318 158K_0402_1% 16 2 1

    GND
    SRN

    SRP
    REGN

    BM
    DTC115EUA_SC70-3
    PD303
    3

    2
    S DIO GLZ22B LL-34 RB751V-40_SOD323-2

    680P_0603_50V7K
    11

    1 12

    1 13

    14

    15

    3
    2
    1
    1

    PC319
    2
    10_0402_5%
    6.8_0402_5%
    PC321 BQ24727VDD @

    PR328
    1U_0603_25V6K

    2
    PR327

    B B
    2

    PC322 DL_CHG
    2

    1 2
    Adapter Protection Circuit for Turbo Mode
    0.1U_0402_25V6

    Turbo_V [34,37]
    +5VS
    0.1U_0402_25V6
    2

    PC323

    0.1U_0402_25V6
    1

    PC324
    @ PR346
    0_0402_5%
    2

    @
    2

    BQ24727VDD
    1

    100P_0402_50V8J

    +5VS
    0.01U_0402_25V7K

    PR343
    3.74K_0402_1% PR332
    1

    1
    PC327

    PC325

    ADP_I 1 2 10K_0402_1%

    1
    221K_0402_1%

    1 2 ACIN [34,36,9]
    2

    H_PROCHOT# [34,36,37,5]
    PR342

    @ PR331
    2

    2
    2.94K_0402_1%

    7.87K_0402_1%

    PR330 10K_0402_1%
    2

    +3VS @ PR336 47K_0402_1%


    PR344

    PR345
    2N7002KDW-2N_SOT363-6

    2N7002KDW-2N_SOT363-6

    PR337 0_0402_5% PACIN

    2
    1.8M_0402_1%
    1
    150K_0402_1%

    @ @ 1 2
    1
    1

    1
    6 1

    3 1

    PR339

    PR341
    8

    1
    20K_0402_1% PU203B D PR334
    1

    D
    PQ321A

    PQ321B

    @ @ 1 2 5 ACPRN 2
    P

    + 7 2 G PQ316 12K_0402_1%
    1.2V
    2

    2
    2 5 6 O G S

    3
    -
    G

    [34,37] ADP_90W S 2N7002W-T/R7_SOT323-3


    3
    84.5K_0402_1%

    100P_0402_50V8J

    A LM393DR_SO8~D PQ320 A
    1

    4
    1

    220P_0402_50V8J

    DMN65D8LW-7_SOT323-3~D
    1

    [34,37] ADP_65W
    PR338

    PC326

    PC328
    2
    2
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-CHARGER
    sualaptop365.edu.vn AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 38 of 46
    5 4 3 2 1
    A B C D E

    TON (1)SMPS1=305KHZ (+5VALWP)
    (2)SMPS2=357KHZ(+3VALWP)

    71.5K_0402_1%
    1

    @
    PC402

    PR402
    PC403 100P_0402_50V8J
    1 100P_0402_50V8J 1 2 1
    1 2 FB_3V

    ENTRIP1-1
    2
    FB_5V

    1 ENTRIP2-1
    PR403 PR404
    13K_0402_1% 30K_0402_1%
    1 2 1 2

    90.9K_0402_1%

    71.5K_0402_1%
    2
    PR405 PR406
    RT8243_B+

    PR407

    PR408
    20K_0402_1% 20K_0402_1% RT8243_B+
    1 2 1 2
    PL400
    B+

    ENTRIP22

    ENTRIP11
    1 2

    3V5V_TON
    2200P_0402_50V7K

    2200P_0402_50V7K
    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K
    68P_0402_50V8J

    68P_0402_50V8J
    0.1U_0402_25V6

    0.1U_0402_25V6
    HCB2012KF-121T50_0805
    PC401

    PC410
    1

    1
    PC404

    PC422

    PC405

    PC406

    PC407

    PC409
    8
    7
    6
    5
    PC423

    PC424
    PU401

    SI4172DY-1N SOP-8
    5

    5
    6
    7
    8
    2

    PQ402
    PQ401

    TON
    FB2

    ENTRIP2

    ENTRIP1

    FB1
    @ @ 21
    SI4172DY-1N SOP-8 6 PAD @ @ @
    4 PGOOD 20
    PR410 BYP1 PR411 PC411 4
    1 2BST_3V_1
    1 2 BST_3V 7 2.2_0603_5% 0.1U_0603_50V_X7R
    2.2_0603_5% BOOT2 19 1
    BST_5V 2 BST_5V_1
    1 2
    PC408 RT8243AZQW_WQFN20_3X3 BOOT1

    1
    2
    3
    0.1U_0603_50V_X7R UG_3V 8

    3
    2
    1
    UGATE2 18 UG_5V
    2 UGATE1 PL402 2
    PL401 LX_3V 9 4.7UH +-20% PCMC063T-4R7MN 5.5A
    4.7UH +-20% PCMC063T-4R7MN 5.5A PHASE2 17 LX_5V 1 2
    1 2 PHASE1 LX_5V +5VALWP
    +3VALWP

    1
    4.7_1206_5%
    LG_3V 10
    LGATE2
    1
    680P_0603_25V8J 4.7_1206_5%

    PR412
    16 LG_5V

    ENLDO
    LGATE1
    8
    7
    6
    5
    @ PR401

    LDO5

    LDO3
    @

    ENM

    5
    6
    7
    8
    VIN
    PQ403

    PQ404
    150U_B2_6.3VM_R45M

    SI4634DY-1N SO-8
    1

    2
    3VALW_OCP =15.8A 1 SI4634DY-1N SO-8 PC415
    2

    11

    12

    13

    14

    15
    + PC413
    PC416 Typ: 175mA

    SNUB_5V
    +3VLP
    Ipeak=12A +
    PC412

    4 0.1U_0603_50V_X7R 150U_B2_6.3VM_R45M
    1

    2 1 RT8243_B+ 4
    2
    PC414

    1 2
    2

    680P_0603_25V8J
    ENABLE
    2

    3V5V_ENLDO

    4.7U_0603_6.3V6K
    EN VL
    1
    2
    3

    4.7U_0603_6.3V6K

    PC418
    @
    Rising=1.2-1.6- 2V

    3
    2
    1
    1

    PC417
    Typ: 175mA
    Falling0.9-0.95- 1V

    2
    2
    PR413
    499K_0402_1%
    @
    5VALW_OCP =12.7A
    RT8243_B+
    1 2
    Ipeak=9.4A

    1U_0402_16V6K
    1
    PC419
    PR415
    [34] PWR_RESET @ PR417
    ENTRIP1-1 ENTRIP2-1 1 2 @ MAINPWON [32,34]

    2
    1

    1
    100K_0402_1%

    0_0402_5%
    1 2

    PR418

    PR416
    0_0402_5%
    0_0402_5%
    6

    3 PR420 3
    2 @ @ MOS_OTP [37]

    2
    PQ405A PQ405B 1 2
    2N7002KDW-2N_SOT363-6 2 5 2N7002KDW-2N_SOT363-6
    0_0402_5%
    1

    @
    PJ402
    1 2 +3VALW
    +3VALWP
    PD402
    PD401
    PAD-OPEN 4x4m
    1 2 2 1
    PJ403
    RB751V40_SC76-2 RB751V40_SC76-2 1 2 +5VALW
    +5VALWP

    PAD-OPEN 4x4m
    [34] EN_5V PR419 PR421
    EN_3V [34]
    2 1 EN5V-1 EN3V-1 1 2
    @

    2.2K_0402_5% 2.2K_0402_5%
    @4.7U_0402_6.3V6M

    @4.7U_0402_6.3V6M
    @ 402K_0402_1%

    @ 402K_0402_1%
    1

    2 PR422 1

    1
    PC421

    PC425
    PR423

    4 4
    2

    2012/09/04
    2

    check the EN circuit


    Security Classification Compal Secret Data Compal Electronics, Inc.
    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-3VALWP/5VALWP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    sualaptop365.edu.vn DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 39 of 46
    A B C D E
    A B C D

    PJ502 0.675Volt +/- 5%


    1
    1 2
    2 +1.35VP TDC A
    PL500 Peak Current 1A
    B+ PR502
    JUMP_43X39
    1 2 1.35V_B+ 1 2 BOOT_1.35V VLDOIN_1.35V @ OCP Current A
    2.2_0603_5%
    HCB2012KF-121T50_0805

    2200P_0402_50V7K
    68P_0402_50V8J

    0.1U_0402_25V6
    4.7U_0805_25V6-K

    4.7U_0805_25V6-K
    DH_1.35V
    +0.675VSP

    10U_0805_6.3V6M

    10U_0805_6.3V6M
    1

    1
    1 1

    PC502 SW_1.35V

    PC524

    PC503

    PC504

    PC505

    PC506
    0.22U_0603_10V7K

    1
    8
    7
    6
    5
    2

    1
    PC507

    PC508
    PQ501 DL_1.35V

    SI4172DY-1N SOP-8

    16

    17

    18

    19

    20
    @ @ PU501

    PHASE

    UGATE

    BOOT

    VLDOIN

    VTT

    2
    21
    4 PAD
    15 1
    LGATE VTTGND

    1.0UH_PCMB104T-1R0MN_18A_20% 14 2

    1
    2
    3
    PR503 PGND VTTSNS
    PL501
    6.04K_0402_1%
    1 2 1 2 CS_1.35V13 3
    +1.35VP CS RT8207MZQW_WQFN20_3X3 GND

    1
    4.7_1206_5%
    PR504 12
    VDDP Freq=253KHz VTTREF
    4 VTTREF_1.35V

    8
    7
    6
    5
    10U_0603_6.3V6M

    PR501
    1 @ 5.1_0603_5%
    PQ502

    SI4634DY-1N SO-8
    +5VALW
    1

    1
    PC510

    + 1 2 VDD_1.35V 11 5
    +1.35VP

    1 SNUB_1.35V 2
    VDD VDDQ

    PGOOD
    PC501 PC509

    1
    330U_2.5V_M 0.033U_0402_16V7K

    TON
    2

    2
    2 4 PC511 220P_0402_50V8J

    FB
    @

    S5

    S3
    1U_0603_10V6K
    PC512

    2
    680P_0603_50V7K

    10

    6
    1 2 @

    1
    2
    3

    1.35V_FB
    @
    PC513 +5VALW PR505
    1.35V_OCP =6.5A 2 4.64K_0402_1%

    2
    2
    1 2 2

    Ipeak=4.9A PC514
    1U_0603_10V6K PR506
    0.75V

    1
    1M_0402_1%
    @ 1.35V_B+ 1 2
    PR507

    1
    [34] SYSON
    2 1 S5_1.35V PR508 PC515
    5.76K_0402_1% @.1U_0402_16V7K

    2
    1
    PC516 @
    0_0402_5% @ PR509

    2
    1U_0402_6.3V6K 2 1 S3_1.35V

    2
    [16] DDR_VTT_PG_CTRL

    0.1U_0402_10V7K
    0_0402_5% @

    PC517
    1
    Pull high resistor
    must be less than 2Mohm

    2
    +1.35VP

    PJ503
    2 1
    2 1
    STATE S3 S5 VDDQ VTTREF VTT @ JUMP_43X79

    S0 Hi Hi On On On PJ504
    +1.35VP 2 1 +1.35V
    S3 Lo Hi On On Off (Hi-Z) 2
    @ JUMP_43X79
    1

    S4/S5 Lo Lo Off Off Off PJ505


    3 (Discharge) (Discharge) (Discharge) +0.675VSP 1
    1 2
    2 +0.675VS 3

    JUMP_43X39
    @
    +1.35VP OCP(min)=12.6A

    PU502 PL502
    4

    PJ506 1UH_PH041H-1R0MS_3.8A_20%
    2 1 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
    +3VALW
    PG

    2 1 PVIN LX +1.8VSP
    68P_0402_50V8J

    @ JUMP_43X79 9 3
    PVIN LX
    1

    1
    680P_0603_50V7K 4.7_1206_5%
    1

    1
    PC519

    PC518 8
    SVIN
    PR510

    22U_0805_6.3VAM PR511
    6 @ 20K_0402_1%
    2

    FB
    22U_0805_6.3V6M

    22U_0805_6.3V6M
    5
    1 2

    EN
    1

    1
    NC

    NC
    TP

    PC520

    PC521

    @ FB=0.6Volt
    PR512
    PC522
    11

    2 1 EN_1.8VSP
    2

    34,35,41,42,45] SUSP# @ 12/20-HW demand,change to 1.8VS


    0.1U_0402_10V7K

    0_0402_5%
    2

    SY8033BDBC_DFN10_3X3
    1

    PC523

    PR513
    1M_0402_5% PJ507
    1.8VSP_FB +1.8VSP 2 1 +1.8VS
    2

    2 1
    1

    @ JUMP_43X79
    4
    PR514 4

    10K_0402_1%
    1.8VSP max current=4A
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    PWR-+1.35VP/+1.8VSP
    sualaptop365.edu.vn
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 40 of 46
    A B C D
    5 4 3 2 1

    D D

    +5VALW

    TRIP pin (OCL)

    2
    PC701
    0.01U_0402_16V7K @ PR702
    0_0402_5%
    GND = 8A

    1
    5V = 12A

    2
    +1.05VM

    0_0402_5%
    PR703
    2.2U_0402_6.3V6M
    EMI Part

    SLEW_1.05V
    PC702

    1
    TRIP_1.05V
    @ 1 2 PL701
    HCB2012KF-121T50_0805

    2
    1.05V_B+ 1 2
    @ PR701 B+
    0_0402_5%

    23

    22

    21

    20

    19

    18

    17

    16

    15

    2200P_0402_50V7K
    PU701

    0.1U_0402_25V6
    SLEW

    V5
    GSNS

    VSNS

    TRIP

    GND

    VIN

    VIN

    VIN
    C C

    10U_0805_25V6K

    10U_0805_25V6K
    REFIN_1.05V

    1
    PC705

    PC706
    24
    REFIN2

    PC703

    PC704
    14
    PR704 @ PGND

    2
    105K_0402_1% 25 @
    REFIN 13
    PGND

    2
    @ PR711 2 1 VREF_1.05V 26
    33K_0402_1% VREF TPS51362RVER_QFN28_4P5X3P5 12
    1 2 PC707 PGND
    [34,35,9] PM_SLP_A# 0.1U_0402_10V7K 27
    PR705 RA 11
    100K_0402_1% PGND
    1 2 EN_1.05V 28
    [34,35,40,42,45] SUSP# EN 10
    PGND
    1

    +1.05VM

    PGOOD

    MODE
    PC708 29 11/28 :change to SH000005K80(H=3)

    BST
    TP

    LP#

    SW

    SW

    SW

    SW
    0.1U_0402_10V7K

    NC
    2

    +3VS
    PL702

    9
    0.68UH_PCMC063T-R68MN_15.5A_20%
    SW_1.05V 1 2

    BST_1.05V
    LP#_1.05V
    2

    PR709

    1
    100K_0402_5%
    PR707 PC712
    PR710 5.1_0603_5% 0.1U_0603_25V7K @ PR706 1.05VS OCP = 8A (Trip = GND)
    1

    1 2 1 2

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M
    @ 4.7_0805_5%
    1.05VS OCP = 12A (Trip = 5V)

    1
    1 2 PGOOD_1.05V
    [34] VCCST_PG_PWR

    PC709

    PC710

    PC711
    B B
    0_0402_5% PR708

    2
    @ 0_0402_5%

    1
    2 1 @ PC713 @
    680P_0402_50V7K

    2
    EMI Part

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-+1.05VM
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    sualaptop365.edu.vn
    Date: Friday, February 28, 2014 Sheet 41 of 46
    5 4 3 2 1
    A B C D E

    GPIO21 GPIO29 GPIO30 GPIO20 GPIO15


    VID5 VID4 VID3 VID2 VID1 VDDC
    0 1 1 1 1 1.125V +3VS_VGA

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%
    1 0 0 0 0 1.100V
    1 0 0 0 1 1.075V

    2
    1 0 0 1 0 1.050V
    1 0 0 1 1 1.025V

    PR801

    PR802

    PR803

    PR804

    PR805

    PR806

    PR807

    PR808

    PR809

    PR810

    PR811

    PR812
    1

    1
    1
    1 0 1 0 0 1.000V 1

    1 0 1 0 1 0.975V

    GPU_VID5

    GPU_VID4

    GPU_VID3

    GPU_VID2

    GPU_VID1

    GPU_VID0

    GPU_VID5

    GPU_VID4

    GPU_VID3

    GPU_VID2

    GPU_VID1

    GPU_VID0
    1 0 1 1 0 0.950V
    1 0 1 1 1 0.925V @ @ @ @ @ @

    1 1 0 0 0 0.900V Default +3VALW +3VS_VGA


    1 1 0 0 1 0.875V +VGA_B+
    PR813 PR814
    PL800
    1 1 0 1 0 0.850V 1 2 1 2
    1 2 B+
    1 1 0 1 1 0.825V 10K_0402_5% 10K_0402_5%

    3
    FBMA-L11-453215800LMA90T_2P

    2200P_0402_50V7K

    10U_0805_25V6K

    10U_0805_25V6K
    68P_0402_50V8J

    0.1U_0402_25V6
    1 1 1 0 0 0.800V @ @
    PQ802A PQ802B
    1 1 1 0 1 0.775V 2 2N7002KDWH_SOT363-6 5 2N7002KDWH_SOT363-6

    1
    PC802

    PC804

    PC805
    PC843

    PC803
    1

    2
    5
    PR815 @ @ @ @
    @ PQ801
    1 2
    PR816
    PR863
    91K_0402_1% 0_0402_5%
    [10,21,45,9] DGPU_PWR_EN 1 2 UGATE2_VGA 1 2 4

    [20]

    [20]

    [20]

    [20]

    [20]
    GPU_VID5

    GPU_VID4

    GPU_VID3

    GPU_VID2

    GPU_VID1

    GPU_VID0
    PR818 @ 0_0603_5%
    0_0402_5% PR817 PC806
    1 2 2.2_0603_5% 0.22U_0603_10V7K SIR472DP-T1-GE3_POWERPAK8-5

    3
    2
    1
    [34,35,40,41,45] SUSP# BOOT2_VGA 2 1 BOOT2_2_VGA 1 2
    1 2
    PL802 +VGA_CORE
    PC801 .1U_0402_16V7K 0.36UH 20% PDME064T-R36MS1R405 24A
    PHASE2_VGA 1 2
    PR819
    1 2 DPRSLPVR_VGA-1 PQ803

    3.65K_0402_1%
    SIRA10DP-T1-GE3_POWERPAK8-5

    1
    10K_0402_1%

    10K_0402_1%
    4.7_1206_5%
    10K_0402_1%

    PR827 @

    PR828
    +3VS_VGA PR830

    PR829

    PR861
    2
    1_0402_1% 2

    330U_X_2VM_R9M
    @
    1 1

    330U_X_2VM_R9M
    10K_0402_1%

    LGATE2_VGA 4

    SNUB2_VGA
    2

    2
    1

    PC807

    PC808
    + +
    PR831

    PR832 VSUM-_VGA 2 2

    3
    2
    1
    @
    2

    1 2 PR833 VSUM+_VGA ISEN2_VGA ISEN1_VGA


    100K_0402_5%
    VRON_VGA

    1
    0_0402_5% 1 2
    GPU_VID6

    [34] DGPU_PWROK +3VS_VGA ISEN1_VGA是否要加

    680P_0603_50V7K
    <BOM Structure>

    PC810
    2
    @
    PSI#_VGA

    PR834
    147K_0402_1%
    2 1

    PC811
    PR835 1U_0603_10V6K
    40
    39
    38
    37
    36
    35
    34
    33
    32
    31

    @ 100K_0402_5% PU801 1 2
    1 2
    CLK_EN#

    VID6
    VID5
    VID4
    VID3
    VID2
    VID1
    VID0
    VR_ON
    DPRSLPVR

    +3VS_VGA
    RBIAS_VGA

    1 2 30
    +VGA_CORE Near VGA Core
    [20,34] VGA_AC_DET BOOT2 29
    PR836 @ 1 UGATE2 28
    0_0402_5% 2 PGOOD PHASE2 27
    PR837 470K_0402_5%_TSM0B474J4702RE 3 PSI# VSSP2 26
    RBIAS LGATE2

    22U_0805_6.3V6M
    1 2 1 2 4 25
    VR_TT# VCCP

    22U_0805_6.3V6M
    5 24 +5VS 1 1
    NTC PWM3

    PC812

    PC813
    4.02K_0402_1% PH801 VW_VGA 6 23
    COMP_VGA 7 VW LGATE1 22
    FB_VGA 8 COMP VSSP1 21
    @ @ FB PHASE1 2 2
    1 2ISEN3_VGA 9
    ISEN3
    1
    UGATE1

    10 PC815
    BOOT1
    ISUM+

    ISEN2
    ISEN1

    ISUM-
    1000P_0402_50V7K
    8.06K_0402_1%

    VSEN

    IMON

    PC814 1U_0603_10V6K
    VDD
    RTN
    249K_0402_1%

    VIN

    22P_0402_50V8J 41
    2

    AGND
    2

    1
    PR838 @

    PC816

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    PR839

    ISL62883CHRTZ-T_TQFN40_5X5
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20

    PR840
    2

    1
    PC818

    PC819

    PC820
    499_0402_1% PC817
    ISUM-_VGA

    1 2FB1_VGA
    1 2
    VDD_VGA
    RTN_VGA
    1

    3 3

    2
    390P_0402_50V7K
    PC821 PR842 PR841 @ 0_0402_5%
    33P_0402_50V8J 1.69K_0402_1% 1 2 +5VS
    1 2 1 2 VSEN_VGA @ PR843
    11K_0402_1%
    .047U_0402_16V7K

    0_0402_5%
    2

    VIN_VGA 1 2 VGA_IMVP_IMON
    1
    PC823

    PR845

    ISEN2_VGA +VGA_B+
    1 2FB2_VGA
    1 2
    ISEN1_VGA PR846
    2

    +VGA_B+
    0.22U_0402_10V6K

    0.22U_0402_10V6K

    PC822 PR844 1 2
    1
    1

    150P_0402_50V8J 267K_0402_1% +5VS


    1

    1
    1U_0603_10V6K
    PC824

    PC825

    PC826

    PC827
    0.22U_0603_25V7K

    1_0402_5%
    PR847

    @ 2200P_0402_50V7K
    56K_0402_1%
    2

    10U_0805_25V6K

    10U_0805_25V6K
    68P_0402_50V8J

    0.1U_0402_25V6
    PQ804
    BOOT1_VGA
    2

    1
    PC828
    PC844

    PC829

    PC830

    PC831
    PR864

    2
    @PR848
    @ PR848 UGATE1_VGA 1 2 4
    VSUM+_VGA
    0_0402_5% VSUM-_VGA @
    82.5_0402_5%

    +VGA_CORE 1 2 0_0603_5% @
    PR849 @

    PR850 PC832
    1

    2.2_0603_5% 0.22U_0603_10V7K

    3
    2
    1
    1
    2.61K_0402_1%~N

    2 1 BOOT1_1_VGA 1 2 SIR472DP-T1-GE3_POWERPAK8-5
    PR851

    PL803
    0.36UH 20% PDME064T-R36MS1R405 24A
    VSUM_VGA_N001 2

    PHASE1_VGA 1 2 +VGA_CORE
    NTC_VGA 2
    0.22U_0603_10V7K

    0.01U_0603_25V7K
    1

    PQ805
    5

    SIRA10DP-T1-GE3_POWERPAK8-5
    PC833
    1

    1
    10K_0402_1%

    10K_0402_1%
    3.65K_0402_1%
    PC834

    PC835

    330P_0402_50V7K
    2

    330U_X_2VM_R9M
    1_0402_1%
    4.7_1206_5%

    PR854

    330U_X_2VM_R9M
    PR853 @

    PR862

    PR856
    1 1
    2

    PR855
    0.01U_0402_25V7K
    330P_0402_50V7K

    PC840 @

    PC836

    PC837
    LGATE1_VGA 4 + +

    SNUB1_VGA

    2
    1

    1
    11K_0402_1%
    PC839 @

    2
    1

    @
    PR857

    PC838 PH802
    1000P_0402_50V7K 10K_0402_1%_TSM0A103F34D1RZ 2 2
    2

    3
    2
    1

    4 4

    VSUM-_VGA
    2

    ISEN2_VGA
    VSUM+_VGA
    1

    @PR859
    @ PR859 PR860 ISEN1_VGA
    0_0402_5% 1.47K_0402_1%
    680P_0603_50V7K
    ISEN2_VGA是否要加
    PC841

    1 2 1 2 VSUM-_VGA
    2

    Layout Note:
    @
    Place near Phase1 Choke
    1

    PC842
    .1U_0402_16V7K
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2

    Title
    2011/07/12 2012/07/01
    sualaptop365.edu.vn
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-+VGA_COREP
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 42 of 46
    A B C D E
    5 4 3 2 1

    PC902
    0.1U_0402_25V6
    1 2

    PR902
    54.9_0402_1%
    1 2

    PR903 @
    75_0402_5%
    1 2
    D +1.05VS D
    PR904
    110_0402_1%
    1 2

    10/29 change pull high resistor


    [12] VR_SVID_DAT B+
    PR905
    @
    +1.05VS [12] VR_SVID_ALRT# 1 2 VGATE [12] EMI
    0_0402_5%
    1

    PR906 10/11 change pull high voltage RF request


    1 2 PL901
    PR901 @
    [12] VR_SVID_CLK +1.05VS HCB2012KF-121T50_0805
    75_0402_5% PR907 1K_0402_1% CPU_B+ 1 2

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K
    @ 0_0402_5%
    2

    [34] VR_HOT# 1 2

    68P_0402_50V8J
    2200P_0402_50V7K
    1 1 1

    4VR_SVID_ALRT#
    1

    33U_25V_M

    33U_25V_M

    33U_25V_M
    PC903

    PC905

    PC906

    PC907

    0.1U_0402_25V6
    PR908 PR909
    EMI

    3VR_SVID_DAT

    5VR_SVID_CLK

    1
    2VRHOT#_CPU

    6VR_RDY_CPU
    + + +

    PC909

    PC911

    PC904

    PC908

    PC927
    PC901 @ 1K_0402_1%

    PC910
    7VRMP_CPU
    47P_0402_50V8J [12] VR_ON 1 2 1 2 CPU_B+
    2

    2
    PR910

    1EN_CPU

    2
    1
    0_0402_5% 0_0603_5% @ 2 2 2
    PC912 1 2 4 @
    0.01U_0402_25V7K

    2
    11/20 change to 0603 size
    C PQ901 C

    VR_RDY
    ENABLE

    SCLK

    VRMP
    VR_HOT#
    SDIO
    ALERT#
    SIR472DP-T1-GE3_POWERPAK8-5 Acoustic

    3
    2
    1
    PR911 29 PR912 PC913
    2.2_0603_5% AGND 2.2_0603_5% 0.22U_0603_16V7K +CPU_CORE
    1 2 VCC_CPU 28 8 BST_CPU 1 2 BST_CPU-1 1 2 PL902
    +5VALW VSP_CPU 27 VCC
    VSP
    BST
    HG
    9 DH_CPU 0.36UH_PDME104T-R36MS0R825_37A_20%
    1

    VSN_CPU 26 10 LX_CPU 4 1
    PC914 DIFFOUT_CPU 25 VSN SW 11
    DIFFOUT PGND

    1
    1U_0603_10V6K FB_CPU 24 12 DL_CPU SWN1 3 2 CSN1
    2

    FB LG

    100K_0402_1%_TSM0B104F4251RZ
    PR913 COMP_CPU 23 13 TSNS_CPU
    @ ROSC_CPU 22 COMP TSENSE 14 VBOOT_CPU PR920

    SIRA10DP-T1-GE3_POWERPAK8-5
    ROSC VBOOT
    1

    5
    1 2 4.7_1206_5%
    CSCOMP

    [12] VCCSENSE

    1
    PR914 @
    CSSUM
    CSREF

    SNB_SW3
    2

    1
    0_0402_5% 18K_0402_1% PVCC PR915
    IMAX
    IOUT
    ILIM
    1

    PQ902
    69.8K_0402_1% PR917
    +CPU_CORE

    PH902
    PR916 10_0402_5%
    2

    PR918 PU901 PC916 PR919 4 47.5K_0603_1%


    21
    20
    19
    18
    17
    16
    15

    2
    100_0402_1% NCP81101_QFN28_4X4 .01U_0402_16V7K 13K_0402_1%

    2
    1
    2

    2
    1

    PVCC_CPU

    PC915
    CSSUM_CPU

    IMAX_CPU
    IOUT_CPU

    CSREF_CPU
    CSCOMP_CPU

    +5VALW
    ILIM_CPU

    PC917 680P_0603_50V7K

    CSSUM_CPU
    Close to CPU

    CSREF_CPU
    3
    2
    1

    2
    1000P_0402_50V7K @
    2
    1

    PR921
    100_0402_1%

    PVCC_CPU
    PR922
    2

    @
    1

    1 2
    B[14] VSSSENSE
    PC918 PR925 B
    0_0402_5% 1000P_0402_50V7K 165K_0402_1%
    2

    PR926 PC920 1 2
    1

    1500P_0402_50V7K

    680P_0402_50V7K
    49.9_0402_1% 330P_0402_50V7K PC921

    75K_0402_1%
    1 2 1 2 4.7U_0603_10V6K
    2

    1
    PR924

    1
    PR927

    PC922

    PC923
    PR928 IMVP_IMON 100K_0402_1% PH901
    1K_0402_1% 220K_0402_5%_ERTJ0EV224J
    2

    1 2
    Close to choke

    2
    PR929

    2
    PC924 15.4K_0402_1%
    1

    10P_0402_50V8J ILIM_CPU 1 2 CSCOMP_CPU


    1

    FB_CPU 1 2
    PC919 PR923 Close to IC side
    PC925 @ PR930 470P_0402_50V7K 24K_0402_1%
    2

    1500P_0402_50V7K 7.5K_0402_1%
    2

    1 2 1 2

    PR931
    2 1

    0_0402_5%
    @

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-CPU_CORE
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    sualaptop365.edu.vn
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 43 of 46
    5 4 3 2 1
    5 4 3 2 1

    +CPU_CORE
    30 X 22u/0805
    RF request
    D D

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M
    1 1 1 1 1 1

    1
    PC1001

    PC1002

    PC1003

    PC1004

    PC1005

    PC1006

    PC1007

    PC1008

    PC1009

    PC1010

    68P_0402_50V8J
    2200P_0402_50V7K
    0.1U_0402_25V6
    1

    1
    PC1013
    PC1012
    2

    2
    2 2 2 2 2

    PC1011

    2
    @
    @ @
    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M
    1 1 1 1 1

    1
    PC1014

    PC1015

    PC1016

    PC1017

    PC1018

    PC1019

    PC1020

    PC1021

    PC1022

    PC1023
    2

    2
    2 2 2 2

    C C
    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M
    1 1 1 1
    1

    1
    PC1024

    PC1025

    PC1026

    PC1027

    PC1028

    PC1029

    PC1030

    PC1031

    PC1032

    PC1033
    2

    2
    2 2 2 2

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-PROCESSOR_DECOUPLING
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev

    sualaptop365.edu.vn
    Custom D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 44 of 46
    5 4 3 2 1
    5 4 3 2 1

    PR1117
    PD1101
    82K_0402_5%
    2 1 1 2

    RB751V-40_SOD323-2
    PR1101
    130K_0402_1%

    0,21,42,9] DGPU_PWR_EN 1 2 EN_0.95V

    2
    @

    1
    PR1102 @ PC1102
    PR1103
    D
    PC1101 100K_0402_1% 0.22U_0603_10V7K D
    0.1U_0402_10V7K 2 1BOOT_0.95V-1
    1 2

    2
    BOOT_0.95V

    1
    0_0402_5%

    16

    15

    14

    13
    PL1101

    VIN

    EN

    BOOT
    PWRGD
    PJ1101
    1UH_PCMB042T-1R0MS_4.5A_20%
    2 1 VIN_0.95V 1 12 LX_0.95V 1 2
    +3VALW 2 1 VIN PH
    +VGA_PCIEP

    10U_0805_6.3V6M
    0.1U_0402_10V7K

    10U_0805_6.3V6M

    22U_0805_6.3VAM

    22U_0805_6.3VAM

    22U_0805_6.3VAM

    22U_0805_6.3VAM
    JUMP_43X79

    1
    @ 4.7_0402_1%
    2 11
    VIN PH

    1
    @

    PC1103

    PC1104

    PC1105
    PU1101

    PR1104

    22P_0402_50V8J

    PC1106

    PC1107

    PC1108

    PC1109
    19.1K_0402_1%
    2

    2
    3 TPS54618RTER_QFN16_3X3 10

    2
    GND PH

    1
    PR1105
    2

    PC1110
    @

    SNUB_0.95V
    4 9 TR_0.95V

    2
    GND SS/TR

    VSENSE

    RT/CLK

    1
    COMP
    AGND

    @ 680P_0402_50V7K
    17

    2200P_0402_50V7K
    PWRPD

    COMP_0.95V-1

    1
    0.8V

    PC1112
    PC1111
    5

    2
    RT_0.95V
    PR1107

    1
    182K_0402_1%
    100K_0402_1%

    PR1108
    PJ1102

    1
    PR1106
    18K_0402_1% 2 1
    +0.95VS_VGA

    2
    C +VGA_PCIEP 2 1 C

    1
    JUMP_43X79

    3300P_0402_50V7K
    @

    PC1113
    2
    FB_0.95V
    [34,35,40,41,42] SUSP# @
    PR1109
    2 1 EN_1.5VS
    2

    0_0402_5%
    1

    PR1110 @ PC1114
    PR1111
    @PC1115
    @ PC1115 100K_0402_1% 0.22U_0603_10V7K
    0.1U_0402_10V7K 2 1BOOT_1.5VS-1
    1 2
    2

    BOOT_1.5VS
    1

    0_0402_5%
    16

    15

    14

    13

    PL1102
    VIN

    EN

    BOOT
    PWRGD

    PJ1103
    1UH_PCMB063T-1R0MS_12A_20%
    2 1 VIN_1.5VS 1 12 LX_1.5VS 1 2
    +3VALW 2 1 VIN PH
    +1.5VSP
    10U_0805_6.3V6M
    0.1U_0402_10V7K

    10U_0805_6.3V6M

    22U_0805_6.3VAM

    22U_0805_6.3VAM

    22U_0805_6.3VAM

    22U_0805_6.3VAM
    JUMP_43X79
    1

    1
    @ 4.7_0402_1%
    2 11
    VIN PH

    1
    @
    PC1116

    PC1117

    PC1118

    PU1102

    PR1112

    22P_0402_50V8J

    PC1119

    PC1120

    PC1121

    PC1122
    90.9K_0402_1%
    B B
    2

    2
    3 TPS54618RTER_QFN16_3X3 10

    2
    GND PH

    1
    PR1113
    2

    PC1123
    @

    SNUB_1.5VS
    4 9 TR_1.5VS

    2
    GND SS/TR
    VSENSE

    RT/CLK

    1
    COMP
    AGND

    17
    2200P_0402_50V7K

    PWRPD
    1

    0.8V

    @ 680P_0402_50V7K
    PC1124
    5

    2COMP_1.5VS7

    2
    PC1125
    RT_1.5VS
    PR1114
    1
    182K_0402_1%

    100K_0402_1%
    2
    PR1115

    PJ1104

    1
    PR1116 2 1
    +1.5VS
    2

    18K_0402_1% +1.5VSP 2 1
    1

    JUMP_43X79
    @
    3300P_0402_50V7K
    1

    PC1126
    2

    A FB_1.5VS A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-+0.95VGS/+1.5VS
    sualaptop365.edu.vn AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 45 of 46
    5 4 3 2 1
    5 4 3 2 1

    Version change list (P.I.R. List) Page 1 of 1


    for PWR
    Item Reason for change PG# Modify List Date Phase
    PR101, PR221, PR415, PR417, PR420, PR710, PR815, PR832, PR843, PR848, PR859, PR905, PR907
    1 0 ohm change to short pad , PR908, PR913, PR922, PR112

    D D

    2 HW's request, add SBC function. net name from "PM_SLP_A#" to "M_PWR_ON"

    3 Increase charger current limit. PR326 changes from 100k to 158k

    4 Shortage on 0.33u capacitor. PR705 changes to 100k & PC708 changes to 0.1u

    5 HW changes power sequence. P41 PR711 from 100k to 33k FVT

    6 Disable BATT one shoot circuit P36 Unpop PR120, PC109, PC115, PR119, PD105 2013/04/25 SIT

    7 0 ohm change to short pad ALL PR346, PR1103, PR1111, PR234, PR235, PR336, PR701, PR702, PR931, PR507, PR509, PR512, PR1109 2013/04/30 SIT

    C C
    9

    10

    11

    12

    13

    14

    B B

    15

    16

    17
    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Title
    Issued Date 2011/07/12 Deciphered Date 2012/07/01
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PIR (PWR)
    sualaptop365.edu.vn AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019OJ
    Date: Friday, February 28, 2014 Sheet 46 of 46
    5 4 3 2 1

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