A Guide to Short-Channel Effects in MOSFETs

Charvaka Duvvury

Abstract with
Short-channel effects form a very important consideration for the per­
formance of very large scale integrated circuits built with ultra-small de­ KT
vices. In this paper, definitions of each of the observed short-channel φ = — ln[Na/Ni]
effects in MOSFETs are given by describing their respective phenome- 1
nological meanings. Furthermore, the impact of these parameters on the and
measured I-V curves, as well as the differentiation between long- and
short-channel behavior from the measured data, are discussed.
BE = — s/2qe Na si

Introduction
With advancements in device technology, short- Equations (l)-(3) have been progressively modified
channel effects have become increasingly prominent with the introduction of moderate to severe short-
in M O S devices, resulting in significant deviations channel effects, as given below [1].
from ideal behavior of I-V curves as well as worse
subthreshold and substrate leakage current charac­
teristics. All of these have adverse impact on very
/^(linear) =
large scale integrated (VLSI) circuit performance and 1 + e(V - V,) gs

reliability. Process modifications and ideal scaling

laws have somewhat alleviated these short-channel V ds < (V xs - V,)la' (4)
effects. Nevertheless, for transistor channel lengths
of 2 μτη and below, they are a dominant part of the and /^(saturation)
MOS device behavior. This paper will review these
short-channel effects and discuss how they can be
recognized from the measurements of I-V curves. g(Vg - K ) [ l + M a / a ' ) ( V
S 2 2 d s - V )]dsaX

1 + 6(V - V,) gs

Drain Current Equations

For an ideal M O S device with no short-channel ef­ V ds > (V X5 - V,)/a' (5)
fects, the linear and saturation drain current equa­
tions are given by where
U l i n e a r ) = /3{2(V, - V )V
S t ds - V} ds
(1)
/^(saturation) = fi{(V gs - V) }
t 2 (2) a =a + 7 (V, S - V,), V d s a t = (V, s - V )la'
t

where
and
W o x ( W - WR) = WU
β= TLD - LR) L e f f V = V
t t0 + BE[V2^ + V sh - V 2 ^ ] - DEVV^
In the above equations, the threshold voltage is given
by Here a, y, λ, 0, and DE are called the short-channel
parameters, and Eqs. (4) and (5) are the drain current
V, = V, + BE[VV
0 sft + 2φ, - y/Uf] (3) equations for conventional abrupt junction devices
with these effects. These can be further modified for
more advanced transistor structures with grading of
source drain regions by introducing an additional pa­
rameter called " R E S , " corresponding to the drain and
source intrinsic resistance. Equations (6) and (7) repre­
sent one such graded structure known as the lightly
doped drain (LDD) transistor (see Fig. 1) [2].

/^(linear)

2(RES)a'/3V, s

= [α'β{2(ν, 5 - V )V - a'V }]j

t ds 2ds
W(V, s a t ) ( 6 )

Fig. 1 Cross section of a lightly doped drain/source device. • {2(V , - Vt) - a'Vds\ + {1 + 0(V, - Vt)}
S S S

6 8755 3996/86/noo-ooo6$i.oo cc) 1986 IEEE IEEE CIRCUITS AND DEVICES MAGAZINE
and /^(saturation) behavior (see Fig. 3b also). The value of λ is close to
0 for long-channel devices ( > 5 μπι), and could be
about 0.3 for very short channel devices ( = 1 μπι).
= mV gs - V ) {l + λ(α/«')
f 2 2
Curve 3 represents the addition of the "drain ef­
fect" (DE), which is also known as drain modulation of
2(RES)g(V ffi - V,)
(V ds - V dsat )}l (7) the device threshold voltage. In short-channel devices,
the application of drain voltage causes the drain de­
pletion region to extend into the channel region, thus
• { 1 + λ ( α / ο ' ) ( ν * - V )} 2 dsat + {1 + 6(V gs - V,)} effectively acting as an additional back bias. How­
ever, its effect is to lower V . Therefore, as seen int

For short-channel devices, the subthreshold leakage curve 3, the drain current increases as the drain volt­
currents become significant and, therefore, should age increases. The parameter symbol is " D E , " which
also be incorporated into the drain current equations typically varies in value from about 0 for long-chan­
[3]. This leakage component was added to the drain nel devices ( > 5 μτή) to approximately 0.2 (IIV) for
current equations so that there is a smooth transition very short channel ( = 1 μπι) devices. Its effect is usu­
from below V to above V . t t
ally recognized by the upward curving of the satu­
ration curve. See, for example, Fig. 3d.
/^(subthreshold) = β [1 - exp (-NgfiV )] (8)
The next two parameters, a and 7, should be con­
5 ds

for V gs > V t
sidered together. As can be seen from Eqs. (4) and
(5), it is CL' [ = a + y(V - V )] that enters the drain
gs t

/^(subthreshold) = 0 [ e x p (~Ngfi(V s sb - φ + 2φ,))]

8
current equations. The parameter a' effectively rep­
resents the ratio of mobility from the linear region to the
- [1 - expi-NgjSV*)] (9) saturation region. Since the mobility is relatively lower
in the saturation region, due to lateral field effects
for V > V
t gs > (-V sb + VFB), where that come about with application of high V a' is ds/

usually greater than 1. That is, a ' > 1 reflects the

eff
0s = KPS r
relatively higher conduction factor KP in the linear
-eff region, where KP = μ € / 2 ί . (Note that the exact
0 οχ οχ

physical meaning of a is somewhat elusive.) There­

(/CPS is the subthreshold conduction factor).
fore, the effect of a' would be to increase the gain
current in the linear region, as shown by curve 4 of
Short-Channel Behavior Fig. 2. More importantly, parameter a' causes the
The cumulative effects of these parameters on an
drain current to saturate at a lower drain voltage,
ideal M O S device characteristics, for a given gate
namely at V = (V - V )la'. This phenomenon is
dsat gs t

voltage, are shown in Fig. 2. That is, curve 1 is for

shown in curve 4, where the short-channel effect due
an ideal device, curve 2 is with parameter λ, curve
to α' causes the saturation point to occur before V ds
3 is with parameters λ and DE, and so on. This is
reaches (V - V ) [4].
gs t
to illustrate how these short-channel parameters
The parameter 7 , which makes OL' dependent on
evolved as a consequence of measured I-V curves. In
the gate voltage, is called the velocity saturation factor.
what follows, an explanation is given for each of
As the device goes from the linear to the saturation
these parameters in their role on the short-channel
region with increasing V , the carrier drift velocity
ds
behavior.
First, curve 1 represents an ideal M O S device. In
the linear region, conduction follows Eq. (1). At V ds

= V - V , the device reaches saturation and there

gs t

is no further increase in current. This is expected

since, in Eq. (2), I is independent of V . Similar be­
ds ds

havior, of course, would be observed for different

gate voltages.
In Fig. 2, curve 2 shows the effect of the channel-
length modulation factor λ. This effect occurs when the
drain voltage applied is greater than (V - V ), i.e., gs t

beyond pinch-off. The excess drain voltage causes the

drain depletion edge to move closer to the source,
thus effectively narrowing the channel length. This
results in an increase in the device gain and, hence,
an increase in device current with increasing V . The ds

parameter determines the slope of the I vs. V curve ds ds Fig. 2 Influence of short-channel parameters on I-V characteristics of
in saturation, and its effect is recognized from this an ideal MOSFET.

NOVEMBER 1986 7
eventually saturates when a critical lateral field is
reached. In short-channel devices, this field is
reached only a short distance from the source. Thus,
for short-channel devices, velocity saturation and the
corresponding current saturation occur at approxi­
mately the same low value of V dsat/independent of
the gate voltage. This is mathematically shown as
^ d s a t = (V s ~ V )la'. For 7 > 0, a' increases with
g t

increasing gate voltage, resulting in constant V , dsat

however, this V is dependent on 1/7. That is, the

dsat

higher the velocity saturation in short-channel de­

vices, the lower the constant saturation voltage. The
value of 7 varies from about 0 for long-channel de­
vices ( > 5 μηι) to nearly 0.3 (1/V ) for very short chan­
7

nel devices ( = 1 μπ\). O n the other hand, α varies

from about 1 for long-channel devices to approxi­
mately 0.7-0.8 for short-channel devices. In fitting
I-V data, both α and 7 are allowed to fit separately.
In addition, 7 also modifies the effective value of λ
[see Eq. (5)]. This modification makes the slopes of
the I -V curves in the saturation region for different
ds ds

gate voltages parallel to each other, as is usually ob­

served for short-channel devices. For long-channel
devices, on the other hand, since the V saturation
ds

voltage is dependent on the gate voltage, the satu­

ration slopes are different. The effects of these pa­
rameters are illustrated separately in Fig. 3.
The lateral field effects have been discussed pre­
viously. However, the most drastic effect is caused
by the vertical field with the application of gate volt­ Fig. 3 Illustration of progressively increasing short-channel behavior,
age. This vertical field causes the surface charge car­ (a) Long-channel behavior, (b) with channel length modulation,
riers to scatter, thus reducing mobility in the inver­ (c) addition of velocity saturation, and id) with inclusion of drain
effect.
sion layer. The parameter θ is known as the mobility
degradation factor, due to the gate field and its severe
effect on the I-V characteristics, and is shown by include better V vs. channel length (see following
t

curve 5 (Fig. 2). Note that it significantly reduces the discussion on short-channel V ), improved device
t

device gain in both the linear and saturation regions.
Also, the higher the gate voltage, the more severe is
the effect. See Eqs. (4) and (5). The value of θ pre­
dominantly depends on β (or KP), in a direct man­
ner, and on the channel length, in an inverse man­
breakdown phenomena, and reduced substrate and
gate leakage currents. However, the lightly doped η
regions introduce intrinsic resistance to the drain and
source. For this reason, there is an additional voltage
drop across the two η regions and the I -V curves ds ds

ner. For thinner oxide devices with higher KP, θ is do not saturate until a high value of V is applied. ds

large. Also, for short-channel devices with smaller
L , β is large and, therefore, the value of θ is high
eff
[0.4-0.5 (1/V) for a 1-μτη device]. Note also that, for
heavily implanted short-channel devices, Θ is slightly
smaller because KP would be lower. Since β is very
low for very long channel devices, θ for these devices
essentially reaches a limiting value of 0.05 (1/V) cor­
responding to the surface-scattering constant due to
surface roughness.
The next curve, labeled as 6 and corresponding to
the RES parameter, is applicable to devices with
lightly doped drain/source regions. This type of
structure is shown in Fig. 1. In this structure, the high
electric fields near the drain pinch-off region are
spread away from the gate, resulting in reduced hot-
electron-induced effects. The short-channel perfor­
mance effects are also improved for these devices and
This is illustrated by curve 6 of Fig. 2. Moreover, due
to the series resistance, the total channel conduc­
tance is appreciably lower in the linear region and
only slightly lower in the saturation region. The lat­
ter is a consequence of relatively high channel resis­
tance for a M O S device in the saturation region. As
expected from the preceding arguments, the drain
current (curve 6, Fig. 2) appears to be reduced in the
linear region comparatively more than in the satu­
ration region. The I-V curves for LDD devices are
thus recognized by their characteristically round
shape. The RES term in Eqs. (6) and (7) is a resistivity
term, and is dependent upon the η-region concentra­
tion. For typical LDD devices of 1- or 2-^m channel
lengths, RES is about 2500 Ω-μπι.
The I-V curves would quite obviously be affected
by the variations in V . They shift upward with lower
t

8 IEEE CIRCUITS AND DEVICES MAGAZINE

V , and vice versa. As mentioned previously, the
t to be lower. The combined effects of short-channel
drain effect (DE) lowers V . On the other hand, body
t and narrow-width phenomena are complicated and
effect (BE) causes V to be increased. The actual
t cannot be easily identified from I-V data. Therefore,
threshold voltage can be represented as
V = V
t t0 + B E [ W , + 20, -y/2ff ]-
S f DE>/v^ (10)
Here, the V (threshold at zero bias) values are
t0
slightly dependent on channel length and mostly de­
pendent on junction depth, oxide thickness, and sur­
face doping concentration. On the other hand, BE is
strongly dependent on substrate doping, oxide
thickness, channel length, and channel width.
First, BE depends on channel length because, for
short-channel lengths, the effective doping level un­
der the gate is reduced and its value is lower. This
phenomenon is due to the fact that the electric field
lines near the source and drain terminate on the
source and drain instead of on the gate. It is this de­
pendency of BE on channel length that makes V a
strong function of channel length at very short chan­
nels. See Fig. 4.
Fig. 4 Threshold voltage as a function of effective channel
Conversely, the dependence of BE on width is due
to the fact that, for narrow-width devices ( < 5 μίτι),
the field stop implant encroaches into the channel re­
gion and increases the effective BE. It is interesting
to note that narrow-width effects are observed even
if there are no field stop implants, since the relatively
thinner depletion region under the field oxide device
distorts the depletion region under the gate oxide and
prevents formation of an inversion layer at the two
boundary regions and, consequently, leads to a
slightly higher V [5]. However, this effect is not as
t μ - Electron mobility.
severe as for cases with heavy field stop implants.
The heavy field stops, of course, are used to reduce
the leakage currents of field oxide devices. It is also
interesting to note that the field stop encroachment
into the channel region causes the KP of the device
NOVEMBER 1986
they must be dealt with separately.
The value of BE is also dependent on the applied
substrate potential V . This is because the depletion
sb
region width under the gate increases with V and sb
enters the constant doping level of the bulk region
with about 1 V of V . At this critical voltage, the BE
sb
of the device is reduced by one-half to one-third. It
is usually its average value, between 0 < V < 5 V,
sb
that is used as the BE parameter. Its value can range
from 0.1 (Vvolts) for very short channel and wide-
width devices to 0.5 (Vvolts) for long-channel and
very narrow width ( > 5 μιη) devices. In conclusion,
V and BE are very process-dependent and can be
t0
extracted only by careful analysis.
For very short channel devices, subthreshold cur­
t
rent is also important. The two parameters that affect
this are called β and Ng [see Eqs. (8) and (9)]. The
5
parameter β [ = KPS (W /L )]
5 represents the leak­
efi eff
age current just at device turn-on, i.e., at V = V .gs t
Its typical value for short-channel devices is approx­
imately 1-2 μ A. Since the subthreshold current is ex­
tremely sensitive to temperature, parameter Ng is in­
troduced as an adjustment factor and represents the
subthreshold current slope. Its value ideally should be
1, but for short-channel devices, it is usually 0.7-0.8.
Conclusions
The observed channel effects in M O S devices were
described individually as to their closest physical
meaning. Also, the mathematical representation of
the short-channel behavior by incorporating these ef­
fects as empirical parameters was given. By the use
of these equations, observed I-V data can be fitted to
extract these parameters, which, in turn, can be ana­
lyzed to study the severity of short-channel effects.
length. Appendix
List of Symbols
a - Linear to saturation regions mobility ra­
tio.
a' - a for short-channel devices.
β - Transistor gain.
β - Subthreshold gain.
5
KP - Transistor conduction factor.
KPS - Subthreshold conduction factor.
7 - Velocity saturation factor,
λ - Channel length modulation factor.
0
φ - Surface potential.
θ - Mobility degradation factor.
BE - Body effect parameter.
DE - Drain effect parameter.
e - Dielectric constant of silicon dioxide.
ox
9
 Dielectric constant of silicon. [3] P. Yang and P. Chatterjee, " A Computationally Efficient Short
Channel M O S F E T Current Model for V L S I Circuit Simula­
κ- Boltzmann constant.
t i o n , " Texas Instruments Internal Memo, 1982.
Drain-to-source current. [4] J. Allan, " A New SPICE Model for Short Channel M O S De­
Na - Acceptor doping concentration. v i c e s , " Texas Instruments Internal M e m o , Dec. 1982.
Ng- Subthreshold current leakage adjust­ [5] P. P. Wang, " D e v i c e Characteristics of Short Channel and
ment factor. Narrow Width M O S F E T s , " IEEE Transactions on Electron De­
Ni - Intrinsic concentration. vices, vol. ED-25, no. 7, July 1978.

TLD - Total lateral diffusion.

Φ,- Fermi potential.
Gate oxide thickness.
Electron charge.
v d s - Drain bias.
Saturation drain voltage.
Gate bias.
VFB - Flat band voltage.
Substrate bias.
v t - Threshold voltage.
Vto- Zero bias threshold voltage.
RES - Drain/source resistivity.
W- Transistor width.
WR - Width reduction.
L - Transistor length.
LR- Length reduction.
T - Temperature.
Charvaka Duvvury
Acknowledgments
The author is grateful to Michael Duane and Adin Charvaka Duvvury obtained the B . S . E . E from the University of
Hyslop, both of Texas Instruments, Inc., for their Houston, and the M . S . E . E . and P h . D . (materials science) from the
University of Toledo, Ohio. From 1972-1977, he worked as a Post­
valuable suggestions.
doctoral Fellow in the Physics Department of the University of
Alberta, Edmonton, Canada. Since joining Texas Instruments In­
References corporated in Houston, Texas, in 1977 as an M O S Design Engi­
[1] P. Yang and P. Chatterjee, IEEE Transactions on Computer-Aided neer, he has been involved in design work of various generations
Design of Integrated Circuits and Systems, vol. CAD-1, no. 4, p. of Dynamic RAMs. He is currently a Member of the Group Tech­
169, 1982. nical Staff, working in the D R A M Development Group on 1-
[2] C. Duvvury, D. Baglee, M. Duane, A. Hyslop, M. Smayling, megabit D R A M reliability. He has published 16 papers in techni­
and M. Maekawa, " A n Analytical Method for Determining In­ cal journals, which also include topics on transistor modeling,
trinsic Drain/Source Resistivity of Lightly Doped Drain (LDD) E S D , and hot-electron effects. He is a member of IEEE, Sigma XI,
Devices," Solid-State Electronics, vol. 27, no. 1, pp. 89-96, 1984. Eta Kappa Nu, and the E O S / E S D Association.

10 IEEE CIRCUITS AND DEVICES MAGAZINE