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Self-Oscillating Resonant AC/DC Converter Topology For Input Power-Factor Correction
Self-Oscillating Resonant AC/DC Converter Topology For Input Power-Factor Correction
Self-Oscillating Resonant AC/DC Converter Topology For Input Power-Factor Correction
4, AUGUST 1999
Abstract— This paper presents the analysis and design of a 1) The total harmonic distortion (THD) of the input current
single-phase single-stage high-power-factor ac/dc converter em- is high, typically 30% at full load, when operating
ploying a series–parallel resonant topology operating in self- without active control. Even though the proper design
sustained oscillating mode. A control approach is proposed to
achieve low total harmonic distortion of the input current. This of the resonant circuit parameters reduces the THD of
approach does not require sensing of the input current. In the input current, it results in the loss of the ZVS during
addition, the inverter output current is limited during transients, full-load operation [6].
and the converter operates with zero voltage switching for all 2) The ratio between the switching frequency and the
operating conditions including open and short circuit. The per- resonant frequency must be kept large, typically greater
formance of the proposed scheme is verified experimentally on a
500-W prototype. than 1.2, to ensure operation under ZVS. This increases
the circulating current and the losses in the circuit.
Index Terms—AC/DC power conversion, describing functions, 3) By actively controlling the input current the THD of the
feedback, MOSFET’s, resonant power conversion.
input current can be reduced significantly [6]. However,
the implementation of the input current controller re-
quires a current sensor and a multiplier, which increase
I. INTRODUCTION
the complexity of the circuitry. Furthermore, if the con-
Fig. 1. Power circuit diagram of the single stage ac/dc converter based on series–parallel resonant circuit and simplified block diagram of the proposed
control circuit (SOC: self-sustained oscillating circuit).
(3) (7)
For the ac/dc converter of Fig. 1 the resistance changes where and are the peak values of the input voltage and
along the input line cycle as a results of the pulsating nature current, respectively.
of the power absorbed from the input ac line. Aiming to simplify the analysis, the resonant circuit is
Equation (3) can be represented by two nonlinear algebraic assumed to be in sinusoidal steady-state operation at each
equations. The first one is associated with its real part and the point of the input ac line. This assumption holds since the
second one with its imaginary part, and they can be written as time constants of the resonant circuit are much smaller than
half the period of the input ac line. Therefore, for a power
circuit without losses the power sent by the resonant circuit
to the output stage is given by
(4)
(8)
(a) Fig. 4. Control angle required to operate with unity power factor and constant
output voltage along half cycle of the input source .
C. ZVS Operation
A necessary condition to achieve ZVS in the circuit of Fig.
1 is to have current lagging the voltage These two
quantities are expressed in the complex plane of Fig. 2 in
terms of the frequency response of to For all points
in the fourth quadrant of this complex plane the current
lags the voltage Therefore, if 90 180 , then the
current lags the voltage independently of specific values
of the resonant circuit parameters However,
in a practical implementation the angle is limited and set
smaller than 180 to provide enough current to reset the
snubber capacitors, and to avoid operation below the resonance
frequency.
(a)
(a) (b)
Fig. 7. (a) Control angle
to the current is frequency response. The solid line represents the small signal model given by (15) and the dashed line the
=
first-order small signal model given by (16). vg 170 V, Ls = 280 H, Cs = 12 nF, 0 = 1:62 rad, p = 25 400 rad/s. (b) Amplitude of the first harmonic
component of the current is obtained with the small signal models (15) and (16), and with the modulation equation (12) compared with the actual current
waveform, when the control angle
undergoes step change like variations.
= [1:66; 1:75] rad, p = 21 350 rad/s.
primarily upon the dynamics of the output filter. This is be- for the purpose of obtaining a small signal model that describes
cause the time constant associated with the resonant circuit are the dynamic behavior of the amplitude of the current the
much smaller and can be neglected or can be represented by a resonant circuit variables will be represented as follows:
first-order model. However, this procedure cannot be applied
for the design of the current limiter since the current through
the resonant inductor is the variable that is controlled. In (11)
this section, a model suitable for the design of the controller
that limits the current is derived. The extended describing By substituting the above equations and its time derivatives
function method is used to obtain a modulation equation into the nonlinear state space model (10) and equating the sine
that describes the dynamic behavior of the amplitude of the and cosine terms, the following modulation equation, which
first harmonic components associated with the resonant circuit describes the dynamics behavior of the envelops of the sine
variables [12]–[14]. Finally, simplified small signal models are and cosine terms, can be found:
derived for the design of the current limiter.
When the series–parallel resonant converter of Fig. 1 is
subjected to short-circuit at the load side it operates as a
series resonant converter since the voltage across the parallel
capacitor is almost zero. By applying Kirchhoff’s voltage and
current laws in the series–parallel resonant converter of Fig. 1
the following nonlinear state space model can be found as
(10)
(a) (b)
(c)
Fig. 8. Experimental results. TR1: ac input voltage, 100 V/div. TR2: ac input current, 2 A/div, TR3: harmonic spectrum of the input current, 0.5 A/div.
Horizontal scales: 10 ms/div, and 100 Hz/div. (a) Operation with high-input voltage, (b) operation with nominal input voltage, (c) operation with low-input
voltage. Output power 500 W. The gains of the modified control action controller are k1 = 0:0067 rad/V and k2 = 1:8 rad.
The modulation equation (12) has an equilibrium point that where the coefficients of (15) are given in the Appendix II.
corresponds to operation above the resonant frequency. For Fig. 7(a) shows the frequency response of (15). Fig. 7(a)
90 180 this equilibrium point is given by also shows the frequency response of a first-order model that
captures the low-frequency behavior of this transfer function.
This first-order model is given by
(16)
(a)
(a) (b)
(c)
Fig. 11. Experimental results showing ZVS during three load operating conditions, that are no-load, full-load, and short-circuit. The waveforms shown are:
TR1 voltage across the leg A of the inverter vao , TR2 gate–source voltage of the Leg A bottom transistor (g4 ), TR3 current through the series resonant
inductor is : Operation near to the peak of the input ac line. (a) no-load operation. (b) full-load operation. (c) short-circuit operation is ef = 5:5 A.
B. Control Circuit the losses in the power circuit. Then the constant is adjusted
A simple lag compensator comprised of a gain and a pole at nominal input voltage and full load to minimize the THD
was used for the implementation of the controller that limits of the input current. The value of found experimentally
the current This controller was designed based on the model was 0.0067, which is in good agreement with the theoretically
(16) where a resistor was set equal to 1 to account for predicted value.
the power circuit losses. The pole of the compensator
was placed at one fifth of the minimum switching frequency. C. Converter Performance
In this way, the ripple at twice the switching frequency, that is Fig. 8 shows the input current and voltage at full load
generated by the rectification of , is significantly attenuated. for three input voltages values. It also shows the harmonic
On the other hand, the gain of the compensator was spectrum of the input current. It is possible to see that the
adjusted to make the loop gain crossover frequency to be amplitude of the low-order harmonic components are very
equal to half of the minimum switching frequency. For the small at the nominal input voltage. Fig. 9 shows the magnitude
implementation of a conventional proportional plus of these harmonic components as a function of the input
integral controller was used. voltage. At upper and lower limits of the operating input
The constants and are selected to minimized the THD voltage range the third harmonic component is dominant and
of the input current. First, the gain is adjusted to allow reaches 11% at the lower limit. Fig. 10(a) shows the input
the converter to provide full power at the lowest ac input power factor as a function of the load for three values input
voltage. The value of found experimentally was 1.8 rad voltage. At full load the power factor is greater than 0.99 and
instead of 1.57 rad as predicted theoretically. The main reason the THD of the input current is in the range of 6.7%–11.8%.
for this difference is attributed to the fact that the theoretical Fig. 10(b) shows the overall efficiency of the ac/dc converter.
analysis carried out in Section IV does not take into account This efficiency was measured from the input ac line to the
PINHEIRO et al.: SELF-OSCILLATING RESONANT AC/DC CONVERTER TOPOLOGY 701
VIII. CONCLUSIONS
In this paper, a control technique to improve the input power
factor of single stage ac–dc converter based on a series-parallel
resonant converter operating in self-sustained oscillation mode
is described. In addition to the improved power-factor op-
eration, ZVS is ensured under all operating conditions and
the current through the resonant inductor is limited during
transient operations. Experimental results demonstrate that
at full load the proposed scheme results in a good overall
efficiency, greater than 91%, and high-input power factor
greater than 0.99.
APPENDIX I
DESCRIPTION OF THE SOC
The operation of the SOC is based on a constant amplitude (b)
sawtooth signal that is synchronized with the current . Fig. 12. SOC: Self-sustained oscillation circuit. (a) Block diagram represen-
The sawtooth signal with constant amplitude at different tation. (b) Relevant waveforms (simulation results).
switching frequencies is required to make the control angle
proportional to a control voltage. The block diagram of satisfies the following inequality:
the circuit suggested for the implementation of the constant
amplitude sawtooth generator and its main waveforms are
shown in Fig. 12. The sawtooth like signal is synchronized (24)
with the current since the integrator reset pulses
are generated from the zero crossing of the current . The
averaged value of is kept constant at using the APPENDIX II
integrator . The value of defines the peak value COEFFICIENTS OF (15)
of the sawtooth waveform. The comparison of and the
control signal results in the pulses, and that together The coefficients of the small signal transfer function (15)
with the sign of are used to generate the gate signals are given by
of the inverter. Assuming that the switching frequency is a
slow-varying quantity, the following equality holds:
(22)
(23)