84 Chapter 2 MOS Transistor Theory

p+ n+ n+ p+ p+ n+
n-well
p-substrate

FIGURE 2.22 Substrate to diffusion diodes in CMOS circuits

2.4.4.3 Junction Leakage The p–n junctions between diffusion and the substrate or well
form diodes, as shown in Figure 2.22. The well-to-substrate junction is another diode.
The substrate and well are tied to GND or VDD to ensure these diodes do not become for-
ward biased in normal operation. However, reverse-biased diodes still conduct a small
amount of current ID. 9
© VD ¹
I D = I S ª e vT  1º (2.48)
« »

where IS depends on doping levels and on the area and perimeter of the diffusion region
and VD is the diode voltage (e.g., –Vsb or –Vdb). When a junction is reverse biased by sig-
nificantly more than the thermal voltage, the leakage is just –IS, generally in the 0.1–0.01
fA/Rm2 range, which is negligible compared to other leakage mechanisms.
More significantly, heavily doped drains are subject to band-to-band tunneling
(BTBT) and gate-induced drain leakage (GIDL).
BTBT occurs across the junction between the source or drain and the body when the
junction is reverse-biased. It is a function of the reverse bias and the doping levels. High
halo doping used to increase Vt to alleviate subthreshold leakage instead causes BTBT to
grow. The leakage is exacerbated by trap-assisted tunneling (TAT) when defects in the sili-
con lattice called traps reduce the distance that a carrier must tunnel. Most of the leakage
occurs along the sidewall closest to the channel where the doping is highest. It can be
modeled as
E1g.5
Ej B
Ej
I BTBT = WX j A Vdd e (2.49)
E g0.5

where Xj is the junction depth of the diffusion, Eg is the bandgap voltage, and A and B are
technology constants [Mukhopadhyay05]. The electric field along the junction at a reverse
bias of VDD is

2qN halo N sd © N halo N sd ¹

Ej = ªV DD + vT ln (2.50)
(
J N halo + N sd ) « ni2
º
»
GIDL occurs where the gate partially overlaps the drain. This effect is most pro-
nounced when the drain is at a high voltage and the gate is at a low voltage. GIDL current
is proportional to gate-drain overlap area and hence to transistor width. It is a strong func-
tion of the electric field and hence increases rapidly with the drain-to-gate voltage. How-

9
Beware that ID and IS stand for the diode current and diode reverse-biased saturation currents, respective-
ly. The D and S are not related to drain or source.