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CMOS Technologies: Chapter 3 CMOS Processing Technology
CMOS Technologies: Chapter 3 CMOS Processing Technology
CMOS Technologies: Chapter 3 CMOS Processing Technology
The chapter begins with the steps of a generic process characteristic of commercial 65
nm manufacturing. It also surveys a variety of process enhancements that benefit certain
applications. The chapter examines layout design rules in more detail and discusses layout
CAD issues such as design rule checking.
Pulling
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Member
3.2.1 Wafer Formation
Seed
The basic raw material used in CMOS fabs is a wafer or disk of silicon, roughly 75 mm to
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Holder 300 mm (12––a dinner plate!) in diameter and less than 1 mm thick. Wafers are cut from
boules, cylindrical ingots of single-crystal silicon, that have been pulled from a crucible of
10 pure molten silicon. This is known as the Czochralski method and is currently the most
Si Boule common method for producing single-crystal material. Controlled amounts of impurities
Heating 7 Surface are added to the melt to provide the crystal with the required electrical properties. A seed
Coil crystal is dipped into the melt to initiate crystal growth. The silicon ingot takes on the
4 same crystal orientation as the seed. A graphite radiator heated by radio-frequency induc-
tion surrounds the quartz crucible and maintains the temperature a few degrees above the
3 8 Molten Si melting point of silicon (1425 °C). The atmosphere is typically helium or argon to prevent
the silicon from oxidizing.
Crucible The seed is gradually withdrawn vertically from the melt while simultaneously being
FIGURE 3.2 Czochralski rotated, as shown in Figure 3.2. The molten silicon attaches itself to the seed and recrys-
system for growing Si boules tallizes as it is withdrawn. The seed withdrawal and rotation rates determine the diameter
(Adapted from [Schulmann98].) of the ingot. Growth rates vary from 30 to 180 mm/hour.