Addis Ababa University

Addis Ababa University
Addis Ababa Institute of Technology
School of Electrical and Computer Engineering
Performance Analysis of Time and Frequency Synchronization
Techniques for Digital communication.
By: Leul Wuletaw
Advisor: Dr. -Ing. Dereje Hailemariam
Date of submission: 7, FEB 2016

Performance Analysis of Time and Frequency Synchronization Techniques for Digital
Communication
Table of Figures
Figure 1: The work flow of carrier recovery algorithms ............................................................................... 7
Figure 2: The work flow of symbol timing estimation algorithms ................................................................ 8
Figure 3: Rectangular pulse signal .............................................................................................................. 11
Figure 4: Raised Root cosine filter .............................................................................................................. 13
Figure 5: BPSK transmission [6] .................................................................................................................. 15
Figure 6: Phase Locked Loop [8] ................................................................................................................. 20
Figure 7: Block diagram of Costas Loop [1]................................................................................................. 21
Figure 8: Carrier recovery using Square-law device [1] .............................................................................. 22
Figure 9: Early-late timing error computation [6]....................................................................................... 25
Figure 10 Mueller and muller timing error computation [6] ...................................................................... 26
Figure 11: Gradient based timing error computation................................................................................. 27
Figure 12: PLL carrier tracking for different loop coefficients .................................................................... 30
Figure 13: PLL carrier tracking for different LPF cutoff frequency.............................................................. 31
Figure 14: Costas loop carrier tracking for different loop coefficients ....................................................... 32
Figure 15: Costas loop carrier tracking for different LPF cutoff frequency ................................................ 33
Figure 16: Squaring loop tracking for different loop coefficients ............................................................... 34
Figure 17: Squaring loop tracking for different LPF cutoff frequency ........................................................ 35
Figure 18: Early-late gate symbol timing recovery ..................................................................................... 38
Figure 19: Mueller and muller symbol timing recovery for different constants ........................................ 40
Figure 20: Gradient based symbol timing recovery for different constants............................................... 41
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Table of Contents
Introduction ..................................................................................................................................1
Background ............................................................................................................................................... 1
Problem Statement ................................................................................................................................... 2
Objective ................................................................................................................................................... 3
Literature Review ...................................................................................................................................... 4
Methodology ............................................................................................................................................. 6
Document Organization ............................................................................................................................ 9
Basics of Digital Communication ...........................................................................................10

Signal Transmission and Pulse Shaping ................................................................................................... 10
Signal Detection in Digital Receiver ........................................................................................................ 13
Signal Detection .................................................................................................................................. 13
Matched Filtering ................................................................................................................................ 14
Carrier and Symbol Synchronization ....................................................................................................... 17
Signal Parameter Estimation............................................................................................................... 17
Carrier Phase Recovery Algorithms .................................................................................................... 18
Symbol Timing Estimation Algorithms ............................................................................................... 22
Result and Discussion ...............................................................................................................29

Carrier Phase Recovery Algorithms......................................................................................................... 29
Phase Locked Loop.............................................................................................................................. 29
Costas Loop ......................................................................................................................................... 32
Squaring Loop ..................................................................................................................................... 34
Computation Time Analysis of Carrier Phase Recovery Algorithms ................................................... 36
Symbol Timing Estimation Algorithms .................................................................................................... 36
Early-Late Gate Algorithm................................................................................................................... 36
Mueller and Muller Algorithm ............................................................................................................ 39
Gradient Based Algorithm .................................................................................................................. 40
Computation Time Analysis of Symbol Timing Estimation Algorithms............................................... 42
Conclusion ............................................................................................................................................... 42
Conclusion and Recommendation..........................................................................................43

References....................................................................................................................................44
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Abstract
Synchronization is a very important entity for several applications revolving
around the communication industry including the design of digital receivers.
During design, adopting a synchronization technique to a system poses difficulty
in choosing the right technique. And in the same token, availability of works
done in performance analysis of synchronization techniques will enable to pass
difficulties faced while making a choice. This project presents performance
analysis of algorithms used for carrier and symbol timing synchronization in
digital communication. Methods used to extract, characterize, and compare
synchronization techniques from their guiding algorithms are suggested and
discussed. Each algorithm is implemented and evaluated in software
implementation using MAT LAB.
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1. Introduction
1.1.Background
Digital communication system requires estimation of phase shift for proper
demodulation and detection, i.e., coherent reception. In turn, Coherent reception
necessitates the use of synchronization techniques [2]. Furthermore, output of a
demodulator must be sampled periodically, once per symbol interval, in order to
recover the transmitted symbol [1]. Hence, synchronization is an integral part of a
communication system, and the quality of the received signals is greatly affected by the
synchronization system.
Unknown propagation delay from the transmitter to the receiver and the random
carrier offset between the local oscillators at the transmitter and receiver are the main
reasons for the requirement of synchronization systems in the receiver [1]. Therefore,
receivers are required to estimate phase offset and symbol timing errors from the
received signal to correctly detect and sample output of demodulator.
Synchronization was initially performed using analog circuits, which were bigger in
size and power consumption. But with the advent of digital circuitries, these limiting
factors have been minimized [3]. Digital sampled signals provide a very fast and
accurate way of performing synchronization. They leverage state of the art Digital
Signal Processing (DSP) mechanisms for efficient implementation of synchronization
algorithms.
Generally, performing synchronization at the front end of a receiver is inevitably the
best solution for digital communication. These two modes of synchronization, i.e.
carrier and symbol timing synchronization can be coincident with each other or they
can occur sequentially one after the other [2].
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1.2.Problem Statement
Despite availability of independent implementations and analysis of specific
synchronization techniques conducted by experts, there is lack of a comprehensive
performance analysis made which would serve as a platform for comparing various
synchronization techniques.
Increasing demand of digital receivers locally necessitates the use of efficient
synchronization techniques subject to the requirement of the designer (vendor). As a
result, various synchronization techniques may be put forward as a candidate. But
selecting the one that suits best for a given application requires thorough investigation.
And this all requires conducting a broad survey of available synchronization
techniques.
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1.3. Objective
1.3.1. General Objective
Performance analysis of time and frequency synchronization techniques for digital
communication is the main goal of this project.
1.3.2. Specific Objectives
 To study and identify approaches to perform time and frequency
synchronization.
 To design and implement each synchronization approach.
 To identify factors affecting the performance of each algorithm and their
computational requirement.
 To develop visual depiction of each synchronization algorithm’s performance
based on those factors.
 To make comparison amongst each synchronization algorithm’s performance.
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1.4. Literature Review
Ample of literatures have been revised on different approaches and techniques of
synchronization. This Section goes through the major literatures available on techniques
for digital communication. Different approaches for synchronization in digital
communication have been studied in various literatures. The use of algorithmic
approach for synchronization is described in [1]. Classical way of synchronization is
also described in [4]. The author of [2] uses data aided and non-data aided
synchronization for carrier and symbol timing estimation.
Synchronization using algorithmic approach is also studied in some literature. [8]
explains how an algorithm built provides an estimate on an iteration-by-iteration basis.
A simulation based phase locked loop (PLL) for carrier recovery is also discussed in [7].
The authors of [10] designed a simple and efficient carrier recovery technique for a
single carrier transmission system.
All the aforementioned papers depend on mathematical formulations for their
algorithms. There is also some research on developing and using mathematical
equations. A deep mathematical assessment behind the working principle of carrier
synchronization is discussed in [8]. Authors of [1] briefly assessed tradeoffs involved in
varying different parameters within a mathematical equation. In another book, [5] the
same authors emphasized on figurative description of the performance of guiding
mathematical equations with respect to their parameters. On the other hand
mathematical equations guiding symbol timing synchronization in Early-late gate and
Mueller & muller algorithm is put forward in [6]. Additionally, [8] derives and
illustrates mathematical function used by the gradient based algorithm to compute the
symbol timing synchronization.
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Both the mathematical derivation and experimental simulation above focus only in
implementation of the techniques. The Master’s thesis, [9] describes in detail criterions
that need to be considered for analysis of symbol timing synchronization techniques.
The author of [3], also describes digital implementation of PLL and its advantage over
the classical implementations based on a set of criterions.
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1.5. Methodology
Before delving in to the methods taken to attain the objective of the project, there have
been choices made based on literature review in the initial phase of the implementation.
1.5.1. Choice of Approach and Synchronization Techniques
As briefly discussed in Section 1.4 about approaches available to perform
synchronization with their advantages, I will be using the modern (algorithmic)
approach. This approach allows the use of DSPs on baseband signals and is a modern
trend adopting the digital world.
From the wide pool of synchronization techniques developed for both carrier and
symbol timing. I have chosen six techniques which have fundamental behavior and
wider scope. PLL, Costas loop, and Squaring loop are chosen for carrier
synchronization due to their wider practical application and usage as a fundamental
entity for almost all other synchronization techniques. Early-late gate, Gradient based,
and Mueller and muller algorithms are the selected candidates for symbol timing
synchronization. As it will be later discussed in Section 2.3, they represent a wider
domain of timing synchronization, i.e. the first two are non-decision directed, while
Mueller and muller is decision directed.
1.5.2. Procedures for Software Implementation of the Algorithms
A series of common steps have been used to analyze the performance of algorithms
used for carrier and symbol timing recovery. The design and implementation of a
synchronization technique is performed using four basic steps for each category:
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i. Carrier phase recovery algorithms
1. Identifying independent entities (blocks) making up the whole system.
2. Implementing each entity independently based on mathematical equation
guiding them. And defining factors (coefficients) affecting those entities in
addition to their computational requirement.
3. Cascading the entities altogether and evaluating their final output (performance).
4. Examining the effect of varying those coefficients on the algorithm’s
performance.
Carrier Signal Generation

at Transmitter
Carrier Recovery Down conversion and

Algorithm- Controls Matched filtering at
Receiver’s Phase using Receiver- with different
Feedback Phase from the
Transmitter
Demodulation Phase plot
Figure 1: The work flow carrier phase recovery algorithms
ii. Symbol timing estimation algorithms
1. Identifying the mathematical equation (error function) guiding the algorithm and
its computational requirement.
2. Defining factors (coefficients) within the error function affecting the algorithm.
3. Implementing the algorithm and evaluating its final output (performance).
4. Varying those factors to examine their effects on the algorithm’s performance.
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Carrier Signal Generation

at Transmitter
Symbol Timing Recovery Down conversion and

Algorithm- Controls Matched filtering at
Sampling Time using Receiver- with different
Feedback Phase from the
Transmitter
Demodulation
Symbol Timing
Error plot
Figure 2: The work flow of symbol timing estimation algorithms
1.5.3. Comparison between Algorithms
A comparison between algorithms is made based on:
1. Performance of the algorithm based on their tracking capability.
2. External requirements of the algorithm such as computational complexity.
Performance analysis of synchronization techniques is made based on their outcome for
the above two criteria.
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1.6. Document Organization
This document is sub divided in to three chapters, i.e. introduction, basics of digital
communication, and result and discussion. The first chapter introduces the term
synchronization in general and the reasons for requiring synchronization with their
significance. It also mentions a few techniques (algorithms) used for synchronization in
receivers, how they have been implemented, and the methods adopted in the project to
implement those techniques. The second chapter gives further information revolving
around digital communication. Portion of the chapter is dedicated for emphasizing on
the transmission and reception of digital information across digital communication. It
delivers a solid background understanding behind the carrier and symbol timing
recovery mentioned in the first chapter. The third chapter focuses on final outputs of
the project, i.e. the results gained from the implementation. It points out the
interpretation and analysis made from those results. Finally, conclusions are drawn
from the outcomes in conjunction with recommendation for any future works that may
advance this project.
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2. Basics of Digital Communication

2.1.Signal Transmission and Pulse Shaping
For simultaneous transmission of multiple signals on a common channel, it is a must to
adopt ways of efficiently using the scarce resource, i.e. spectrum. Signals transmitted in
the air are sent on spectral band limit in order to avoid spectral misuse and interference
with each other. The simplest way to transmit data is rectangular pulse which has an
infinite bandwidth extension. But, it was limited for use on Baseband Digital
communication since it interferes with other signal’s spectrum on Passband Digital
communication. The figure below shows time and frequency domain representation of
a rectangular pulse. On the other hand, limiting the spectral width will significantly
disrupt time domain representation of a transmitted signal resulting in inter-symbol
interference (ISI) when the sharp falling edges of these signals are filtered off.
(a) Time domain representation
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(b) Frequency domain representation
Figure 3: Rectangular Pulse signal
Pulse shaping is a process of adjusting waveform representation of pulses to be
transmitted in digital communication system in such a way that their effective
bandwidth is limited. It maintains a tradeoff between the spectral width and symbol
spread. If spectral width of a waveform has sharp edge (filtered), it will spread in time
domain resulting in ISI. Whereas relaxing the spectral width minimizes the symbol
spread in the time domain. Generally, a pulse shaping filter needs to satisfy the Nyquist
ISI criterion for compromising the inter-symbol interference with the frequency
spectrum. The spectrum of the transmission is thus determined by the filter.
Typically pulse shaping occurs at the front end of transmitter after coding and
modulation. There are many ways of implementing pulse shaping such as Sinc filter,
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Gaussian filter, and Raised Cosine filter. Sinc filter also known as Boxcar filter has its
frequency domain equivalent to a rectangular shape. Theoretically it is the best pulse
shaping filter, but it cannot be implemented precisely. The fact that it is a non-causal
filter with relatively slowly decaying tails makes it impracticable from a
synchronization point of view as any phase error results in steeply increasing ISI. On
the other hand, Raised cosine filters are the commonest pulse shaping filters used in
practical implementation. They are robust to ISI and offer configurable excess
bandwidth enabling tradeoff between a simpler filter and spectral efficiency [5]. The
figure below shows a Raised cosine filter in both time and frequency domain.
(a) Time domain representation
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(b) Frequency domain representation
Figure 4: Raised Root cosine filter
2.2.Signal Detection in Digital Receiver
2.2.1. Signal Detection
Signal detection is a more complex and computationally intensive part of a receiver.
The operation it performs depends on the presence of AWGN and interference within
the transmitted signal. The receiver uses various techniques to minimize the effect of
AWGN on the transmitted signal such as matched filtering.
Imagine the simple case of a rectangular pulse, such as that shown in the top half of
Figure 3. A data symbol of +1 is indicated by transmitting a pulse with amplitude of +1,
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and similarly, a data symbol of -1 is indicated by transmitting a pulse with amplitude of
-1. The period of these pulses, T, is 8. Note that the one pulse is simply a negated
version of the other. And this signaling set is said to be antipodal. In the absence of
noise, it is simple to identify the transmitted pulse shape. But in the presence of noise
the received signal might be severely distorted and necessitates for more robust signal
estimation scheme. The lower half of Figure 3 shows the same pulse sequence for the
case of noisy signal [6].
2.2.2. Matched Filtering
Practically, due to the presence of infinite noise power during transmission, the
need for robust scheme was necessary. Practical receivers estimate the transmitted
signal by using a technique known as matched filtering [6]. “Matched” in the sense that
the shape of the filter, used for filtering the received signal, has the same shape with the
transmitted signal pulse, usually raised cosine filter. The matched filter's pulse shape is
a time-reversed version of the transmit pulse shape. Thus, if the transmit pulse shape
ℎ(𝑡) is defined as
ℎ(𝑡) for 0 ≤ t ≤ T
then the ideal matched filter's response ℎ𝑚 (𝑡) is:
ℎ𝑚 (𝑡) = ℎ(𝑇 − 𝑡) for 0 ≤ t ≤ T (2. 1)
The output of the filter is sampled at symbol period, T. Matched filtering technique
accomplishes two functions at a time. First, it has a low-pass frequency response
passing only the data signal. As a result, it filters-off and attenuates large portion of
noise spectrum minimizing the total noise power in the received signal. A second and
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its main advantage is that a matched filter correlates the received signal with the
transmit pulse shape over the symbol period T [6].
Ideal BPSK symbols

2
Amplitude
-2
8 16 24 32 40 48 56 64 72 80
Sample index [n]
Transmitted BPSK symbols (with noise)
2
Amplitude
-2
8 16 24 32 40 48 56 64 72 80
Sample index [n]
Matched Filter (Averaging Filter) output
10
Amplitude
-10
8 16 24 32 40 48 56 64 72 80
Sample index [n]
Figure 5: BPSK transmission [6]
Passing a received signal 𝑟(𝑡)through a filter ℎ𝑚 (𝑡) is a convolution operation. The
convolution of these two signals can be written as:
𝑜
(2. 2)
𝑦(𝑡) = ∫ 𝑟(𝑡)ℎ𝑚 (𝑇 − 𝑡)𝑑𝑡
𝑇
where y(t) represents the output of the matched filter sampled at time T.
However, the matched filter's response was defined as ℎ𝑚 (𝑡) = ℎ(𝑇 − 𝑡). By
substituting this definition into the above equation, the following integral is obtained:
𝑜
(2. 3)
𝑦(𝑡) = ∫ 𝑟(𝑡)ℎ(𝑡)𝑑𝑡
𝑇
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The above equation shows the cross-correlation of r(t) with h(t) sampled at time T.
It illustrates how matched filtering results in correlation gain by integrating signal
energy while averaging out the zero-mean AWGN [6].
An example of matched filtering is shown in the middle graph of Figure 1. The
received signals for the top and bottom halves of the figure are the signals shown in the
top graph of Figure 1. The matched filter used was:
ℎ𝑚 (𝑡) = 2 for 0 ≤ t ≤ T (2. 4)
Note that sampling the matched filter output at time T = 8 provides the sample
with the highest SNR. The samples from Figure 1 had amplitude of 1, whereas the
matched filter output (when sampled properly) has a value of 7. This simple example
illustrates how matched filtering provides the receiver with a stronger signal to work
with compared to directly sampling the received signal [6].
Note that the received signal is severely distorted by noise, but the matched filter's
output is still close to its ideal value for the case of no noise. This result is possible
because the matched filter filters out the higher frequency noise and then integrates the
remaining lower frequency noise over a time period of T. Because AWGN is zero-mean,
this integration effectively averages out the noise [6].
As can be seen from Figure 1, it is important to sample the matched filter's output
exactly at time T to obtain the sample with the highest SNR. Sampling the matched
filter's output at some time T + Δ, (where Δ represents a receiver timing offset) will
significantly reduce the effective SNR seen by subsequent receiver blocks [6].
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2.3.Carrier and Symbol Synchronization
2.3.1. Signal Parameter Estimation
The received signal at receiver is a delayed version of the transmitted signal corrupted
with Gaussian noise. Hence, the received signal may be expressed as
r(𝑡) = s(𝑡 − τ) + 𝑛(𝑡) (2. 5)
where s(𝑡) = Re{𝑠𝑙 (𝑡)∗ 𝑒 j2πfct }
where τ is the propagation delay and 𝑠𝑙 (𝑡) is the equivalent low-pass signal [1].
The received signal may be expressed as:
r(𝑡) = Re{(𝑠𝑙 (𝑡 − τ) 𝑒 jφ + 𝑧(𝑡)) ∗ 𝑒 j2πfct } (2. 6)
where the carrier phase φ, due to the propagation delay τ, is φ = 2πfcτ [1].
So the receiver is required to estimate both the propagation delay (τ) and the carrier
phase φ. Carrier phase shift is assumed to be only the result of propagation delay,
however, its the sum total effect of the time delay and phase offset between the
transmitter and receiver oscillator [1].
In effect, we must estimate both parameters τ and φ in order to demodulate and
coherently detect the received signal. Hence, we may express the received signal as
r(𝑡) = s(𝑡; φ, τ) + 𝑛(𝑡) (2. 7)
where φ and τ represent the signal parameters to be estimated [1].
Estimation of these parameters is performed using two criteria, namely maximum-
likelihood (ML) criterion and maximum a posteriori probability (MAP) criterion [1].
In the MAP criterion, the signal parameter vector θ, representing the estimate of both
phase offset and time delay, is modeled as random and characterized by an a priori
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probability density function p(θ). In the maximum-likelihood criterion, the signal
parameter vector θ is treated as deterministic but unknown [1].
By performing an orthonormal expansion of r(𝑡) the joint PDF of the random variables
(r1r2···rN) in the expansion can be expressed as p(𝑟/θ). Then, the ML estimate of θ is the
value that maximizes p(𝑟/θ). On the other hand, the MAP estimate is the value of θ that
maximizes the a posteriori probability density function [1].
p(𝑟/θ) ∗ p(θ) (2. 8)

p(θ/𝑟) =
p(𝑟)
We note that if there is no prior knowledge of the parameter vector θ, we may assume
that p(θ) is uniform (constant) over the range of values of the parameters. In such a
case, the value of θ that maximizes p(𝑟/θ) also maximizes p(θ/𝑟). Therefore, the MAP
and ML estimates are identical [1].
The time interval required for observing the received signal in order to estimate the
signal parameters is known as observation interval. Estimates obtained from a single
observation interval are sometimes called one-shot estimates. However, practically,
tracking loops that continuously update the estimates are used. They are essential to
track parameter changes induced by the time-varying channel in the middle of
transmission [1].
2.3.2. Carrier Phase Recovery Algorithms
An oscillator at the transmitter generates a sinusoidal carrier signal that ideally
exists at some known carrier frequency. Due to oscillator drift, the actual frequency of
the carrier will deviate slightly from the ideal value. This carrier is multiplied by the
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data to modulate the signal up to a passband center frequency. At the receiver, the
passband signal is multiplied by a sinusoid generated by the local oscillator [6].
The presence of this phase offset will cause the received signal constellation to
rotate. This “rotating” effect must be removed before accurate symbol decisions can be
made. The purpose of the carrier recovery loop is to remove this carrier offset so that
the signal can be processed directly at baseband [6].
There are basically two ways to perform carrier synchronization at the receiver. The
first one being multiplexing of a special signal, called pilot signal, which enables the
receiver to extract and synchronize its local oscillator to the incoming carrier phase and
frequency. The disadvantage of this approach is that a portion of the transmitted power
is dedicated to the transmission of the pilot signal [1].
In the second approach, the receiver performs carrier phase estimate directly from the
modulated signal or suppressed carrier. The allocation of the total power for the
transmission of information-bearing signal makes this approach advantageous [5].
2.3.2.1. Phase Locked Loop (PLL)
It is the earliest way of carrier recovery technique used in both analog and digital
circuitries. Still, PLL forms the basic entity of the advanced synchronization circuits [8].
Conventional PLL consists of three elements, i.e. Phase Detector (PD), Loop Filter, and
Voltage Controlled Oscillator (VCO). As shown in the diagram below, it uses a feedback
loop to keep track of the phase of the incoming signal.
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Figure 6: Phase Locked Loop [8]
A PD, usually a multiplier is used to determine the phase difference between the locally
generated and received signal as an error signal. It contains a low pass filter to filter out
noise and higher frequency components from the error signal. Loop filter is used to
adjust (control) the phase of the locally generated signal from the VCO depending on
the error signal output from the PD. Depending on the application of the PLL different
order of loop filters are used to drive the VCO. For tracking a phase of incoming signal
first order loop filter is sufficient.
Even though PLL proves to be fast enough in tracking change in phase of incoming
signal, it is incapable of tracking a modulated suppressed carrier. Due to its inability to
track signals whose amplitude changes now and then, it requires tracking period before
transmission begins.
2.3.2.2. Costas Loop
The Costas loop was proposed by American engineer John Costas of General Electric in
1956. A Costas loop is a data recovery and carrier tracking circuit. It is highly used in
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digital communications applied for mobile phones, Global Positioning System (GPS),
telecommunication devices, etc [1].
The figure below shows the Costas loop, which uses the same elements of a
conventional PLL, but in a different way.
Figure 7: Block diagram of Costas Loop [1]
The development of Costas lop was aimed at improving the limitations of the PLL.
Costas loop uses two quadrature outputs from the VCO to feed the two phase detectors.
The incoming received signal is applied to both phase detectors and passed through
low-pass filter. A third PD is used to aggregate the outputs from the two PD passing
through a loop filter to control the VCO.
Costas loop is sufficiently capable of tracking modulated suppressed carrier, the main
drawback of conventional PLL. But it comes with a cost of delayed tracking time to lock
the received signal.
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2.3.2.3. Squaring Loop
The Squaring loop, as its name refers squares the received signal before the tracking
phase begins. It employs a bandpass filter to only pass the double frequency component
of the squared signal [1]. As shown in the diagram below, the rest elements are the
same with a conventional PLL.
Figure 8: Carrier recovery using Square-law device [1]
A PD is used to detect the phase difference between the double frequency component
and the VCO output. The Loop filter will vary the VCO according to the output from
the PD. As opposed to others, Squaring loop contains a frequency divider, which is
used to output a signal at the same frequency as the initial received signal.
2.3.3. Symbol Timing Estimation Algorithms
Prior to demodulation, the receiver has to know the starting and ending times of
each symbol so that the demodulator can determine the instant to sample incoming
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symbols. It is the process of estimating these instants named as Symbol timing
estimation.
Symbol synchronization can be achieved by determining two quantities, i.e.
sampling frequency and sampling phase. Sampling frequency refers to the rate at which
sample are taken from each symbol [6]. Usually the symbol period is known by the
receiver from the outset. Sampling phase refers to the correct time within a symbol
period to take a sample. Since a symbol pulse (raised cosine filtered) have a peak in the
center of the symbol period, sampling them at this instant results in the best signal-to-
noise ratio free of ISI.
The two quantities mentioned above can be accomplished in several ways.
Utilizing a master clock, which provide a very precise atomic clock, is used to
synchronize both the transmitter and receiver clocks. In this case the receiver is only
required to estimate and compensate for the time delay between the transmitted and
received signal. It is applicable for radio communication systems that operate in the
VLF band, where the master radio station provides clock signals [1].
The other method for achieving symbol synchronization is by using pilot signal,
which is used to transmit the clock frequency along with the information signal. It is
easy to implement at the receiver, since it requires only a narrowband filter to extract
the clock signal. However, it is disadvantageous that a dedicated power and bandwidth
need to be allocated for the transmission of the clock signal. In spite of these
disadvantages, this method is frequently used in telephone transmission systems that
employ large bandwidth to transmit the signals of many users [1].
A clock signal can also be extracted from the received data signal. There are a
number of different methods that can be used at the receiver to achieve self-
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synchronization [1]. This method is best in terms of power and bandwidth efficiency
but it is computationally intensive.
2.3.3.1.Decision Directed
It is used in applications requiring minimum time for synchronization such as wireless
and satellite communication. At the start of the carrier recovery process it is possible to
achieve symbol synchronization prior to full carrier recovery because symbol timing
can be determined without knowledge of the carrier phase or the carrier's minor
frequency variation/offset. In decision directed symbol timing recovery the output of a
symbol decoder is fed to a comparison circuit and the error between the decoded
symbol and the received signal is used to discipline the VCC. Decision directed
methods are suited to synchronizing frequency differences that are less than the symbol
rate because comparisons are performed on symbols at, or near, the symbol rate. Other
frequency recovery methods may be necessary to achieve initial frequency acquisition
[1].
2.3.3.2.Non-Decision Directed
Non-Decision-directed/"blind" symbol timing recovery methods do not rely on any
knowledge of the modulation symbols [1]. They are typically used for simple symbol
timing recovery schemes. Closed-loop non-data-aided systems are frequently maximum
likelihood symbol phase error detectors.
2.3.3.3.Early-Late Gate Algorithm
This algorithm uses the symmetrical property of the received symbols about the middle
(peak) sample of the symbol. As shown in the figure below the center of the symbols is
the best sampling instant for maximum SNR [6]. This timing recovery algorithm
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generates its error by using samples that are early and late compared to the ideal
sampling point. The generation of the error requires at least three samples per symbol.
The samples indicate the direction towards to the center of the symbol.
Figure 9: Early-late timing error computation [6]
The middle plot is for the case where sampling is occurring early. Note that the early
and late samples are at different amplitudes. This difference in amplitude is used to
derive an error for the timing recovery loop. Once the timing recovery loop converges,
the early and late samples will be at equal amplitudes.
Three things can be deduced from the diagram [6]:
1. If the early sample is equal to the late sample, the sampling instant occurs at the
peak of the symbol.
2. If the early sample is greater than late sample, the sampling is late-timed. So the
next symbol is sampled at some offset (T- δ) from the current sampling time.
3. If the early sample is less than late sample, the sampling is early-timed. So the
next symbol is sampled at some offset (T+ δ) from the current sampling time.
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The middle sample lying between the early and late samples is used for later processing
such as decision circuit. One drawback of the early-late gate algorithm is the
requirement of three samples per symbol, making it unachievable and computationally
intensive for higher data rates.
2.3.3.4.Mueller and Muller Algorithm
The Mueller and muller algorithm requires one sample per symbol. And uses samples
from two consecutive symbols in conjunction with the decision device (slicer) output.
The figure below shows the cases for different timing offsets [6].
Figure 10: Mueller and muller timing error computation [6]
The error term is computed using the following equation:
𝑒 = (𝑦𝑛 𝑦̂𝑛−1 ) − (𝑦𝑛−1 𝑦̂𝑛 ) (2. 9)
Where 𝑦̂𝑛 and 𝑦̂𝑛−1 are the slicer outputs for the current and previous symbol,
respectively. The samples from the current and previous symbol are 𝑦𝑛 and 𝑦𝑛−1 ,
respectively.
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This algorithm requires only one sample per symbol, making it computationally
efficient and tractable. However, the major drawback is its sensitivity to carrier offsets.
Thus Mueller and muller timing recovery require carrier recovery to be performed prior
to it.
2.3.3.5.Gradient Based Algorithm
Gradient based algorithm is an optimized version of the early-late gate algorithm used
for synchronization in digital receivers. The algorithm uses two consecutive samples
with an interval of half period between samples. Thus, requiring a maximum of two
samples per symbol. The error for the Gradient based algorithm is computed using the
following equation:
𝑒 = (𝑦𝑛 ∗ 𝑦𝑛−1 ) (2. 10)
Where the spacing between yn and yn-1 is T/2 seconds. The figure below shows how
the Gardner error equation determines correct sampling instant.
Figure 11: Gradient based timing error computation
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It can be noted that the Gradient based error is most advantageous on symbol
transitions. It is relatively small when the current and previous symbols have the same
polarity [8].
Gradient based algorithm, as opposed to Mueller and muller algorithm, has the
advantage of being insensitive to carrier offsets. The timing recovery loop can lock first,
therefore simplifying the task of carrier recovery. Hence, it has seen wide spread use in
practical symbol timing recovery implementation.
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3. Result and Discussion
It is evident that techniques mentioned in Section 2.3 have a wider scope and give an
explicit understanding when implemented. All the techniques discussed so far are
implemented in MAT LAB and these algorithms are evaluated by using variable
simulation environments.
In this Chapter, the results from the synchronization algorithms are presented in the
form of plots and discussed.
3.1.Carrier Phase Recovery Algorithms
3.1.1. Phase Locked Loop
Experiment- 1: This is an experiment done to test the tracking behavior of PLL with a
change in its loop filter coefficient. Keeping other system parameters and entities
optimally constant, we varied the loop coefficient only. First the loop coefficient was at
0.05 and increased with a step size of 0.1 up to 0.35. But here we should note that a PLL
is not capable of tracking modulated (suppressed) carrier input signal.
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Figure 12: PLL carrier tracking for different loop coefficients
The phase angle of the input signal and phase angle swept by the PLL for a range of
loop coefficients is shown Figure 13. The plot shows that:
a. As loop coefficient increases, the PLL converges fast to the required incoming
signal phase. But it exhibits oscillation about the required phase signal.
b. Decreasing loop coefficient results in lower convergence to the required
incoming signal phase but with accuracy (with little or no oscillation).
c. The PLL has almost converged for all coefficients before the 100th sample time.
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Experiment- 2: The tracking behavior of PLL is also measured with a change in the low
pass filter cutoff frequency. We kept every other system parameters and entities
optimally constant and varied the cutoff frequency only. Initially the cutoff frequency is
set 0.05𝜋 and increased with a step size of 0.15𝜋 up until 0.50𝜋.
Figure 13: PLL carrier tracking for different LPF cutoff frequency
The phase angle of the input signal and phase angle swept by the PLL for a range of
cutoff frequencies is shown Figure 14. As expected, the plot depicts that PLL converges
the same for all cases, but oscillation increases as the cutoff frequency is increased. This
is directly related to increased allowance of noise in to the system as the cutoff
frequency is increased, which results in increased oscillation.
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3.1.2. Costas Loop
Experiment- 3: This experiment is done to test the tracking behavior of Costas loop with
a change in its loop filter coefficient. Only the loop coefficient is varied keeping other
system parameters and entities optimally constant. First the loop coefficient was at 0.05
and increased with a step size of 0.1 up to 0.35.
Figure 14: Costas loop carrier tracking for different loop coefficients
The phase angle of the input signal and phase angle swept by the Costas loop for a
range of loop coefficients is shown Figure 15. The plot shows that:
a. As loop coefficient increases, the Costas loop converges fast to the required
incoming signal phase. But it exhibits oscillation about the required phase signal.
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b. Decreasing loop coefficient results in lower convergence to the required
incoming signal phase but accurately (with little or no oscillation).
c. The Costas loop has converged for all coefficients before the 7000th sample time.
Experiment- 4: The tracking behavior of Costas loop is also measured with a change in
the low pass filter cutoff frequency. We kept every other system parameters and entities
optimally constant and varied the cutoff frequency only. Initially the cutoff frequency is
set 0.05𝜋 and increased with a step size of 0.15𝜋 up until 0.50𝜋.
Figure 15: Costas loop carrier tracking for different LPF cutoff frequency
Figure 16 shows phase angle swept by the Costas loop for a range of cutoff frequencies
and phase angle of the input signal. As expected, the plot depicts that the Costas loop
converges the same for all cases, but oscillation increases as the cutoff frequency is
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increased. Additionally, inaccuracy increases as the cutoff frequency increases due to
the combined effect of pair of low pass filters used in the Costas loop.
This is directly related to increased allowance of noise in to the system as the cutoff
frequency is increased, which results in increased oscillation.
3.1.3. Squaring Loop
Experiment- 5: The objective of this experiment is to verify the tracking behavior of
Squaring loop with a change in its loop filter coefficient. Only the loop coefficient is
varied keeping other system parameters and entities optimally constant. First the loop
coefficient was at 0.05 and increased with a step size of 0.1 up to 0.35.
Figure16: Squaring loop tracking for different loop coefficients
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Figure 17 clearly shows variant of loop filter constants used for tracking the input
signal. It depicts that increasing loop coefficient of the Squaring loop enable fast
convergence but with increased oscillations and inaccuracies during tracking. Still, the
sample time it takes to converge is around 9000 sample time, which is inferior to both
PLL and Costas loop.
Experiment- 6: In this experiment the tracking behavior of Squaring loop is also
measured with a change in the low pass filter cutoff frequency. Except the cutoff
frequency, we kept every other system parameters and entities optimally constant. The
cutoff frequency is initialized with 0.05𝜋 and increased with a step size of 0.15𝜋 up
until 0.50𝜋.
Figure 17: Squaring loop tracking for different LPF cutoff frequency
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Figure 18 shows the tracking capability of the Square loop for different cutoff
frequencies. It can be deduced that increasing cutoff frequency results in oscillation
about the mean value and also inaccuracies increase significantly due to the use of two
low pass filters inletting some noise.
3.1.4. Computation Time Analysis of Carrier Phase Recovery Algorithms
The average computational time it takes to compute all the four PLLs shown in Figure
19, the four Costas loops shown in Figure 20, and the four Squaring loops shown in
Figure 21 is 0.1890, 0.2748, 0.2900 second. Each Hence the time it takes to compute a
single sample is:
t 1 0.1890 1
 total
t sample = total no.of ∗ no.of samples = ∗ 10000 = 4.725µs ⁄sample for the PLL.
PLLs 4PLL
PLL PLL
0.2748 1
 t sample = = ∗ 10000 = 6.871µs ⁄sample for the Costas loop.
4 Costas loop
Costas loop
0.2818 1
 t sample = = ∗ 10000 = 7.045µs ⁄sample for the Squaring loop.
4 Squaring loop
Squaring loop
3.2.Symbol Timing Estimation Algorithms
3.2.1. Early-late Gate Algorithm
Experiment 7: In this experiment, the guiding principles of early-late gate described in
Section 2.3 are implemented on MAT LAB. The guiding equation used to implement the
algorithm is:
𝑒 = 𝐾 ∗ { ‖𝑦(𝑛 + 𝛿)‖ 2 − ‖𝑦(𝑛 − 𝛿)‖ 2 }, where 𝐾=constant, 𝛿 = sample spacing,
y(𝑛) = nth sample.
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𝐾=1 𝐾=5
𝐾 = 10 𝐾 = 100
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𝐾 = 3500 𝐾 = 4000
(a) Early-late gate symbol timing recovery for different constants and 𝜹 = 𝟏𝟐
𝛿 = 12 𝛿 = 100
𝛿 = 150 𝛿 = 200
(b) Early-late gate symbol timing recovery for different sample spacing and 𝑲 = 𝟏𝟎
Figure 18: Early-late gate symbol timing recovery
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Convergence of the algorithm towards to center of the symbol is depicted in Figure 22.
It is evident that increasing the constant 𝐾 and decreasing the sample spacing (𝛿 ) has
increased convergence of the algorithm. The algorithm reaches to 0.2% of the central
sample in the symbol and has got good accuracy.
But Early-late gate is computationally intensive that it requires three samples per
symbol period to perform its operation.
3.2.2. Mueller and Muller Algorithm
Experiment 8: The Mueller and muller algorithm guided by Equation 2.9 is
implemented in MAT LAB using the following equation:
𝑒 = 𝐾 ∗ {𝑦̂𝑛 ‖𝑦(𝑛)‖ 2 − 𝑦̂𝑛+1 ‖𝑦(𝑛 − 𝛿)‖ 2 } , where 𝐾=constant, 𝑇=symbol period, 𝛿 = sample
shift = 𝑇 , y(𝑛) = nth sample, 𝑦̂𝑛 =slicer output.
𝐾 = 100 𝐾 = 1000
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𝐾 = 2000 𝐾 = 5000
Figure 19: Mueller and muller symbol timing recovery for different constants
As can be seen from Figure 23, convergence of the algorithm towards to the center is
fast enough and can further be accelerated by increasing the constant 𝐾. The algorithm
is decision directed based making its accuracy somewhat comparable to early-late gate
algorithm.
Mueller and muller algorithm requires only one sample per symbol with an interval of
symbol period (T), making it computationally less intensive.
3.2.3. Gradient Based Algorithm
Experiment 9: The tracking characteristics of the Gradient based algorithm is
implemented in MAT LAB using the guiding Equation 2.10.
𝑇
𝑒 = 𝐾 ∗ (𝑦𝑛 ∗ 𝑦𝑛−1 ), where 𝐾=constant, 𝑇=symbol period, 𝛿 = sample shift = ,
2
𝑦𝑛 = nth sample.
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𝐾 = 100 𝐾 = 500
𝐾 = 1500 𝐾 = 4000
Figure 20: Gradient based symbol timing recovery for different constants
As can be seen from Figure 24, convergence of the algorithm towards to the center is
fair enough. Additionally, increasing the constant 𝐾 enables fast tracking sample time.
But it has inferior accuracy than the others resulting in remnant values at higher sample
time in the plot. Gardener’s algorithm requires two samples per symbol with an interval
𝑇
of 2 making it computationally tractable.
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3.2.4. Computation Time Analysis of Symbol Timing Estimation Algorithms
The average computational time it takes to compute the Early-late gate algorithm
shown in Figure 25(a), the Mueller and muller algorithm shown in Figure 26, and the
Gradient based algorithm shown in Figure 27 with k=100 is 0.0029, 0.0028, and 0.000515
second. This shows that the Gradient based algorithm requires nearly tenth of the time
used by the other two algorithms.
3.3. Conclusion
From the results of the experiments performed, the following points can be concluded:
 PLL can be used in applications that can provide dedicated transmission of
training signals prior to data transmission in order to perform synchronization.
 Costas loop is best used for time-limited systems requiring fast synchronization.
For instance in real time voice and communication, synchronization need to
performed within small time such that users didn’t discern it.
 Squaring loop provides a better technique for synchronization with just a
demanding computational complexity.
 Early-late gate algorithm is suitable for applications requiring the best accuracy
in approaching the center of a symbol at the expense of computational
requirement.
 Mueller and muller algorithm has good accuracy and relaxed computational
requirement, but the system should be capable of providing decision feedback to
the synchronizer.
 Gardener algorithm suits best for less computationally intensive applications
when more emphasis is given to minimizing the delay required to reach in the
vicinity of the center of the symbol than accurately approaching the central
sample.
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4. Conclusion and Recommendation
In this project work, performance analysis of synchronization techniques is summarized
using a set of parameters. The first being tracking capability, is used to indicate how fast
a technique converges to the required value. It is also discussed the use of
computational requirement, which is utilized to indicate the sampling factor required
for each technique.
The results obtained show that a wide range of synchronization techniques with
different characteristics are available. Each technique is deemed useful depending on
the application it is launched in. Henceforth, performance analysis of synchronization
techniques could be highly assistive during design of digital receivers.
As a recommendation, upgrading the progress achieved during this project through
widening the scope of subject, i.e. considering other synchronization techniques and
including other minor parameters will enable to provide a broad spectrum analysis.
As already discussed, the creation of such platforms eases steps taken while making
selection, consequently widening and deepening the assessment of such techniques to
other entities of a digital communication system will tremendously minimize the time
and money wasted by vendors in a design process.
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References
[1] John G. Proakis, Masoud Salehi, “Digital Communications,” 5th_Edition,
McGraw-Hill, NewYork, 2008.
[2] Simon Haykin, “Communication Systems,” 4th_Edition, John Wiley & Sons, Inc.,
NewYork, 2001.
[3] Y. Linn, "Synchronization and Receiver Structures in Digital Wireless
Communications (workshop notes)," in Seminario Internacional 15 Años,
Bucaramanga, Colombia, August 15-19 2006.
[4] Carlson, A. Bruce, “Communication Systems: an introduction to signals and
noise in electrical communication,” 4th_Edition, McGraw-Hill, NewYork, 2002.
[5] John G. Proakis, Masoud Salehi, “Contemporary Communication systems using
MAT LAB,” 5th_Edition, PWS publishing company, Boston, MA, 1998.
[6] Louis Litwin, “Matched filtering and timing recovery in digital receivers
[Online],” Available: http://www.rfdesing.com, September 2007.
[7] Behzad Razavi, “Design of Monolithic Phase-Locked Loops and Clock Recovery
Circuits,” IEEExplore, 1996.
[8] Lecture “Digital Communication [Online],” Available:
http://www.ece.utah.edu/~ece6590, University of Utah, February 2008.
[9] Tauseef Ahmad, “Implementation and Optimization of High Speed Symbol
Timing Recovery Algorithms,”Master's Thesis, Dept. Comput. Sci. and Eng.,
Chalmers Univ, Gothenburg, Sweden, 2012.
[10] Meng Qiu et al., “Simple and efficient frequency offset tracking and carrier
phase recovery algorithms in single carrier transmission systems,” Optical
society of America, vol. 21, no. 7, 2013.
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Addis Ababa University

Addis Ababa Institute of Technology

School of Electrical and Computer Engineering

Performance Analysis of Time and Frequency Synchronization

Techniques for Digital communication.

By: Leul Wuletaw

Advisor: Dr. -Ing. Dereje Hailemariam

Date of submission: 7, FEB 2016

Basics of Digital Communication ...........................................................................................10

Result and Discussion ...............................................................................................................29

Conclusion and Recommendation..........................................................................................43

around the communication industry including the design of digital receivers.

During design, adopting a synchronization technique to a system poses difficulty

done in performance analysis of synchronization techniques will enable to pass

difficulties faced while making a choice. This project presents performance

analysis of algorithms used for carrier and symbol timing synchronization in

digital communication. Methods used to extract, characterize, and compare

synchronization techniques from their guiding algorithms are suggested and

discussed. Each algorithm is implemented and evaluated in software

implementation using MAT LAB.

Digital communication system requires estimation of phase shift for proper

demodulation and detection, i.e., coherent reception. In turn, Coherent reception

necessitates the use of synchronization techniques [2]. Furthermore, output of a

demodulator must be sampled periodically, once per symbol interval, in order to

recover the transmitted symbol [1]. Hence, synchronization is an integral part of a

received signal to correctly detect and sample output of demodulator.

Signal Processing (DSP) mechanisms for efficient implementation of synchronization

Generally, performing synchronization at the front end of a receiver is inevitably the

can occur sequentially one after the other [2].

Despite availability of independent implementations and analysis of specific

synchronization techniques conducted by experts, there is lack of a comprehensive

Increasing demand of digital receivers locally necessitates the use of efficient

synchronization techniques subject to the requirement of the designer (vendor). As a

result, various synchronization techniques may be put forward as a candidate. But

And this all requires conducting a broad survey of available synchronization

1.3.1. General Objective

Performance analysis of time and frequency synchronization techniques for digital

communication is the main goal of this project.

1.3.2. Specific Objectives

 To study and identify approaches to perform time and frequency

 To design and implement each synchronization approach.

 To identify factors affecting the performance of each algorithm and their

 To develop visual depiction of each synchronization algorithm’s performance

based on those factors.

 To make comparison amongst each synchronization algorithm’s performance.

1.4. Literature Review

Ample of literatures have been revised on different approaches and techniques of

for digital communication. Different approaches for synchronization in digital

communication have been studied in various literatures. The use of algorithmic

approach for synchronization is described in [1]. Classical way of synchronization is

synchronization for carrier and symbol timing estimation.

Synchronization using algorithmic approach is also studied in some literature. [8]

explains how an algorithm built provides an estimate on an iteration-by-iteration basis.

single carrier transmission system.

All the aforementioned papers depend on mathematical formulations for their

algorithms. There is also some research on developing and using mathematical

equations. A deep mathematical assessment behind the working principle of carrier

synchronization is discussed in [8]. Authors of [1] briefly assessed tradeoffs involved in

same authors emphasized on figurative description of the performance of guiding

mathematical equations with respect to their parameters. On the other hand

mathematical equations guiding symbol timing synchronization in Early-late gate and

symbol timing synchronization.