Portfolio in Electronics Technology 1 (Cacho, Kathleenjoyc.)

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PORTFOLIO

IN
ELECTRONICS
TECHNOLOGY
1
SUBMITTED TO:
ENGR. RODERICK J. CABAÑA

SUBMITTED BY:
KATHLEEN JOY C. CACHO
BS-ECE V
BASIC LOGIC
GATES
Basic Logic Gate
A logic gate is an idealized model of computation or physical
electronic device implementing a Boolean function, a logical
operation performed on one or more binary inputs that produces a
single binary output. A logic gate is a basic building block of a
digital circuit that has two inputs and one output. The
relationship between the i/p and the o/p is based on a certain
logic. These gates are implemented using electronic switches like
transistors, diodes. But, in practice, basic logic gates are built
using CMOS technology, FETS, and MOSFET(Metal Oxide Semiconductor
FET)s. Logic gates are used in microprocessors, microcontrollers,
embedded system applications, and in electronic and electrical
project circuits. The basic logic gates are categorized into seven:
AND, OR, XOR, NAND, NOR, XNOR, and NOT. These logic gates with
their logic gate symbols and truth tables are explained below.

The basic logic gates are classified into seven types: AND gate,
OR gate, XOR gate, NAND gate, NOR gate, XNOR gate, and NOT gate.
The truth table is used to show the logic gate function. All the
logic gates have two inputs except the NOT gate, which has only
one input.
1.OR GATE

The OR gate is a digital logic gate that implements logical


disjunction – it behaves according to the truth table to the right.
A HIGH output (1) results if one or both the inputs to the gate
are HIGH (1). If neither input is high, a LOW output (0) results.
In another sense, the function of OR effectively finds
the maximum between two binary digits, just as the
complementary AND function finds the minimum.
OR gates are basic logic gates, and are available
in TTL and CMOS ICs logic families. The standard 4000
series CMOS IC is the 4071, which includes four independent two-
input OR gates. The TTL device is the 7432. There are many
offshoots of the original 7432 OR gate, all having the same
pinout but different internal architecture, allowing them to
operate in different voltage ranges and/or at higher speeds. In
addition to the standard 2-input OR gate, 3- and 4-input OR
gates are also available. In the CMOS series, these are:

 4075: triple 3-input OR gate


 4072: dual 4-input OR gate
Variations include:

 74LS32: quad 2-input OR gate (low power Schottky version)


 74HC32: quad 2-input OR gate (high speed CMOS version) - has
lower current consumption/wider voltage range
 74AC32: quad 2-input OR gate (advanced CMOS version) - similar
to 74HC32, but with significantly faster switching speeds and
stronger drive
 74LVC32: low voltage CMOS version of the same.
2.AND GATE
The AND gate is a basic digital logic gate that
implements logical conjunction - it behaves according to
the truth table to the right. A HIGH output (1) results only if
all the inputs to the AND gate are HIGH (1). If none or not all
inputs to the AND gate are HIGH, LOW output results. The
function can be extended to any number of inputs.
There are three symbols for AND gates: the American (ANSI or
'military') symbol and the IEC ('European' or 'rectangular')
symbol, as well as the deprecated DIN symbol. Additional inputs
can be added as needed. For more information see Logic Gate
Symbols. It can also be denoted as symbol "^" or "&".

MIL/ANSI Symbol IEC Symbol DIN Symbol

INPUT OUTPUT

A B A AND B

0 0 0

0 1 0

1 0 0
3.NOT OR INVERTER GATE
The Logic NOT Gate is the most basic of all the logical gates
and is often referred to as an Inverting Buffer or simply an
Inverter.
An inverter circuit outputs a voltage representing the opposite
logic-level to its input. Its main function is to invert the
input signal applied. If the applied input is low then the
output becomes high and vice versa. Inverters can be constructed
using a single NMOS transistor or a single PMOS transistor
coupled with a resistor. Since this 'resistive-drain' approach
uses only a single type of transistor, it can be fabricated at a
low cost. However, because current flows through the resistor in
one of the two states, the resistive-drain configuration is
disadvantaged for power consumption and processing speed.
Alternatively, inverters can be constructed using two
complementary transistors in a CMOS configuration. This
configuration greatly reduces power consumption since one of the
transistors is always off in both logic states.
4.NOR GATE

The NOR gate is a digital logic gate that implements


logical NOR - it behaves according to the truth table to the
right. A HIGH output (1) results if both the inputs to
the gate are LOW (0); if one or both input is HIGH (1), a LOW
output (0) results. NOR is the result of the negation of the OR
operator.

NOR gate is the logic gate and is one of the


universal gates . NOR gate is used to construct the
basic gates similar to AND gate. By combining NOT gate and
OR gate, NOR gate can be constructed. The output of NOR gate is
reversal of OR gate.
5.NAND GATE

NAND gate (NOT-AND) is a logic gate which produces an output


which is false only if all its inputs are true; thus its output
is complement to that of an AND gate. A LOW (0) output results
only if all the inputs to the gate are HIGH (1); if any input is
LOW (0), a HIGH (1) output results.

The NAND Boolean function has the property of functional


completeness. This means, any Boolean expression can be re-
expressed by an equivalent expression
utilizing only NAND operations. For example, the function NOT(x)
may be equivalently expressed as NAND(x,x). In the field
of digital electronic circuits, this implies that we can
implement any Boolean function using just NAND gates.

A NAND gate is an inverted AND gate. It has the following truth


table:

Q = A NAND B
Truth Table
Input A Input B Output Q
0 0 1
0 1 1
1 0 1
1 1 0
BOLEAN
ALGEBRA
Boolean algebra is a branch of mathematics that deals with
operations on logical values with binary variables.
The Boolean variables are represented as binary numbers to
represent truths: 1 = true and 0 = false.
Elementary algebra deals with numerical operations
whereas Boolean algebra deals with logistical operations.

Boolean algebra is used to analyse and simplify the


digital (logic) circuits. It uses only the binary numbers
i.e. 0 and 1. It is also called as Binary Algebra
or logical Algebra
OR RULES ( ADDITION)

1. 0 + 0 = 0
2. 0 + 1 = 1
3. 1 + 0 = 1
4. 1 + 1 = 1
5. A + 0 = A
6. A + 1 = 1
7. A + A ( bar ) =1

AND RULES (MULTIPLICATION)

1. 0.0 = 0
2. 0.1 = 0
3. 1.0 = 0
4. 1.1 = 1
5. A.1 = A
6. A.0 = 0
7. A.A = A
8. A.A ( bar ) = 0
RULE IN BOOLEAN ALGEBRA
Following are the important rules used in Boolean algebra.

1. Variable used can have only two values. Binary 1 for HIGH
and Binary 0 for LOW.
2. Complement of a variable is represented by an overbar (-
). Thus, complement of variable B is represented as .
Thus if B = 0 then = 1 and B = 1 then = 0.
3. ORing of the variables is represented by a plus (+) sign
between them. For example ORing of A, B, C is represented
as A + B + C.
4. Logical ANDing of the two or more variable is represented
by writing a dot between them such as A.B.C. Sometime the
dot may be omitted like ABC.

There are six types of Boolean Laws.


Commutative law
Any binary operation which satisfies the following expression
is referred to as commutative operation. Commutative law
states that changing the sequence of the variables does not
have any effect on the output of a logic circuit.

Associative law
This law states that the order in which the logic operations
are performed is irrelevant as their effect is the same.

Distributive law
Distributive law states the following condition.

AND law
These laws use the AND operation. Therefore they are called
as AND laws.
OR law
These laws use the OR operation. Therefore they are called
as OR laws.

INVERSION law
This law uses the NOT operation. The inversion law states
that double inversion of a variable results in the original
variable itself.

De – morgan’s law
1. (A.B)’ = A’ + B’
2.(A + B)’ = A’.B’
PROBLEMS:
1.Find the Boolean algebra expression for the following system.

This system may look more complicated than the other two to
analyse but again, the logic circuit just consists of
simple AND, OR and NOT gates connected together.
As with the previous Boolean examples, we can simplify the
circuit by writing down the Boolean notation for each logic gate
function in turn in order to give us a final expression for the
output at Q.

2. Convert the following logic gate circuit into a Boolean


expression, writing Boolean sub-expressions next to each gate
output in the diagram:
ANSWER:

3. Convert the following relay logic circuit into a Boolean


expression, writing Boolean sub-expressions next to each relay
coil and lamp in the diagram:

ANSWER:
3. An engineer hands you a piece of paper with the following
Boolean expression on it, and tells you to build a gate circuit
to perform that function:

A ¯¯¯¯ B +¯¯¯¯ C ( A + B) AB¯+C¯(A+B)


Draw a logic gate circuit for this function.

ANSWER:

4. Implement the following Boolean expression in the form of a


digital logic circuit:

¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ ( ¯¯¯¯¯¯¯¯ A B + C )B (AB¯+C)¯B


Form the circuit by making the necessary connections between
pins of these integrated circuits on a solderless breadboard:
The circuit shown is not the only possible solution to this
problem:

5. Use Boolean algebra to simplify the following logic gate


circuit:

ANSWER:
6. Use Boolean algebra to simplify the following logic gate
circuit:

ANSWER:
DE MORGAN’S THEOREM:
De Morgan's theorem states (Equation 1.16) that complementing
the result of OR'ing variables together is equivalent to AND'ing
the complements of the individual variables. Also (Equation
1.17), complementing the result of AND'ing variables together is
equivalent to OR'ing the complements of the individual
variables.

For applying the DeMorgan's theorem on this expression, we have


to follow the following expressions:

1) In complete expression, first, we find those terms on which


we can apply the DeMorgan's theorem and treat each term as a
single variable.

So,
2) Next, we apply DeMorgan's first theorem. So,

3) Next, we use rule number 9, i.e., (A=(A')') for canceling the


double bars.

4) Next, we apply DeMorgan's second theorem. So,

5) Again apply rule number 9 to cancel the double bar

Now, this expression has no term in which we can apply any rule
or theorem. So, this is the final expression.
Example: (AB'.(A + C))'+ A'B.(A + B + C')'

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