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 Master’s Thesis

Automatic Voltage Regulator based on Series

Voltage Compensation with AC Chopper

Taejun Jeon (전 태 준)
Division of Electrical and Computer Engineering
Pohang University of Science & Technology
2011
 교류 쵸퍼를 가진 직렬전압보상을

기반으로 한 자동전압조절기

Automatic Voltage Regulator based on Series

Voltage Compensation with AC Chopper
 Automatic Voltage Regulator based on Series
Voltage Compensation with AC Chopper
by
Taejun Jeon

Division of Electrical and Computer Engineering

(Control & Power Electronics Program)

Pohang University of Science & Technology

A thesis submitted to the faculty of the Pohang University of Science

and Technology in partial fulfillment of the requirements for the degree
of Master of Science in the Division of Electrical and Computer
Engineering (Control & Power Electronics Program)

Pohang, Korea

06. 08. 2011

Approved by

Bong-Hwan Kwon

Academic Advisor
 Automatic Voltage Regulator based on Series
Voltage Compensation with AC Chopper

Taejun Jeon

The undersigned have examined this thesis and hereby certify

that it is worthy of acceptance for a master's degree from

POSTECH.

06/08/2011

Committee Chair Bong-Hwan Kwon (Seal)

Member Sang Woo Kim (Seal)

Member Sangchul Won (Seal)

MECE 전 태준, Taejun Jeon, Automatic Voltage Regulator

based on Series Voltage Compensation with AC

20091203
Chopper, 교류 쵸퍼를 가진 직렬전압보상을 기반으로 한

자동전압조절기, Division of Electrical and Computer

Engineering (Control & Power Electronics Program),

2011, 41pages, Advisor: Bong-Hwan Kwon.

ABSTRACT
This paper proposes an automatic voltage regulator (AVR) based on

series voltage compensation with an ac chopper. The proposed AVR is made

up of a pulse-width-modulated (PWM) ac chopper and a transformer for

series voltage compensation. In the ac chopper, the commutation problem is

solved by switching patterns. The ac chopper provides direct ac-ac power

conversion without energy storage elements, so the size and cost of the AVR

are reduced. The ac chopper compensates for only the required voltage, so the

switches have reduced ratings and stresses. Using bypass switches, the

proposed AVR can compensate not only for the voltage sag but also the

voltage swell of the input voltage. Experimental results verify that the

proposed AVR quickly compensates for the voltage sag and swell of the input

voltage.

I
 Contents

I. Introduction…………….……………………………………… 1

II. Operation Principles of the Proposed AVR …..………………. 5

2.1 Description of the Proposed AVR…………………………. 5

2.2 Operation Modes of the Proposed AVR…………………… 10

III. Theoretical Analysis………………………………….…….…. 22

3.1 Steady State Analysis…………………………………….... 22

3.2 Analysis of the AC Chopper………………………………. 25
3.3 Design Equations of the LC Filter…..……………………... 29
3.4 Design Equation of the Turns Ratio………………………... 29
3.5 Ripples of the Inductor Current and Capacitor Voltage…..... 30

IV. Experimental Results….………………………………………. 31

V. Conclusion……..…………………………………..…….......... 37

References……………………………………………………….... 38

II
 List of Figure Captions

Fig. 1.1 Model block diagram of the DVR with a dc-link

capacitor…………………………………………..……...... 4
Fig. 1.2 Model block diagram of the AVR based on series voltage
compensation……………..…………………….................. 4
Fig. 2.1 Electric circuit of the proposed AVR ………….....……....... 7
Fig. 2.2 Electric circuit of the PWM ac chopper used in the
proposed AVR....................................................................... 8
Fig. 2.3 Equivalent circuit of the proposed AVR ………………….. 9
Fig. 2.4 Drive signals of the switches …………….…….................. 12
Fig. 2.5 Operation waveforms of the proposed AVR ………….…... 15
Fig. 2.6 Operation modes of the proposed AVR under the voltage-
sag condition………………………………………………. 19
Fig. 3.1 Equivalent circuit of the proposed AVR for steady-state
analysis …………………………………………………..... 22
Fig. 3.2 Equivalent circuit of the ac chopper..……………………… 25
Fig. 4.1 Prototype of the proposed AVR 33
Fig. 4.2 Experimental waveforms of the proposed AVR.................... 34
Fig. 4.3 Experimental waveforms of the input voltage and drive
signals………………………………………………............ 35
Fig. 4.4 Experimental waveforms of vo and vi.……..………………. 36
Table 2.1 Switching Patterns of the Drive signals…………………… 13

III
 I. Introduction
An automatic voltage regulator (AVR), also known as a line conditioner, is

a device automatically regulates the output voltage. Power line disturbances

can cause serious problems to sensitive equipment such as computers,

communication equipment, and process control systems [1]. With an increase

in the use of sensitive equipment, voltage sag and swell have been identified

as the most important power quality problems facing industrial customers

today.

To increase the reliability of the sensitive equipment, many methods of

solving power quality problems, especially voltage sag and swell, have been

proposed. A dynamic voltage restorer (DVR) with a dc-link capacitor has been

reported to protect sensitive loads from voltage sag and swell [2]–[5]. The

model block diagram of the DVR with a dc-link capacitor is shown in Fig. 1.1.

However, the power converter stage in the DVR provides indirect ac-ac power

conversion, which implies possible drawbacks such as more device counts in

power semiconductor devices, more loss, and less efficiency compared to

direct ac-ac power conversion. Furthermore, the dc-link capacitor as an

energy storage element is problematic due to its size and maintenance [3]. To

overcome these drawbacks, AVR based on pulse-width-modulated (PWM) ac

choppers, also known as matrix converters, can be considered to achieve a

1
direct ac-ac power conversion. The model block diagram of the AVR based on

series voltage compensation with an ac chopper is shown in Fig. 1.2. The ac

chopper is based on a buck converter configuration with a transformer for

output voltage compensation. The input voltage is chopped into segments, and

the output voltage is decided by controlling the duty ratio. However, most

standard ac choppers need bidirectional switches with the commutation

problem and complexity of the control circuit. The commutation problem

causes high voltage spikes and it limits the power rating. The commutation of

switches is critical and an alternate current path must be provided when

current paths are changed. This alternate current path is implemented using

additional bidirectional switches or snubbers [6]–[11]. However, these

topologies are difficult and expensive to realize. Furthermore, the voltage

stress of the switch is also high, so the reliability of AVRs decreases.

Therefore, an ac chopper without the commutation problem [12] and the

AVRs for this ac chopper have been proposed [13], [14]. However, these

AVRs can only compensate for voltage sag, not for voltage swell. Thus, AVRs

that are capable of compensating without a series transformer have been

proposed [15]–[19]. These AVRs can compensate for both voltage sag and

swell. However, these AVRs handle 100% of the system power capability.

Thus, these AVRs have higher voltage and current stresses of the switches

2
compared with the AVRs with a series transformer for compensation.

Several converter topologies are proposed in [20]. These topologies are made

up of a direct ac-ac converter and a transformer for series voltage

compensation. However, these topologies have many switching devices and

complex power circuits.

In this paper, an AVR based on series voltage compensation with an ac

chopper is proposed. The proposed AVR consists of an ac chopper and a

transformer for series voltage compensation. The ac chopper compensates for

only the required voltage, so the switches have reduced ratings and stresses.

Using bypass switches, the proposed AVR can compensate not only for the

voltage sag but also for the voltage swell of the input voltage. Experimental

results verify that the proposed AVR quickly compensates for the voltage sag

and swell of the input voltage.

3
 Load
vi vo

Fig. 1.1. Model block diagram of the DVR with a dc-link capacitor.

Load

vi vo

PWM ac
chopper

duty

Fig. 1.2. Model block diagram of the AVR based on series voltage
compensation.

4
 II. Operation Principles of the Proposed AVR

2.1. Description of the Proposed AVR

The electric circuit of the proposed AVR is shown in Fig. 2.1. The

compensation voltage vco is generated by a single-phase buck ac chopper

which is used for compensation. S1, S2, S3, and S4 are switches of the AVR. T

is a transformer to compensate for the input voltage vi and to stabilize the

output voltage vo. N1 is the number of primary winding turns and N2 is the

number of secondary winding turns. The primary winding of the transformer

has a center tap. The filter capacitor voltage vc is transformed into vco through

T. vr is chopper modulated voltage and vL is inductor voltage. The AVR

system uses PWM controller to generate and modulate the PWM signals, and

control the output of the ac chopper.

The electric circuit of the ac chopper used in the proposed AVR is shown in

Fig. 2.2 [8]. This ac chopper consists of four switches, an inductor, and

capacitors. The output voltage can be controlled by the duty ratio of the

chopping pulse. The low-pass filter is used to filter the harmonic components

of the output of the ac chopper. L is the filter inductance, C is the filter

capacitance, and RL is the equivalent resistance of the ac chopper. Because of

5
the energy stored in the inductance, dc snubbers Cb are added directly to

power semiconductor switches and absorb the energy. The ac chopper

provides direct ac-ac conversion without energy storage elements such as a

smoothing inductor or a smoothing capacitor. Thus, the size and cost of the

AVR are reduced. The ac chopper compensates for only the required voltage,

so the switches have reduced ratings and stresses compared with AVRs that

handle 100 % of the system power capability.

In Fig. 2.1, Sb1 and Sb2 are used as bypass switches, which are triacs or

back-to-back connected thyristors and they allow a bidirectional current flow.

If short circuits appear in the AVR, a large current is generated in the primary

of the compensation transformer, thus affecting the operation of the AVR. This

large current flows through the chopper and can destroy the chopper because

the primary winding of the compensation transformer cannot be operated in

an open circuit. As a result, the AVR can suffer severe damages. For these

reasons, bypass switches must be provided. When a short circuit occurs, the

bypass circuit composed of bypass switches carries the secondary current of

the transformer. Thus, the short-circuit current circulates through the bypass

switches.

6
 ii io

vi vo
vco
N2
T
vL
N1 N1

S1 L iL Sb1
Cb ic
S3

7
vr C vc
Sb2
Cb
S2 S4

Fig. 2.1. Electric circuit of the proposed AVR.

 vL

S1 L iL
Cb ic
S3
vi vr vc RL
C

Cb
S2 S4

Fig. 2.2. Electric circuit of the PWM ac chopper used in the proposed AVR

Using the bypass switches, the proposed AVR can compensate not only for

the sag but also for the swell of the input voltage. When the sag is detected,

the AVR operates under the voltage-sag condition. The equivalent circuits in

each condition are shown in Fig. 2.3. In Fig. 2.3, the bold lines denote

possible current passes and Zo is the load impedance. Under the voltage-sag

condition, Sb1 is turned on and Sb2 is turned off, as shown in Fig. 2.3(a). At this

time, the compensation voltage vco is in phase with the input voltage. Then, vco

is added to the input voltage, so the AVR can compensate for the voltage sag.

When the swell is detected, the AVR operates under the voltage-swell

condition. Under the voltage-swell condition, Sb1 is turned off and Sb2 is

turned on, as shown in Fig.2.3(b). At this time, the compensation voltage vco

becomes a reversed phase of the input voltage. Then, vco is subtracted from the

8
input voltage, so the AVR can compensate for the voltage swell.

vi vco Zo vo
N2
T
N1 N1
Sb1
PWM AC
Chopper Sb2

(a)

vi vco Zo vo
N2
T
N1 N1
Sb1
PWM AC
Chopper Sb2

(b)

Fig. 2.3. Equivalent circuit of the proposed AVR (a) under the voltage-sag

condition. (b) under the voltage-swell condition.

9
2.2. Operation Modes of the Proposed AVR

The output voltage is controlled by changing the duty ratio of the drive

signals. The switching patterns are decided by the polarity of the input voltage

in the AVR. The drive signals of the switches are shown in Fig. 2.4. td is the

dead time for the safe commutation, Ts is the switching period, and D is the

duty ratio of S1 and S2. The switching patterns of the drive signals are shown

in Table 2.1. During the positive semicycle of the input voltage, switches S2

and S4 are set to conduct, and switches S1 and S3 are driven by PWM. During

the negative semicycle of the input voltage, switches S1 and S3 are set to

conduct, and switches S2 and S4 are driven by PWM. If all switches are on, a

short circuit occurs and if all switches are off, voltage spikes damage the

switches in the AVR. Thus, a switching cycle has a dead time to avoid current

spikes of the switches. At the same time, the switching cycle establishes a

current path for the inductor to avoid voltage spikes for safe commutation.

Two switches are set to conduct and two switches are driven by PWM during

the half period of the input voltage. So, the switching loss is reduced

compared with AVRs that have four switches driven by PWM. The operation

waveforms of the proposed AVR are shown in Fig. 2.5, which shows the input

voltage, drive signals of the switches, chopper modulated voltage,

compensation voltage, and output voltage. Under the voltage sag condition,

10
vco is in phase with the input voltage, as shown in Fig. 2.5(a). Under the

voltage swell condition, vco becomes a reversed phase of the input voltage, as

shown in Fig. 2.5(b). The proposed AVR has four operation modes during a

switching period, as shown in Fig. 2.4. The equivalent circuits in each

operation modes under the voltage-sag condition are shown in Fig. 2.6. In Fig.

2.6, the bold lines denote possible current passes. Sb1 is turned on and Sb2 is

turned off under this condition.

Mode 1 [t0, t1]: This mode is defined when switches S1 and S2 are turned on,

as shown in Fig. 2.4. The inductor current iL conducts through S1 and the

diode across S2 for iL > 0, as shown in Fig. 2.6(a). The inductor current iL

conducts though S2 and the diode across S1 for iL < 0, as shown in Fig. 2.6(b).

So, iL conducts through the input and output side, providing energy to the

output. The inductor voltage vL can be written as follows:

vL (t )  vi (t )  vc (t ). (2-1)

Because the vi is higher than the vc, the current passing through the inductor is

increased and energy of the inductor is charged in this mode.

11
 S1 S1
0 0
t t
DTs td

S2 S2
0 0
t DTs t
td

S3 S3
0 0
t t
(1-D)Ts td

S4 td S4 (1-D)Ts

0 0
t t
t0 t1 t2 t3 t4 t0 t1 t2 t3 t4
Mode 1 2 3 4
Mode 1 2 3 4
Ts Ts
(a) (b)

Fig. 2.4. Drive signals of the switches (a) in the case of vi > 0. (b) in
the case of vi < 0.

12
 Table 2.1. Switching Patterns of the Drive signals
Switches
State Mode
S1 S2 S3 S4

Mode 1 on on off on
Mode 2 off on off on
vi > 0
Mode 3 off on on on
Mode 4 off on off on
Mode 1 on on on off
Mode 2 on off on off
vi < 0
Mode 3 on off on on
Mode 4 on off on off

13
vi
t

S1
t
S2
t
S3
t
S4
t
vr
t
vco
t

vo
t

(a)

14
 vi
t

S1
t
S2
t
S3
t
S4
t
vr
t
vco
t

vo
t

(b)

Fig. 2.5. Operation waveforms of the proposed AVR (a) under the
voltage-sag condition. (b) under the voltage-swell condition.

15
vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(a)

vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(b)

16
vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(c)

vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(d)

17
vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(e)

vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(f)

18
 vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(g)

vi Zo
N2
T
L
N1 N1
S1 Sb1
Cb
S3
C
Sb2
Cb S4
S2

(h)

Fig. 2.6. Operation modes of the proposed AVR under the voltage-sag
condition. (a) Mode 1 for iL > 0. (b) Mode 1 for iL < 0. (c) Mode 2 for vi > 0
and iL > 0. (d) Mode 2 for vi > 0 and iL < 0. (e) Mode 2 for vi < 0 and iL < 0.
(f) Mode 2 for vi < 0 and iL > 0. (g) Mode 3 for iL > 0. (h) Mode 3 for
iL < 0.

19
 Mode 2 [t1, t2]: This mode is defined as the dead time of the switches and is

important for safe commutation, as shown in Fig. 2.4. When vi > 0, this

mode is defined as the dead time of the switches S1 and S3, as shown in Fig.

2.4(a). The switches S2 and S4 are turned on for safe commutation. If iL > 0, iL

is bypassed through the output side using S4 and the diode across S3, as shown

in Fig. 2.6(c). If iL < 0, iL is bypassed through the output side using S2 and the

diode across S1, as shown in Fig. 2.6(d). When vi < 0, this mode is defined as

the dead time of the switches S2 and S4, as shown in Fig. 2.4(b). The switches

S1 and S3 are turned on for safe commutation. If iL > 0, iL is bypassed through

the output side using S3 and the diode across S4, as shown in Fig. 2.6(e). If

iL < 0, iL is bypassed through the output side using S1 and the diode across S2,

as shown in Fig. 2.6(f). Thus, a current path for the inductor current always

exists in every current direction during this mode.

Mode 3 [t2, t3]: This mode is defined when switches S3 and S4 are turned on,

as shown in Fig. 2.4. This mode is complementary to Mode 1. The inductor

current iL conducts through S4 and the diode across S3 for iL > 0, as shown in

Fig. 2.6(g). The inductor current iL conducts through S3 and the diode across

S4 for iL < 0, as shown in Fig. 2.6(h). So, iL freewheels through S3 and S4. In

this mode, the inductor voltage can be written as follows:

20
 vL (t )  vc (t ). (2-2)

Thus, the current passing through the inductor is decreased and the energy

stored in the inductor L is discharged.

Mode 4 [t3, t4]: An explanation of this mode is omitted because the

operation of Mode 4 is similar to the operation of Mode 2.

In these switching patterns, the short circuit is not generated by the dead

time. Besides, the current path for the inductor current always exists whatever

the current direction. Thus, the commutation problem is solved by these

switching patterns.

Under the voltage-swell condition, the operation modes are similar to the

voltage-sag condition except that the bypass switch Sb1 is turned off and Sb2 is

turned on. Thus, an explanation of this condition is omitted.

21
 III. Theoretical Analysis

3.1. Steady State Analysis

io

vi vco vo Zo
N2
T
vL iL N1
L ic
vr C vc

(a)
io

vi vco vo Zo
N2
T
vL iL N1
L ic
vr C vc

(b)

Fig. 3.1. Equivalent circuit of the proposed AVR for steady-state analysis (a)
under the voltage-sag condition. (b) under the voltage-swell condition.

For the analysis, Fig. 3.1 shows a circuit that is equivalent to the proposed

22
AVR. A dead time is neglected for the analysis. It is assumed that the

following condition is satisfied:

1
 L  Z o  (3-1)
C

where ω = 2πf is the angular line frequency. From (3-1), the following

condition is also assumed:

 2 LC  1. (3-2)

These conditions are satisfied in the practical filter design. The chopper

modulated voltage vr is obtained as

vr (t )  Dvi (t ). (3-3)

So, averaged equations during one switching period Ts are obtained as

follows:

vL (t )  Dvi (t )  vc (t ) (3-4)

ic (t )  iL (t )  nio (t ) (3-5)

where n is the transformer turns ratio N2/N1. Under the voltage-sag condition,

(3-4) and (3-5) are converted as follows:

d (v  v )(t )
L iL (t )  Dvi (t )  o i (3-6)
dt n
d (vo  vi )(t )
C  iL (t )  nio (t ). (3-7)
dt n
Substituting (3-7) into (3-6), the following differential equation is obtained:

23
 d2 d
nLC 2
(vo  vi )(t )  n 2 L io (t )
dt dt (3-8)
  nD  1 vi (t )  nvo (t ).

From (3-8), the transfer function can be obtained as

Vo (s) s 2 LC  1  nD
 . (3-9)
Vi (s) s 2 LC  1  sn 2 L / Z o

Thus, the overall voltage gain is obtained as

Vo 1   2 LC  nD
 . (3-10)
Vi
1   LC   n L / Z 
2 2 2 2
o

Using (3-1), the overall voltage gain is simplified as

Vo nD
 1 . (3-11)
Vi 1   2 LC

Using (3-2), the ideal overall voltage gain under the voltage-sag condition is

simplified as
Vo
 1  nD. (3-12)
Vi

Similarly, the overall voltage gain under the voltage-swell condition is

obtained as

Vo 1   2 LC  nD
 . (3-13)
Vi
1   LC    n L / Z 
2 2 2 2
o

Using (3-1), the overall voltage gain is simplified as

24
 Vo nD
 1 . (3-14)
Vi 1   2 LC

Using (3-2), the ideal overall voltage gain under the voltage-swell condition

is simplified as
Vo
 1  nD. (3-15)
Vi

3.2. Analysis of the AC Chopper

L
iL ip

vr vc
C RL

Fig. 3.2. Equivalent circuit of the ac chopper.

For the analysis, equivalent circuit of the ac chopper is shown in Fig. 3.2.

The input voltage of the ac chopper is defined as

vi (t )  2Vi cos(t ) (3-16)

where Vi is the rms value of the input voltage. When a switching function S(t)

25
with and duty ratio D, The switching function S(t), defined by the Fourier

series, expressed as

2sin(hD )
S (t )  D   cos(hs t ) (3-17)
h 1 h

where ωs is the angular switching frequency. Using (3-16) and (3-17), vr(t)

is expressed as
vr (t )  S (t )vi (t )
 2 DVi cos(t ) .
(3-18)

2Vi sin(hD )
 cos[(hs   )t ].
h 1 h

The first term in the right-hand side of (3-18) is the fundamental component

and the second term is the harmonic component distributing around the

switching frequency. Thus, the rms value of the fundamental component of vr

can be expressed as

Vrf  DVi . (3-19)

The rms value of the harmonic component of vr can be expressed as

Vi sin(hD )
Vrk  . (3-20)
h

The output filter of the ac chopper reduces the harmonic component in the

output voltage from vr. From the equivalent circuit of the ac chopper shown in

Fig. 3.2, the rms value of the fundamental component of vc is expressed as

26
 RL
Vcf  Vrf . (3-21)
RL 2 (1   2 LC )2   2 L2

If ωL << R and R << (1/ωC), Vcf is approximated as

Vcf  Vrf  DVi . (3-22)

Because the switching frequency is much higher than the line frequency, ωs ≫

ω, the harmonic frequency and the harmonic impedances are approximated as

follows:
hs    hs
(hs   ) L  hs L
(3-23)
1 1
C C.
hs   hs

By (3-21) and (3-23), the rms value of the harmonic component of vc is

expressed as

2 RLVrk
Vck  . (3-24)
RL 2 (1  h2s 2 LC )2  h 2s 2 L2

If ωsL >> R and R >> (1/ωsC), Vck is approximated as

2Vi sin(hD )
Vck  . (3-25)
h3s 2 LC

The total harmonic distortion factor (THD) of the vc is expressed as


100 A1
THDV 
Vcf
V
h 1
ck
2

s 2 LC
(3-26)

where

27
 100 2 
sin 2 (hD )
A1 
D

h 1 h6
. (3-27)

Correspondingly, the rms value of the fundamental component of iL is

expressed as

1   2C 2 RL 2
I Lf  Vrf . (3-28)
RL 2 (1   2 LC )2   2 L2

If ωL << R and R << (1/ωC), ILf is approximated as

Vrf DVi
I Lf   . (3-29)
RL RL

By (3-23) and (3-28), the rms value of the harmonic component of iL is

expressed as

2(1  h2 2C 2 RL 2 )Vrk

I Lk  . (3-30)
RL 2 (1  h2s 2 LC )2  h2s 2 L2

If ωsL >> R and R >> (1/ωsC), ILk is approximated as

2Vi sin(hD )
I Lk  . (3-31)
h 2s L

The THD of the iL is expressed as


100 RL A2
THDI 
I Lf
I h 1
Lk
2

s L
(3-32)

where

28
 100 2 
sin 2 ( hD )
A2 
D

h 1 h4
. (3-33)

3.3. Design Equations of the LC Filter

From (3-26), THDV is inversely proportional to L and C. From (3-32),

THDI is inversely proportional to L. Thus, the output filter, L and C, reduces

the harmonic components of iL and vc. The filter parameters can be designed

within THD values required in the system. From (3-32), L is designed as

RL A2
L . (3-34)
s (THDI )

From (3-26), C is designed as

A1
C . (3-35)
s L(THDV )
2

3.4. Design Equation of the Turns Ratio

The turns ratio of the transformer depends on the largest variation range of

the input voltage. The required turns ratio is based on the percentage of the

compensation voltage. The percentage of the compensation voltage is defined

29
as

 v 
Pco  100 1  i ,min  (3-36)
 vnom 

where vi,min and vnom are the minimum allowable input voltage and nominal

line voltage, respectively. The design equation of the turns ratio is expressed

as
N 2 100  Pco
n  . (3-37)
N1 Pco

3.5. Ripples of the Inductor Current and Capacitor Voltage

The ripple of the inductor current iL can be derived as

vc (1  D)
iL  (3-38)
Lf s

where fs is the switching frequency. Thus, the inductor can be determined by

the switching frequency, ripple current, and duty ratio. The ripple of the

capacitor voltage can be derived as

iL vc (1  D)
vc   . (3-39)
8Cf s 8LCf s 2

Thus, the capacitor can be determined by the switching frequency, the ripple

voltage, and the ripple current.

30
 IV. Experimental Results

To verify the performance of the proposed AVR in Fig. 2.1, a hardware

circuit was implemented, as shown in Fig. 4.1. The rating of the proposed

AVR was designed for 3 kVA, and the experiments were done using 3 kVA

with 60 Hz and 220 V nominal input/output voltages. The switching

frequency was determined as 15 kHz and the dead time was 2 μs. The load

was a purely resistive load. Other parameters of the AVR used for the

experiment were given as follows:

f = 60 Hz

L = 300 μH

C = 15 μF

Cb = 2.2 μF

n = 1.

The experimental waveforms of the input voltage vi and the input current ii

are shown in Fig. 4.2(a). The input voltage and current are known to be nearly

sine waves. The output voltage vo and output current io are shown in Fig.

4.2(b). The output voltage and current are close to sinusoidal and the output

31
voltage is regulated with 220 V. The chopper modulated voltage vr and the

inductor current iL are shown in Fig. 4.2(c).

The experimental waveforms of the input voltage vi, drive signal of the

switch S1, and drive signal of the switch S2 are shown in Fig. 4.3(a). The input

voltage vi, drive signal of the switch S3 and S4 are shown in Fig. 4.3(b). Note

that, during the positive semicycle of the input voltage, switches S2 and S4 are

set to conduct, and switches S1 and S3 are operated according to a constant

duty ratio. On the other hand, during the negative semicycle of the input

voltage, switches S1 and S3 are set to conduct, and switches S2 and S4 are

modulated with a constant duty ratio.

When the input voltage has 25 % sag, the input voltage and the output

voltage waveforms are shown in Fig. 4.4(a). The output voltage becomes the

desired 220 V within a half cycle by the proposed AVR. When the input

voltage has 25 % swell, the input voltage and the output voltage waveforms

are shown in Fig. 4.4(b). The output voltage becomes the desired 220 V

within a half cycle. Thus, the proposed AVR quickly compensates for the

voltage sag and swell of the input voltage.

32
 Transformer
ac chopper
Bypass switches

Output

Input

Fig. 4.1. Prototype of the proposed AVR.

vi
[250V/div.]

ii
[20A/div.]

time [2ms/div.]
(a)

33
 vo
vo
[250V/div.]

io

io
[20A/div.]

time [2ms/div.]
(b)

vr
[250V/div.]

iL
[5A/div.]

time [2ms/div.]
(c)

Fig. 4.2. Experimental waveforms of the proposed AVR. (a) vi and ii.
(b) vo and io. (c) vr and iL

34
 vi
[250V/div.]

S1
[20V/div.]

S2
[20V/div.]

time[2ms/div.]
(a)

vi
[250V/div.]

S3
[20V/div.]

S4
[20V/div.]

time[2ms/div.]
(b)

Fig. 4.3. Experimental waveforms of the input voltage and drive signals.
(a) vi, drive signals of the switches S1 and S2. (b) vi, drive signals of the
switches S3 and S4.

35
 vi
[250V/div.]

vo
[200V/div.]

time [20ms/div.]
(a)

vi
[250V/div.]

vo
[200V/div.]

time [20ms/div.]
(b)

Fig. 4.4. Experimental waveforms of vo and vi (a) having 25% voltage sag.
(b) having 25% voltage swell.

36
 V. CONCLUSION

An AVR based on series voltage compensation with an ac chopper has been

proposed and analyzed. The proposed AVR includes a PWM ac chopper and a

transformer for series voltage compensation. The ac chopper provides direct

ac-ac power conversion without energy storage elements, so the size and cost

of the AVR are reduced. The ac chopper compensates for only the required

voltage, so the switches have reduced ratings and stresses. In the switching

patterns, the short circuit is not generated by the dead time. Besides, the

current path for the inductor current always exists whatever the current

direction. Thus, the commutation problem is solved by switching patterns.

Using the bypass switches, the proposed AVR can compensate not only for the

voltage sag but also for the voltage swell of the input voltage. Experimental

results have verified that the proposed AVR quickly compensates for the sag

and swell of the input voltage.

37
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41
 Acknowledgements

감사의 글

낯선 포항에서 학위과정을 시작한지 벌써 2년의 시간이 흘렀습니

다. 지난 2년간은 저에게 많은 성장을 준 시간이었습니다. 하지만,
주위에서 격려 해주신 분들이 없었더라면 지금까지 오는 것이 불가
능했을 것입니다. 그 동안 저에게 힘이 되어주신 여러분께 감사의
말씀을 전하고 싶습니다.
항상 부족한 저에게 지난 2년 동안 많은 관심과 가르침을 주신
권봉환 교수님께 진심으로 감사 드립니다. 교수님께서 가르쳐 주신
연구자의 자세와 연구방법, 학문적인 가르침을 항상 생각하며 새겨
두겠습니다. 또한, 바쁘신 중에도 논문 심사를 맡아 주시고 조언을
해주신 원상철 교수님과 김상우 교수님께도 감사를 드립니다. 두
교수님의 조언을 항상 가슴 깊이 새겨 두겠습니다.
저를 지금까지 키워주시고 힘들 때마다 저의 버팀목이 되어 주고
저를 믿어 준 부모님께 깊은 감사를 드립니다. 부모님의 헌신과 사
랑이 없었다면 지금의 저는 없었을 것입니다. 저에게 항상 관심을
가져주시는 삼촌, 그리고 외할머니에게 감사를 드립니다. 이외에도
많은 친척 분 들께 감사함을 표하고 싶습니다.
석사를 마치는 지금까지 연구실에서 많은 도움을 주시고 격려해
주신 실험들 사람들께 감사를 드립니다. 천윤이 형, 한모 형, 규태
형, 용원이 형, 그리고 신입생으로 있는 해용이와 성호, 또한, 먼저
졸업하여 사회에 나가있는 철이, 모두 함께하여 고마웠던 사람들입
니다. 또한, 진우 형, 재혁이, 영준이, 대성이, 그리고 원상철 교수님
연구실 분들과 남광희 교수님 연구실 분들께도 깊은 감사를 드립니
다.
또한, 포항공대에 있는 한양대 동문 분들에게도 감사함을 전하고
싶습니다. 낯선 포항이었지만, 여러분들 덕분에 쉽게 적응할 수 있
었습니다. 항상 바쁘다는 핑계로 동문회에 많이 참석하지 못해서 죄
송합니다.
또한, 신앙적으로 부족함이 많았던 저에게 많은 성장을 있게 한,
효자교회 분들에게 깊은 감사를 드립니다. 처음 교회를 갔었을 때,
반갑게 맞아주었던 현철이 형, 그리고 작년에 같은 교회가족이었던
영권이, 영상이 형, 인직이, 정향이 누나에게 감사를 드립니다. 또한,
올해 같은 교회가족이 된 일준이 형, 광섭이, 경만이, 경미 누나에게
도 감사를 드립니다. 또한, 영준이 형, 혜구 형에게도 깊은 감사를
드립니다. 그리고 석사과정 동안 계속 기도와 배려로 함께해 준 혜
림이에게 감사를 표합니다.
또한, 한양대 친구들에게도 고마움을 전하고 싶습니다. 서울대에
서 석사하고 이제 나랑 같이 사회에 나가게 될 친구 효진이, 고려대
에서 학위를 하며 꿈을 키워가고 있는 성호, 몸이 멋진 후배 대근이,
카이스트에서 물리학 교수의 꿈을 키워가고 있는 두영이 형, 소중한
동기 경태에게 감사 드립니다. 그리고 학부 때 함께 했던 분 들에
게 감사 드립니다. 이외에도 감사한 사람들이 너무나 많습니다.
저를 항상 지켜주시는 주님께 감사 드립니다. 그 분이 있었기에
힘든 일도 어려운 일도 이겨낼 수 있었습니다. 그 분이 없었다면 지
금의 저도 없었을 것입니다. 오늘의 영광과 앞으로의 영광을 주님께
돌립니다.
지금의 저를 있게 도와주시고, 기도해 주신 모든 분들께 감사 드
립니다. 지면이 부족하여 감사한 분들의 성함을 모두 쓸 수 없어 아
쉽습니다. 지금 이 순간, 아니 그 이후로도 그 감사함을 간직하며
살겠습니다. 감사합니다.
 Curriculum Vitae

Name Taejun Jeon

Education

2004.03~2008.08 B.S. degree in Department of Electronic and

Electrical Engineering, Hanyang University, Korea.

2009.09~2011.08 M.S. degree in Division of Electrical and Computer

Engineering, Pohang University of Science and

Technology (POSTECH), Korea.

Experience

2009.09~2011.08 Research and Teaching Assistant in Division of

Electrical and Computer Engineering, Pohang

University of Science and Technology (POSTECH),

Korea.