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4 Number Systems
4 Number Systems
CONTENT
1. Numerical base conversions
2. Analog Signal representations
3. Q Arithmetic
VA VDD
Ain0 D0
Ain1 D1
Ain2 D2
Ain3
ADC 8 Bit, 20 kHz
Ch_Select_0
Ch_Select_1 1 LSB
D7
VREF+
VREF- OE
GNDA GNDDD
Number System, 8 bits, unsigned integer Q8
Step size = = = 0.0196
1 ç =∓ = ∓0.0196
Magnitude 1/2 ç = ∓(1/2) = ∓0.0099
3.3 V or 5V
255 4.63
237
3.81
195 2.75 2.52 2.48 2.53
140 129
129 126
Ts Ts Ts Ts Ts Ts: sampling period
0 Time
11101101
11000011
10001100
10000001
011111110
10000001
Q8
Number System, 8 bits, signed integer Q.7
Step size = = = 0.0196
1 ç =∓ = ∓0.0196
Magnitude 1/2 ç = ∓(1/2) = ∓0.0099
2.5 V 127
2.13
1.31 109
67 0.25 0.02 -0.02 0.07
0 0BIN 3
12 1 -2
Ts Ts Ts Ts Ts Ts: sampling period
-2.5 V -128 Time
Q.7
01101101
01000011
00001100
00000001
00000011
Sign Bit 11111110
Number System, 16 bits, unsigned integer Q16
Step size = = = 76.3
1 ç =∓ = ∓76.3
Magnitude 1 1
ç =∓ = ∓38.1
2 2
3.3 V or 5V
4.63
65535
FFFF 3.81 60685
49937 2.75 2.52 2.48 2.53
36044 33160
33029 32505
Ts Ts Ts Ts Ts Ts: sampling period
0000 0V
Time
1110110100001101
1100001100010001
1000110011001100
1000000100000101
1000000110001000
Q16
1111111011111001
Number System, 16 bits, unsigned integer Q.15
Step size = = = 76.3
1 ç =∓ = ∓76.3
Magnitude 1 1
ç =∓ = ∓38.1
2 2
2.5V
2.13
32767
0FFF 1.31 60685
49937 0.25 0.02 -0.02 0.03
0V 36044 33160
33029 32505
Ts Ts Ts Ts Ts Ts: sampling period
-32768
1000 -2.5V Time
0110110100001101
0100001100010001
0000110011001100
0000000100000101
0000000110001000
Q.15
1111111011111001
Sign Bit
Q.7
Q.7
Q.7
Binary operations
Binary addition
0 + 0 = 0 without carry
0 + 1 = 1 without carry
1 + 1 = 0 with carry equal 1
+ 00010110 2
01110011 2
Binary addition
0100 0001 1100 0001 1100 0001
0101 0000 0001 0100
0101 0000
-____________ -____________
-____________
1100 0001 1100 0001
0100 0001
1011 0000 1110 1100
1010 0000 +____________ +____________
+____________ 1111 0001 1110 1101
1110 0001 Cs=1 Cp=0 Cs=1 Cp=1
Cs=0 Cp=0
Overflow=Cs. xor. Cp=0 Overflow=Cs. xor. Cp=1 Overflow=Cs. xor. Cp=0
Binary operations
Binary multiplication
32 Bit Floating number
Representation
S: Sign of the number
E: Biased Exponent, bias number is 127
F: Fraction,
Radix point is at the after 23rd bit, or after bit 22
IEEE standard floating-point
• Single precision • Double precision
– 32 bits – 64 bits
• sign: 1 bit • sign: 1 bit
• exponent: 8 bits • exponent: 11 bits
• significand: 23 bits • significand: 52 bits
– Bias: 127 – Bias: 511
Consider decimal number 14.23510