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CSD17381F4
SLPS411E – APRIL 2013 – REVISED DECEMBER 2017

CSD17381F4 30 V N-Channel FemtoFET™ MOSFET

1 Features
Product Summary
•
1 Ultra-Low On-Resistance
TA = 25°C TYPICAL VALUE UNIT
• Ultra-Low Qg and Qgd VDS Drain-to-Source Voltage 30 V
• Low Threshold Voltage Qg Gate Charge Total (4.5 V) 1040 pC
• Ultra-Small Footprint (0402 Case Size) Qgd Gate Charge Gate-to-Drain 133 pC

– 1.0 mm × 0.6 mm VGS = 1.8 V 160 mΩ

RDS(on) Drain-to-Source On-Resistance VGS = 2.5 V 110 mΩ
• Ultra-Low Profile
VGS = 4.5 V 90 mΩ
– 0.35 mm Height
VGS(th) Threshold Voltage 0.85 V
• Integrated ESD Protection Diode
– Rated >4 kV HBM .
– Rated >2 kV CDM Ordering Information(1)
Device Qty Media Package Ship
• Lead and Halogen Free
CSD17381F4 3000 Femto (0402) 1.0 mm
• RoHS Compliant 7-Inch
×0.6 mm SMD Lead
Tape and
CSD17381F4T 250 Reel Reel
Less
2 Applications (1) For all available packages, see the orderable addendum at
the end of the data sheet.
• Optimized for Load Switch Applications
• Optimized for General Purpose Switching Absolute Maximum Ratings
Applications TA = 25°C unless otherwise stated VALUE UNIT
• Single-Cell Battery Applications VDS Drain-to-Source Voltage 30 V
• Handheld and Mobile Applications VGS Gate-to-Source Voltage 12 V
ID Continuous Drain Current, TA = 25°C(1) 3.1 A
3 Description IDM Pulsed Drain Current, TA = 25°C(2) 12 A

This 90 mΩ, 30 V N-Channel FemtoFET™ MOSFET IG

Continuous Gate Clamp Current 35
mA
technology is designed and optimized to minimize the Pulsed Gate Clamp Current(2) 350
footprint in many handheld and mobile applications. PD Power Dissipation(1) 500 mW
This technology is capable of replacing standard ESD Human Body Model (HBM) 4 kV
small signal MOSFETs while providing at least a 60% Rating Charged Device Model (CDM) 2 kV
reduction in footprint size. TJ, Operating Junction and
–55 to 150 °C
Tstg Storage Temperature Range
.
Avalanche Energy, single pulse ID = 7.4 A,
EAS 2.7 mJ
L = 0.1 mH, RG = 25 Ω
Typical Part Dimensions
(1) Typical RθJA = 90°C/W on 1 inch2 (6.45 cm2), 2 oz.
(0.071 mm thick) Cu pad on a 0.06 inch (1.52 mm) thick FR4
m PCB.
5m
0.3 (2) Pulse duration ≤ 100 μs, duty cycle ≤ 1%.

Top View

D
m
m
00
0.

1.
60
m
m

.
.
.
G S
.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD17381F4
SLPS411E – APRIL 2013 – REVISED DECEMBER 2017 www.ti.com

Table of Contents
1 Features .................................................................. 1 6.1 Community Resources.............................................. 7
2 Applications ........................................................... 1 6.2 Trademarks ............................................................... 7
3 Description ............................................................. 1 6.3 Electrostatic Discharge Caution ................................ 7
6.4 Glossary .................................................................... 7
4 Revision History..................................................... 2
5 Specifications......................................................... 3 7 Mechanical, Packaging, and Orderable
Information ............................................................. 8
5.1 Electrical Characteristics........................................... 3
7.1 Mechanical Dimensions ............................................ 8
5.2 Thermal Information .................................................. 3
7.2 Recommended Minimum PCB Layout...................... 9
5.3 Typical MOSFET Characteristics.............................. 4
7.3 Recommended Stencil Pattern ................................. 9
6 Device and Documentation Support.................... 7

4 Revision History
Changes from Revision D (August 2014) to Revision E Page

• Changed Pulsed Drain Current value From: 10 A To: 12 A in the Absolute Maximum Ratings table. ................................. 1
• Change Note 2 From: Pulse duration ≤300 μs, duty cycle ≤2% To: Pulse duration ≤ 100 μs, duty cycle ≤ 1%.................... 1
• Updated Figure 1. .................................................................................................................................................................. 4
• Updated Figure 10 with newly measured data. ..................................................................................................................... 5
• Added Community Resources. .............................................................................................................................................. 7
• Updated all mechanical drawings, increased the size of the pads in the Recommended Stencil Pattern section. .............. 8

Changes from Revision C (January 2014) to Revision D Page

• Corrected timing VDS to read 15 V. ........................................................................................................................................ 3

Changes from Revision B (November 2013) to Revision C Page

• Added IG parameter. .............................................................................................................................................................. 1

• Lowered IDSS limit. ................................................................................................................................................................. 3
• Lowered IGSS limit. ................................................................................................................................................................. 3

Changes from Revision A (July 2013) to Revision B Page

• Deleted jumbo reel info. ......................................................................................................................................................... 1

• Added short reel info. ............................................................................................................................................................ 1

Changes from Original (April 2013) to Revision A Page

• Added ESD info to Features. ................................................................................................................................................. 1

• Included jumbo reel ordering information. ............................................................................................................................. 1
• Added ESD rating info to Absolute Maximum Ratings table. ................................................................................................. 1
• Added circuit schematic to pinout view. ................................................................................................................................ 1

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5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, IDS = 250 μA 30 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 24 V 100 nA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 10 V 50 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, IDS = 250 μA 0.65 0.85 1.10 V
VGS = 1.8 V, IDS =0.5 A 160 250 mΩ
VGS = 2.5 V, IDS =0.5 A 110 143 mΩ
RDS(on) Drain-to-Source On-Resistance
VGS = 4.5 V, IDS = 0.5 A 90 117 mΩ
VGS = 8 V, IDS =0.5 A 84 109 mΩ
gfs Transconductance VDS = 15 V, IDS = 0.5 A 4.8 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance 150 195 pF
VGS = 0 V, VDS = 15 V,
Coss Output Capacitance 44 57 pF
ƒ = 1 MHz
Crss Reverse Transfer Capacitance 2.2 2.9 pF
RG Series Gate Resistance 23 Ω
Qg Gate Charge Total (4.5 V) 1040 1350 pC
Qgd Gate Charge Gate-to-Drain 133 pC
VDS = 15 V, IDS = 0.5 A
Qgs Gate Charge Gate-to-Source 226 pC
Qg(th) Gate Charge at Vth 150 pC
Qoss Output Charge VDS = 15 V, VGS = 0 V 1110 pC
td(on) Turn On Delay Time 3.4 ns
tr Rise Time VDS = 15 V, VGS = 4.5 V, 1.4 ns
td(off) Turn Off Delay Time IDS = 0.5 A,RG = 2 Ω 10.8 ns
tf Fall Time 3.6 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage ISD = 0.5 A, VGS = 0 V 0.73 0.9 V
Qrr Reverse Recovery Charge 1500 pC
VDS= 15 V, IF = 0.5 A, di/dt = 300 A/μs
trr Reverse Recovery Time 5.6 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC TYPICAL VALUES UNIT
Junction-to-Ambient Thermal Resistance (1) 90
RθJA °C/W
Junction-to-Ambient Thermal Resistance (2) 250

(1) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
(2) Device mounted on FR4 material with minimum Cu mounting area.

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5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)

Figure 1. Transient Thermal Impedance

8 5
VDS = 5V
IDS - Drain-to-Source Current (A)

IDS - Drain-to-Source Current (A)

7
4
6

5 3
4

3 2

2
1 TC = 125°C
1 VGS =8V VGS =2.5V TC = 25°C
VGS =4.5V VGS =1.8V TC = −55°C
0 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.4 0.8 1.2 1.6 2 2.4
VDS - Drain-to-Source Voltage (V) G001 VGS - Gate-to-Source Voltage (V) G001

Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics

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Typical MOSFET Characteristics (continued)

(TA = 25°C unless otherwise stated)
10 1000
ID = 0.5A Ciss = Cgd + Cgs
9
VGS - Gate-to-Source Voltage (V)

VDS =15V Coss = Cds + Cgd

8 Crss = Cgd

C − Capacitance (pF)
7
100
6
5
4
10
3
2
1
0 1
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 0 3 6 9 12 15 18 21 24 27 30
Qg - Gate Charge (nC) G001 VDS - Drain-to-Source Voltage (V) G001

Figure 4. Gate Charge Figure 5. Capacitance

1.2 160
ID = 250uA TC = 25°C Id = 0.5A

RDS(on) - On-State Resistance (mΩ)

1.1 150
TC = 125ºC Id = 0.5A
VGS(th) - Threshold Voltage (V)

140
1
130
0.9 120
0.8 110

0.7 100
90
0.6
80
0.5 70
0.4 60
−75 −25 25 75 125 175 0 2 4 6 8 10 12
TC - Case Temperature (ºC) G001 VGS - Gate-to- Source Voltage (V) G001

Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage

1.5 10
VGS = 1.8V ID =0.5A TC = 25°C
ISD − Source-to-Drain Current (A)
Normalized On-State Resistance

1.4 VGS = 8V TC = 125°C

1
1.3

1.2 0.1
1.1

1 0.01

0.9
0.001
0.8

0.7 0.0001
−75 −25 25 75 125 175 0 0.2 0.4 0.6 0.8 1
TC - Case Temperature (ºC) G001 VSD − Source-to-Drain Voltage (V) G001

Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage

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Typical MOSFET Characteristics (continued)

(TA = 25°C unless otherwise stated)
100 100
TC = 25ºC

IAV - Peak Avalanche Current (A)

TC = 125ºC
IDS - Drain-To-Source Current (A)

10
10

0.1

100 ms 1 ms 10 µs
10 ms 100 µs 0.1
0.001 0.01 0.1 1
0.01
0.1 1 10 50 TAV - Time in Avalanche (mS) G001

VDS - Drain-To-Source Voltage (V) D010

Single Pulse Typical RθJA =250ºC/W (min Cu)

Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching
5.0
4.5
IDS - Drain- to- Source Current (A)

4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
Typical RthetaJA =90ºC/W(max Cu)
0.0
−50 −25 0 25 50 75 100 125 150 175
TA - AmbientTemperature (ºC) G001

Figure 12. Maximum Drain Current vs Temperature

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6 Device and Documentation Support

6.1 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

6.2 Trademarks
FemtoFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

6.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

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7 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

7.1 Mechanical Dimensions

1.04 B
A
0.96

PIN 1 INDEX AREA

0.64
0.56

0.35 MAX C

SEATING PLANE

0.65

0.325

0.175
2

3
0.51
0.35
0.49

1
0.16
2X
0.14
0.015 C B A 0.26
2X
0.24 0.26
0.24
0.015 C A B

(1) All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and
tolerancing per ASME Y14.5M.
(2) This drawing is subject to change without notice.
(3) This package is a Pb-free bump design. Bump finish may vary. To determine the exact finish, refer to the device data
sheet or contact a local TI representative.

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7.2 Recommended Minimum PCB Layout

(0.25)
2X (0.25) PKG
0.05 MIN
2X (0.15) ALL AROUND
1

SYMM
(0.35) (0.5)

(R0.05) TYP SOLDER MASK

(0.65) OPENING

METAL UNDER
SOLDER MASK
LAND PATTERN EXAMPLE
SOLDER MASK DEFINED
SCALE:50X
(1) All dimensions are in millimeters.
(2) For more information, see QFN/SON PCB Attachment (SLUA271).

7.3 Recommended Stencil Pattern

2X (0.25) PKG
2X (0.2)
1 (0.25)

SYMM
(0.4) (0.5)
3

2
2X (0.15) (R0.05) TYP
(0.65)
2X SOLDER MASK EDGE

SOLDER PASTE EXAMPLE

BASED ON 0.075 - 0.1 mm THICK STENCIL
(1) All dimensions are in millimeters.
(2) Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may
have alternate design recommendations.

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 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

CSD17381F4 ACTIVE PICOSTAR YJC 3 3000 RoHS & Green Call TI Level-1-260C-UNLIM -55 to 150 CQ

CSD17381F4T ACTIVE PICOSTAR YJC 3 250 RoHS & Green Call TI Level-1-260C-UNLIM -55 to 150 CQ

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2020

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD17381F4 PICOST YJC 3 3000 180.0 8.4 0.7 1.1 0.46 4.0 8.0 Q2
AR
CSD17381F4 PICOST YJC 3 3000 178.0 8.4 0.7 1.1 0.46 4.0 8.0 Q2
AR
CSD17381F4T PICOST YJC 3 250 178.0 8.4 0.7 1.1 0.46 4.0 8.0 Q2
AR
CSD17381F4T PICOST YJC 3 250 180.0 8.4 0.7 1.1 0.46 4.0 8.0 Q2
AR

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2020

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CSD17381F4 PICOSTAR YJC 3 3000 182.0 182.0 20.0
CSD17381F4 PICOSTAR YJC 3 3000 220.0 220.0 35.0
CSD17381F4T PICOSTAR YJC 3 250 220.0 220.0 35.0
CSD17381F4T PICOSTAR YJC 3 250 182.0 182.0 20.0

Pack Materials-Page 2
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