StrongIRFET™

IRFS7434-7PPbF
Application
 Brushed Motor drive applications HEXFET® Power MOSFET
 BLDC Motor drive applications
Battery powered circuits
  D VDSS 40V
 Half-bridge and full-bridge topologies RDS(on) typ. 0.70m
 Synchronous rectifier applications
 Resonant mode power supplies G max 1.0m
 OR-ing and redundant power switches ID (Silicon Limited) 362A
S
 DC/DC and AC/DC converters
ID (Package Limited) 240A
 DC/AC Inverters

Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant
G D S
Gate Drain Source

Standard Pack
Base part number Package Type Orderable Part Number
Form Quantity
Tube 50 IRFS7434-7PPbF
IRFS7434-7PPbF D2Pak-7Pin
Tape and Reel Left 800 IRFS7434TRL7PP

3.5 400
RDS(on), Drain-to -Source On Resistance (m)

ID = 100A Limited By Package

3.0 350

300
2.5
ID, Drain Current (A)

250
2.0
200
1.5 TJ = 125°C
150
1.0
100
TJ = 25°C
0.5 50

0.0 0
4 6 8 10 12 14 16 18 20 25 50 75 100 125 150
TC , Case Temperature (°C)
VGS, Gate -to -Source Voltage (V)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

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IRFS7434-7PPbF
Absolute Maximium Rating
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 362
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 229
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 240
IDM Pulsed Drain Current  1300*
PD @TC = 25°C Maximum Power Dissipation 245 W
Linear Derating Factor 1.96 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and
-55 to + 150 
TSTG Storage Temperature Range °C  
Soldering Temperature, for 10 seconds (1.6mm from case) 300

Avalanche Characteristics 
EAS (Thermally limited) Single Pulse Avalanche Energy  384 
mJ
EAS (Thermally limited) Single Pulse Avalanche Energy  880 
IAR Avalanche Current  A
See Fig 15, 16, 23a, 23b
EAR Repetitive Avalanche Energy  mJ

Thermal Resistance  
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case  ––– 0.51 °C/W  
RJA Junction-to-Ambient  ––– 40  

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.03 ––– V/°C Reference to 25°C, ID = 1mA 
––– 0.7 1.0 VGS = 10V, ID = 100A 
RDS(on) Static Drain-to-Source On-Resistance m
––– 1.5 ––– VGS = 6V, ID = 50A 
VGS(th) Gate Threshold Voltage 2.2 3.0 3.9 V VDS = VGS, ID = 250µA
––– ––– 1.0 VDS =40 V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 150 VDS =40V,VGS = 0V,TJ =125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Gate Resistance ––– 2.0 ––– 

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A by
source bonding technology. Note that current limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.077mH, RG = 50, IAS = 100A, VGS =10V.
ISD  100A, di/dt  969A/µs, VDD  V(BR)DSS, TJ 150°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 42A, VGS =10V.
 When mounted on 1" square PCB (FR-4 or G-10 Material). Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
* Pulse drain current is limited by source bonding technology.

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IRFS7434-7PPbF

Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 156 ––– ––– S VDS = 10V, ID =100A
Qg Total Gate Charge ––– 210 315 ID = 100A
Qgs Gate-to-Source Charge ––– 55 ––– VDS = 20V
nC  
Qgd Gate-to-Drain Charge ––– 66 ––– VGS = 10V
Qsync Total Gate Charge Sync. (Qg– Qgd) ––– 144 –––
td(on) Turn-On Delay Time ––– 23 ––– VDD = 26V
tr Rise Time ––– 125 ––– ID = 100A
ns
td(off) Turn-Off Delay Time ––– 107 ––– RG= 2.6
tf Fall Time ––– 85 ––– VGS = 10V
Ciss Input Capacitance ––– 10250 ––– VGS = 0V
Coss Output Capacitance ––– 1540 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 1060 ––– ƒ = 1.0MHz, See Fig.7
pF  
VGS = 0V, VDS = 0V to 32V
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 1880 –––
See Fig.11
Coss eff.(TR) Output Capacitance (Time Related) ––– 2147 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics  
Symbol Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol D

IS ––– ––– 362

(Body Diode) showing the
A G
Pulsed Source Current integral reverse
ISM ––– ––– 1300*
(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– 0.9 1.3 V TJ = 25°C,IS = 100A,VGS = 0V 

dv/dt Peak Diode Recovery dv/dt ––– 3.0 ––– V/ns TJ = 150°C,IS =100A,VDS = 40V
––– 44 ––– TJ = 25°C VDD = 34V
trr Reverse Recovery Time ns
––– 46 ––– TJ = 125°C IF = 100A,
––– 43 ––– TJ = 25°C di/dt = 100A/µs 
Qrr Reverse Recovery Charge nC
––– 44 ––– TJ = 125°C  
IRRM Reverse Recovery Current ––– 1.9 ––– A TJ = 25°C 

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IRFS7434-7PPbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

100

10 4.5V

4.5V
60µs PULSE WIDTH 60µs PULSE WIDTH
Tj = 25°C Tj = 150°C
1 10
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 4. Typical Output Characteristics

Fig 3. Typical Output Characteristics
1000 2.0

RDS(on) , Drain-to-Source On Resistance

ID = 100A
VGS = 10V
ID, Drain-to-Source Current(A)

100 1.6
TJ = 150°C
TJ = 25°C
(Normalized)

10 1.2

1 0.8

VDS = 10V
60µs PULSE WIDTH
0.1 0.4
2 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)

Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature

100000 14.0
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED ID = 100A
Crss = Cgd 12.0
VGS, Gate-to-Source Voltage (V)

VDS = 32V
Coss = Cds + Cgd
10.0 VDS = 20V
C, Capacitance (pF)

10000 Ciss

8.0
Coss
Crss 6.0
1000
4.0

2.0

100 0.0
0.1 1 10 100 0 50 100 150 200 250 300
VDS , Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFS7434-7PPbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY RDS(on)

ID, Drain-to-Source Current (A)

1000
ISD, Reverse Drain Current (A)

100 100µsec
TJ = 150°C
100
Limited by Package
TJ = 25°C 1msec
10
10
10msec

1 1 Tc = 25°C DC
Tj = 150°C
VGS = 0V Single Pulse
0.1
0.1
0.1 1 10 100
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)

Fig 9. Typical Source-Drain Diode Forward Voltage Fig 10. Maximum Safe Operating Area
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)

48 1.6
Id = 1.0mA
47 1.4

46 1.2

45 Energy (µJ) 1.0

44 0.8

43 0.6

42 0.4

41 0.2

40 0.0
-60 -20 20 60 100 140 180 -5 0 5 10 15 20 25 30 35 40 45

TJ , Temperature ( °C ) VDS, Drain-to-Source Voltage (V)

Fig 11. Drain-to–Source Breakdown Voltage Fig 12. Typical Coss Stored Energy

10.0
RDS (on), Drain-to -Source On Resistance (m)

VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
8.0
VGS = 8.0V
VGS = 10V

6.0

4.0

2.0

0.0
0 100 200 300 400 500
ID, Drain Current (A)

Fig 13. Typical On-Resistance vs. Drain Current

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IRFS7434-7PPbF
1

D = 0.50
Thermal Response ( Z thJC ) °C/W 0.20
0.1
0.10
0.05

0.01 0.02
0.01

SINGLE PULSE
0.001 ( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Duty Cycle = Single Pulse

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 125°C and
Avalanche Current (A)

Tstart =25°C (Single Pulse)

100 0.01

0.05
0.10

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming  j = 25°C and
Tstart = 125°C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs. Pulse width

400
TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 14, 15:
350 BOTTOM 1.0% Duty Cycle (For further info, see AN-1005 at www.irf.com)
ID = 100A 1.Avalanche failures assumption:
EAR , Avalanche Energy (mJ)

Purely a thermal phenomenon and failure occurs at a

300
temperature far in excess of Tjmax. This is validated for every
part type.
250
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
200 3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
150 4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
100 increase during avalanche).
6. Iav = Allowable avalanche current.
50 7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
0 tav = Average time in avalanche.
25 50 75 100 125 150 D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
Starting TJ , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy vs. Temperature EAS (AR) = PD (ave)·tav  

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IRFS7434-7PPbF
4.5 12
IF = 60A
VGS(th), Gate threshold Voltage (V)

4.0 10 VR = 34V
TJ = 25°C
3.5 TJ = 125°C
8

IRRM (A)
3.0
6
2.5
ID = 250µA
ID = 1.0mA 4
2.0 ID = 1.0A

2
1.5

1.0 0
-75 -50 -25 0 25 50 75 100 125 150 0 200 400 600 800 1000
TJ , Temperature ( °C ) diF /dt (A/µs)

Fig 17. Threshold Voltage vs. Temperature Fig 18. Typical Recovery Current vs. dif/dt

12 350
IF = 100A IF = 60A
VR = 34V 300 VR = 34V
10
TJ = 25°C TJ = 25°C
TJ = 125°C TJ = 125°C
250
8
QRR (nC)
IRRM (A)

200
6
150

4
100

2 50
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/µs) diF /dt (A/µs)

Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt

300
IF = 100A
250 VR = 34V
TJ = 25°C
TJ = 125°C
200
QRR (nC)

150

100

50

0
0 200 400 600 800 1000
diF /dt (A/µs)

Fig 21. Typical Stored Charge vs. dif/dt

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IRFS7434-7PPbF

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

V(BR)DSS

15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
tp 0.01 I AS

Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Id
Vds

Vgs

Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform

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IRFS7434-7PPbF

D2Pak-7Pin Package Outline (Dimensions are shown in millimeters (inches))

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS7434-7PPbF

D2Pak-7Pin Part Marking Information

D2Pak-7Pin Tape and Reel

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS7434-7PPbF

Qualification Information†  
Industrial
Qualification Level  

Moisture Sensitivity Level D2Pak-7Pin MSL1

RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/

†† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comments
 Updated EAS (L =1mH) = 880mJ on page 2
11/19/2014
 Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 42A, VGS =10V”. on page 2

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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