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Unit 3: Semiconductor Physics Formation of Energy Bands in Solids
Unit 3: Semiconductor Physics Formation of Energy Bands in Solids
Consider the specimen(l ×w × d)carrying current I ,along +ve X-axis, placed in transverse
magnetic field B ,applied along +ve z axis, i.e. along the width of the specimen as shown in
figure. Let the specimen is p-type …so current I ,is due to holes moving in the positive X
direction.
Because of the magnetic field B, Lorentz force on charge carriers i.e. on holes is given by
FB e v B
FB e vB
The direction of this force is given by Flemming‘s left hand rule to be in the downward
direction. So holes will experience a down ward force of magnitude Bev…because of which
they accumulate at the lower edge of the specimen.
This results in the development of electric field in the +ve Y direction i.e. upward direction. This
is called Hall field EH
Holes will experience a force due to this newly developed Hall field in the upward direction, of
magnitude
Fe eE H
The accumulation of charges continues until, the Hall field becomes strong enough to balance
downward drift due to magnetic field…
So, in equilibrium, the downward drift due to magnetic field is numerically equal to upward drift
due to Hall field…
eEH Bev
E H Bv
We know that, current I is given by
I nvAe where A w d
I
v
nAe
VH
As EH , where d is thickness / depth
d
VH BI 1 BI
d nAe ne A
BId
VH RH
A
1
where, RH ...is Hall coefficient
ne
1 m3
its unit will be C i.e.
1 3 C
m
BId
VH RH
A
VH A
RH
BId
VH 1 A
RH
d B I
EH I
RH , where, J current density
BJ A
VH
& EH
d
So, Hall coefficient can also be defined as Hall field developed when unit magnetic field is applied, when
unit current density is flowing through the specimen..
So, Hall coefficient is 1/ne, and n is charge carrier density &e is charge of each carrier, then ne is charge
density…so, Hall coefficient can also be defined as reciprocal of charge density….
If the current carriers were electrons, then the force on electrons due to magnetic field would be
negative..Thus Hall voltage or Hall field would be in downward i. e. negative Y direction.
Thus Hall voltage & Hall coefficient would be positive when charge carriers are holes & would be
negative when charge carriers are electrons..
Applications of Hall effect-
* Determination of type of charge carriers
The sign of Hall voltage /Hall coefficient tells us about the type of charge carriers i.e. holes or
electrons
*Determination of density of charge carriers..
Hall coefficient is determined experimentally by the formula
VH A
RH
BId
Then charge carrier density is obtained by
1
n
RH e
*Determination of mobility of charge carriers..
Hall coefficient is determined experimentally by the formula
VH A
RH
BId
Then charge carrier density is obtained by
ne
RH
Conductivity of Semiconductor:-
In a semiconductor, the current is due to free electrons as well as holes.
Consider a semiconductor of length l, carrying current I as shown in fig.
ne=electron density in conduction band
np= hole density in conduction band
µe= electron mobility
µp = hole mobility
νe= drift velocity of electron
νp = drift velocity of holes
A = Cross section of semiconductor
V- Voltage applied across the semiconductor
then Ie neeAe
Ip nppAe
I Ie Ip
I neeAe nppAe
I Ae (nee npp )
We know that
e eE And p pE
I AeE (nee npp )
V
Also, E
l
V
I Ae (nee npp )
l
V l 1
R
I A (nee npp)e
l
We know that R . where =resistivity of semiconductor
A
1
(nee npp)e
Conductivity of given semiconductor is
1
e(nee npp )
Thus conductivity of semiconductor is a sum of conductivity due to both electron and holes
sc e p
Case (I) Intrinsic Semiconductor
ne np ni
Conductivity of an intrinsic semiconductor is
i eni(e p)
Case (II) N-type extrinsic semiconductor
For N-type semiconductor electron concentration is much grater than the hole concentration.
ne np
N enee
If nd is concentration of donor atoms then,
N ende
Case (III) P-type extrinsic semiconductor
If P-type semiconductor electron concentration is negligibly small in comparison to hole
concentration,
Then, np ne
P enpp
If na is acceptor atom concentration then,
P enap
Effect of external Factors on conductivity
Temperature-The resistivity increases with temperature in metals because as temperature
increases number of collisions of electrons with lattice ions increases…
For semiconductors, as temperature increases, more number of electrons move from valance
band to conduction band & they contribute to conduction. So, conductivity increases with
temperature
The optical radiation i.e. light does not affect resistivity of metals..
When semiconductor is exposed to light, few electrons move from valance band to conduction
band. So, photoconductivity increases & resistivity decreases
The resistivity of metals increases with impurity concentration as collisions of electron with
impurity atoms increase
Conductivity of semiconductor is drastically improved with the concentration of lower or higher
valance impurity atoms
Fermi level in metals is defined as the highest filled energy state in the highest filled band ,which contains
electrons at 0 Kelvin…
Thus ,at 0 K, all energy levels up to EF are occupied & all energy levels above EF are empty…
Fermi level, in semiconductors ,is defined as the reference level, that gives probability of occupancy of
states in the conduction band as well as probability of non occupancy of states in the valance band…
In simple words—
Probability of occupancy of states in the conduction band----i.e. probability that electrons are there in
conduction band
Probability of non-occupancy of states in the valance band----i.e. probability that energy levels in V.B.
are not occupied by electrons ….i.e. probability that holes are there in valance band
For an intrinsic semiconductor, for every electron in C.B., there is a hole in the valance band…so, no. of
electrons in C.B. is equal to number of holes in V.B….so, Fermi level lies at the centre of the forbidden
energy gap..
If no of electrons in C.B. is more than no. of holes in V. B., it will move towards C.B.
If no of holes in V.B.is more than no of electrons in C. B., it will move towards V.B.
So, fermi level in semiconductors can also be defined as the energy which corresponds to the centre of
gravity of conduction electrons & valance holes ,when ―weighted‖ according to their energies…..
So, Fermi level in solids can also be defined as the energy level where probability of occupancy is ½,for
any positive temperature…
Here T0 is 0K
T1<T2<T3
Fermi level in Intrinsic Semiconductor:
Position of Fermi level in Extrinsic Semiconductor:
When atoms of trivalent impurity are added to a pure semiconductor, there will be
vacancies (holes) at absolute zero temperature which stays at accepter level just above the
top of valence band. At T = 00K, Fermi level is midway between Ea and EV, as shown in
figure 1 (a). As temperature increases (i.e. at T > 00K) Ea gets saturated by the electrons
and more electrons gets excited to the conduction band and Ef moves above Ea but
remains close to valence band than the conduction band as shown in figure 1 (b).
Conduction band
Ec
Eg
Fermi level EFin
Ea
Ev EF
Valence band p
a) T = 0 K
The fermi energy level EF lies between the valance band energy E V and the acceptor
energy level Ea
Ec
Conduction band
c
Eg
Fermi level
EE
p F
Fin
Ea
Ev
Valence band
b) T > 0 K
The fermi energy level EF may shift above the acceptor level Ea but is always well
below the centre of forbidden band.
Conduction band
Ec
EFn
Ed
Fermi level EFin
Eg
Ev
Valence band
a) T = 0 K
The fermi energy level EF lies between the conduction band energy EC and the donor energy level Ed
Conduction band
Ec
Ed
EFn
E
Ev g
Valence band
b) T > 0 K
The fermi energy level EF may shift well below the donor energy level but is always above the
centre of forbidden band.
N- type semiconductor
With increase in impurity concentration the separation tends to decrease & they interact. As a
result the donor level splits & forms a energy band below the conduction band.
Larger doping concentration, the broaden the impurity band & at one stage it overlap to
conduction band. The broadening of donor levels into band is accompanied by decrease in the
band gap and upward displacement of Fermi level. The Fermi level moves closer and closer to
the conduction band and finally moves in to conduction band as donor band overlap the
conduction band.
EfN
Ed
Eg
Eg
Eg
Ev Ev Ev
Valence band Valence band Valence band
With the increase of doping concentration, fermi level moves closer to conduction band and
finally impurity band overlaps the conduction band.
P-N Junction:
Unbiased: The energy band picture of an unbiased diode is as shown in figure 1.
Figure 1
In p-type semiconductor the Fermi-level is closer to the valence band and in n-type it is closer to
conduction band. When p-n junction is formed the bands on either side shift to equalize the Fermi levels
and attain equilibrium. The shift in the conduction and valence band is equal to eVB, where VB is the
barrier potential across the depletion region.
Forward Bias:
When a d. c. source is connected across the diode such that the positive terminal is connected to
p-region and negative terminal is connected to n-region then the diode is said to be in forward bias as
shown in figure 2.
The majority carrier electrons in the n region are repelled by the negative terminal of the battery.
Therefore the electrons gain some excess energy to cross over the energy barrier. As soon as it reaches the
p-side, it encounters a large number of holes. Somewhere close to the junction the electron is trapped by a
hole so that it becomes a valance electron in the p-side. There is large number of holes in p-side so that
the electron will hop from one hole to other, towards the positive terminal of the battery as it is attracted
by it. Finally leaving the crystal from the p-side it will enter the positive terminal. Thus the applied d. c.
voltage helps the flow of electrons through the junction diode and therefore large forward current flows.
As the forward bias leads to increase the energy of electrons in n-region of the crystal the Fermi-level on
n-side is raised by energy equal to eV. Where V is applied d.c. voltage. The bands adjust their positions to
suite the elevation of the Fermi-level as shown in figure 2.
3. Reverse Bias: When a d.c. source is connected across the diode such that the positive terminal
is connected to n-region and negative terminal is connected to p-region then the diode is said to
be in reverse bias as shown in figure 3.
In this case the electrons in the n-side move away from the junction towards the positive
terminal of the d. c. source and the holes in the p-side also move away from the junction towards
the negative terminal of the d. c. source. They leave behind ions and the width of the depletion
region increases, until the barrier potential equals the applied voltage. Thus reverse bias should
not lead to any flow of current. However thermal energy continuously creates electron-hole pairs
near the junction on both sides. A small current exists because of flow of minority carriers in
both p and n regions. This reverse current depends more on temperature and less on voltage. This
reverse current is very small. In this case Fermi-level moves down and the bands adjust their
positions accordingly as shown in figure 3.
Solar Cell:
When light falls on a p-n junction produces a potential difference across it. This potential
difference is capable of driving a current through an external circuit, producing useful work. This
phenomenon is called the ‗photovoltaic effect‘.
As thermal energy produces electron-hole pairs in the depletion region to contribute to the
reverse current in a diode, current can also be made to flow by illuminating the diode with light
of energy greater than the energy gap of the semiconductor used for making a diode. The light
energy too creates electron-hole pairs and therefore leads to flow of current.
Construction:
The construction of solar cell is as shown in figure 5.21. A single crystal Silicon solar cell
consists of an n-type Silicon wafer with a very thin (in microns) diffused p-type region at the
surface to form a p-n junction. An ohmic contact is made at the bottom of n-type wafer.
Another contact is made at the top of the p-type surface in such a way that the maximum
possible area of the p-layer can remain exposed. This surface is used to catch the sunlight. An
antireflection coating is applied to reduce the amount of light lost by reflection form the surface.
The cell is also covered at the top by glass quartz or sapphire plate, with additional antireflection
and uv-rejection filters. The uv photons can degrade the cell performance by damaging it
Working:
When light falls on the P-region and reaches at the junction or absorbed by the junction,
the electron-hole pairs are generated. They are generated as a minority carriers i.e. electrons in
the P-region and holes in N-region. When they come at the junction they face the built in voltage
(barrier potential) which separates them. The electrons moves from Pregion to N-region (and the
holes from Nregion to P-region) because there are number of lower energy levels are available in
N-region. This is shown in figure 1. This leads to an increase in the number of holes in P-region
and electrons in N-region. The accumulation of charges on the two sides of the junction produces
a voltage or emf known as photo emf. It is known as open circuit voltage and is proportional to
the illumination as well as the illuminated area. When an external circuit is connected across the
solar cell terminals, current flows through it. Thus solar cell behaves as battery with N side as a
negative terminal and P side as a positive terminal.
When the voltage is measured between the two ends of the cells, it will be maximum,
which is called ‗open circuit voltage‘ (VOC). If the load is connected to cell, then carriers move
in the circuit creating current and when value of load is minimum, current will be maximum
which is called ‗short circuit current‘ (ISC).
When the solar cell is exposed to the light its IV characteristics is as shown in figure 3.