F/2020/7153 [1] Total Pages : 4

Third Semester
Computer Science and Engineering / Information Technology
Scheme OCBC 2019
COMPUTER ARCHITECTURE
Time : Three Hours Maximum Marks : 70
Note : i) All 7 Questions are Compulsory. Internal choices has been
given in each LO (Learning Outcome)
g^r 7 àíZ A{Zdm¶© h¢& Am§V[aH$ {dH$ën à˶oH$ LO (b{ZªJ AmCQ>H$‘)
‘| {XE JE h¢&
ii) In case of any doubt or dispute, the English version question
should be treated as final.
{H$gr ^r àH$ma Ho$ g§Xoh AWdm {ddmX H$s pñW{V ‘| A§J«oOr ^mfm Ho$
àíZ H$mo A§{V‘ ‘mZm Om¶oJm&

Q. LO Questions Marks
1. LO1 a) Define Micro-operation. 3
‘mBH«$mo-Am°naoeZ H$mo n[a^m{fV H$a|&
b) Explain logical micro-operation also its
hardware implementation. 7

bm°{OH$b ‘mBH«$mo-Am°naoeZ Am¡a BgHo$ hmS>©doAa

Båßbr‘|Q>eZ H$mo g‘PmBE&
OR/AWdm
a) Define register transfer and register transfer 4
language.
a{OñQ>a Q´>m§g’$a E§S> a{OñQ>a Q´>m§g’$a b¢½doO H$mo
n[a^m{fV H$a|&
b) Describe various types of shift micro-
6
operation.
{d{^ÝZ àH$ma Ho$ {eâQ> ‘mBH«$mo-Am°naoeZ H$m
dU©Z H$a|&

F/2020/7153 P.T.O.
 [2]

Q. LO Questions Marks
2. LO2 a) Define instruction cycle. 3
B§ñQ´>³eZ gmB{H$b H$mo n[a^m{fV H$a|&
b) Explain fetch and decode phases of
instruction cycle. 7
B§ñQ´>³eZ gmB{H$b Ho$ ’o$M Am¡a S>oH$moS> ’¡$gg H$mo
g‘PmBE&
OR/AWdm
a) What is store program organization? 3
ñQ>moa àmoJ«m‘ Am°J©{ZOeZ ³¶m h¢&
b) Explain Hardwired control unit and micro
programmed control unit. 7
hmS>©doAa H§$Q´>mob ¶y{ZQ> Am¡a ‘mBH«$mo àmoJ«måS> H§$Q´>mob
¶y{ZQ> H$mo g‘PmBE&

3. LO3 a) Define data transfer instruction and data

manipulation instruction. 4
S>Qo >m Q´>mg
§ ’$a B§ñQ´>³eZ E§S> S>Qo >m ‘¡Zrnwbeo Z B§ñQ´>³eZ
H$mo n[a^m{fV H$a|&
b) Explain Asynchronous data transfer in detail. 6
E{gÝH«$moZg S>Qo >m Q´>mg
§ ’$a Ho$ ~mao ‘| {dñVma go
g‘PmBE&
OR/AWdm
a) Define RISC and CISC. 4
RISC Am¡a CISC H$mo n[a^m{fV H$a|&
b) Explain various types of program interrupt. 6
{d{^ÝZ àH$ma Ho$ àmoJ«m‘ B§Q>aßQ> H$mo g‘PmBE&

4. LO4 a) Explain I/O bus and Interface module. 4

I/O ~g Am¡a B§Q>a’o$g ‘m°S>çyb H$mo g‘PmBE&

F/2020/7153 Contd.....
 [3]

Q. LO Questions Marks

b) Compare between synchronous and

asynchronous mode of data transfer. 6
S>oQ>m Q´>m§g’$a Ho$ {gÝH«$moZg Am¡a E{gÝH«$moZg ‘moS>
Ho$ ~rM A§Va ~VmBE&
OR/AWdm
a) Explain I/O interface. 3
I/O B§Q>a’o$g H$mo g‘PmBE&
b) Explain asynchronous data transfer and also
explain handshaking in it. 7
E{gÝH«$moZg S>oQ>m Q´>m§g’$a H$mo g‘PmBE Am¡a Bg‘|
h¢S>eoqH$J Ho$ ~mao ‘| ^r ~VmBE&
5. LO5 a) Explain parallel priority interrupt. 5
n¡aobb àm¶mo[aQ>r B§Q>aßQ> H$mo g‘PmBE&
b) Explain priority encoder with its truth table. 5
àm¶mo[aQ>r EZH$moS>a H$mo Q®>W Q>~o b Ho$ gmW g‘PmBE&
OR/AWdm
a) Explain priority interrupt. 4
àm¶mo[aQ>r B§Q>aßQ> H$mo g‘PmBE&
b) Explain daisy chaining priority interrupt in
detail. 6

‹S>oOr M¡qZJ àm¶mo[aQ>r B§Q>aßQ> H$mo {dñVma go

g‘PmBE&

6. LO6 a) Write the uses of RAM and ROM in computer. 4

H$å߶yQ>a ‘| RAM Am¡a ROM Ho$ Cn¶moJ {b{IE&
b) Explain the levels of memory hierarchy. 6
‘¡‘moar hm¶amH$s© Ho$ bodob H$mo g‘PmBE&
OR/AWdm

F/2020/7153 P.T.O.
 [4]

Q. LO Questions Marks

a) Explain associative mapping technique. 4

Agmo{gE{Q>d ‘¡qnJ Q>o³ZrH$ H$mo g‘PmBE&
b) Draw the block diagram of ROM chip and
explain its functionality. 6

amo‘ Mrn Ho$ ãbm°H$ S>m¶J«m‘ H$mo S´>m° H$a| Am¡a BgH$s
H$m¶©j‘Vm H$mo g‘PmBE&

7. LO7 Explain asynchronous serial transfer in detail. 10

E{gÝH«$moZg gr[a¶b Q´>m§g’$a H$mo {dñVma go g‘PmBE&
OR/AWdm
Explain logical and bit manipulation instruction
in detail.
bm°{OH$b Am¡a {~Q> ‘¡ZrnwboeZ B§ñQ´>³eZ H$mo {dñVma
go g‘PmBE&

F/2020/7153