How to write netlist for SRAM

Shantonu Debnath
Department of CST, IIEST, Shibpur

Code
***Inverter SRAM***
***Read Operation***
*initial conditions stored for read operation
.ic v(Q)=1
.ic v(QR)=1

*data control
.ic v(bl)=1
.ic v(blb)=1

*** NETLIST Description ***

Name Drain Gate Source Bulk Model name Parameter (width and length)
** Bulk: 1. For pmos Source
2. For nmos Ground
3. For data access Bit/Bit bar.
** Follow the picture for clear about mentioned point

***Now we are add Voltage***

Name Drain Ground Type of voltage Pulse
**that’s applicable for Vdd and WL and for Vdd and Wl pulse is 1.
Name Drain Ground PULSE (V1 V2 <TD> <TR> <TF> <PW> <PER>)
The parameters are:
V1 = the initial value (volts or amps)
V2 = the pulsed value (volts or amps)
<TD>= the seconds before the first pulsed value
<TR>= the seconds it takes the pulse to rise from V1 to V2
<TF>= the seconds it takes the pulse to fall from V2 to V1
<PW>= the number of seconds the signal stays at V2
<PER>= the time between each rising edge of the pulse after the first initial pulse

***Transient Analysis (.TRAN)***

.tran TSTEP TSTOP <TSTART <TMAX>>
The parameters are:
TSTEP = the time between each sample in the simulation
TSTOP = the stop time in the simulation which starts at 0 seconds.
TSTART = the start time to save data for later analysis (useful when memory is
limited)
TMAX = the maximum step size that WinSpice3 uses

*** MODEL Descriptions ***

Add model for pmos
Add model for nmos
**PTM link: http://ptm.asu.edu/
**source: PTM

*** Option ***

.option post accurate nomod brief
.option post_version=9007
.option runlvl = 5
.op
**or
.options POST=2
.options AUTOSTOP
.options INGOLD=2 DCON=1
.options GSHUNT=1e-12 RMIN=1e-15
.options ABSTOL=1e-5 ABSVDC=1e-4
.options RELTOL=1e-2 RELVDC=1e-2
.options NUMDGT=4 PIVOT=13
.options runlvl=6

***End of Simulation (.END)

.end
 Example Code

*SRAM*
mpgl 4 1 5 5 nmos w=45 n l=45n
mpgr 6 1 3 6 nmos w=45n l =45n
mpdl 4 3 0 0 nmos w=45n l=45n
mpdr 3 4 0 0 nmos w=45n l=45n
mpul 2 3 4 2 pmos w=90n l=45n
mpur 2 4 3 2 pmos w=90n l=45n
v1 1 0 1 *this is word line "WL*
V2 5 0 pulse (0 1 0 0.01n 0.01n 10n 20n) *this is Bit line*
v3 6 0 pulse (0 1 10n 0.01n 0.01n 10n 28n) *this is for BitBar "BLB"*
V4 2 0 1 *this is for VDD*

.tran 0.1n 20n start = 0

.model nmos
.model pmos
**from ptm site (congf 45nm , vdd= 1 )

.option post accurate nomod brief

.option post_version=9007
.option runlvl = 5
.op

.end