A B C D E

COMPAL CONFIDENTIAL
1
MODEL NAME : BDW00 1

COMPAL P/N : DA8DW00L100

PCB NO : LA-1452
Revision : 0.2
DATE :

Abacus/TangII Schematics Document

2 2

uFCBGA/uFCPGA Northwood

2002-08-22
3 3

REV: 0.2 (PT)

4 4

Dell-Compal Confidential
Compal Electronics, Inc.
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 1 of 43
A B C D E
 A B C D E

Compal confidential Block Diagram

Model Name : ABACUS/TangII
File Name : LA-1452
DT & Mobile Northwood
1 Fan Control CPU Bypass uFCBGA/uFCPGA CPU Thermal Sensor Clock Generator 1
+1.2VP ADM1032
& CPUVID ICS950810
page 7 page 7, 8 +CPU_CORE page 5,6 +3VS page 6 +3VS page 15

HA#(3..31) HD#(0..63)
System Bus
400/533 MHz
DT/BD-PE/ICH4/EXT VGA
DT/BD-GL/ICH4/INT VGA
CRT Connector INTEL Memory DDR-DIMM X2
BANK 0, 1, 2, 3
page 17
BROOKDALE-GL/PE BUS(DDR) +2.5V 200/266MHz
(PIRQE#,G_GNT#,G_REQ#) FOR EXT. INT. CRT
+1.5VS +2.5V
EXT. CRT 760 BGA
+2.5V +1.25VS page 12,13,14
AGP4X(1.5V) +1.25VS
AGP GRAPHIC/CHRONTEL
AGP Conn +CPU_CORE page 9,10,11
page 16

2 LVDS Connector TV OUT page 17

HUB LINK
2

+1.5VS
66MHz

+3VS
+3VS 33MHz PCI BUS INTEL 48MHz 2 USB Ports
+3VALW +3VALW
+5VALW page 32
IDSEL:AD18 IDSEL:AD17 IDSEL:AD20 +1.5VS
(PIRQC#D#,GNT#1,REQ#1) (PIRQB#,GNT#0,REQ#0) (PIRQA#,GNT#2,REQ#2) ICH4
+1.5VALW 24.576MHz AC-LINK
+CPU_CORE 421 BGA
Minipci CONN LAN CardBus VCC5REF
ATA100

WIRELESS BCM-4401L & 1394 VCC5REFSUS

+3VALW PCI4510/PCI1510
page 18,19,20
M DC
+3V page 26 +3VS
+3VS +3VALW page 22 +3VALW
+3V +3V page 29
page 23,24,25
LPC BUS
+3VS Cable
RJ45 Card Bus IDE
3 1394 33MHz IDE HDD CD-ROM AC97 Codec 3

page 22 SLOT CONN +5VALW STAC9750 RJ11

page 24 page 23 page 21 +5VS page 21
+5VDDA
NS EC87591L page 27
Embedded SIDE IRQ15 PIDE IRQ14
845PE / PCI4510 Controller
845GL / PCI1510 +3VS
+3VALW page 30

AMP & INT. HeadPhone

Speaker & MIC Jack
+5VDDA
+5VALW page 28 page 28
Touch Pad Int.KBD
LED Status page 31
LID Switch
+5VS
+5VALW
+3VALW page 29 BIOS
+3VALW
Power Circuit DC/DC Interface Power On/Off
page 30
4
DC/DC Suspend Reset & RTC
4

page EC I/O Buffer EC DEBUG

34,35,36,37,38,39,40 +5VALW +3VALW
page 33 page 32 page 31 page 30 Dell-Compal Confidential
Compal Electronics, Inc.
Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 2 of 43
A B C D E
 5 4 3 2 1

Power Managment table

Revision List

+3VS
Schematics Rev PCB Rev CHIPS Rev Signal
+5VS
+3VALW +3V
SST-Build 0.1 0.1 +1.5VS
+5VALW +5V
+1.2VP
D 845PE Rev B0 State +12VALW +2.5V D
PT-Build 0.2 0.2 845GL Rev B1 +CPU_CORE
ICH4 Rev B0
+1.25VS
ST-Build
S0 ON ON ON

QT-Build
S1 ON ON ON

S3 ON ON OFF

S5 S4/AC ON OFF OFF

S5 S4/AC don't exist OFF OFF OFF

Ceramic Capacitor Spec Guide:

C C
Temperature Characteristics:
Symbol 0 1 2 3 4 5 6 7

CODE Z5U Z5V Z5P Y5U Y5V Y5P X5R X7R

8 9 A B C D E F G

NP0 C0G BJ CH CJ CK SH SJ

H I J

UJ UK SL

Tolerance:
Symbol A B C D F G H J
B
CODE +-0.05PF +-0.1PF +-0.25PF +-0.5PF +-1PF +-2% +-3% +-5% B

K M N P Q V X Z

+-10% +-20% +-30% +100,-0% +30,-10% +20,-10% +40,-20% +80,-20%

SMBUS Control Table

THERMAL THERMAL NOTE1:
SOURCE INVERTER BATT SERIAL SENSOR SENSOR SODIMM CLK CHIP MINI PCI
EEPROM (CPU)
(U57) (U25/U23) @XX : Depop component
SMB_EC_CK1 NS 87591 1@XX : Pop for INT, Depop for EXT
SMB_EC_DA1
(1010)

SMB_EC_CK2 NS 87591 2@XX : Pop for EXT, Depop for INT

SMB_EC_DA2
A A

SMB_CLK ICH4
SMB_DATA Dell-Compal Confidential
Compal Electronics, Inc.
Title
Note & Revision
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 3 of 43
5 4 3 2 1
 5 4 3 2 1

PQ26
SUSP#
+1.5VALW +1.5VS
D
page 35 page 35 D

SUSP# +5VS
+5VALW page 31

SHDN# SIDEPWR
page 21
+5VSHDD
SUSP#
MAX1632 page 25
+5VDDA
page 36

SYSON
+3VALW +3V
page 31
C C
page 34 VR_ON#
SUSP#
AC page 31
+3VS

B+ CM2843 +1.2V
+12VALW page 38

Battery VR_ON#
page 34

+5VS
Mobile +3VS
B B

ISL6215 +CPU_CORE +1.5VS VGA Conn.

180 pin
DT page 38 +2.5V
+3V
ISL6219
+5VALW
(Either one by CPU)
+12VALW
SUSP# B+ page 16
+1.25VS
A
SYSON ISL6225 A

page 36 +2.5V Dell-Compal Confidential

Compal Electronics, Inc.
Title
POWER DIAGRAM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
Date: Monday, August 26, 2002 Sheet 4 of 43
5 4 3 2 1
 A B C D E F G H I J

1 1

+CPU_CORE

AC10
AC12
AC14
AC16
AC18

AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18

AB11
AB13
AB15
AB17
AB19

AE10
AE12
AE14
AE16
AE18
AE20

AF11
AF13
AF15
AF17
AF19

AF21
AC8

AD7
AD9
AA8

AB7
AB9

AE6
AE8

AF2

AF5
AF7
AF9

C10
C12
C14
C16
C18
C20

D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20

B11
B13
B15
B17
B19

E10
2 2

C8

D7
D9
A8

B7
B9
HA#[3..31] U19A HD#[0..63]
<9> HA#[3..31] HD#[0..63] <9>

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
HA#3 K2 B21 HD#0
HA#4 A#3 D#0 HD#1
K4 A#4 D#1 B22
HA#5 L6 A23 HD#2
HA#6 A#5 D#2 HD#3
K1 A#6 D#3 A25
HA#7 L3 C21 HD#4
A#7 D#4
HA#8 M6 A#8 CPU CORE D#5 D22 HD#5
HA#9 L2 B24 HD#6
HA#10 A#9 D#6 HD#7
M3 A#10 D#7 C23
HA#11 M4 C24 HD#8
HA#12 A#11 D#8 HD#9
N1 A#12 D#9 B25
HA#13 M1 G22 HD#10
3 HA#14 A#13 D#10 HD#11 3
N2 A#14 D#11 H21
HA#15 N4 C26 HD#12
HA#16 A#15 D#12 HD#13
N5 A#16 D#13 D23
HA#17 T1 J21 HD#14
HA#18 A#17 D#14 HD#15

HOST ADDRESS
R2 A#18 D#15 D25
HA#19 P3 H22 HD#16
HA#20 A#19 D#16 HD#17
P4 A#20 D#17 E24
HA#21 R3 G23 HD#18
HA#22 A#21 D#18 HD#19
T2 A#22 D#19 F23
HA#23 U1 F24 HD#20
HA#24 A#23 D#20 HD#21
P6 A#24 D#21 E25
HA#25 U3 F26 HD#22
HA#26 A#25 D#22 HD#23
T4 A#26 D#23 D26
HA#27 V2 L21 HD#24
HA#28 A#27 D#24 HD#25
R6 A#28 D#25 G26
HA#29 HD#26

DT/Mobile
W1 H24
4 HA#30 T5
A#29 D#26
M21 HD#27 4
HA#31 A#30 D#27 HD#28
U4 A#31 D#28 L22
V3 J24 HD#29
A#32 D#29 HD#30
W2 A#33 D#30 K23

HOST DATA
Y1 H25 HD#31
A#34 D#31 HD#32

NorthWood
AB1 A#35 D#32 M23
H_REQ#[0..4] N22 HD#33
<9> H_REQ#[0..4] D#33
P21 HD#34
H_REQ#0 D#34 HD#35
J1 REQ#0 D#35 M24
H_REQ#1 K5 N23 HD#36
H_REQ#2 REQ#1 D#36 HD#37
J4 REQ#2 D#37 M26
H_REQ#3 J3 N26 HD#38
H_REQ#4 REQ#3 D#38 HD#39
CONTROL SIGNAL

H3 REQ#4 D#39 N25

G1 R21 HD#40
<9> H_ADS# ADS# D#40
P24 HD#41
D#41 HD#42
5 D#42 R25 5
+CPU_CORE
For Mobile AC1 AP#0 D#43 R24 HD#43
V5 T26 HD#44
R284 @4.7K_0402_5% AP#1 D#44 HD#45
AA3 BINIT# D#45 T25
1 2 AC3 T22 HD#46
IERR# D#46 HD#47
D#47 T23
2 1 U26 HD#48
R301 200_0402_5% D#48 HD#49
<9> H_BREQ0# H6 BR0# D#49 U24
D2 U23 HD#50
<9> H_BPRI# BPRI# D#50
G2 V25 HD#51
<9> H_BNR# BNR# D#51
G4 U21 HD#52
<9> H_LOCK# LOCK# D#52
V22 HD#53
D#53 HD#54
D#54 V24
CLK_CPU_BCLK AF22 W26 HD#55
<15> CLK_CPU_BCLK BCLK0 D#55
CLK_CPU_BCLK# AF23 Y26 HD#56
<15> CLK_CPU_BCLK# BCLK1 D#56
W25 HD#57
D#57 HD#58
6 D#58 Y23 6
GND D#59 Y24 HD#59
<9> H_HIT# F3 HIT# CPU CORE D#60 Y21 HD#60
E3 AA25 HD#61
<9> H_HITM# HITM# D#61
E2 AA22 HD#62
<9> H_DEFER# DEFER# D#62
AA24 HD#63
D#63

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8

F13
F15
F17
F19
F9
F11
E8
E20
E18
E16
E14
E12
NorthWood

7 7
+CPU_CORE

Dell-Compal Confidential
8
Title
Compal Electronics, Inc. 8
Northwood / P4 uFCPGA (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 5 of 43
A B C D E F G H I J
 A B C D E F G H I J
2 1 H_SKTOCC#
R267
@33_0402_5% 1 2 +CPU_CORE
R318 56_0402_5%

AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26

AF10
AF12
AF14
AF16
AF18
AF20
AF26
AE7
AE9
AF1

AF6
AF8

C11
C13
C15
C17
C19

C22
C25

D10
D12
D14
D16
D18
D20
D21
D24
B10
B12
B14
B16
B18
B20
B23
B26

E11
E13
E15
E17
E19
E23
E26

F10
F12
F14
F16
F18

F22
F25
H_GHI# PM_CPUPERF#

C2

C5
C7
C9

D3
D6
D8
1 2

B4
B8

E1

E4
E7
E9

F2

F5
U19B PM_CPUPERF# <19>
R317@0_0402_5%

VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
SKTOCC#
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
1 For Mobile 1

<9> H_RS#0 F1 RS#0 DP#0 J26

<9> H_RS#1 G5 RS#1 DP#1 K25
<9> H_RS#2 F4 RS#2 DP#2 K26
AB2 RSP# GND DP#3 L25 +H_GTLREF1
<9> H_TRDY# J6 TRDY#

GTLREF0 AA21
H_A20M# C6 AA6
<18> H_A20M# A20M# GTLREF1
For <18> H_FERR#
H_FERR# B6 FERR# GTLREF2 F20
H_IGNNE# B2 F6
Mobile <18> H_IGNNE#
H_SMI# B5
IGNNE# GTLREF3
A22
<18> H_SMI# SMI# NC1
H_PWRGD AB23 A7 +CPU_CORE
<18> H_PWRGD PWRGOOD NC2
2 @0_0402_5%
<18> H_STPCLK#
H_STPCLK# Y4 2
R269 2 H_DPSLPR# AD25 STPCLK#
<18> H_DPSLP# 1 DPSLP#
H_INTR D1 AD24 TESTTHI0_1 R285 1 2 56_0402_5%
<18> H_INTR LINT0 TESTHI0
H_NMI E5 AA2
<18> H_NMI LINT1 TESTHI1
+CPU_CORE H_INIT# W5 AC21 TESTTHI2_7 R275 1 2 56_0402_5%
<18> H_INIT# INIT# TESTHI2
H_RESET# AB25 AC20
<8,9> H_RESET# RESET# TESTHI3
R271 200_0402_5% AC24
H_DPSLPR# TESTHI4
2 1 TESTHI5 AC23
H5 AA20 ITPCLKOUT0 R293 1 2 56_0402_5%
<9> H_DBSY# DBSY# ITPCLKOUT0
R288 300_0402_5% H2 AB22 ITPCLKOUT1 R276 1 2 56_0402_5%
<9> H_DRDY# DRDY# ITPCLKOUT1
2 1 H_PWRGD AD6 U6 TESTTHI8_10 R294 1 2 56_0402_5%
<10> H_BSEL0 BSEL0 TESTHI8
AD5 BSEL1 TESTHI9 W4

DT/Mobile TESTHI10 Y3
A6 H_GHI#
H_THERMDA GHI# H_DSTBN#[0..3]
B3 THERMDA H_DSTBN#[0..3] <9>
51.1_0603_1% +CPU_CORE H_THERMDC C4
R279 THERMDC
3 2 1 H_RESET# E22 H_DSTBN#0 3
H_THERMTRIP# DSTBN#0 H_DSTBN#1
1 2 A2 THERMTRIP# DSTBN#1 K22
R315 62_0402_5% H_DSTBN#2

NorthWood DSTBN#2 R22

Place resistor <100mils from DSTBN#3 W22 H_DSTBN#3
CPU pin ITP_BPM0 AC6 H_DSTBP#[0..3]
<8> ITP_BPM0 BPM#0 H_DSTBP#[0..3] <9>
ITP_BPM1 AB5
<8> ITP_BPM1 BPM#1
ITP_BPM2 AC4 F21 H_DSTBP#0
ITP_BPM3 BPM#2 DSTBP#0 H_DSTBP#1
Y6 BPM#3 DSTBP#1 J23
+1.2VP +CPU_CORE ITP_PRDY# AA5 H_DSTBP#2
<8> ITP_PRDY# BPM#4 DSTBP#2 P23
ITP_PREQ# AB4 W23 H_DSTBP#3
<8> ITP_PREQ# BPM#5 DSTBP#3
1

ITP_TCK D4 L5
<8> ITP_TCK TCK ADSTB#0 H_ADSTB#0 <9>
R206 R207 ITP_TDI C1 R5
<8> ITP_TDI TDI ADSTB#1 H_ADSTB#1 <9>
@0_0603_5% 0_0603_5% ITP_TDO D5
<8> ITP_TDO TDO H_DBI#[0..3]
ITP_TMS F7
4 <8> ITP_TMS TMS H_DBI#[0..3] <9> 4
ITP_TRST# E6 E21 H_DBI#0
<8> ITP_TRST# TRST# DBI#0
2

G25 H_DBI#1
L24 DBI#1
For 4.7UH_80mA
DBI#2 P26 H_DBI#2
1 2 H_VCCA AD20 V21 H_DBI#3 2 1
Mobile 4.7UH_80mA 1 A5
VCCA DBI#3 R266 @0_0402_5%
SYSRST# <19>
L25 VCCSENSE
1 2 H_VCCIOPLL AE23 AE25 H_DBR#
VCCIOPLL DBR# H_ITP_DBR# <8>
C305 TP2
1

Murata LQG21F4R7N00 22U_1206_10V4Z C320 AF25 NC7 H_PROCHOT# 1 +CPU_CORE

AF3 NC8 PROCHOT# C3 2
C321 1U_0603_10V4Z V6 R311 62_0402_5%
MCERR#
2

22U_1206_10V4Z AB26 H_SLP#

SLP# H_SLP# <18>
H_VSSA
RP61 AC26 ITP_CLK0
<15> CLK_CPU_ITP 1 4 CLK_CPU_ITTP AD26 ITP_CLK1 GND VSSA AD22 H_VSSA
2 3 CLK_CPU_ITTP# A4 1
<15> CLK_CPU_ITP# VSSSENSE
5 L24 COMP0 5
@0_0402_4P2R_5% P1 TP1
COMP1
NC3 AD2
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
2

RP62

VCCVID
NC4 AD3
<8> CLK_ITP# 1 4

VID0
VID1
VID2
VID3
VID4

NC5
NC6
<8> CLK_ITP 2 3

+CPU_CORE 0_0402_4P2R_5%
1

F8
G21
G24
G3
G6
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
U22
U25
U5
V1
V23
V26
V4
W21
W24
W3
W6
Y2
Y22
Y25
Y5

AE5
AE4
AE3
AE2
AE1

AE21
AF24

AF4
NorthWood
R278 2 1 51_0402_5% ITP_PREQ# R302 R300
2 1 ITP_PRDY# 51.1_0603_1% 51.1_0603_1% +1.2VP
R291 51_0402_5%
R262 2 1 51_0402_5% ITP_BPM0 +3VS
2 1 ITP_BPM1 +CPU_CORE
R272 51_0402_5% C317
R268 2 1 51_0402_5% ITP_BPM2 CPU_VID4 <8,40>

2
2 1 ITP_BPM3 .1U_0402_16V4Z
6 CPU_VID3 <8,40> 6
R296 51_0402_5% CPU_VID2 <8,40> R303

2
CPU_VID1 <8,40>
1 2 ITP_TDI CPU_VID0 <8,40> 1K_0402_5% R307
R313 1.5K_0402_5%

1
1 2 ITP_TMS 470_0402_5%
<19,31> PROCHOT#
R305 1.5K_0402_5%

1
1
ITP_TRST# Q26
1
R314
2
680_0402_5% GTL Reference Voltage 2
+5VS +5VS +CPU_CORE VL +CPU_CORE
Layout note :
If used ITP port must depop

3
8.2K_0402_5% 1. Place R_A and R_B near CPU (Within 1.5"). 3904
2. Place decoupling cap 220PF near CPU.(Within
1

1
H_PROCHOT#
500mils)
1

R334 C174 R265 R316 R320

<10,16,18,22,23,25,26,30,33> PCIRST#
1

R_A
7 H_THERMDA R333 .1U_0402_16V4Z R337 49.9_0603_1% Q62 47K_0402_5% 7
2

2
2N7002 470_0402_5%

G
2

2
Width 10mil , Spacing 10mil 8.2K_0402_5% @10K_0402_5% Trace width>=7mil
1

C470 3 1
U57 +H_GTLREF1 <34,36> SHDN_1632#
2

D
1

1
2200P_0603_50V7K 2 1 Q59
D+ VDD1
2

R261 C319 C318 2

H_THERMDC 3 6 R_B
D- ALERT 100_0603_1% 1U_0603_10V4Z 220P_0603_50V8J

3
SMB_EC_CK2 8 4 3904
<8,30> SMB_EC_CK2 SCLK THERM
2

H_THERMTRIP#
<19> H_THERMTRIP#
SMB_EC_DA2 7 5
<8,30> SMB_EC_DA2 SDATA GND
Dell-Compal Confidential
ADM1032ARM_RM8

8
Title
Compal Electronics, Inc. 8
CPU Temperature Sensor Mobile Northwood / P4 uFCPGA & Thermal sensor (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 6 of 43
A B C D E F G H I J
 A B C D E F G H I J

Layout note : +CPU_CORE

Place close to CPU, Use 2~3 vias per PAD.
Layout note : For DT
Place .22uF caps underneath balls on solder side. Place close to CPU power and
Place 10uF caps on the peripheral near balls. ground pin as possible

1
Use 2~3 vias per PAD.
1 (<1inch) + C390 + C371 + C261 + C147 + C263 1
470U_D4_2.5V_10m 470U_D4_2.5V_10m 470U_D4_2.5V_10m 470U_D4_2.5V_10m 470U_D4_2.5V_10m

2
For Desktop's CPU: +CPU_CORE
Please place these cap in the socket cavity area ESR total=0.75m ohm
C total=6350uF
+CPU_CORE

1
For Mobile's CPU: + C352 + C259 + C148 + C149 + C150
ESR total=1.875m ohm 470U_D4_2.5V_10m
C total=2590uF 470U_D4_2.5V_10m 470U_D4_2.5V_10m 470U_D4_2.5V_10m 470U_D4_2.5V_10m

2
1

1
C407 C391 C63 C65 C294
2 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 2
+CPU_CORE
2

2
+CPU_CORE

1
+ C151 + C152 + C265 + C262 + C266
330U_D2_2.5V_15m 330U_D2_2.5V_15m 330U_D2_2.5V_15m 330U_D2_2.5V_15m 330U_D2_2.5V_15m
1

2
C412 C376 C290 C282 C406
10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K
2

2
+CPU_CORE PLACE ON CPU SIDE
.22U_0603_10V7K
Please place these cap on the socket north side .22U_0603_10V7K .22U_0603_10V7K .22U_0603_10V7K .22U_0603_10V7K
3 3

1
+CPU_CORE C104 C111 C113 C117 C119 C120 C110 C112 C116 C118

2
.22U_0603_10V7K .22U_0603_10V7K .22U_0603_10V7K .22U_0603_10V7K .22U_0603_10V7K
1

1
C388 C408 C400 C258 C293
10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K
2

2
+12VALW

3
+CPU_CORE Q29
<17,33> SUSP 2
SI2303DS Fan1 Control circuit
4 4
+12VS +5VS
1

Q10
R376

1
C411 C410 C257 C402 C401 FMMT619
10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 2 1 2 D14
2

1SS355

2
C574

3
3.48K_0603_1%

2
2
.1U_0402_16V4Z +5VFAN_1
+CPU_CORE

2
+5VS D22 C578
1N4148 .1U_0402_16V4Z C566 JP12

3 1

1
5

1
U10 LMV321_SOT23-5 @1000P_0402_50V7K
1
<30> EN_FAN1 1 + 2
1

4 2 3
C403 C405 C291 C99 2 1 3 - D21
10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K Q12 1N4148 MOLEX_53398-0390_3P
2

2
R385 2SA1036K
5 5

2
13K_0603_1%
1 2 +3VS
2 1
Please place these cap on the socket south side R340 10K_0402_5%
R381
FAN1_TACH <30>
7.32K_0603_1%
+CPU_CORE
1

C122 C121 C356 C62 C404

10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K
Fan2 Control circuit
2

6 6
+CPU_CORE Q8
2SC2411EK +5VS
R11

1
+12VS 2 1 2 D11
1

1SS355

2
C351 C292 C368 C100 C296

3
10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 3.48K_0603_1%
2

2
2
+5VFAN_2
+5VS D20 C234
1N4148 .1U_0402_16V4Z C235 JP19

3 1

1
5

1
U1 LMV321_SOT23-5 @1000P_0402_50V7K
+CPU_CORE 1
<30> EN_FAN2 1 + 2
4 2 3
2 1 3 - D6
7 Q1 @1N4148 MOLEX_53398-0390_3P 7

2
1

R10 2SA1036K

2
C409 C64 C68 C66 13K_0603_1%
10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 10U_1206_6.3V7K 1 2 +3VS
2

2 1
R200 10K_0402_5%
R6
FAN2_TACH <30>
7.32K_0603_1%

Dell-Compal Confidential
8
Title
Compal Electronics, Inc. 8
CPU Decoupling CAP. & Fan control
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 7 of 43
A B C D E F G H I J
 10 9 8 7 6 5 4 3 2 1

Mobile CPU Desktop CPU

MO/DT_CPU
H
1 0 H
+3VS
VID 4 3 2 1 0 4 3 2 1 0
CPU_VID0 2 1
VCC
<6,40> CPU_VID0
R260 1K_0402_5%
1.750V 0 0 0 0 0 0 0 1 0 0
<6,40> CPU_VID1
CPU_VID1 2
R259
1
1K_0402_5%
1.700V 0 0 0 0 1 0 0 1 1 0
CPU_VID2 2 1
1.650V 0 0 0 1 0 0 1 0 0 0
<6,40> CPU_VID2
R258 1K_0402_5%
1.600V 0 0 0 1 1 0 1 0 1 0
<6,40> CPU_VID3
CPU_VID3 2
R257
1
1K_0402_5%
1.550V 0 0 1 0 0 0 1 1 0 0
G CPU_VID4 2 1
1.500V 0 0 1 0 1 0 1 1 1 0 G
<6,40> CPU_VID4
R256 1K_0402_5%
1.450V 0 0 1 1 0 1 0 0 0 0
1.400V 0 0 1 1 1 1 0 0 1 0
1.350V 0 1 0 0 0 1 0 1 0 0
1.300V 0 1 0 0 1 1 0 1 1 0
1.250V 0 1 0 1 0 1 1 0 0 0
+CPU_CORE
1.200V 0 1 0 1 1 1 1 0 1 0
1.150V 0 1 1 0 0 1 1 1 0 0
F
+CPU_CORE
1.100V 0 1 1 0 1 1 1 1 1 0 F
1

1
C200 C199 C560
R184 1 2 @1.5K_0603_1% 1.050V 0 1 1 1 0 X X X X X
@10U_1206_6.3V7K @.1U_0402_16V4Z @.1U_0402_16V4Z R183 1 2 @75_0603_1% 1.000V 0 1 1 1 1 X X X X X
2

2
R372 1 2 @39_0603_1% 0.975V 1 0 0 0 0 X X X X X
JP15 R310 1 2 @150_0603_1% 0.950V 1 0 0 0 1 X X X X X
1
3
1 2 2
4
R373
2
@33_0402_5%
1
0.925V 1 0 0 1 0 X X X X X
3 4 AGP_BUSY# <16,19>
5
7
5 6 6
8
H_ITP_DBR# <6> 0.900V 1 0 0 1 1 X X X X X
<6> ITP_BPM0 7 8
<6> ITP_BPM1 9
11
9 10 10
12
ITP_TDI <6> 0.875V 1 0 1 0 0 X X X X X
<6> ITP_PRDY# 11 12 ITP_TMS <6>
E <6> ITP_PREQ# 13
15
13 14 14
16
ITP_TRST# <6> 0.850V 1 0 1 0 1 X X X X X E
<6,9> H_RESET# 15 16 ITP_TCK <6>
<6> ITP_TCK 17
19
17 18 18
20
0.825V 1 0 1 1 0 X X X X X
<6> CLK_ITP 19 20
<6> CLK_ITP# 21
23
21 22 22
24
0.800V 1 0 1 1 1 X X X X X
23 24 ITP_TDO <6>
25 25 K 26 0.775V 1 1 0 0 0 X X X X X
1

C198
1

1
C201
@2.2P_0402_16V8J
@2.2P_0402_16V8J
@2MM SMT KEY26 R304
0.750V 1 1 0 0 1 X X X X X
2

@27.4_0603_1% 0.725V 1 1 0 1 0 X X X X X
2

0.700V 1 1 0 1 1 X X X X X

2
0.675V 1 1 1 0 0 X X X X X
D
ITP Debug Connector 0.650V 1 1 1 0 1 X X X X X D
0.625V 1 1 1 1 0 X X X X X
0.600V 1 1 1 1 1 X X X X X
VRM output off 1 1 1 1 1

C C

+5VS
1

C394
C482 .1U_0402_16V4Z
.1U_0402_16V4Z
2

1 2
U25 U23
<6,30> SMB_EC_DA2 1 SDA VCC 8 <6,30> SMB_EC_DA2 1 SDA VCC 8 +5VS
<6,30> SMB_EC_CK2 2 SCL A0 7 <6,30> SMB_EC_CK2 2 SCL A0 7 1 2
3 6 R351 1K_0402_5% 3 6
OS# A1 OS# A1 R308 10K_0402_5%
B 4 GND A2 5 1 2 4 GND A2 5 B
LM75CIMMX-5 LM75CIMMX-5

1
R306
1K_0402_5%

Address:1001_000X Address:1001_000X

2
Dell-Compal Confidential
A
Title
COMPAL Electronics, Inc. A
CPU VID & ITP PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 8 of 43
10 9 8 7 6 5 4 3 2 1
 5 4 3 2 1

DDR_SDQ[0..63]
<12> DDR_SDQ[0..63]
DDR_SDQS[0..7]
HD#[0..63] <12> DDR_SDQS[0..7]
HD#[0..63] <5> DDR_SDM[0..7]
HA#[3..31] <12> DDR_SDM[0..7]
HA#[3..31] <5> DDR_SMA[0..12]
<12,13> DDR_SMA[0..12]

U12A
<12> DDR_CLK2# DDR_CLK3 <13>
<12> DDR_CLK2 DDR_CLK3# <13>
HD#0 T30
BROOKDALE-GL/PE W31 HA#3
<12> DDR_CLK1# DDR_CLK4 <13>
HD#0 HA#3 <12> DDR_CLK1 DDR_CLK4# <13>
D
HD#1 R33 HD#1 HOST,HUB HA#4 AA33 HA#4
<12> DDR_CLK0# DDR_CLK5 <13>
HD#2 R34 AB30 HA#5 D
HD#2 HA#5 <12> DDR_CLK0 DDR_CLK5# <13>
HD#3 N34 V34 HA#6
HD#4 HD#3 HA#6 HA#7
R31 HD#4 HA#7 Y36
HD#5 L33 AC33 HA#8
HD#6 HD#5 HA#8 HA#9
L36 HD#6 HA#9 Y35

AM34
HD#7 HA#10

AN11

AN21

AN34
AK22

AP11

AP21

AP33
P35 AA36

AL21

AL33

AN9
HD#7 HA#10

AP9
HD#8 J36 AC34 HA#11 U12B
HD#9 HD#8 HA#11 HA#12
K34 HD#9 HA#12 AB34
HD#10 K36 Y34 HA#13 DDR_SDQ0 AN4 AN15 DDR_SMA12

SCMD_CLK0
SCMD_CLK0#
SCMD_CLK1
SCMD_CLK1#
SCMD_CLK2
SCMD_CLK2#
SCMD_CLK3
SCMD_CLK3#
SCMD_CLK4
SCMD_CLK4#
SCMD_CLK5
SCMD_CLK5#
HD#11 HD#10 HA#13 HA#14 DDR_SDQ1 AP2 SDQ_0 SMAA12/BS0 DDR_SMA11
M30 HD#11 HA#14 AB36 SDQ_1 SMAA11/DQS8 AL15
HD#12 M35 AC36 HA#15 DDR_SDQ2 AT3 AK26 DDR_SMA10
HD#13 HD#12 HA#15 HA#16 DDR_SDQ3 AP5 SDQ_2 SMAA10/DQ31 DDR_SMA9
L34 HD#13 HA#16 AC31 SDQ_3 SMAA9/SMA3 AK16
HD#14 K35 AF35 HA#17 DDR_SDQ4 AN2 AN17 DDR_SMA8
HD#15 HD#14 HA#17 HA#18 DDR_SDQ5 AP3 SDQ_4 SMAA8/SMA4 DDR_SMA7
H36 HD#15 HA#18 AD36 SDQ_5 SMAA7/SMA6 AP17
HD#16 G34 AD35 HA#19 DDR_SDQ6 AR4 AP19 DDR_SMA6
HD#17 HD#16 HA#19 HA#20 DDR_SDQ7 AT4 SDQ_6 SMAA6/SDQ29 DDR_SMA5
G36 HD#17 HA#20 AE34 SDQ_7 SMAA5/SMA8 AL17
HD#18 J33 AD34 HA#21 DDR_SDQ8 AT5 AL19 DDR_SMA4
HD#19 HD#18 HA#21 HA#22 DDR_SDQ9 AR6 SDQ_8 SMAA4/SMA11 DDR_SMA3
D35 HD#19 HA#22 AE36 SDQ_9 SMAA3/SMA7 AK20
HD#20 F36 AF36 HA#23 DDR_SDQ10 AT9 AP23 DDR_SMA2
HD#21 HD#20 HA#23 HA#24 DDR_SDQ11 AR10 SDQ_10 SMAA2/SMA9 DDR_SMA1
F34 HD#21 HA#24 AE33 SDQ_11 SMAA1/SDQ19 AN25
HD#22 E36 AF34 HA#25 DDR_SDQ12 AT6 AL25 DDR_SMA0
HD#23 HD#22 HA#25 HA#26 DDR_SDQ13 AP6 SDQ_12 SMAA0/SMA12 DDR_SMAB5
H34 HD#23 HA#26 AG34 SDQ_13 SMAB5 AK18 DDR_SMAB5 <13>
HD#24 F35 AG36 HA#27 DDR_SDQ14 AT8 AN19 DDR_SMAB4
HD#24 HA#27 SDQ_14 SMAB4 DDR_SMAB4 <13>
HD#25 D36 AE31 HA#28 DDR_SDQ15 AP8 AN23 DDR_SMAB2
HD#25 HA#28 SDQ_15 SMAB2 DDR_SMAB2 <13>
HD#26 H35 AH35 HA#29 DDR_SDQ16 AP10 AP25 DDR_SMAB1
HD#26 HA#29 SDQ_16 SMAB1 DDR_SMAB1 <13>
HD#27 E33 AG33 HA#30 DDR_SDQ17 AT11
HD#28 HD#27 HA#30 HA#31 DDR_SDQ18 AT13 SDQ_17 DDR_SBS1
E34 HD#28 HA#31 AG31 SDQ_18 SBA1 AP27 DDR_SBS1 <12,13>
HD#29 B35 DDR_SDQ19 AT14 AN27 DDR_SBS0
HD#29 SDQ_19 SBA0 DDR_SBS0 <12,13>
HD#30 G31 AB35 DDR_SDQ20 AT10
HD#30 HADSTB0# H_ADSTB#0 <6> SDQ_20
HD#31 DDR_SDQ21 AR12 DDR_SDQS0
HD#32
C36
D33
HD#31 HADSTB1# AF30 H_ADSTB#1 <6>
DDR_SDQ22 AR14 SDQ_21 BROOKDALE-GL/PE SDQS0 AR2
AT7 DDR_SDQS1
HD#32 SDQ_22 SDQS1
C
HD#33
HD#34
D30
D29
HD#33 HIT# P36
M36
H_HIT# <5>
DDR_SDQ23 AP14
DDR_SDQ24 AT15 SDQ_23 DDR SDQS2 AT12
AT17
DDR_SDQS2
DDR_SDQS3 C
HD#34 HITM# H_HITM# <5> SDQ_24 SDQS3
HD#35 E31 T36 DDR_SDQ25 AP16 AR24 DDR_SDQS4
HD#35 ADS# H_ADS# <5> SDQ_25 SDQS4
HD#36 D32 T34 DDR_SDQ26 AT18 AT29 DDR_SDQS5
HD#36 BNR# H_BNR# <5> SDQ_26 SDQS5
HD#37 C34 M34 DDR_SDQ27 AT19 AT34 DDR_SDQS6
HD#37 BPRI# H_BPRI# <5> SDQ_27 SDQS6
HD#38 B34 U33 DDR_SDQ28 AR16 AL36 DDR_SDQS7
HD#38 BREQ0# H_BREQ0# <5> SDQ_28 SDQS7
HD#39 D31 U31 DDR_SDQ29 AT16
HD#39 DBSY# H_DBSY# <6> SDQ_29
HD#40 G29 N36 DDR_SDQ30 AP18 AP4 DDR_SDM0
HD#40 DEFER# H_DEFER# <5> SDQ_30 SDM0
HD#41 C32 U36 DDR_SDQ31 AR20 AR8 DDR_SDM1
HD#41 DRDY# H_DRDY# <6> SDQ_31 SDM1
HD#42 B31 V30 DDR_SDQ32 AR22 AP12 DDR_SDM2
HD#42 HTRDY# H_TRDY# <6> SDQ_32 SDM2
HD#43 B32 T35 DDR_SDQ33 AP22 AR18 DDR_SDM3
HD#43 HLOCK# H_LOCK# <5> SDQ_33 SDM3
HD#44 B30 DDR_SDQ34 AP24 AT24 DDR_SDM4
HD#45 HD#44 DDR_SDQ35 AT26 SDQ_34 SDM4 DDR_SDM5
B29 HD#45 DINV3 C26 H_DBI#3 <6> SDQ_35 SDM5 AP28
HD#46 E27 B33 DDR_SDQ36 AT22 AR34 DDR_SDM6
HD#46 DINV2 H_DBI#2 <6> SDQ_36 SDM6
HD#47 C28 C35 DDR_SDQ37 AT23 AL34 DDR_SDM7
HD#47 DINV1 H_DBI#1 <6> SDQ_37 SDM7
HD#48 B27 N33 DDR_SDQ38 AT25
HD#48 DINV0 H_DBI#0 <6> SDQ_38
HD#49 D26 DDR_SDQ39 AR26 AL13 DDR_CKE3
HD#49 SDQ_39 SCKE3/SCK#5 DDR_CKE3 <13>
HD#50 D28 V36 DDR_SDQ40 AP26 AK14 DDR_CKE2
HD#50 HREQ0# H_REQ#0 <5> SDQ_40 SCKE2/RSVD DDR_CKE2 <13>
HD#51 B26 AA31 DDR_SDQ41 AT28 AN13 DDR_CKE1
HD#51 HREQ1# H_REQ#1 <5> SDQ_41 SCKE1/SDQ58 DDR_CKE1 <12>
HD#52 G27 W33 DDR_SDQ42 AR30 AP13 DDR_CKE0
HD#52 HREQ2# H_REQ#2 <5> SDQ_42 SCKE0/RSVD DDR_CKE0 <12>
HD#53 H26 AA34 DDR_SDQ43 AP30
HD#53 HREQ3# H_REQ#3 <5> SDQ_43
HD#54 B25 W35 DDR_SDQ44 AT27
HD#54 HREQ4# H_REQ#4 <5> SDQ_44
HD#55 C24 DDR_SDQ45 AR28 AL29 DDR_SCS#0
HD#55 HI[0..10] <18> SDQ_45 SCS#0/SCKE2 DDR_SCS#0 <12>
HD#56 B23 AF2 HI10 DDR_SDQ46 AT30 AP31 DDR_SCS#1
HD#56 HI10 SDQ_46 SCS#1/RSVD DDR_SCS#1 <12>
HD#57 B24 AE2 H I9 DDR_SDQ47 AT31 AK30 DDR_SCS#2
HD#57 HI9 SDQ_47 SCS#2/SCK#2 DDR_SCS#2 <13>
HD#58 E23 AF3 H I8 DDR_SDQ48 AR32 AN31 DDR_SCS#3
HD#58 HI8 SDQ_48 SCS#3/SCAS# DDR_SCS#3 <13>
HD#59 C22 AE5 H I7 DDR_SDQ49 AT32
HD#60 HD#59 HI7 H I6 DDR_SDQ50 AR36 SDQ_49 DDR_SRAS#
G25 HD#60 HI6 AE4 SDQ_50 SRAS#/SCKE0 AK28 DDR_SRAS# <12,13>
HD#61 B22 AF4 H I5 DDR_SDQ51 AP35 AN29 DDR_SCAS#
HD#61 HI5 SDQ_51 SCAS#/RSVD DDR_SCAS# <12,13>
HD#62 D24 AD8 H I4 DDR_SDQ52 AP32 AP29 DDR_SWE#
HD#62 HI4 SDQ_52 SWE#/SDQ5 DDR_SWE# <12,13>
HD#63 G23 AC5 H I3 DDR_SDQ53 AT33
HD#63 HI3 H I2 DDR_SDQ54 AP34 SDQ_53 RDCLKO
HI2 AC7 SDQ_54 SRCVEN_OUT# AK24 RDCLKI & RDCLKO 100mils
L31 AB8 H I1 DDR_SDQ55 AT35 AL23 R DCLKI 2 1
B <6> H_DSTBP#0 HDSTBP0# HI1 H I0 DDR_SDQ56 AN36 SDQ_55 SRCVEN_IN# R297 @0_0603_5%
LENGTH 5mils WIDTH B
<6> H_DSTBP#1 J34 HDSTBP1# HI0 AA7 SDQ_56
E29 DDR_SDQ57 AM36 AJ34 2 1
<6> H_DSTBP#2 HDSTBP2# SDQ_57 SMY_RCOMP +2.5V
E25 AD4 DDR_SDQ58 AK36
<6> H_DSTBP#3 HDSTBP3# HI_STBS HUB_PSTRB <18> SDQ_58
N31 AC4 DDR_SDQ59 AJ36 AM2 1 2 R298
<6> H_DSTBN#0 HDSTBN0# HI_STBF HUB_PSTRB# <18> SDQ_59 SM_VREF SDREF
G33 DDR_SDQ60 AP36 60.4_0603_1%
<6> H_DSTBN#1 HDSTBN1# SDQ_60
C30 P34 DDR_SDQ61 AM35 R299
<6> H_DSTBN#2 HDSTBN2# RS2# H_RS#2 <6> SDQ_61

1
D25 U34 DDR_SDQ62 AK35 0_0603_5%
<6> H_DSTBN#3 HDSTBN3# RS1# H_RS#1 <6> SDQ_62

1
R36 DDR_SDQ63 AK34 C364 R292
RS0# H_RS#0 <6> SDQ_63
D22 60.4_0603_1% C357
<6,8> H_RESET# CPURST#

2
1 R18 2 BROOKDALE-GL/PE_760P .1U_0402_10V6K

2
K30 24.9_0603_1% .1U_0402_10V6K
<15> CLK_MCH_BCLK HCLK

2
J31 B28 HX_RCOMP 10 mil 1 R263 2
<15> CLK_MCH_BCLK# HCLK# HX_RCOMP 10 mil
D27 V35 HY_RCOMP 24.9_0603_1%
HD_VREF2 HY_RCOMP
H24 HD_VREF1 HX_SWING H28 H_XY_SWING <11>
<11> MCH_GTLREF H30 HD_VREF0 HY_SWING Y30
AD30 AD3 R295
HA_VREF HI_VREF HUB_VREF <11,18>
P30 HCC_VREF HI_RCOMP AC2 1 2 +1.5VS
AD2 68.1_0603_1%
HI_SWING HUB_VSWING <11,18>
1

C335 C304 C274 BROOKDALE-GL/PE_760P

2

.1U_0402_10V6K
82845GL-INT VGA C302 C327
2

82845PE-EXT VGA .1U_0402_10V6K .1U_0402_10V6K

.1U_0402_10V6K
.1U_0402_10V6K

Close to H28 Close to Y30

A A

Layout note :
1. HX_RCOMP, HY_RCOMP Trace width 10 mil. Dell-Compal Confidential
2. Terminator Max 500 mil.
Compal Electronics, Inc.
Title
BROOKDALE-GL/PE (1/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 9 of 43
5 4 3 2 1
 A B C D E

AGP_AD[0..31] +1.5VS
<16> AGP_AD[0..31]
AGP_SBA[0..7] Place close to pin AE7
<16> AGP_SBA[0..7]
CLK_MCH_DISPLAY +2.5V
U12C

AB10
P10
V10
1

W9
U12D

G1
C1
D4
D6

R1
R9
A3
A7

K6

P6

V6
L1
L9
R234
<16> AGP_PIPE#
AGP_PIPE# H8 AGP/DVO V4 AGP_AD0

VCCAGP10
VCCAGP11
VCCAGP12
VCCAGP13
VCCAGP14
VCCAGP15
VCCAGP16
VCCAGP0
VCCAGP1
VCCAGP2
VCCAGP3
VCCAGP4
VCCAGP5
VCCAGP6
VCCAGP7
VCCAGP8
VCCAGP9
AGP_SBA0 GPIPE# GAD0/DVOBHSYNC AGP_AD1 @10_0402_5%
C3 GSBA0/ADDIN0 GAD1/DVOBVSYNC V2
AGP_SBA1 C2 W4 AGP_AD2 Y19 AH8
GSBA1/ADDIN1 GAD2/DVOBD1 VCC1 VCCSM0

1 2
AGP_SBA2 D3 W5 AGP_AD3 AA19 AK8
GSBA2/ADDIN2 GAD3/DVOBD0 VCC2 VCCSM1

1
AGP_SBA3 D2 U5 AGP_AD4 C249 W20 AG9
AGP_SBA4 GSBA3/ADDIN3 GAD4/DVOBD3 AGP_AD5 VCC3 VCCSM2 C340 C399 C159
E4 U4 U21 AJ9 + + +
A AGP_SBA5 GSBA4/ADDIN4 GAD5/DVOBD2 AGP_AD6 @10P_0402_50V8K VCC4 VCCSM3 A
E2 GSBA5/ADDIN5 GAD6/DVOBD5 U2 W21 VCC5 VCCSM4 AL9

2
AGP_SBA6 F3 V3 AGP_AD7 AA21 AM22 100U_D_6.3VM
GSBA6/ADDIN6 GAD7/DVOBD4 VCC6 VCCSM5

2
AGP_SBA7 F2 T2 AGP_AD8 A9 AJ23
GSBA7/ADDIN7 GAD8/DVOBD6 AGP_AD9 VCC7 VCCSM6
GAD9/DVOBD9 T3 B9 VCC8 VCCSM7 AL37
G5 T4 AGP_AD10 C9 AU9
<16> AGP_WBF# GWBF# GAD10/DVOBD8 VCC9 VCCSM8
G7 R2 AGP_AD11 D9 AK10 100U_D_6.3VM 100U_D_6.3VM
<16> AGP_RBF# GRBF# GAD11/DVOBD11 VCC10 VCCSM9
BROOKDALE-GL/PE GAD12/DVOBD10 R5 AGP_AD12 E9 AJ11
AGP_ST0 AGP_AD13 VCC11 VCCSM10
<16> AGP_ST0 C4 GST0 GAD13/DVOBCCLKINT# R7 Place close to pin AE7 B10 VCC12 VCCSM11 AL11
AGP_ST1 B4 T8 AGP_AD14 C10 AU25
<16> AGP_ST1 GST1 GAD14/DVOBFLDSTL VCC13 VCCSM12
AGP_ST2 B3 P3 AGP_AD15 CLK_MCH_66M D10 AM26
<16> AGP_ST2 GST2 GAD15/MDDC CLK VCC14 VCCSM13
P8 AGP_AD16 F10 AU13
GAD16/DVOCVSYNC VCC15 VCCSM14

1
V8 K4 AGP_AD17 H10 AM14
<16> AGP_ADSTB0 GAD_STB0/DVOBCLK GAD17/DVOCHSYNC VCC16 VCCSM15
U7 K2 AGP_AD18 R286 A11 AJ27
<16> AGP_ADSTB0# GAD_STB0#/DVOBCLK# GAD18/DVOCBLANK# VCC17 VCCSM16
M8 J2 AGP_AD19 @22_0402_5% B11 AJ1
<16> AGP_ADSTB1 GAD_STB1/DVOCCLK GAD19/DVOCD0 VCC18 VCCSM17
L7 M3 AGP_AD20 C11 AL1
<16> AGP_ADSTB1# GAD_STB1#/DVOCCLK# GAD20/DVOCD1 VCC19 VCCSM18
F4 L5 AGP_AD21 D11 AJ15
<16> AGP_SBSTB GSBSTB GAD21/DVOCD2 VCC20 VCCSM19

1 2
E5 L4 AGP_AD22 E11 AP15
<16> AGP_SBSTB# GSBSTB# GAD22/DVOCD3 VCC21 VCCSM20
H4 AGP_AD23 C333 G11 AU29
GAD23/DVOCD4 AGP_AD24 VCC22 VCCSM21
<16> AGP_FRAME# M4 G_FRAME#/MDVI DATA GAD24/DVOCD7 G2 J11 VCC23 VCCSM22 AH2
N7 K3 AGP_AD25 @10P_0402_50V8K B12 AJ2
<16> AGP_IRDY# G_IRDY#/MI2C CLK GAD25/DVOCD6 VCC24 VCCSM23

2
N5 J4 AGP_AD26 C12 AK2
<16> AGP_TRDY# G_TRDY#/MDVI CLK GAD26/DVOCD9 VCC25 VCCSM24
AGP_AD27
<16> AGP_STOP# P2
N2
G_STOP#/MDDC DATA GAD27/DVOCD8 J5
J7 AGP_AD28
D12
F12
VCC26 BROOKDALE-GL/PE VCCSM25 AL2
AM30
<16> AGP_DEVSEL# G_DEVSEL#/MI2C DATA GAD28/DVOCD11 VCC27 VCCSM26
<16> AGP_REQ# D5 G_REQ# GAD29/DVOCD10 H3 AGP_AD29 H12 VCC28 POWER VCCSM27 AH3
P4 K8 AGP_AD30 G13 AJ3
<16> AGP_PAR G_PAR/ADD_DETECT GAD30/DVOBCINTR# VCC29 VCCSM28
B5 G4 AGP_AD31 J13 AK3
<16> AGP_GNT# G_GNT# GAD31/DVOCFLDSTL VCC30 VCCSM29
AGP_C/BE#3 H2 H14 AL3
<16> AGP_C/BE#3 GCBE3#/DVOCD5 VCC31 VCCSM30

1
AGP_C/BE#2 M2 J15 AH4
<16> AGP_C/BE#2 GCBE2# VCC32 VCCSM31
AGP_C/BE#1 N4 AE7 AA17 AJ4 L27
<16> AGP_C/BE#1 GCBE1#/DVOBBLANK# GCLKIN CLK_MCH_66M <15> VCC33 VCCSM32
AGP_C/BE#0 R4 AJ31 RSTIN# W17 AK4 FBM-L11-201209-221LMAT
<16> AGP_C/BE#0 GCBE0#/DVOBD7 RSTIN# VCC34 VCCSM33
DREFCLK D14 CLK_MCH_DISPLAY <15> U17 VCC35 VCCSM34 AL4
L2 E7 R270 2@8.2K_0402_5% W18 AU17
AGP RCOMP/DVOBCRCOMP PWROK PM_PWROK <19,30,32> VCC36 VCCSM35

2
B B
+AGPREF W2 AGP_VREF PSBSEL Y3 1 2 H_BSEL0 <6> V19 VCC37 VCCSM36 AJ5
47.5_0603_1% U19 AL5
H_SEL0 <15> VCC38 VCCSM37
R215 1 2 B7 G15 INTCRT_B K10 AU5
<16> INT_HSYNC HSYNC BLUE INTCRT_B <16> VCC39 VCCSM38 +1.5VS
<16> INT_VSYNC 1 2 C6 VSYNC ANALOG DISPLAY BLUE# H16 INTCRT_B#
+CPU_CORE
K12 VCC40 VCCSM39 AM18
47.5_0603_1% R214 D7 E15 INTCRT_G K14 AJ19 .1U_0402_10V6K
<16> INTDDCCK DDCA_CLK GREEN INTCRT_G <16> VCC41 VCCSM40
C7 F16 INTCRT_G# K16 AK32
<16> INTDDCDA DDCA_DATA GREEN# VCC42 VCCSM41
B16 C15 INTCRT_R W19 AU33
REFSET RED INTCRT_R <16> VCC43 VCCSM42

1
D16 INTCRT_R# AH6
RED# VCCSM43 C334
B18 VTTFSB0 VCCSM44 AK6

1
R17 BROOKDALE-GL/PE_760P

FBM-L11-201209-221LMAT
C18 VTTFSB1 VCCSM45 AP20

2
1

1
R241 C324 R273 D18 AG7 4.7U_0805_10V4Z
VTTFSB2 VCCSM46

1
137_0603_1% C385

L28
8.2K_0402_5% H18 VTTFSB3 VCCSM47 AJ7
36.5_0603_1% .1U_0402_10V6K B19 AL7
VTTFSB4 VCCSM48
2

1
2 C19 VTTFSB5 VCCSM49 AP7

2
D19 AH10 R281 VCCA_DAC
VTTFSB6 VCCSM50

.1U_0402_10V6K

.01U_0402_25V4Z
E19 VTTFSB7 VCCSM51 AH12
G19 AH14 1_0402_5%
VTTFSB8 VCCSM52

1
C268

C267
J19 VTTFSB9 VCCSM53 AH18

2
B20 VTTFSB10 VCCSM54 AH22
PSBSEL FSB FREQUENCY C20 VTTFSB11 VCCSM55 AH26

2
D20 VTTFSB12
F20 AG1 VCCA_SM .1U_0402_10V6K
VTTFSB13 VCCA_SM0
* 0 400 MHZ H20 VTTFSB14 VCCA_SM1 AG2

1
F18 C640 C353
VTTFSB15 C336
K18 AT20 +
VTTFSB16 VCCQSM0
1 533 MHZ K20 VTTFSB17 VCCQSM1 AT21

2
K22 AU21 100U_D_6.3VM
VTTFSB18 VCCQSM2

2
K26 .1U_0402_10V6K
VTTFSB19
M28 VTTFSB20 VTTDECAP0 A31
T28 VTTFSB21 VTTDECAP1 AC37
Y28 R37 .1U_0402_10V6K
VTTFSB22 VTTDECAP2 .1U_0402_10V6K
R277 AD28 VTTFSB23 VTTDECAP3 L37
C C
VTTDECAP4 G37
L3 2 1 AB2
+1.5VS TESTIN#
FBM-L11-201209-221LMAT Y2 A17 VCCA_FSB
MEM_SEL VCCA_FSB

1
1 2 VCCA_DPLL 1.5K_0402_5% C277 C297 C316 C332 C32
+1.5VS
A37 RSVD0 VCCA_HI AD10
1

AB3 RSVD1 VCCHI0 AD6

2
1

+ C22 C251 AA2 AC9

C29 150U_D_6.3VM RSVD2 VCCHI1
AA3 RSVD3 VCCHI2 AC1 +1.5VS
.1U_0402_10V6K AA4 AE3 .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
RSVD4 VCCHI3
2

22U_1206_10V4Z AA5
R43 0_0402_5% RSVD5 VCCA_DPLL
Y4 RSVD6 VCCA_DPLL A13
RSTIN# 2 1 Y8 B6
PCIRST# <6,16,18,22,23,25,26,30,33> RSVD7 VCCGPIO +3VS
W7 RSVD8 VCCA_DAC0 B14
C69 L4 VCCA_DAC
VCCA_DAC1 A15

1
1 2 FBM-L11-201209-221LMAT AU37 C270
VCCA_FSB NC
+1.5VS 1 2 AU36 NC SMX_RCOMP AF10 2 1 +2.5V
@15P_0402_50V8J AT37 .1U_0402_10V6K
NC

2
AU2 A2 R287
NC NC 60.4_0603_1%
AU1 NC NC A36
1

1
C27 C28 C33 AT1 B37 C344
NC NC R283
AJ35 NC NC B1
.1U_0402_10V6K 22U_1206_10V4Z .1U_0402_10V6K AH34 60.4_0603_1% .1U_0402_10V6K
NC
2

2
BROOKDALE-GL/PE_760P

2
INTCRT_B#
+1.5VS
INTCRT_G#

INTCRT_R#
1

C343 C341

D .1U_0402_10V6K .1U_0402_10V6K D
2

NEAR AA1
NEAR AE1 Dell-Compal Confidential
Compal Electronics, Inc.
Title
BROOKDALE-GL/PE (2/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 10 of 43
A B C D E
 5 4 3 2 1

HUB_VSWING <9,18>
10 mil Trace,
R264 226_0603_1% R312 100_0603_1%
.01U_0402_25V4Z .01U_0402_25V4Z
7mil Space
1 2 1 2 HUB_VREF <9,18>
+1.5VS

1
1

1
C337 C126 C393 PLACE NOTE: R309 C392 C339 C125
CAP PLACE .1U_0402_10V6K
AT MIDPOINT 100_0603_1%

2
AR17

AH30
AJ17

AM3
AG4

AG3
AR9

AU3
AR3
AN3

AC3

G17
AB4

C31
Y17

V17

E17

2
J17
U12E .01U_0402_25V4Z OF THE BUS. .01U_0402_25V4Z

AM10 C17

VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS0 VSS129 .1U_0402_10V6K
AR23 VSS1 VSS130 B17 NEAR MCH NEAR ICH NEAR MCH NEAR ICH
D D
AU23 VSS2 VSS131 AM16
F24 VSS3 VSS132 W3 Within 250mil Within 250mil
AM24 VSS4 VSS133 U3
A25 VSS5 VSS134 R3
C16 VSS6 VSS135 D17
N37 VSS7 VSS136 N3
U18 VSS8 VSS137 L3 10 mil Trace,
V18 J3 R245 49.9_0603_1%
VSS9 VSS138 7mil Space
Y18 VSS10 VSS139 G3 +CPU_CORE 1 2 MCH_GTLREF <9>
AA18 VSS11 VSS140 E3

1
AL31 VSS12 VSS141 AT2

1
AR31 F30 R244 C299
VSS13 VSS142
AU31 VSS14 VSS143 AR29
F32 AJ29 100_0603_1% .1U_0402_10V6K
VSS15 VSS144

2
H32 VSS16 VSS145 AG29

2
K32 VSS17 VSS146 AE29
M32 VSS18 VSS147 AC29 FSB DECOUPLING
P32 AA29 +CPU_CORE
VSS19 VSS148
T32 VSS20 VSS149 W29 NEAR MCH
V32 R29 10U_1206_6.3V7K .1U_0402_10V6K .1U_0402_10V6K
VSS21 VSS150
Y32 VSS22 VSS151 U29
AB32 VSS23 VSS152 N29
AD32 VSS24 BROOKDALE-GL/PE VSS153 L29

1
AF32 J29 C245 C246 C250
VSS25 VSS154
AH32 VSS26 VSS VSS155 C29 C253 C255 C254 C252
AM4 A29 .1U_0402_10V6K
VSS27 VSS156

2
A5 VSS28 VSS157 AU15
C5 VSS29 VSS158 AR15 10 mil Trace,
AG5 VSS30 VSS159 D15 7mil Space
10U_1206_6.3V7K .1U_0402_10V6K .1U_0402_10V6K R246
AN5 VSS31 VSS160 B2
AR5 VSS32 VSS161 AR1 +CPU_CORE 2 1 H_XY_SWING <9>
AR19 VSS33 VSS162 AN1

2
C .1U_0402_10V6K .1U_0402_10V6K C
AM32 VSS34 VSS163 AE1

1
A33 AA1 301_0603_1% C309
VSS35 VSS164
C33 VSS36 VSS165 U1
AJ33 N1 R247
VSS37 VSS166

2
1

1
AN33 J1 C288 C281 C279 C284 C289 150_0603_1% .01U_0402_25V4Z
VSS38 VSS167

1
AR33 VSS39 VSS168 E1
F6 AM28 .1U_0402_10V6K
VSS40 VSS169

2
H6 VSS41 VSS170 F28
M6 VSS42 VSS171 AU27
T6 VSS43 VSS172 AR27
Y6 AL27 .1U_0402_10V6K .1U_0402_10V6K
VSS44 VSS173
AB6 VSS45 VSS174 F14
AF6 VSS46 VSS175 AR13
AM6 VSS47 VSS176 AJ13
U20 VSS48 VSS177 J27
V20 VSS49 VSS178 C27 SYSTEM MEMORY DECOUPLING
Y20 VSS50 VSS179 A27
AA20 E13 +2.5V
VSS51 VSS180 .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K C358
AM20 VSS52 VSS181 D13
A21 C13 .1U_0402_10V6K
VSS53 VSS182
B21 VSS54 VSS183 B13

1
C21 AM12 C363 C362 C373 C374 C361
VSS55 VSS184 C345 C346 C348 C349 C350 C370 C359 C347
D21 VSS56 VSS185 AK12
E21 VSS57 VSS186 F26

2
G21 VSS58 VSS187 AR25
J21 VSS59 VSS188 AJ25
D34 J25 .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
VSS60 VSS189
W34 VSS61 VSS190 AU11
A35 VSS62 VSS191 AR11
E35 AR37 .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
VSS63 VSS192
G35 VSS64 VSS193 AN37
J35 VSS65 VSS194 C25
1

1
B C360 C367 C378 C380 C379 C383 C384 C381 C382 C366 C338 C354 C365 B
L35 VSS66 VSS195 AJ37
AN7 VSS67 VSS196 AG37
AR7 VSS68 VSS197 AE37
2

2
AU7 VSS69 VSS198 AA37
B8 VSS70 VSS199 U37
C8 AH28 .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
VSS71 VSS200
D8 VSS72 VSS201 AF28
F8 VSS73 VSS202 AB28
V21 VSS74 VSS203 V28
Y21 VSS75 VSS204 P28
AJ21 VSS76 VSS205 K28 GMCH DECOUPLING
AR21 VSS77 VSS206 K24
F22 J37 +1.5VS
VSS78 VSS207 .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
H22 VSS79 VSS208 E37
M10 VSS80 VSS209 C37
T10 VSS81 VSS210 AT36
1

1
Y10 AH36 C326 C329 C322 C331
VSS82 VSS211 C308 C330 C328 C271 C278 C298 C256 C342 C280
AH16 VSS83
AH20 B15
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110

VSS84 VSSA_DAC0
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

2
AH24 VSS85 VSSA_DAC1 C14
.1U_0402_10V6K
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
BROOKDALE-GL/PE_760P
N35
R35
U35
AA35
AC35
AE35
AG35
AL35
AN35
AR35
AU35
B36
W36
AF8
AM8
G9
J9
N9
U9
AA9
AE9
A23
C23
D23
J23

.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K

1

1
C301 C300 C285 C269 C276 C275 C260 C307 C295 C287 C311 C286 C283
2

2
A A
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K

Dell-Compal Confidential
Compal Electronics, Inc.
Title
BROOKDALE-GL/PE (3/3)
Size Document Number Rev
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Abacus/TangII LA-1452 0.2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Date: Monday, August 26, 2002 Sheet 11 of 43
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
 A B C D E F G H

+2.5V
SDREF_DIMM
RP32 10_0402_4P2R_5% RP46 10_0402_4P2R_5% +2.5V
DDR_SDQ4 1 4 DDR_DQ4 DDR_SDQ30 1 4 DDR_DQ30 JP22
DDR_SDQ0 2 3 DDR_DQ0 DDR_SDQ26 2 3 DDR_DQ26 1 2 20mil 2 1
VREF VREF SDREF
3 VSS VSS 4 R322

1
DDR_DQ5 5 6 DDR_DQ0 0_0402_5%
RP42 10_0402_4P2R_5% RP37 10_0402_4P2R_5% DDR_DQ1 DQ0 DQ4 DDR_DQ4 C413 DDR_DQ[0..63]
7 DQ1 DQ5 8 DDR_DQ[0..63] <13>
DDR_SDQ1 1 4 DDR_DQ1 DDR_SDQ31 1 4 DDR_DQ31 9 10 .1U_0402_16V4Z
VDD VDD

2
DDR_SDQ5 2 3 DDR_DQ5 DDR_SDQ27 2 3 DDR_DQ27 DDR_DQS0 11 12 DDR_DM0 DDR_DQS[0..8]
DQS0 DM0 DDR_DQS[0..8] <13>
DDR_DQ2 13 14 DDR_DQ7
DQ2 DQ6 DDR_DM[0..7]
15 VSS VSS 16 DDR_DM[0..7] <13>
RP33 10_0402_4P2R_5% R124 10_0402_5% DDR_DQ6 17 18 DDR_DQ3
DDR_SDQ6 DDR_DQ6 DDR_SDM0 DDR_DM0 DDR_DQ8 DQ3 DQ7 DDR_DQ12 DDR_SMAA[0..12]
1 4 2 1 19 DQ8 DQ12 20 DDR_SMAA[0..12]
DDR_SDQ2 2 3 DDR_DQ2 DDR_SDM1 2 1 DDR_DM1 21 22
1 R117 10_0402_5% DDR_DQ9 VDD VDD DDR_DQ13 1
23 DQ9 DQ13 24
DDR_DQS1 25 26 DDR_DM1
RP43 10_0402_4P2R_5% R126 10_0402_5% DQS1 DM1
27 VSS VSS 28
DDR_SDQ3 1 4 DDR_DQ3 DDR_SDM2 2 1 DDR_DM2 DDR_DQ14 29 30 DDR_DQ10 DDR_SMA0 2 1 DDR_SMAA0
DDR_SDQ7 DDR_DQ7 DDR_SDM3 DDR_DM3 DDR_DQ15 DQ10 DQ14 DDR_DQ11 R167 10_0402_5%
2 3 2 1 31 DQ11 DQ15 32
R121 10_0402_5% 33 34 DDR_SMA1 2 1 DDR_SMAA1
VDD VDD R134 10_0402_5%
<9> DDR_CLK1 35 CK0 VDD 36
RP20 10_0402_4P2R_5% R108 10_0402_5% 37 38 DDR_SMA2 2 1 DDR_SMAA2
<9> DDR_CLK1# CK0# VSS
DDR_SDQ9 1 4 DDR_DQ9 DDR_SDM4 2 1 DDR_DM4 39 40 R132 10_0402_5%
DDR_SDQ8 DDR_DQ8 DDR_SDM5 DDR_DM5 VSS VSS DDR_SMA3 DDR_SMAA3
2 3 2 1 2 1
R113 10_0402_5% R149 10_0402_5%
DDR_DQ20 41 42 DDR_DQ17 DDR_SMA4 2 1 DDR_SMAA4
RP31 10_0402_4P2R_5% R115 10_0402_5% DDR_DQ16 DQ16 DQ20 DDR_DQ21 R135 10_0402_5%
43 DQ17 DQ21 44
DDR_SDQ13 1 4 DDR_DQ13 DDR_SDM6 2 1 DDR_DM6 45 46 DDR_SMA5 2 1 DDR_SMAA5
DDR_SDQ12 DDR_DQ12 DDR_SDM7 DDR_DM7 DDR_DQS2 VDD VDD DDR_DM2 R140 10_0402_5%
2 3 2 1 47 DQS2 DM2 48
R118 10_0402_5% DDR_DQ18 49 50 DDR_DQ19 DDR_SMA6 2 1 DDR_SMAA6
DQ18 DQ22 R152 10_0402_5%
51 VSS VSS 52
DDR_DQ22 53 54 DDR_DQ23 DDR_SMA7 2 1 DDR_SMAA7
DDR_DQ24 DQ19 DQ23 DDR_DQ29 R116 10_0402_5%
55 DQ24 DQ28 56
57 58 DDR_SMA8 2 1 DDR_SMAA8
DDR_DQ28 VDD VDD DDR_DQ25 R137 10_0402_5%
59 DQ25 DQ29 60
DDR_DQS3 61 62 DDR_DM3 DDR_SMA9 2 1 DDR_SMAA9
RP21 10_0402_4P2R_5% RP16 10_0402_4P2R_5% DQS3 DM3 R148 10_0402_5%
63 VSS VSS 64
DDR_SDQ15 1 4 DDR_DQ15 DDR_SDQ37 1 4 DDR_DQ37 DDR_DQ26 65 66 DDR_DQ27 DDR_SMA10 2 1 DDR_SMAA10
DDR_SDQ14 DDR_DQ14 DDR_SDQ32 DDR_DQ32 DDR_DQ30 DQ26 DQ30 DDR_DQ31 R146 10_0402_5%
2 3 2 3 67 DQ27 DQ31 68
69 70 DDR_SMA11 2 1 DDR_SMAA11
VDD VDD R151 10_0402_5%
71 CB0 CB4 72
RP40 10_0402_4P2R_5% RP28 10_0402_4P2R_5% 73 74 DDR_SMA12 2 1 DDR_SMAA12
DDR_SDQ11 DDR_DQ11 DDR_SDQ36 DDR_DQ36 CB1 CB5 R136 10_0402_5%
1 4 1 4 75 VSS VSS 76
DDR_SDQ10 2 3 DDR_DQ10 DDR_SDQ33 2 3 DDR_DQ33 77 78
DQS8 DM8
79 CB2 CB6 80
81 VDD VDD 82
2 RP41 10_0402_4P2R_5% RP26 10_0402_4P2R_5% 2
83 CB3 CB7 84 Note:
DDR_SDQ16 1 4 DDR_DQ16 DDR_SDQ38 1 4 DDR_DQ38 85 86
DDR_SDQ20 DDR_DQ20 DDR_SDQ34 DDR_DQ34 DU DU/RESET#
2 3 2 3 87 VSS VSS 88 Place Close to DIMM0
<9> DDR_CLK0 89 CK2 VSS 90
<9> DDR_CLK0# 91 CK2# VDD 92
RP35 10_0402_4P2R_5% RP15 10_0402_4P2R_5% 93 94
DDR_SDQ21 DDR_DQ21 DDR_SDQ35 DDR_DQ35 DDR_CKE1 VDD VDD DDR_CKE0
1 4 1 4 <9> DDR_CKE1 95 CKE1 CKE0 96 DDR_CKE0 <9>
DDR_SDQ17 2 3 DDR_DQ17 DDR_SDQ39 2 3 DDR_DQ39 97 98
DDR_SMAA12 DU/A13 DU/BA2 DDR_SMAA11
99 A12 A11 100
DDR_SMAA9 101 102 DDR_SMAA8
RP44 10_0402_4P2R_5% RP27 10_0402_4P2R_5% A9 A8
103 VSS VSS 104 Layout note
DDR_SDQ22 1 4 DDR_DQ22 DDR_SDQ44 1 4 DDR_DQ44 DDR_SMAA7 105 106 DDR_SMAA6
DDR_SDQ18 DDR_DQ18 DDR_SDQ40 DDR_DQ40 DDR_SMAA5 A7 A6 DDR_SMAA4
2 3 2 3 107 A5 A4 108 Place these resistor
DDR_SMAA3 109 110 DDR_SMAA2
DDR_SMAA1 A3 A2 DDR_SMAA0 close by DIMM0,
111 A1 A0 112
RP34 10_0402_4P2R_5% RP17 10_0402_4P2R_5% 113 114 all trace length
DDR_SDQ23 DDR_DQ23 DDR_SDQ41 DDR_DQ41 DDR_SMAA10 VDD VDD DDR_BS1
1 4 1 4 115 A10/AP BA1 116 Max=1.4"
DDR_SDQ19 2 3 DDR_DQ19 DDR_SDQ45 2 3 DDR_DQ45 DDR_BS0 117 118 DDR_RAS#
DDR_WE# BA0 RAS# DDR_CAS#
119 WE# CAS# 120
DDR_SCS#0 121 122 DDR_SCS#1
<9> DDR_SCS#0 S0# S1# DDR_SCS#1 <9>
RP45 10_0402_4P2R_5% RP29 10_0402_4P2R_5% 123 124
DDR_SDQ28 DDR_DQ28 DDR_SDQ46 DDR_DQ46 DU DU +1.25VS
1 4 1 4 125 VSS VSS 126
DDR_SDQ24 2 3 DDR_DQ24 DDR_SDQ42 2 3 DDR_DQ42 DDR_DQ33 127 128 DDR_DQ32
DDR_DQ36 DQ32 DQ36 DDR_DQ37
129 DQ33 DQ37 130
131 VDD VDD 132
RP38 10_0402_4P2R_5% RP22 10_0402_4P2R_5% DDR_DQS4 133 134 DDR_DM4 RP47 56_0402_4P2R_5%
DDR_SDQ25 DDR_DQ25 DDR_SDQ47 DDR_DQ47 DDR_DQ34 DQS4 DM4 DDR_DQ39 DDR_CKE0 1
1 4 1 4 135 DQ34 DQ38 136 4
DDR_SDQ29 2 3 DDR_DQ29 DDR_SDQ43 2 3 DDR_DQ43 137 138 DDR_CKE1 2 3
DDR_DQ38 VSS VSS DDR_DQ35
139 DQ35 DQ39 140
DDR_DQ40 141 142 DDR_DQ45
DQ40 DQ44
143 VDD VDD 144
DDR_DQ44 145 146 DDR_DQ41
3 DDR_DQS5 DQ41 DQ45 DDR_DM5 RP49 56_0402_4P2R_5% 3
147 DQS5 DM5 148
149 150 DDR_SCS#0 1 4
DDR_DQ42 VSS VSS DDR_DQ43 DDR_SCS#1 2
151 DQ42 DQ46 152 3
DDR_SDQ[0..63] RP30 10_0402_4P2R_5% DDR_DQ46 153 154 DDR_DQ47
<9> DDR_SDQ[0..63] DQ43 DQ47
DDR_SDQ49 1 4 DDR_DQ49 155 156
DDR_SDQS[0..7] DDR_SDQ48 DDR_DQ48 VDD VDD
<9> DDR_SDQS[0..7] 2 3 157 VDD CK1# 158 DDR_CLK2# <9>
159 VSS CK1 160 DDR_CLK2 <9>
DDR_SMA[0..12] 161 162
<9,13> DDR_SMA[0..12] VSS VSS
RP18 10_0402_4P2R_5% DDR_DQ48 163 164 DDR_DQ52
DDR_SDM[0..7] DDR_SDQ53 DDR_DQ53 DDR_DQ49 DQ48 DQ52 DDR_DQ53
<9> DDR_SDM[0..7] 1 4 165 DQ49 DQ53 166
DDR_SDQ52 2 3 DDR_DQ52 167 168
DDR_DQS6 VDD VDD DDR_DM6
169 DQS6 DM6 170
DDR_DQ54 171 172 DDR_DQ51
RP51 10_0402_4P2R_5% RP25 10_0402_4P2R_5% DQ50 DQ54
173 VSS VSS 174
DDR_SDQ57 1 4 DDR_DQ57 DDR_SDQ55 1 4 DDR_DQ55 DDR_DQ55 175 176 DDR_DQ50
DDR_SDQ61 DDR_DQ61 DDR_SDQ54 DDR_DQ54 DDR_DQ60 DQ51 DQ55 DDR_DQ61
2 3 2 3 177 DQ56 DQ60 178
179 VDD VDD 180
DDR_DQ56 181 182 DDR_DQ57 Note:
RP50 10_0402_4P2R_5% RP23 10_0402_4P2R_5% DDR_DQS7 DQ57 DQ61 DDR_DM7
183 DQS7 DM7 184
DDR_SDQ56 1 4 DDR_DQ56 DDR_SDQ50 1 4 DDR_DQ50 185 186 Place Close to DIMM0
DDR_SDQ60 DDR_DQ60 DDR_SDQ51 DDR_DQ51 DDR_DQ63 VSS VSS DDR_DQ62
2 3 2 3 187 DQ58 DQ62 188
DDR_DQ58 189 190 DDR_DQ59
DQ59 DQ63 DDR_BS0
191 VDD VDD 192 <9,13> DDR_SBS0 2 1
RP36 10_0402_4P2R_5% RP39 10_0402_4P2R_5% 193 194 R139 10_0402_5%
<13,15,18,26> DIMM_SMDATA SDA SA0
DDR_SDQ58 1 4 DDR_DQ58 DDR_SDQ59 1 4 DDR_DQ59 195 196 2 1 DDR_BS1
<13,15,18,26> DIMM_SMCLK SCL SA1 <9,13> DDR_SBS1
DDR_SDQ63 2 3 DDR_DQ63 DDR_SDQ62 2 3 DDR_DQ62 197 198 R133 10_0402_5%
+3VS VDD_SPD SA2 DDR_RAS#
199 VDD_ID DU 200 <9,13> DDR_SRAS# 2 1
R141 10_0402_5%
2 1 DDR_CAS#
<9,13> DDR_SCAS#
DDR-SODIMM_200_Reverse R131 10_0402_5%
2 1 DDR_WE#
<9,13> DDR_SWE#
Layout note R138 10_0402_5%
4 DDR_SDQS0 DDR_DQS0 DDR_SDQS4 DDR_DQS4 4
2
R119
1
10_0402_5%
2
R114
1
10_0402_5%
Place these resistors
close to DIMM0,
DIMM0
DDR_SDQS1 2 1 DDR_DQS1 DDR_SDQS5 2 1 DDR_DQS5
R109 10_0402_5% R106 10_0402_5% all trace length<500 mil
DDR_SDQS2 DDR_DQS2 DDR_SDQS6 DDR_DQS6
2
R120
1
10_0402_5%
2
R107
1
10_0402_5% Dell-Compal Confidential
DDR_SDQS3 2 1 DDR_DQS3 DDR_SDQS7 2 1 DDR_DQS7
R127 10_0402_5% R129 10_0402_5% Compal Electronics, Inc.
Title
DDR-SODIMM SLOT0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 12 of 43
A B C D E F G H
 A B C D E

+2.5V +2.5V
+1.25VS +1.25VS SDREF_DIMM
JP23
1 2
RP89 56_0402_4P2R_5%RP103 56_0402_4P2R_5% RP96 56_0402_4P2R_5%
3
VREF VREF
4
VSS VSS

1
DDR_DQ4 1 4 4 1 DDR_DQ26 4 1 DDR_DQ48 DDR_DQ5 5 6 DDR_DQ0
DDR_DQ0 DDR_DQ30 DDR_DQ49 DDR_DQ1 DQ0 DQ4 DDR_DQ4 C488
2 3 3 2 3 2 7 DQ1 DQ5 8
9 10 .1U_0402_16V4Z
VDD VDD

2
DDR_DQS0 11 12 DDR_DM0
RP109 56_0402_4P2R_5%RP82 56_0402_4P2R_5% RP70 56_0402_4P2R_5% DDR_DQ2 13
DQS0 DM0
14 DDR_DQ7
DDR_DQ5 DDR_DQ27 DDR_DQ53 DQ2 DQ6
1 4 4 1 4 1 15 VSS VSS 16
DDR_DQ1 2 3 3 2 DDR_DQ31 3 2 DDR_DQ52 DDR_DQ6 17 18 DDR_DQ3
DDR_DQ8 DQ3 DQ7 DDR_DQ12 +1.25VS
19 DQ8 DQ12 20
21 22
RP88 56_0402_4P2R_5%RP69 56_0402_4P2R_5% RP95 56_0402_4P2R_5% DDR_DQ9 23
VDD VDD
24 DDR_DQ13
1 DDR_DQS0 1 DDR_DQ56 DDR_DQ54 DDR_DQS1 DQ9 DQ13 DDR_DM1 R128 56_0402_5% 1
4 4 1 4 1 25 DQS1 DM1 26
DDR_DQ6 2 3 3 2 DDR_DQ51 3 2 DDR_DQS6 27 28 1 2 DDR_SMA12
DDR_DQ14 VSS VSS DDR_DQ10
29 DQ10 DQ14 30
DDR_DQ15 31 32 DDR_DQ11
RP67 56_0402_4P2R_5%RP94 56_0402_4P2R_5% RP53 56_0402_4P2R_5%
33
DQ11 DQ15
34
RP48 56_0402_4P2R_5%
DDR_DQ3 DDR_DQ60 DDR_DQ50 VDD VDD DDR_SMA11
1 4 4 1 4 1 <9> DDR_CLK4 35 CK0 VDD 36 4 1
DDR_DQ2 2 3 3 2 DDR_DQ57 3 2 DDR_DQ55 37 38 3 2 DDR_SMA9
<9> DDR_CLK4# CK0# VSS
39 VSS VSS 40

RP108 56_0402_4P2R_5%RP68 56_0402_4P2R_5% R174 56_0402_5% RP81 56_0402_4P2R_5%

DDR_DQ7 1 4 4 1 DDR_DQ61 1 2 DDR_DM0 DDR_DQ20 41 42 DDR_DQ17 4 1 DDR_SMA7
DDR_DQ8 DDR_DQS7 DDR_DM1 DDR_DQ16 DQ16 DQ20 DDR_DQ21 DDR_SMA8
2 3 3 2 1 2 43 DQ17 DQ21 44 3 2
R168 56_0402_5% 45 46
DDR_DQS2 VDD VDD DDR_DM2
47 48
RP87 56_0402_4P2R_5%RP93 56_0402_4P2R_5% R173 56_0402_5% DDR_DQ18 49
DQS2 DM2
50 DDR_DQ19 RP78 56_0402_4P2R_5%
DDR_DQ9 1 DDR_DQ62 DDR_DM2 DQ18 DQ22 DDR_SMA6
4 4 1 1 2 51 VSS VSS 52 4 1
DDR_DQ12 2 3 3 2 DDR_DQ58 1 2 DDR_DM3 DDR_DQ22 53 54 DDR_DQ23 3 2 DDR_SMA3
R175 56_0402_5% DDR_DQ24 DQ19 DQ23 DDR_DQ29
55 DQ24 DQ28 56
57 58
RP92 56_0402_4P2R_5%RP66 56_0402_4P2R_5% R179 56_0402_5% DDR_DQ28 59
VDD VDD
60 DDR_DQ25 RP77 56_0402_4P2R_5%
DDR_DQS1 1 DDR_DQ63 DDR_DM4 DDR_DQS3 DQ25 DQ29 DDR_DM3 DDR_SMA10
4 4 1 1 2 61 DQS3 DM3 62 4 1
DDR_DQ13 2 3 3 2 DDR_DQ59 1 2 DDR_DM5 63 64 3 2 DDR_SMA0
R180 56_0402_5% DDR_DQ26 VSS VSS DDR_DQ27
65 DQ26 DQ30 66
DDR_DQ30 67 68 DDR_DQ31
RP107 56_0402_4P2R_5%RP100 56_0402_4P2R_5% R177 56_0402_5% 69
DQ27 DQ31
70
DDR_DQ14 1 DDR_DQ36 DDR_DM6 VDD VDD R323 33_0402_5%
4 4 1 1 2 71 CB0 CB4 72
DDR_DQ10 2 3 3 2 DDR_DQ32 1 2 DDR_DM7 73 74 1 2 DDR_SMA1
R181 56_0402_5% CB1 CB5
75 VSS VSS 76
77 78 1 2 DDR_SMA2
RP86 56_0402_4P2R_5%RP75 56_0402_4P2R_5%
79
DQS8 DM8
80 R182 33_0402_5%
DDR_DQ11 1 DDR_DQ33 CB2 CB6
4 4 1 81 VDD VDD 82
DDR_DQ15 2 3 3 2 DDR_DQ37 83 84
2 CB3 CB7 RP102 33_0402_4P2R_5% 2
85 DU DU/RESET# 86
87 88 4 1 DDR_SMAB1
RP106 56_0402_4P2R_5%RP99 56_0402_4P2R_5%
89
VSS VSS
90 3 2 DDR_SMAB2
<9> DDR_CLK3 CK2 VSS
DDR_DQ20 1 4 4 1 DDR_DQS4 91 92
<9> DDR_CLK3# CK2# VDD
DDR_DQ16 2 3 3 2 DDR_DQ38 93 94
DDR_CKE3 VDD VDD DDR_CKE2 RP55 33_0402_4P2R_5%
<9> DDR_CKE3 95 CKE1 CKE0 96 DDR_CKE2 <9>
97 98 4 1 DDR_SMA4
RP85 56_0402_4P2R_5%RP74 56_0402_4P2R_5% DDR_SMA12 99
DU/A13 DU/BA2
100 DDR_SMA11 3 2 DDR_SMA5
DDR_DQ17 1 DDR_DQ34 DDR_SMA9 A12 A11 DDR_SMA8
4 4 1 101 A9 A8 102
DDR_DQ21 2 3 3 2 DDR_DQ39 103 104
DDR_SMA7 VSS VSS DDR_SMA6 RP54 33_0402_4P2R_5%
105 A7 A6 106
DDR_DQS[0..7] DDR_SMMAB5 107 108 DDR_SMMAB4 4 1 DDR_SMAB4
DDR_DQS[0..7] <12>
RP105 56_0402_4P2R_5%RP98 56_0402_4P2R_5% DDR_SMA3 109
A5 A4
110 DDR_SMMAB2 3 2 DDR_SMAB5
DDR_DQ18 1 DDR_DQ35 DDR_DQ[0..63] DDR_SMMAB1 A3 A2 DDR_SMA0
4 4 1 DDR_DQ[0..63] <12> 111 A1 A0 112
DDR_DQS2 2 3 3 2 DDR_DQ44 113 114
DDR_SMA[0..12] DDR_SMA10 VDD VDD DDR_SBS1 RP80 56_0402_4P2R_5%
DDR_SMA[0..12] <9,12> 115 A10/AP BA1 116 DDR_SBS1 <9,12>
<9,12> DDR_SBS0 DDR_SBS0 117 118 DDR_SRAS# 4 1 DDR_SWE#
DDR_SRAS# <9,12>
RP84 56_0402_4P2R_5%RP73 56_0402_4P2R_5% DDR_DM[0..7]
<9,12> DDR_SWE# DDR_SWE# 119
BA0 RAS#
120 DDR_SCAS# 3 2 DDR_SBS0
DDR_DM[0..7] <12> WE# CAS# DDR_SCAS# <9,12>
DDR_DQ19 1 4 4 1 DDR_DQ40 DDR_SCS#2 121 122 DDR_SCS#3
<9> DDR_SCS#2 S0# S1# DDR_SCS#3 <9>
DDR_DQ22 2 3 3 2 DDR_DQ45 123 124
DU DU RP76 56_0402_4P2R_5%
125 VSS VSS 126
DDR_DQ33 127 128 DDR_DQ32 4 1 DDR_SRAS#
RP104 56_0402_4P2R_5%RP72 56_0402_4P2R_5% DDR_DQ36 129
DQ32 DQ36
130 DDR_DQ37 3 2 DDR_SCAS#
DDR_DQ23 1 DDR_DQ41 DQ33 DQ37
4 4 1 131 VDD VDD 132
DDR_DQ24 2 3 3 2 DDR_DQS5 DDR_DQS4 133 134 DDR_DM4
DDR_DQ34 DQS4 DM4 DDR_DQ39 R358 56_0402_5%
135 DQ34 DQ38 136
137 138 1 2 DDR_SBS1
RP91 56_0402_4P2R_5%RP97 56_0402_4P2R_5% DDR_DQ38 139
VSS VSS
140 DDR_DQ35
DDR_DQ28 1 DDR_DQ43 DDR_SMAB1 DDR_SMMAB1 DDR_DQ40 DQ35 DQ39 DDR_DQ45
4 4 1 <9> DDR_SMAB1 2 1 141 DQ40 DQ44 142
DDR_DQ25 2 3 3 2 DDR_DQ42 R178 10_0402_5% 143 144
DDR_DQ44 VDD VDD DDR_DQ41
145 DQ41 DQ45 146
DDR_SMAB2 2 1 DDR_SMMAB2 DDR_DQS5 147 148 DDR_DM5
<9> DDR_SMAB2
3 RP83 56_0402_4P2R_5%RP71 56_0402_4P2R_5% R171 10_0402_5% 149
DQS5 DM5
150 3
DDR_DQ29 1 DDR_DQ47 DDR_DQ42 VSS VSS DDR_DQ43
4 4 1 151 DQ42 DQ46 152
DDR_DQS3 2 3 3 2 DDR_DQ46 DDR_SMAB4 2 1 DDR_SMMAB4 DDR_DQ46 153 154 DDR_DQ47
<9> DDR_SMAB4 DQ43 DQ47
R176 10_0402_5% 155 156
VDD VDD
157 VDD CK1# 158 DDR_CLK5# <9>
DDR_SMAB5 2 1 DDR_SMMAB5 159 160
<9> DDR_SMAB5 VSS CK1 DDR_CLK5 <9>
Layout note R170 10_0402_5% 161 162
DDR_DQ48 VSS VSS DDR_DQ52 +1.25VS
163 DQ48 DQ52 164
Place these resistor DDR_DQ49 165 166 DDR_DQ53
DQ49 DQ53
closely DIMM1, 167 VDD VDD 168
DDR_DQS6 169 170 DDR_DM6
all trace DDR_DQ54 DQS6 DM6 DDR_DQ50 RP79 56_0402_4P2R_5%
171 DQ50 DQ54 172
length<=800mil 173 174 DDR_CKE3 1 4
DDR_DQ55 VSS VSS DDR_DQ51 DDR_CKE2 2
175 DQ51 DQ55 176 3
DDR_DQ60 177 178 DDR_DQ61
DQ56 DQ60
179 VDD VDD 180
DDR_DQ56 181 182 DDR_DQ57
DDR_DQS7 DQ57 DQ61 DDR_DM7 RP101 56_0402_4P2R_5%
183 DQS7 DM7 184
185 186 DDR_SCS#2 1 4
DDR_DQ63 VSS VSS DDR_DQ62 DDR_SCS#3 2
187 DQ58 DQ62 188 3
DDR_DQ58 189 190 DDR_DQ59
PAD1 PAD2 PAD3 PAD4 DQ59 DQ63
191 VDD VDD 192
<12,15,18,26> DIMM_SMDATA 193 SDA SA0 194 +3VS
1 1 1 1 <12,15,18,26> DIMM_SMCLK 195 SCL SA1 196 Layout note
EMI Clip PAD for Memory Door +3VS 197
199
VDD_SPD SA2 198
200 Place these resistor
PAD-2.5X3 PAD-2.5X3 PAD-2.5X3 PAD-2.5X3 VDD_ID DU
close by DIMM1,
DDR-SODIMM_200_Narmal
all trace length
Max=0.8"
PAD12 PAD13 PAD14
PAD16 PAD17
4
1 1 1 DIMM1 4
1 1

PAD-2.5X3 PAD-2.5X3 PAD-2.5X3

PAD-2.5X3 PAD-2.5X3
Dell-Compal Confidential
PAD5 PAD6 PAD7 PAD8 PAD9 PAD10 PAD11 Compal Electronics, Inc.
1 1 1 1 1 1 1 Title
DDR-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
PAD-2.5X3 PAD-2.5X3 PAD-2.5X3 PAD-2.5X3 PAD-2.5X3 PAD-2.5X3 PAD-2.5X3
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 13 of 43
A B C D E
 A B C D E

Layout note : Layout note :

Distribute as close as possible Distribute as close as possible
to DDR-SODIMM0. to DDR-SODIMM1.

+2.5V +2.5V

1
1

1
+ C170 C194 C185 C183 C189 C184 C182 C186 C190
1 + C135 C418 C419 C415 C420 C423 C422 C421 C414 150U_D_6.3VM .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K 1

2
150U_D_6.3VM .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

2
2
1

1
C164 C167 C166 C162 C160 C157 C158 C168 C169 C177 C172 C173 C179 C175 C176 C181 C180 C187
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

2
Layout note :
Place one cap close to every 2 pull up resistors termination to
2 +1.25VS 2
+1.25VS
1

1
C527 C528 C529 C530 C518 C531 C532 C533 C515 C534
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

2
+1.25VS
1

1
C535 C536 C512 C537 C538 C539 C522 C511 C521 C513
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

2
+1.25VS
1

C520 C514 C516 C517 C503 C519

.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

3 3

+1.25VS
1

C509 C510 C508 C507 C504 C502 C501 C497 C495 C496
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

+1.25VS
1

C494 C540 C526 C525 C524 C543 C141 C188 C192 C506
.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

+1.25VS

4 4
1

C137 C178 C191 C139 C138 C505

.1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K .1U_0402_10V6K
2

Dell-Compal Confidential
Compal Electronics, Inc.
Title
DDR SODIMM Decoupling
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 14 of 43
A B C D E
 A B C D E F G H

Clock Generator
+3VS L26 +3V_CLK
FBM-L11-201209-221LMAT
1 2 Width=40 mils .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z

L22
+3V_48M

1
L21 1 2 C325 C264 C42 C43 C44 C59 C58 C61 C306
BLM21A601SPT @FBM-L11-201209-221LMAT
+3VS 1 2 .1U_0402_16V4Z

2
10U_1206_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z

1
C243 C244
1 1
.1U_0402_16V4Z

2
4.7U_0805_10V4Z

14
19
32
37
46
50
1
8
U75

VDD_PCI_0
VDD_PCI_1
VDD_3V66_0
VDD_3V66_1

VDD_CPU_0
VDD_CPU_1
VDD_REF

VDD_48MHZ
L23 +3VS
C310 @10P_0402_50V8K BLM21A601SPT
+3VS 1 2 XTALIN 2 26 +3V_VDD 1 2
XTAL_IN VDDA

1
X2 C312
1

1
14.318MHZ C303
R19 R24 .1U_0402_16V4Z 10U_1206_10V4Z

2
1K_0402_5%
2@1.5K_0402_5% 1 2 XTALOUT 3 27
C272 XTAL_OUT VSSA
2

@10P_0402_50V8K 45 CPU_BCLK R225 1 2

CPUCLKT2 CLK_CPU_BCLK <5>
54 SEL0
55 27.4_0603_1% R218 49.9_0603_1%
<10> H_SEL0 SEL1
R213 1 2 1K_0402_5% 40 1 2
SEL2
1 2
1 2 R219 49.9_0603_1%
<19,30> PM_SLP_S3#
R356 0_0402_5%
1 2 25 44 CPU_BCLK# R226 1 2 27.4_0603_1%
<19,30> PM_SLP_S1# PWR_DWN# CPU_CLKC2 CLK_CPU_BCLK# <5>
R355 @0_0402_5% 34
<19> PM_STPPCI# PCI_STOP#
53 49 MCH_BCLK R223 1 2 27.4_0603_1%
<19,40> PM_STPCPU# CPU_STOP# CPUCLKT1 CLK_MCH_BCLK <9>
R242 10K_0402_5% R216 49.9_0603_1%
+3VS 1 2 1 2
28 VTT_PWRGD# 1 2
R217 49.9_0603_1%
1

C
2 Q25 R232 10K_0402_5% MCH_BCLK# R224 1 2
+CPU_CORE 1 2 2 CPUCLKC1 48 2 CLK_MCH_BCLK# <9>
B 2SC2411EK 1 2 43 27.4_0603_1%
R238 E +3VS R221 MULT0 CPU_ITP R228 1
CPUCLKT0 52 2 CLK_CPU_ITP <6>
3

220_0402_5% 2 1
@1K_0603_1% 27.4_0603_1% R227 49.9_0603_1%
<12,13,18,26> DIMM_SMDATA 29 SDATA 1 2
<12,13,18,26> DIMM_SMCLK 30 SCLK 1 2
R220 49.9_0603_1%

51 CPU_ITP# R222 1 2 CLK_CPU_ITP# <6>

CPUCLKC0 27.4_0603_1%
33 3V66_0
35 3V66_1/VCH_CLK 3V66_5 24

23 AGP_66M R255 1 2 33_0402_5% CLK_AGP_66M <16>

R20 3V66_4 MCH_66M
1 2 475_0603_1% 42 IREF 3V66_3 22 R254 1 2 33_0402_5% CLK_MCH_66M <10>
21 ICH_66M R253 1 2 33_0402_5%
3V66_2 CLK_ICH_66M <18>

R230 1 2 33_0402_5% ICH_48M 39 7 PCI_ICH R248 1 2 33_0402_5%

<19> CLK_ICH_48M 48MHZ_USB PCICLK_F2 CLK_PCI_ICH <18>
PCICLK_F1 6
PCICLK_F0 5

R231 1 2 33_0402_5% MCH_DISPLAY 38

<10> CLK_MCH_DISPLAY 48MHZ_DOT
PCICLK6 18
17 PCI_DEBUG R457 1 2 1@33_0402_5%
PCICLK5 CLK_PCI_DEBUG <33>
16 PCI_LAN R252 1 2 33_0402_5%
PCICLK4 CLK_PCI_LAN <22>
R236 1 2 33_0402_5% ICH_14M 56 13 PCI_PCM R251 1 2 33_0402_5%
<19> CLK_ICH_14M REF PCICLK3 CLK_PCI_PCM <23,25>
12 PCI_MINI R250 1 2 33_0402_5%
PCICLK2 CLK_PCI_MINI <26>
GND_3V66_0
GND_3V66_1

PCI_LPC R249 33_0402_5%

GND_48MHZ

<27> CLK_CODEC_14M 1 2 11 1 2 CLK_PCI_LPC <30>

GND_PCI_0
GND_PCI_1

PCICLK1
GND_IREF

R235 33_0402_5%
GND_CPU

10
GND_REF

PCICLK0
3 3
1

1
C247 C248 C313 C314 C315

@10P_0402_50V8K @10P_0402_50V8K ICS950810_CG @10P_0402_50V8K @10P_0402_50V8K

2

4
9
15
20
31
36
41
47

2
@10P_0402_50V8K

CPU Frequency Select Table

SEL[2:0] CK-408 Speed

001 100 MHZ

* 011 133 MHZ

4 4

Dell-Compal Confidential
Compal Electronics, Inc.
Title
Clock Generator
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 15 of 43
A B C D E F G H
 A B C D E

AGP_ST[0..2]
<10> AGP_ST[0..2] +1.5VS B+ +12VALW +5VS +5VALW +2.5V +2.5V +3VS
AGP_SBA[0..7]
<10> AGP_SBA[0..7]

1
AGP_AD[0..31]
<10> AGP_AD[0..31]
C127 C241 C240 C369 C242 C372 + C355 C239
AGP_C/BE#[0..3] .1U_0402_16V4Z .1U_0603_50V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z 150U_D_6.3VM .1U_0402_16V4Z
<10> AGP_C/BE#[0..3]

2
2
JP8
1 1
1 GND GND 2
3 4 +1.5VS
+2.5V 3 4 +5VS
5 5 6 6
7 7 8 8
9 9 10 10

1
11 11 12 12 Place this cap near AGP
AGP BUS Pullup 13 13 14 14
+AGPREF AGP_NBREF
R240
15 16 +3VALW 1K_0603_1%
15 16
on VGA BD AGP_RST# 17 17 18 18 AGP_ADSTB0 <10> R243
AGP_C/BE#0 19 20
19 20 AGP_ADSTB0# <10> R229

2
21 GND GND 22 1 2
AGP_AD1 23 24 AGP_AD0 EXTVGA_IN# 2 1
23 24

1
AGP_AD3 25 26 AGP_AD2
25 26 1@0_0402_5%

1
AGP_AD5 27 28 AGP_AD4 100K_0402_5% R239 C273
AGP_AD7 27 28 AGP_AD6 1K_0603_1% .1U_0402_16V4Z
29 29 30 30
31 32 POP for INT VGA
31 32

2
AGP_AD9 33 34 AGP_AD8
33 34

2
AGP_AD11 35 36 AGP_AD10 DEPOP for EXT VGA
AGP_AD13 35 36 AGP_AD12
37 37 38 38
AGP_AD15 39 40 AGP_AD14
39 40
41 GND GND 42
43 44 AGP_C/BE#1
<10> AGP_FRAME# 43 44 +3VS
<10> AGP_PAR 45 45 46 46 AGP_IRDY# <10>
<10> AGP_TRDY# 47 47 48 48 AGP_DEVSEL# <10>
49 50 R166
<10> AGP_STOP# 49 50 AGP_PIPE# <10>
AGP_AD17 51 52 2 1
AGP_AD19 51 52 AGP_AD16
53 53 54 54
AGP_AD21 55 56 AGP_AD18 @0_0402_5%
AGP_AD23 55 56 AGP_AD20
57 57 58 58

5
AGP_C/BE#2 59 60 AGP_AD22
59 60
61 GND GND 62 1 SUS_STAT# <19,30>
63 64 AGP_AD24 STP_AGP# 4
2 <10> AGP_ADSTB1 63 64
65 66 AGP_AD26 2 2
<10> AGP_ADSTB1# 65 66
67 68 AGP_AD28
AGP_AD25 67 68 AGP_AD30 U36
69 69 70 70

3
AGP_AD27 71 72 74AHC1G08
71 72 PM_C3_STAT# <19>
AGP_AD29 73 74
73 74 PIRQE# <18>
AGP_AD31 75 76
AGP_C/BE#3 75 76
77 77 78 78 AGP_SBSTB <10>
EXTVGA_IN# 79 80
<30> EXTVGA_IN# 79 80 AGP_SBSTB# <10>
81 GND GND 82
AGP_SBA7 83 84 AGP_SBA6 AGP_RST# 1 2
83 84 V_PRST# <23,24,25>
AGP_SBA5 85 86 AGP_SBA4
AGP_SBA3 85 86 AGP_SBA2 R290 @0_0402_5%
87 87 88 88
AGP_SBA1 89 90 AGP_SBA0
89 90 R282 0_0402_5%
91 91 92 92
93 94 AGP_ST0 1 2
<10> AGP_RBF# 93 94 PCIRST# <6,10,18,22,23,25,26,30,33>
95 96 AGP_ST1
<10> AGP_WBF# 95 96
INTVGA_IN# 97 98 AGP_ST2
<31> INTVGA_IN# 97 98
99 GND GND 100
<10> AGP_REQ# 101 101 102 102 BKOFF# <30>
<10> AGP_GNT# 103 103 104 104 ENABKL <31>
<19> PID3 105 105 106 106 PID0 <19>
STP_AGP# 107 108
107 108 PID1 <19>
<27,30,33,38> SUSP# 109 109 110 110 SMB_EC_DA1 <30,31,34>
111 111 112 112 SMB_EC_CK1 <30,31,34>
<15> CLK_AGP_66M 113 113 114 114 PID2 <19>
115 115 116 116 AGP_NBREF
C/R 117 118 1 2
<17> C/R 117 118 +AGPREF
119 120 R237 2@0_0402_5% POP for EXT VGA +3VALW
Y/G GND GND INTCRT_B
<17> Y/G 121 121 122 122 INTCRT_B <10>
123 124 CRT_B DEPOP for INT VGA
123 124 CRT_B <17> U33A
COMP/B 125 126

14
<17> COMP/B 125 126 74VHC32
127 128 INTCRT_G
3 127 128 INTCRT_G <10> 3
129 130 CRT_G 1
<8,19> AGP_BUSY# 129 130 CRT_G <17> <30> G_RST#
M_SEN# 131 132 3 V_PRST#
<17,31> M_SEN# 131 132
133 134 INTCRT_R 2
133 134 INTCRT_R <10> <6,10,18,22,23,25,26,30,33> PCIRST#
INT_VSYNC 135 136 CRT_R
<10> INT_VSYNC 135 136 CRT_R <17>
CRT_VSYNC 137 138
<17> CRT_VSYNC 137 138

7
139 GND GND 140
INT_HSYNC 141 142
<10> INT_HSYNC 141 142
CRT_HSYNC 143 144 +3V
<17> CRT_HSYNC 143 144
145 145 146 146
INTDDCDA 147 148 +3VS
<10> INTDDCDA 147 148
3VDDCDA 149 150
<17> 3VDDCDA 149 150
151 151 152 152
INTDDCCK 153 154
<10> INTDDCCK 153 154
3VDDCCK 155 156
<17> 3VDDCCK 155 156
157 157 158 158
159 GND GND 160
+5VALW 161 161 162 162
163 163 164 164 B+
165 165 166 166
167 167 168 168
+1.5VS 169 169 170 170 Daughter Card Present Table
171 171 172 172
173 173 174 174 +12VALW
175 175 176 176 DOCKED NON DOCKED
177 177 178 178
179 GND GND 180
EXTVGA_IN#
LOW HIGH
(Ext. Graphy)
FOXCONN_QT00180A-5120C
INTVGA_IN#
CLK_AGP_66M LOW HIGH
4
(Int. Graphy) 4

Terminator on VGA BD

Dell-Compal Confidential
Compal Electronics, Inc.
Title
AGP Conn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 16 of 43
A B C D E
 5 4 3 2 1

C236
33P_0402_50V8K
1 2

L18
C/R 1 2 1.8U_MLF1608A1R8K_25M_20%_0603
<16> C/R

2
1
D R203 C227 C221 D
270P_0603_50V8K

1
75_0603_1% 100P_0402_50V8K

2
2
C233
33P_0402_50V8K
JP3
1 2
3
SVIDEO_C 6
L19 7
COMP/B 1 2 1.8U_MLF1608A1R8K_25M_20%_0603 SVIDEO_CVBS 5
<16> COMP/B
2
4
1

2
SVIDEO_Y 8

1
R204 C225 C222 9
270P_0603_50V8K

1
75_0603_1% 100P_0402_50V8K

2
2
C228 SUYIN_35138S_7P

1
33P_0402_50V8K D19 @DAN217 D4 @DAN217 D5 @DAN217
1 2

L20 1.8U_MLF1608A1R8K_25M_20%_0603
Y/G 1 2
<16> Y/G

3
+3VS

2
R205 C226
C220
C 75_0603_1% 100P_0402_50V8K 270P_0603_50V8K C

1
2

CRTVCC

CRTVCC
+3VS +3VS

1
2.7K_0402_5%
C14

1
.1U_0402_16V4Z R5 R201 R3

2
10K_0402_5%
10K_0402_5% R4 R202

2
0_0402_5% 2.7K_0402_5%
CRTVCC

2
2
Q14

G
2N7002

1
1 3 3VDDCDA
3VDDCDA <16>

1
M_SEN# D1 @DAN217 D18@DAN217 D3 @DAN217 C15

S
<16,31> M_SEN#
.1U_0402_16V4Z

2
@3.3P_0603_50V8J Q23

G
2N7002
1 3 3VDDCCK
3VDDCCK <16>
1

1
C3 C219 C4

S
2

3
+3VS
@3.3P_0603_50V8J @3.3P_0603_50V8J JP1
2

6
B B
DDC_MONID0 11
CRT_R 1 2 CRTR 1
<16> CRT_R
L2 FCM2012C-800(0805) 7
L15 12
CRT_G 1 2 CRTG 2
<16> CRT_G
FCM2012C-800(0805) 8
L1
CRT_B 1 2 CRTB
13
3
CRT Connector
+5VS <16> CRT_B
FCM2012C-800(0805) 9
1

R7 14
CRTVCC
1

1
1 2 R1 R195 R2 C2 C214 3.3P_0603_50V8J C1 4
75_0603_1% 10
1K_0402_5% 3.3P_0603_50V8J 3.3P_0603_50V8J 15
2

2
1

75_0603_1% 5
2

2
5

75_0603_1%
2 CRT_HSYNC 2 4 1 2 L16 1 2 FOX_DZ11A91-L8-HT
<7,33> SUSP <16> CRT_HSYNC
Q24 FBM-11-160808-121
R459
3

SI2303DS U13 33_0402_5%

3

74AHCT1G125GW L17 1 2
CRTVCC FBM-11-160808-121
1

1
C217 C218 C8 C7 C5 C224
1

C6 27P_0402_50V8J 27P_0402_50V8J
2

2
100P_0402_50V8K
.1U_0402_16V4Z
2
5

100P_0402_50V8K 100P_0402_50V8K
CRT_VSYNC 2 4 1 2 100P_0402_50V8K
<16> CRT_VSYNC
74AHCT1G125GW R460
A U4 33_0402_5% A
3

Dell-Compal Confidential
Compal Electronics, Inc.
Title
TV OUT & CRT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 17 of 43
5 4 3 2 1
 A B C D

U55A
AD[0..31]
<22,23,24,25,26,33> AD[0..31]
AD0 H5 AD0
ICH4 INTRUDER# W6 SM_INTRUDER#
SM_INTRUDER# <32>
AD1 J3 AC3 SMLINK0 1 2
AD2 AD1 SMLINK0 SMLINK1 R1641
H3 AD2 SMLINK1 AB1 2 @0_0402_5%
1 AD3
AD4
K1
G5
AD3 SM I/F SMB_CLK AC4
AB4
SMB_CLK R172
SMB_DATA
@0_0402_5% 1

AD5 AD4 SMB_DATA ACIN

J4 AD5 SMB_ALERT#/GPI11 AA5 ACIN <30,34,36>
AD6 H4
R319 AD7 AD6
J5 AD7
2 1 H_FERR# AD8 K2
+CPU_CORE AD9 AD8 GATEA20
G2 AD9 A20GATE Y22 GATEA20 <30>
62_0402_5% AD10 L1 AB23 R104 2 1 68_0402_5%
AD10 A20M# H_A20M# <6>
AD11 G4 U23
AD11 DPSLP# H_DPSLP# <6>
AD12 L2 AA21
AD12 FERR# H_FERR# <6>
AD13 H2 W21 R110 2 1 68_0402_5%
AD13 IGNNE# H_IGNNE# <6>
AD14 L3 V22
AD14 INIT# H_INIT# <6>
Place closely pin P5 AD15
AD16
F5
F4
AD15 CPU I/F INTR AB22
V21
R105 2
R91 2
1 68_0402_5%
1 68_0402_5%
H_INTR <6>
AD16 NMI H_NMI <6>
AD17 N1 Y23 R103 2 1 68_0402_5%
AD17 CPU_PWRGOOD H_PWRGD <6>
CLK_PCI_ICH AD18 E5 U22 +3VS
AD18 RCIN# KBRST# <30>
AD19 N2 U21 R112 2 1 68_0402_5%
AD19 SLP# H_SLP# <6>
1

AD20 E3 W23 R102 2 1 68_0402_5%

AD20 SMI# H_SMI# <6>
R348 AD21 N3 V23 R101 2 1 68_0402_5% DIMM_SMCLK 1 2
AD21 STPCLK# H_STPCLK# <6>
AD22 E4 R163 8.2K_0402_5%
@22_0402_5% AD23 AD22 DIMM_SMDATA
M5 AD23 1 2
AD24 E2 HI[0..10] R162 8.2K_0402_5%
AD24 HI[0..10] <9>
1 2

AD25 P1 L19 H I0
C480 AD26 AD25 HI0 H I1
E1 AD26 HI1 L20
AD27 P2 M19 H I2
@10P_0402_50V8K AD28 AD27 HI2 H I3 +3VALW
D3 AD28 HI3 M21
2

AD29 R1 P19 H I4
AD30 AD29 HI4 H I5
D2 AD30 HI5 R19
AD31 P4 T20 H I6 SMB_CLK 1 2

PCI I/F
AD31 HI6 H I7 R353 8.2K_0402_5%
HI7 R20
P23 H I8 SMB_DATA 1 2
C/BE#0 HI8 H I9 R352 8.2K_0402_5%
Place closely pin T21 <22,23,25,26,33> C/BE#0 J2 C/BE#0 HI9 L22
2
CLK_ICH_66M
<22,23,25,26,33> C/BE#1
C/BE#1
C/BE#2
K4
M4
C/BE#1 HUB I/F HI10 N22
K21
HI10
1
R99
2 62_0402_5%
2

<22,23,25,26,33> C/BE#2 C/BE#2 HI11

C/BE#3 N4 +3VS
<22,23,25,26,33> C/BE#3 C/BE#3
1

T21 CLK_ICH_66M
CLK66 CLK_ICH_66M <15>
R321 REQ#0 B1
<22> REQ#0 REQ#0
REQ#1 A2 P21
<26> REQ#1 REQ#1 HI_STB HUB_PSTRB <9>
22_0402_5% REQ#2 B3 N20 IRQ14 1 2
<23,25> REQ#2 REQ#2 HI_STB# HUB_PSTRB# <9>
REQ#3 C7 R143 8.2K_0402_5%
REQ#3
1 2

REQ#4 B6 R23 HUB_RCOMP_ICH 1 R87 2 IRQ15 1 2

REQ#4 HICOMP +1.5VS
C395 M23 HUB_VREF 68.1_0603_1% R123 8.2K_0402_5%
HUB_VREF HUB_VSW ING
<22> GNT#0 C1 GNT#0 HUB_VSWING R22
15P_0402_50V8J E6 GATEA20 1 2
<26> GNT#1 GNT#1 HUB_VREF <9,11>
2

A7 R95 10K_0402_5%
<23,25> GNT#2 GNT#2 HUB_VSWING <9,11>
B7 J19 APICCLK KBRST# 1 2
GNT#3 APICCLK APICD0 R94 10K_0402_5%
D6 GNT#4 APICD0 H19
K20 APICD1
CLK_PCI_ICH APICD1 PIRQA#

Interrupt I/F
<15> CLK_PCI_ICH P5 PCICLK PIRQA# D5 PIRQA# <23,25>
C2 PIRQB#
PIRQB# PIRQB# <22>
F1 B4 PIRQC#
<22,23,25,26,33> PCI_FRAME# FRAME# PIRQC# PIRQC# <26>
M3 A3 PIRQD#
<22,23,25,26> PCI_DEVSEL# DEVSEL# PIRQD# PIRQD# <26> RP4
PIRQE#
PCI Pullups <22,23,25,26> PCI_IRDY# L5
G1
IRDY# PIRQE#/GPI2 C8
D7 GPI3
PIRQE# <16>
GPI4 1 8
<22,23,25,26> PCI_PAR PAR PIRQF#/GPI3
L4 C3 GPI4 GPI3 2 7
<22,23,25,26> PCI_PERR# PERR# PIRQG#/GPI4
RP5 PCI_PLOCK# M2 C4 GPI5 PIRQE# 3 6
PCI_PERR# LOCK# PIRQH#/GPI5 IRQ14 GPI5
1 10 +3VS <30> EC_WAKEUP# W2 PME# IRQ14 AC13 IRQ14 <21> 4 5
REQA# 2 9 PIRQA# ICH_PCIRST# U5 AA19 IRQ15
PCIRST# IRQ15 IRQ15 <21>
PCI_STOP# 3 8 PIRQB# K5 J22 SIRQ
<22,23,25,26> PCI_SERR# SERR# SERIRQ SIRQ <23,25,30>
PCI_SERR# 4 7 REQ#4 F3 8.2K_0804_8P4R_5%
<22,23,25,26> PCI_STOP# STOP#
+3VS 5 6 <22,23,25,26,33> PCI_TRDY# F2 TRDY#
EE_CS D10
8.2K_1206_10P8R_5% REQA# B5 REQA#/GPI0 EEPROM I/F EE_IN D11
REQB# A6 A8 1 2
3 PIDERST# REQB#/GPI1/REQ5# EE_OUT R156 +3VALW 3
<21> PIDERST# E8 GNTA#/GPO16 EE_SHCLK C12
SIDERST# C5 @1K_0402_5%
<21> SIDERST# GNTB#/GPO17/GNT5#
RP3 SMLINK0 1 2
PCI _IRDY# 1 10 A10 R165
+3VS LAN_RXD0
PCI_TRDY# 2 9 PIRQC# A9 8.2K_0402_5%
PCI_DEVSEL# PIRQD# LAN_RXD1 SMLINK1
3 8 LAN_RXD2 A11 1 2
PCI_FRAME# 4 7 SIRQ B10 R169
PCI_PLOCK# LAN_TXD0 8.2K_0402_5%
+3VS 5 6 C10
LAN I/F LAN_TXD1
LAN_TXD2 A12 ACIN 1 2
8.2K_1206_10P8R_5% C11 R161
LAN_CLK @10K_0402_5%
LAN_RSTSYNC B11
LAN_RST# Y5 1 2
+3VS R159
RP2 10K_0402_5%
1 8 REQ#0 APICCLK
2 7 REQ#1 ICH4 APICD0
3 6 REQ#2 APICD1
4 5 REQ#3

2
8.2K_0804_8P4R_5% R97
1 2 REQB# R89 R88
R158 8.2K_0402_5% 10K_0402_5% 0_0402_5%
+3VS

1
1 2 PIDERST# (Strap)
10K_0402_5%
R153 @8.2K_0402_5%
2
G

DIMM_SMCLK 3 1 SMB_CLK
<12,13,15,26> DIMM_SMCLK
2
S

+3VS
4 Q28 SMB_DATA 1 DIMM_SMDATA 4
3 DIMM_SMDATA <12,13,15,26>
2N7002
D

Q27
5

2N7002

ICH_PCIRST#
1
4 PCIRST# <6,10,16,22,23,25,26,30,33>
Dell-Compal Confidential
2

U9
Compal Electronics, Inc.
3

74AHC1G08 Title
INTEL ICH4 (1/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, August 27, 2002 Sheet 18 of 43
A B C D
 A B C D

Place close to pin B8

+3VALW
IAC_BITCLK

1
R79 R336
10K_0402_5%
+3VS @10_0402_5%
U55B

1 2
ICH4
1 1
C460
1 2 ICH_SPKR AGP_BUSY# R2 R3
<8,16> AGP_BUSY# AGPBUSY#/GPI6 GPI7
R98 @1K_0402_5% SYSRST# Y3 V4 EC_SMI# @10P_0402_50V8K
<6> SYSRST# SYSRST# GPI8 EC_SMI# <30>

2
VLBA# AB2 V5 SCI#
<30> VLBA# BATLOW# GPI12 SCI# <30>
1 2 ICH_AC_SDOUT T3 W3 LID_OUT#
<16> PM_C3_STAT# C3_STAT#/GPO21 GPO13 LID_OUT# <30>
R150 @8.2K_0402_5% ICLKRUN# AC2
V20
CLKRUN#/GPIO24 GPIO GPIO25 V2
W1
EC_FLASH# <30>
<40> PM_DPRSLPVR DPRSLPVR GPIO27
1 2 PM_STPCPU# AA1 W4
<30> PWRBTN# PWRBTN# GPIO28
R90 1K_0402_5% AB6
<10,30,32> PM_PWROK PWROK
EC_SWI# Y1 Place close to pin J23
<30> EC_SWI# RI#
R78
1 2
1K_0402_5%
PM_STPPCI#
<30> RSMRST# AA6
W18
RSMRST# PM AA13 PDA0 CLK_ICH_14M
<15,30> PM_SLP_S1# SLP_S1#/GPO19 PDA0 PDA0 <21>
Y4 AB13 PDA1
<15,30> PM_SLP_S3# SLP_S3# PDA1 PDA1 <21>

1
Y2 W13 PDA2
<30> PM_SLP_S4# SLP_S4# PDA2 PDA2 <21>
AA2 Y13 PDCS1# R93
<30> PM_SLP_S5# SLP_S5# PDCS1# PDCS1# <21>
2 1 W19 AB14 PDCS3#
<15,40> PM_STPCPU# STP_CPU#/GPO20 PDCS3# PDCS3# <21>
R84 2 1 @0_0402_5% Y21 @10_0402_5%
<15> PM_STPPCI# STP_PCI#/GPO18
R81 @0_0402_5% RTCCLK AA4 AA11 PDDREQ
SUS_CLK PDDREQ PDDREQ <21>

1 2
AB3 Y12 PDDACK#
<16,30> SUS_STAT# SUS_STAT#/LPCPD# PDDACK# PDDACK# <21>
ICH_THRM# V1 AC12 PDIOR# C124
THRM# PDIOR# PDIOR# <21>
W12 PDIOW#
PDIOW# PDIOW# <21>
AB12 PDIORDY @10P_0402_50V8K
PIORDY PDIORDY <21>

2
J21 AB11 PDD0
PM_GMUXSEL SSMUXSEL/GPO23 PDD0
<6> PM_CPUPERF#
PM_CPUPERF#
2 1 V_GATE
Y20
V19
CPUPERF#/GPO22 IST PDD1 AC11
Y10
PDD1
PDD2
<30,40> VGATE VGATE/VRMPWRGD PDD2
R96 33_0402_5% AA10 PDD3
PDD3
IAC_BITCLK 2 1 B8
AC97 I/F PDD4 AA7
AB8
PDD4
PDD5 Place close to pin F19
R391 @0_0402_5% <27,29> IAC_BITCLK R160 33_0402_5% C13 AC_BITCLK PDD5 PDD6
<27,29> IAC_RST# AC_RST# PDD6 Y8
2 <6,31> PROCHOT# 2 1 <27> IAC_SDATA_IN0
IAC_SDATA_IN0
IAC_SDATA_IN1
D13
A13
AC_SDATAIN0 IDE I/F PDD7 AA8
AB9
PDD7
PDD8
CLK_ICH_48M
2
<29> IAC_SDATA_IN1 AC_SDATAIN1 PDD8

1
B13 Y9 PDD9
R392 ICH_AC_SDOUT AC_SDATAIN2 PDD9 PDD10 R92
D9 AC_SDATAOUT PDD10 AC9
2 1 ICH_THRM# IC H_AC_SYNC C9 W9 PDD11
<30> EC_THRM# AC_SYNC PDD11
AB10 PDD12 @10_0402_5%
0_0402_5% PDD12 PDD13
PDD13 W10

1 2
LPC_AD0 T2 W11 PDD14
<30> LAD0 LPC_AD1 LPC_AD0 PDD14 PDD15 C123
<30> LAD1 R4 LPC_AD1 PDD15 Y11
LPC_AD2 T4
<30> LAD2 LPC_AD2
<30> LAD3
LPC_AD3 U2 LPC_AD3 LPC I/F SDA0 AA20 SDA0
SDA0 <21>
@10P_0402_50V8K

2
1 2 RTCCLK U3 LPC_DRQ#0 SDA1 AC20 SDA1
SDA1 <21>
R347 @100K_0402_5% U4 AC21 SDA2 PDD[0..15]
LPC_DRQ#1 SDA2 SDA2 <21> PDD[0..15] <21>
LFRAME# T5 AB21 SDCS1#
<30> LFRAME# LPC_FRAME# SDCS1# SDCS1# <21>
AC22 SDCS3#
SDCS3# SDCS3# <21> SDD[0..15]
SDD[0..15] <21>
AB18 SDDREQ
SDDREQ SDDREQ <21>
C20 AB19 SDDACK#
<32> USBP0+ USBP0+ SDDACK# SDDACK# <21>
D20 Y18 SDIOR#
<32> USBP0- USBP0- SDIOR# SDIOR# <21>
A21 AA18 SDIOW#
USBP1+ SDIOW# SDIOW# <21>
B21 AC19 SDIORDY
USBP1- SIORDY SDIORDY <21>
<32> USBP2+ C18 USBP2+
D18 W17 SDD0
<32> USBP2- USBP2- SDD0
A19 AB17 SDD1
USBP3+ SDD1 SDD2
B19 USBP3- SDD2 W16
C16 AC16 SDD3
USBP4+ SDD3 SDD4
D16 USBP4- SDD4 W15
A17 AB15 SDD5
USBP5+ SDD5
+3VS B17 USBP5- USB I/F SDD6 W14
AA14
SDD6
SDD7
SDD7 SDD8
SDD8 Y14
R82 1 2 100K_0402_5% PID0 <32> OVCUR#0
OVCUR#0 B15 OC#0 SDD9 AC15 SDD9
OVCUR#1 C14 AA15 SDD10
3 R83 OC#1 SDD10 3
1 2 100K_0402_5% PID1 <32> OVCUR#2
OVCUR#2 A15 OC#2 SDD11 Y15 SDD11
OVCUR#3 B14 AB16 SDD12
R80 OC#3 SDD12
1 2 100K_0402_5% PID2 OVCUR#4 A14 OC#4 SDD13 Y16 SDD13 +RTCVCC
OVCUR#5 D14 AA17 SDD14
R77 OC#5 SDD14
1 2 100K_0402_5% PID3 SDD15 Y17 SDD15
USB_RBIAS A23 R145
USB_RBIAS
B23 USB_RBIAS# 2 1
2

1
R86 J23 R326 15K_0402_5%
CLK14 CLK_ICH_14M <15>
22.6_0603_1% F19 2 1 2 1
+3VALW CLK48 CLK_ICH_48M <15>
J20 C156
GPIO32

2
G22 W7 RTC_RST# J1 1K_0402_5% 1U_0603_10V4Z
GPIO33 RTCRST# JOPEN
F20 GPIO34
1

1
R144
2
8.2K_0402_5%
OVCUR#1 G20
F21
GPIO35 CLOCK VBIAS Y6 VBIAS 1 2 R_VBIAS1
R154
2

OVCUR#3 GPIO36 RTCX1 C163 1K_0402_5%

1 2 H20 GPIO37 RTCX1 AC7
R142 8.2K_0402_5% F23 R329 .047U_0402_16V4Z
<21> SIDEPWR GPIO38
1
R130
2
8.2K_0402_5%
OVCUR#4 H22
G23
GPIO39 GPIO RTCX2 AC6 RTCX2 2 1
<16> PID0 GPIO40
1 2 OVCUR#5 H21 10M_0603_5%
<16> PID1 GPIO41
R147 8.2K_0402_5% F22 H23 X3
<16> PID2 GPIO42 SPKR ICH_SPKR <28>
<16> PID3 E23 GPIO43 1 2 2 1
MISC THRMTRIP# W20 H_THERMTRIP# H_THERMTRIP# <6>
R331

2
32.768KHZ_12.5P_ 10M_0603_5% R324

1
@22M_0603_5%
R346 C450 C448 R330
10K_0402_5% ICH4 12P_0402_50V8K 12P_0402_50V8K @2.4M_0603_5%

2
+3VS 1 2

1
D46
CLKRUN# 2 1 ICLKRUN#
<22,25,26,30> CLKRUN#
4 4
@RB751V
1 2 IC H_AC_SYNC
<27,29> IAC_SYNC
R335 33_0402_5%
ICH_AC_SDOUT
<27,29> IAC_SDATAO 1
R325
2
33_0402_5% Dell-Compal Confidential
1

C457 C452

@22P_0402_50V8J @22P_0402_50V8J
Compal Electronics, Inc.
2

Title
INTEL ICH4 (2/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 19 of 43
A B C D
 A B C D E F G H

U55C

D22 VSS0
ICH4 VCC3.3_0 A5 +3VS
+3VS

E10 VSS1 VCC3.3_1 AC17

E14 VSS2 VCC3.3_2 AC8

1
E16 B2 C146 C140 C428 C441 C9 C416 C466 C424
VSS3 VCC3.3_3
E17 VSS4 VCC3.3_4 H18
E18 H6 4.7U_0805_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VSS5 VCC3.3_5

2
E19 VSS6 VCC3.3_6 J1
E21 VSS7 VCC3.3_7 J18
E22 VSS8 VCC3.3_8 K6
F8 VSS9 VCC3.3_9 M10
1 1
G19 VSS10 VCC3.3_10 P12
G21 VSS11 VCC3.3_11 P6

1
G3 U1 C463 C449 C430 C397 C469 C473 C472 C443
VSS12 VCC3.3_12
G6 VSS13 VCC3.3_13 V10
H1 V16 .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VSS14 VCC3.3_14

2
J6 VSS15 VCC3.3_15 V18
K11 VSS16
K13 VSS17
K19 VSS18 VCCSUS3.3_0 E11 +3VALW
K23 VSS19 VCCSUS3.3_1 F10
K3 F15 +3VALW
VSS20 VCCSUS3.3_2
L10 VSS21 VCCSUS3.3_3 F16
L11 VSS22 VCCSUS3.3_4 F17
L12 VSS23 VCCSUS3.3_5 F18

1
L13 K14 C433 C434 C431 C451 C464 C454 C442
VSS24 VCCSUS3.3_6
L14 VSS25 VCCSUS3.3_7 V7
L21 V8 4.7U_0805_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VSS26 VCCSUS3.3_8

2
M1 VSS27 VCCSUS3.3_9 V9
M11 VSS28
M12 VSS29
M13
M20
VSS30 GND POWER K10
VSS31 VCC1.5_0 +1.5VS
M22 VSS32 VCC1.5_1 K12

1
N10 K18 C447 C436 C396 C426
VSS33 VCC1.5_2
N11 VSS34 VCC1.5_3 K22
N12 P10 .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VSS35 VCC1.5_4

2
N13 VSS36 VCC1.5_5 T18
N14 VSS37 VCC1.5_6 U19
N19 VSS38 VCC1.5_7 V14
N21 VSS39
N23 VSS40
N5 VSS41 VCCSUS1.5_0 E12 +1.5VALW
2 +1.5VS 2
P11 VSS42 VCCSUS1.5_1 E13
P13 VSS43 VCCSUS1.5_2 E20
P20 VSS44 VCCSUS1.5_3 F14
P22 VSS45 VCCSUS1.5_4 G18

1
P3 R6 C425 C427 C437 C467 C465 C446 C440 C445 C398
VSS46 VCCSUS1.5_5
R18 VSS47 VCCSUS1.5_6 T6
R21 U6 4.7U_0805_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VSS48 VCCSUS1.5_7

2
R5 VSS49
T1 VSS50
T19 E7 VCC5REF
VSS51 VCC5REF1
T23 VSS52 VCC5REF2 V6 VCC DECOUPLING
U20 VSS53
V15 E15 VCC5REFSUS
VSS54 VCC5REFSUS1
V17 VSS55
V3 VSS56
W22 VSS57 VCCHI_0 L23 +1.5VS
W5 M14 +1.5VS +1.5VALW
VSS58 VCCHI_1
W8 VSS59 VCCHI_2 P18
Y19 VSS60 VCCHI_3 T22
Y7 VSS61

1
A16 C417 C453 C459 C444 C429 C435 C439
VSS62
A18 VSS63 VCC_CPU_IO_0 AA23 +CPU_CORE
A20 P14 .1U_0402_16V4Z .1U_0402_16V4Z 4.7U_0805_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z 4.7U_0805_10V4Z
VSS64 VCC_CPU_IO_1

2
A22 VSS65 VCC_CPU_IO_2 U18
A4 +1.5VS_PLL
VSS66
AA12 VSS67
AA16 VSS68 VCCPLL C22 1 2 +1.5VS VCCHI DECOUPLING
AA22 R85 0_0805_5%
VSS69
AA3 VSS70
AA9 VSS71 VCCRTC AB5 +RTCVCC
AB20 VSS72
AB7 +3VS_ICHLAN
3 VSS73 +CPU_CORE +1.5VS_ICHLAN +3VS_ICHLAN 3
AC1 VSS74
AC10 VSS75 VCCLAN3.3_0 E9 1 2 +3VS
AC14 F9 R338 0_0805_5%
VSS76 VCCLAN3.3_1 +1.5VS_ICHLAN
AC18 VSS77
1

1
AC23 C130 C438 C432 C468 C462 C455 C456 C461
VSS78
AC5 VSS79 VCCLAN1.5_0 F6 1 2 +1.5VS
B12 F7 R332 0_0805_5% .1U_0402_16V4Z .1U_0402_16V4Z 1U_0603_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z 4.7U_0805_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VSS80 VCCLAN1.5_1
2

2
B16 VSS81
B18 VSS82
B20 VSS83
B22 VSS84
B9 VSS85
C15 VSS86
C17 VSS87
C19 +3VALW +5VALW +3VS +5VS
VSS88
C21 VSS89
C23 VSS90

1
C6 VSS91
D1 +RTCVCC +1.5VS_PLL R111 R349
VSS92 D23 1K_0603_1% D13 1K_0603_1%
D12 VSS93
D15 1SS355 1SS355
VSS94
D17 VSS95

2
1

1
D19 C129 C128 VCC5REFSUS VCC5REF
VSS96 C153
D21 VSS97
D23 .1U_0402_10V6K .1U_0402_16V4Z .01U_0402_25V4Z
VSS98
2

1
D4 C136 C143 C475 C474
VSS99
D8 VSS100
A1 1U_0603_10V4Z .1U_0402_16V4Z 1U_0603_10V4Z .1U_0402_16V4Z
VSS101

2
ICH4
4 4

Dell-Compal Confidential
Compal Electronics, Inc.
Title
INTEL ICH4 (3/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 20 of 43
A B C D E F G H
 A B C D E

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Placea caps. near HDD Id(MAX): 2.3A
HDD Connector CONN.
+5VSHDD Layout Note: +5VSHDD trace
VGS(MAX): +-8V
width 60 mil 1 D
SDD[0..15]
<19> SDD[0..15]

1
Correct HDD pin define ,pls update layout C389 C387 C375 C377
1 1
JP6 C386 .1U_0402_16V4Z 1U_0603_10V4Z .1U_0402_16V4Z

2
<18> SIDERST#
SDD7 1 2 SDD8 G S
SDD6 3 4 SDD9 1000P_0402_50V7K 22U_1206_10V4Z 2 3
SDD5 5 6 SDD10
SDD4 7 8 SDD11
SDD3 9 10 SDD12
SDD2 11 12 SDD13
SDD1 13 14 SDD14
15 16 +5VS Q6
SDD0 SDD15 +5VSHDD
17 18 +12VALW SI2301DS
SDDREQ 19 20
<19> SDDREQ 21 22 R280 3 1
<19> SDIOW# 23 24

1
1 2 SDIORDY
<19> SDIOR# 25 26 R274 +3VS
SDIORDY SEC_CSEL1 2 R55
<19> SDIORDY 27 28 4.7K_0402_5%
RSDDACK# 100K_0402_5%
29 30 470_0402_5%

2
IRQ15
<18> IRQ15 31 32
<19> SDA1 33 34

2
<19> SDA0 35 36 SDA2 <19>
1 2 RSDDACK#
<19> SDCS1# 37 38 SDCS3# <19> <19> SDDACK#
SHDD_LED# R289 22_0402_5%
39 40
+5VSHDD 41 42 +5VSHDD
43 44

1
Q18
D

1
2N7002
FOX_HH99227-S1-TR 2 R54 C86
<19> SIDEPWR
C323 G 150K_0603_5% .1U_0402_16V4Z

2
SDDREQ 1 2 S

2
33P_0402_50V8K

2 2

R370
1 2 PDIORDY
+3VS
4.7K_0402_5%
CD-ROM Connector

<19> PDD[0..15] PDD[0..15] 1 2 RPDDACK# +5VS

<19> PDDACK#
R371 22_0402_5%
C105
1 2
1 2
C197 47P_0402_25V8K .1U_0402_16V4Z

14
U18A
1 2 C559 1
CD_AGND <27>
C196 47P_0402_25V8K 1 2 PDDREQ 1 2 3
JP14 C195 2
<27> INT_CD_L 47P_0402_25V8K 33P_0402_50V8K
1 2 INT_CD_R <27>
74HCT08
3 4

7
3 PDD8 3
<18> PIDERST# 5 6
PDD7 PDD9
PDD6 7 8 PDD10
PDD5 9 10 PDD11
PDD4 11 12 PDD12
PDD3 13 14 PDD13
PDD2 15 16 PDD14
Placea caps. near CDROM
PDD1 17 18 PDD15 CONN.
PDD0 19 20 PDDREQ
21 22 PDDREQ <19>
+5VS
23 24 PDIOR# <19>
+5VS
<19> PDIOW# 25 26
PDIORDY RPDDACK#
<19> PDIORDY 27 28
IRQ14
<18> IRQ14 29 30 R374
PDIAG# 1 2 100K_0402_5% +5VS
<19> PDA1 31 32
1

2
C567 C565 C204 C202
<19> PDA0 33 34 PDA2 <19>
R67 R74
<19> PDCS1# 35 36 W=80mils PDCS3# <19>
PHDD_LED# 1000P_0402_50V7K .1U_0402_16V4Z 1U_0603_10V4Z 10U_1206_10V4Z 100K_0402_5%
37 38
2

2
100K_0402_5%
39 40
+5VS 41 42 +5VS

1
43 44 1 2
C563 .1U_0402_16V4Z U18B
PRI_CSEL 45 46 +5VS PHDD_LED#
47 48 4
6 ACT_LED#
49 50 ACT_LED# <29>
2

SHDD_LED# 5
R185
74HCT08
1

470_0402_5% SUYIN_800185MB050 C206 C561 C205 C203

1

1000P_0402_50V7K .1U_0402_16V4Z 1U_0603_10V4Z 10U_1206_10V4Z

2

4 4

Dell-Compal Confidential
Compal Electronics, Inc.
Title
IDE/FDD/CD-ROM Module
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 21 of 43
A B C D E
 5 4 3 2 1

+1.8VLAN
+3VS .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z WLAN LOM LED (JP28)
.1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z

1
C41 WLAN_LINK_80211A LINK_LED100# ORANGE (100M)
1

1
C97 C72 C95 C82 C70

1
C96 C94 C77 C74 C88 C87 C80 4.7U_0805_10V4Z .1U_0402_16V4Z

2
WLAN_LINK_10_LDE LINK_LED10# GREEN (10M)
2

2
.1U_0402_16V4Z Place close

2
10U_1206_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z to pin 57 WLAN_ACT_LED ACTLED# YELLOW

WLAN_LINK_80211A
L7 @BLM11A121S NC ORANGE/GREEN
D
2 1 15 mil WLAN_LINK_10_LDE D
+3VALW +3VAUXLAN +3VAUXLAN
+1.8VLAN +3VAUXLAN L39 BLM11A121S
+3VS 2 1
+3V
+3VAUXLAN +3VS

1
Place close C46 C55 C48 C45 C47
C38
to pin 69 10U_1206_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z

2
+1.8VLAN

1
C67
+3VAUXLAN 1000P_0402_50V7K
1000P_0402_50V7K

2
AD[0..31]
<18,23,24,25,26,33> AD[0..31] +3VAUXLAN

1
LINK_LED10# 1 2 (LAN_10LINK)

3
R33 R32 R31 D8 RB751V

112

115
125

106

114
Q4

17
44

19
30
40
52

79
94

96
97

91
92

25
56

65
68
U11 D

1
10K_0402_5% 10K_0402_5% Q16 E DTA114YKA
47K
10K_0402_5% 2 2N7002 B
VDDCORE <26> WLAN_LINK_10_LED
VDDCORE
VDDCORE

VDDBUS
VDDBUS
VDDBUS
VDDBUS
VDDBUS
VDDBUS
VDDBUS

XTAL_AVSS
VESD
VESD
VESD
VDDIO
VDDIO
VDDIO

REGULATOR_AVDD
REGULATOR_AVDD

XTAL_AVDD
REGULATOR_VOUT1
REGULATOR_VOUT2

2
G 2
S 10K

3
1 2 C
AD31 122 75 LINK_LED10# D9 RB751V +3VAUXLAN
AD30 PCI_AD31 EPHY_LED#0 LINK_LED100#
123 PCI_AD30 EPHY_LED#1 76

1
AD29 124 77 ACTLED# LINK_LED100# 1 2 (LAN_100LINK) R14
PCI_AD29 EPHY_LED#2

3
AD28 126 78 D2 RB751V 2 1
AD27 PCI_AD28 EPHY_LED#3
127 PCI_AD27 D

1
AD26 128 Q15 E 200_0603_5%
PCI_AD26 47K
AD25 1 58 2 2N7002 B
PCI_AD25 EPHY_AGND <26> WLAN_LINK_80211A
AD24 3 57 G 2 Q3
PCI_AD24 EPHY_AVDD +1.8VLAN
AD23 6 S 10K
PCI_AD23

3
AD22 8 69 1 2 C DTA114YKA
C PCI_AD22 EPHY_BIAS_AVDD +3VAUXLAN +3VAUXLAN
AD21 9 70 D7 RB751V C
AD20 PCI_AD21 EPHY_BIAS_AVSS
10 PCI_AD20 L8

1
AD19 11 64 EPHY_PLLVDD 1 2 ACTLED# 1 2 (LAN_ACTIVE) R13
PCI_AD19 EPHY_PLLVDD +1.8VLAN

3
AD18 14 63 220NH_FSR22J_0603 D10 RB751V 2 1
AD17 PCI_AD18 EPHY_PLLGND
15 PCI_AD17 D

1
AD16 R34 @10K_0402_5% E 200_0603_5%
Broadcom
16 PCI_AD16 EPHY_VREF 71 1 2 47K
AD15 33 72 1 2 2 B
PCI_AD15 EPHY_VDAC <26> WLAN_ACT_LED
AD14 34 88 R28 1.27K_0603_1% G 2 Q5
AD13 PCI_AD14 EPHY_TESTMODE
36 PCI_AD13
S 10K

3
AD12 LAN_TX+ Q17 C DTA114YKA
AD11
AD10
37
38
39
PCI_AD12
PCI_AD11
BCM 4401L EPHY_TDP
EPHY_TDN
62
61
59
LAN_TX-
LAN_RX+
2N7002
PCI_AD10 EPHY_RDP

1
AD9 41 60 LAN_RX- +3VAUXLAN
AD8 PCI_AD9 EPHY_RDN
42 PCI_AD8
AD7 45 104 +3VAUXLAN
AD6 PCI_AD7 NC +3VAUXLAN
48 PCI_AD6 NC 105
AD5 49 103 R25
PCI_AD5 NC

1
AD4 50 108
AD3 PCI_AD4 NC R35 R30 @10K_0402_5%
51 PCI_AD3 NC 102

1
AD2 53 109
PCI_AD2 NC

1
AD1 54 110 10K_0402_5% @10K_0402_5%
AD0 PCI_AD1 NC U8 R452 C20
55 PCI_AD0 NC 107

2
1 8 .1U_0402_16V4Z
CS VCC

2
<18,23,25,26,33> C/BE#3 4 PCI_CBE#3 GPIO2/VAUXAVAIL 87 2 SK NC 7

2
18 86 3 6 R15
<18,23,25,26,33> C/BE#2 PCI_CBE#2 GPIO1 DI NC/ORG
<18,23,25,26,33> C/BE#1 32 PCI_CBE#1 GPIO0 85 4 DO GND 5 1 2
43 @100K_0402_5%
<18,23,25,26,33> C/BE#0 PCI_CBE#0
20 90 AT93C46 200_0603_5%
<18,23,25,26,33> PCI_FRAME# PCI_FRAME# BOOTROM_SCL
<18,23,25,26> PCI_IRDY# 21 PCI_IRDY# BOOTROM_SDA 93
<18,23,25,26,33> PCI_TRDY# 23 PCI_TRDY#
26 98 SPROM_CS
<18,23,25,26> PCI_DEVSEL# PCI_DEVSEL# SPROM_CS
27 95 SPROM_CLK
B <18,23,25,26> PCI_STOP# PCI_STOP# SPROM_CLK B
28 101 SPROM_DOUT

10

11

12

13
<18,23,25,26> PCI_PERR# PCI_PERR# SPROM_DOUT +3VAUXLAN JP7

9
29 99 SPROM_DI
<18,23,25,26> PCI_SERR# PCI_SERR# SPROM_DIN
31 LAN_RJ45T+ 1
<18,23,25,26> PCI_PAR

LDE_ORANGE+

LDE_GREEN+

LED_YELLOW+

LED_YELLOW-
G_O_LED-
PCI_PAR U2 PR1+
<18> PIRQB# 116 PCI_INT#
89 LAN_RJ45T- 2
EXT_POR# LAN_DISABLE# <30> PR1-
PCIRST# 117 LAN_TX+ 1 12
0,16,18,23,25,26,30,33> PCIRST# PCI_RST# TD+ TX+
118 83 LAN_TX- 2 11 LAN_RJ45R+ 3
<15> CLK_PCI_LAN PCI_CLK JTAG_TDP TD- TX- PR2+
<18> GNT#0 119 PCI_GNT# JTAG_TCK 80
<18> REQ#0 121 PCI_REQ# JTAG_TDI 82 SPROM_DOUT SPROM_CLK 3 TDC TCT 10 4 PR3+
<31> LAN_PME# 113 PCI_PME# JTAG_TRST_L 73 4 RDC RCT 9
LAN_AD17 5 81 5
PCI_IDSEL JTAG_TMS PR3-
1Kb None None LAN_RX+ 5 RD+ RX+ 8
22 LAN_RX- 6 7 LAN_RJ45R- 6
<19,25,26,30> CLKRUN# PCI_CLKRUN# RD- RX- PR2-
67 XTAL_IN 4Kb 10K Pullup None 7 PR4+

SHLD1

SHLD2
1

1
66 C215 C213 Pulse_H1112
XTAL_OUT
8 PR4-
1

16Kb None 10K Pullup

1
R29 .01U_0402_25V4Z FOX_JM66113-L1B1

14

15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1
25MHZ_30PPM R193 R190
Y1 XTAL 200_0603_5% EPHY_PLLVDD 75_0603_1% R192 R191
BCM4401 .01U_0402_25V4Z 75_0603_1%
2

12
46
111
100
84
2
24
74
13
47
120
35

XI 1 2 XO 75_0603_1%

2
Close to RJ45 under inch

2
1

C54 C52
1

C40 75_0603_1%

2
C39 4.7U_0805_10V4Z 1000P_0402_50V7K
2

27P_0402_50V8J 27P_0402_50V8J C211 C212

2

Place closely pin 118

1
1000P_1206_2KV7K_R45 1000P_1206_2KV7K_R45
CLK_PCI_LAN
1

A +3VAUXLAN A
R52
LAN_RX+ R53 2 1 49.9_0805_1% Chassis GND & Digital GND Short Together
33_0402_5% LAN_RX- R51 2 1 49.9_0805_1%
1

LAN_TX+ R42 2 1 49.9_0805_1%

Dell-Compal Confidential
1 2

R64 LAN_TX- R46 2 1 49.9_0805_1%

AD17 1 2 LAN_AD17 C79 C56 C84
2

100_0402_5% 22P_0402_50V8J
.1U_0402_16V4Z .1U_0402_16V4Z Compal Electronics, Inc.
Place close to U82
2

Title
BROADCOM 4401L LAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, August 27, 2002 Sheet 22 of 43
5 4 3 2 1
 A B C D E

This page POP with 845PE for EXT.

R73 AD[0..31]
<18,22,24,25,26,33> AD[0..31]
@402K_0603_1%
2 1 U35A
+3V_CBSA <18,22,24,25,26,33> AD[0..31] CBS_CAD[0..31] <24,25>
+3V_CBSD AD31 J5 E8 CBS_CAD31
+3V_CBSD@0_0402_5% AD30 AD31 CAD31/D10 CBS_CAD30
J6 AD30 CAD30/D9 C8
U35B AD29 K2 B8 CBS_CAD29
@0_0402_5% R70 AD28 AD29 CAD29/D1 CBS_CAD28
K3 AD28 CAD28/D8 E9
2@1K_0402_5% G1 +3V_CBSA AD27 K5 F9 CBS_CAD27
PHY_CPS VCC_G01 AD26 AD27 CAD27/D0 CBS_CAD26
2 1 P10 CPS VCC_M01 M1 K6 AD26 CAD26/A0 F11
2

2
R1 L11 AD25 L2 E11 CBS_CAD25
1 VCC_R01 VDPLL AD24 AD25 CAD25/A1 CBS_CAD24 1
VCC_W08 W8 1 2 L3 AD24 CAD24/A2 C11
R69 R68 R59 1 2 PH Y_CNA P17 L19 2@BLM21A05_0805 AD23 M2 A12 CBS_CAD23
@0_0402_5% CNA VCC_L19 AD22 AD23 CAD23/A3 CBS_CAD22
VCC_H19 H19 M3 AD22 CAD22/A4 C12

1
R50 E19 AD21 M6 E12 CBS_CAD21
VCC_E19 AD21 CAD21/A5
1

1
2@43K_0402_5% C115 C103 AD20 CBS_CAD20
CBS_PC0 V10 PC0
VCC_A13
VCC_A08
A13
A8 AD19
M5
N2
AD20
AD19 PCI4510 CAD20/A6
CAD19/A25
C13
A14 CBS_CAD19

2
CBS_PC1 W10 A5 2@.01U_0402_25V4Z AD18 N3 E13 CBS_CAD18
CBS_PC2 PC1 VCC_A05 AD17 AD18 CAD18/A7 CBS_CAD17

PCI4510_R0
P9

W13
PC2
PCI4510 G14
CBS_VCC AD16
AD15
N6
P1
R6
AD17
AD16
CAD17/A24
CAD16/A17
B14
F18
G17
CBS_CAD16
CBS_CAD15
R0 VCCCB_G14 AD15 CAD15/IOWR#
2

A11 2@10U_1206_10V4Z AD14 P7 F19 CBS_CAD14

R72 PCI4510_R1 VCCCB_A11 +3V_CBSD AD13 AD14 CAD14/A9 CBS_CAD13
1 2 V13 R1 V5 AD13 CAD13/IORD# G18
R71 R58 L1 AD12 U6 H15 CBS_CAD12
2@0_0402_5% R63 VCCP_L01 AD11 AD12 CAD12/A11 CBS_CAD11
VCCP_W05 W5 V6 AD11 CAD11/OE# H14
2@6.34K_0603_1% C53 2@.1U_0402_16V4Z AD10 R7 H17 CBS_CAD10
AD10 CAD10/CE2#
1

G2 1 2 AD9 P8 H18 CBS_CAD9

IEEE1394_TPA0+ 1.8V_G02 AD8 AD9 CAD9/A10 CBS_CAD8
V12 TPA0+ 1.8V_L18 L18 U7 AD8 CAD8/D15 J14
2@0_0402_5% 1 2 Place close to pin H1 AD7 W7 J17 CBS_CAD7
2@0_0402_5% IEEE1394_TPA0- C73 2@.1U_0402_16V4Z AD6 AD7 CAD7/D7 CBS_CAD6
W12 TPA0- R8 AD6 CAD6/D13 K14
E6 CLK_PCI_PCM AD5 U8 J19 CBS_CAD5
VCCD0# VCCD0# <24,25> AD5 CAD5/D6
B5 AD4 V8 K17 CBS_CAD4
VCCD1# VCCD1# <24,25> AD4 CAD4/D12

1
V15 AD3 W9 K15 CBS_CAD3
TPA1+ R47 AD2 AD3 CAD3/D5 CBS_CAD2
V9 AD2 CAD2/D11 L14
W15 A4 AD1 U9 K18 CBS_CAD1
TPA1- VPPD0# VPPD0 <24,25> AD1 CAD1/D4
C5 @33_0402_5% AD0 R9 L15 CBS_CAD0
VPPD1# VPPD1 <24,25> AD0 CAD0/D3

1 2
IEEE1394_TPB0+ V11 TPB0+ C75
IEEE1394_TPB0- W11 E1 B11 CBS_CC/BE3#
TPB0- GND_E01 CC/BE3#/REG# CBS_CC/BE3# <24,25>
K1 @22P_0402_50V8J L6 C14 CBS_CC/BE2#
GND_K01 <18,22,25,26,33> C/BE#3 C/BE3# CC/BE2#/A12 CBS_CC/BE2# <24,25>

2
R65 2 1 2@1K_0402_5% 2 1 IEEE1394_TPB1+ V14 N1 P2 G15 CBS_CC/BE1#
TPB1+ GND_N01 <18,22,25,26,33> C/BE#2 C/BE2# CC/BE1#/A8 CBS_CC/BE1# <24,25>
C89 2@.1U_0402_16V4Z W6 U5 J15 CBS_CC/BE0#
2 GND_W06 <18,22,25,26,33> C/BE#1 C/BE1# CC/BE0#/CE1# CBS_CC/BE0# <24,25> 2
R56 2 1 2@1K_0402_5% IEEE1394_TPB1- W14 P19 V7
TPB1- GND_P19 <18,22,25,26,33> C/BE#0 C/BE0#
K19 B13 CBS_CRST#
GND_K19 CRESET CBS_CRST# <24,25>
IEEE1394_TPBIAS0 U12 G19 B15 CBS_CFRAME#
TPBIAS0 GND_G19 CFRAME#/A23 CBS_CFRAME# <24,25>
A15 F13 C BS_CIRDY#
GND_A15 CIRDY#/A15 CBS_CIRDY# <24,25>
2 1 IEEE1394_TPBIAS1 U15 A10 E14 CBS_CTRDY#
TPBIAS1 GND_A10 CTRDY#/A22 CBS_CTRDY# <24,25>
A7 W4 A16 CBS_CDEVSEL#
GND_A7 <18,22,25,26> PCI_PAR PCI_PAR CDEVSEL#/A21 CBS_CDEVSEL# <24,25>
C98 R22 E17 CBS_CSTOP#
CSTOP#/A20 CBS_CSTOP# <24,25>
2@1U_0603_10V4Z 2@0_0402_5% F15 CBS_CPERR#
CPERR#/A14 CBS_CPERR# <24,25>
H5 1V8_VR_EN# 2 1 E10 CBS_CSERR#
VR_EN# CSERR#/WAIT# CBS_CSERR# <24,25>
F14 CBS_CPAR
CPAR/A13 CBS_CPAR <24,25>
R11 R2 B12 CBS_CREQ#
+3V_CBSA AVD2 <18,22,25,26> PCI_DEVSEL# DEVSEL# CREQ#/INPACK# CBS_CREQ# <24,25>
U13 G3 N5 D19 CBS_CGNT#
AVD3 SUSPEND# PCM_SUSP# <24,25,30> <18,22,25,26,33> PCI_FRAME# FRAME# CGNT#/WE# CBS_CGNT# <24,25>
U14 J1 C15 CBS_CCLK_INTERNAL
AVD4 <18,25> GNT#2 GNT# CCLK/A16 CBS_CCLK_INTERNAL <24,25>
U11 2@0_0402_5% R57 P3 A9 CBS_CSTSCHNG
AGND2 <18,22,25,26> PCI_IRDY# IRDY# CSTSCHG/BVD1 CBS_CSTSCHNG <24,25>
R12 J3 2 1 PCM_PME# <25,31> R3 B9 CBS_CCLKRUN#
AGND3 RI_OUT#/PME# <18,22,25,26> PCI_PERR# PERR# CCLKRUN#/WP CBS_CCLKRUN# <24,25>
R13 AGND4 <18,25> REQ#2 J2 REQ#
E2 PCM_SPK# T1 E18 CBS_CBLOCK#
SPKROUT PCM_SPK# <25,28> <18,22,25,26> PCI_SERR# SERR# CBLOCK#/A19 CBS_CBLOCK# <24,25>
VDPLL P15 P5 C10 CBS_CINT#
VDPLL <18,22,25,26> PCI_STOP# STOP# CINT#/READY CBS_CINT# <24,25>
F5 PIRQA# PIRQA# <18,25> P6
INTA#/MFUNC0 <18,22,25,26,33> PCI_TRDY# TRDY#
G6 CBS_MFUNC1 H3 F10 CBS_CAUDIO
INTB#/MFUNC1 <6,10,16,18,22,25,26,30,33> PCIRST# PCI_RESET# CAUDIO/BVD2 CBS_CAUDIO <24,25>
F3 CBS_MFUNC2 C9 CBS_CCD2#
MFUNC2 CCD2/CD2# CBS_CCD2# <24,25>
F2 SIRQ <18,25,30> H2 L17 CBS_CCD1#
MFUNC3 <16,24,25> V_PRST# G_RST# CCD1/CD1# CBS_CCD1# <24,25>
N14 G5 CBS_MFUNC4
VSPLL MFUNC4 CBS_MFUNC5 CBS_CVS2
LEDSKT/MFUNC5 F1 CVS2/VS2# F12 CBS_CVS2 <24,25>
FILTER0 T19 H6 CBS_MFUNC6 PCM_ID L5 B10 CBS_CVS1
FILTER0 MFUNC6 <24,25> PCM_ID IDSEL CVS1/VS1# CBS_CVS1 <24,25>
1 2 FILTER1 R17 FILTER1 CBS_RSVD/D2
CRSVD/D2 F8 CBS_RSVD/D2 <24,25>
C78 2@.1U_0402_10V6K N15 +3V_CBSD H1 F17 CBS_RSVD/A18
MC_RSVD1 <15,25> CLK_PCI_PCM PCICLK CRSVD/A18 CBS_RSVD/A18 <24,25>
E3 CBS_SCL J18 CBS_RSVD/D14
SCL CRSVD/D14 CBS_RSVD/D14 <24,25>
M14 D1 CBS_SDA
MC_RSVD3 SDA
N17 MC_RSVD4
3 PHY_TEST_MA R44 3
N18 MC_RSVD5 PHY_TEST_MA P18 2 1 2@4.7K_0402_5%
N19 2@PCI4510PDV_BGA-209
MC_RSVD6
M15 MC_RSVD7 TEST0 U10 CBS_TEST0 R61 2 1 2@200_0402_5%
M17 MC_RSVD8
M18 MC_RSVD9 TEST1 R10 CBS_TEST1 R60 2 1 2@200_0402_5%
M19 MC_RSVD10
+3V_CBSD F6 IEEE1394_TPBIAS0 2@56.2_0603_1%
CLK48_RSVD
B7 SC_CD#

1
C7 R198
SC_RST

1
CBS_MFUNC1 R23 1 2 2@10K_0402_5% F7 R18 PCI4510XI C223 2@56.2_0603_1%
SC_CLK XI R199 JP2
A6 SC_DATA
CBS_MFUNC2 R38 1 2 2@10K_0402_5% B6 2@1U_0603_10V4Z U3
SC_PWR

2
E7 8 1 TPB0-
SC_MODE 8 1

2
CBS_MFUNC4 R36 1 2 2@10K_0402_5% C6 R19 PCI4510XO
SC_FCB XO

2
X1 1
CBS_MFUNC5 R39 1
1 2 2@10K_0402_5% 2@24.576MHz30-ppm 7 7 2 2 TPB0+ 2 2
IEEE1394_TPB0- 6 3 TPA0- 3
CBS_MFUNC6 R26 6 3 3
1 2 2@10K_0402_5% 2@PCI4510PDV_BGA-209 1 2 IEEE1394_TPB0+ 4 4
IEEE1394_TPA0-
IEEE1394_TPA0+ 5 4 TPA0+ 5
5 4 GND1
1

POP for 845PE 6 GND2

1
C83 @KC_BTS0402-01_8P 7 GND3

1
2@22P_0402_50V8J R196 8 GND4
2

R197 RP1
2@56.2_0603_1%
C106 2@56.2_0603_1% 1 8

2
+3V L10 +3V_CBSA 2@22P_0402_50V8J 2 7 2@AMP_440168-2_4P

2
2@BLM21A601SPT 3 6
2@.1U_0402_16V4Z 4 5
1 2
R21 2 1 2@220_0402_5%CBS_SCL 2@0_1206_8P4R_5%

1
1

1
4 C108 C101 C102 C109 R37 4
2 1 2@220_0402_5%CBS_SDA C216 R194
C114 2@5.1K_0603_5%
2@.1U_0402_16V4Z 2@270P_0603_50V8K
2

2
Dell-Compal Confidential

2
2@10U_1206_10V4Z 2@.1U_0402_16V4Z 2@.1U_0402_16V4Z
Compal Electronics, Inc.
Title
PCMCIA Ctrl OZ6912 & Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Abacus/TangII LA-1452 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, August 26, 2002 Sheet 23 of 43
A B C D E
 A B C D E

PCMCIA Power Controller

+12VALW CBS_VCC

U7

1
C31 C18
VCC 13
12 4.7U_0805_10V4Z
VCC
2

2
9 12V VCC 11
.1U_0603_50V4Z CBS_VPP L9
1 BLM21A601SPT +3V_CBSD 1
+5VALW 10U_1206_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z .1U_0402_16V4Z
+3V 1 2

1
10 C23
VPP

1
5 .1U_0402_16V4Z C71 C36 C57 C34 C81 C92 C90 C49
5V

2
1

C25 6 C85 C51

5V .1U_0402_16V4Z

2
.1U_0402_16V4Z 1 VCCD0#
VCCD0 VCCD0# <23,25>
2

2 VCCD1#
+3VALW VCCD1 VCCD1# <23,25>
15 VPPD0
VPPD0 VPPD0 <23,25>
14 VPPD1 .1U_0402_16V4Z .1U_0402_16V4Z 10U_1206_10V4Z .1U_0402_16V4Z .1U_0402_16V4Z
VPPD1 VPPD1 <23,25>
3 3.3V
4 3.3V OC 8
1

C21 SHDN
GND

.1U_0402_16V4Z
2

16

V_PRST#
V_PRST# <16,23,25>

CBS_VCCL CBS_VCC
+3VALW +5VALW
1

1
2 C50 2

1
1

C17 C30 4.7U_0805_10V4Z C37 C35

2

C60 .1U_0402_16V4Z .1U_0402_16V4Z

2
1U_0603_10V4Z 1U_0603_10V4Z
2

.01U_0402_25V4Z

Near U35 Pin G14 Near U35 Pin A11

CBS_VPP
1

C24 C26
L6
1U_0603_10V4Z FBM-L11-201209-221LMAT
2

CBS_VCC 1 2 CBS_VCCL
.01U_0402_25V4Z +3V_CBSD
L5
1 2

1
@FBM-L11-201209-221LMAT
C76 C93
.1U_0402_16V4Z .1U_0402_16V4Z

2
CardBus Socket C19 Near U35 Pin W5
2 1 Near U35 Pin L1
JP18 1000P_0402_50V7K

1 1 35 35
CBS_CAD0 2 36 CBS_CCD1#
3 <23,25> CBS_CAD0 2 36 CBS_CCD1# <23,25> 3
CBS_CAD1 3 37 CBS_CAD2 CBS_CAD2 <23,25>
<23,25> CBS_CAD1 3 37
CBS_CAD3 4 38 CBS_CAD4 CBS_CAD4 <23,25>
<23,25> CBS_CAD3 4 38
CBS_CAD5 5 39 CBS_CAD6 CBS_CAD6 <23,25>
<23,25> CBS_CAD5 5 39
CBS_CAD7 6 40 CBS_RSVD/D14 CBS_RSVD/D14 <23,25>
<23,25> CBS_CAD7 6 40
CBS_CC/BE0# 7 41 CBS_CAD8 CBS_CAD8 <23,25>
<23,25> CBS_CC/BE0# 7 41
CBS_CAD9 8 42 CBS_CAD10 CBS_CAD10 <23,25>
<23,25> CBS_CAD9 8 42
CBS_CAD11 9 43 CBS_CVS1 CBS_CVS1 <23,25>
<23,25> CBS_CAD11 9 43
CBS_CAD12 10 44 CBS_CAD13 CBS_CAD13 <23,25> R27
<23,25> CBS_CAD12 10 44
CBS_CAD14 11 45 CBS_CAD15 CBS_CAD15 <23,25> 47_0402_5%
<23,25> CBS_CAD14 11 45
CBS_CC/BE1# 12 46 CBS_CAD16 CBS_CAD16 <23,25> CBS_CCLK 1 2
<23,25> CBS_CC/BE1# 12 46 CBS_CCLK_INTERNAL <23,25>
CBS_CPAR 13 47 CBS_RSVD/A18 CBS_RSVD/A18 <23,25>
<23,25> CBS_CPAR 13 47
CBS_CPERR# 14 48 CBS_CBLOCK# CBS_CBLOCK# <23,25>
<23,25> CBS_CPERR# 14 48
CBS_CGNT# 15 49 CBS_CSTOP# CBS_CSTOP# <23,25>
<23,25> CBS_CGNT# 15 49
CBS_CINT# 16 50 CBS_CDEVSEL# CBS_CDEVSEL# <23,25>
<23,25> CBS_CINT# 16 50
CBS_VCCL 17 17 51 51 CBS_VCCL
CBS_VPP 18 18 52 52 CBS_VPP
CBS_CCLK 19 53 CBS_CTRDY# CBS_CTRDY# <23,25> AD20 1 2 PCM_ID PCM_ID <23,25>
19 53 <18,22,23,25,26> AD20
C BS_CIRDY# 20 54 CBS_CFRAME# CBS_CFRAME# <23,25> R41 100_0402_5%
<23,25> CBS_CIRDY# 20 54
CBS_CC/BE2# 21 55 CBS_CAD17 CBS_CAD17 <23,25>
<23,25> CBS_CC/BE2# 21 55
CBS_CAD18 22 56 CBS_CAD19 CBS_CAD19 <23,25>
<23,25> CBS_CAD18 22 56
CBS_CAD20 23 57 CBS_CVS2 CBS_CVS2 <23,25>
<23,25> CBS_CAD20 23 57
CBS_CAD21 24 58 CBS_CRST#
<23,25> CBS_CAD21 24 58 CBS_CRST# <23,25>
CBS_CAD22 25 59 CBS_CSERR# R40 10K_0402_5%
<23,25> CBS_CAD22 25 59 CBS_CSERR# <23,25>
CBS_CAD23 26 60 CBS_CREQ# 2 1
<23,25> CBS_CAD23 26 60 CBS_CREQ# <23,25> <23,25,30> PCM_SUSP# +3V_CBSD
CBS_CAD24 27 61 CBS_CC/BE3# CBS_CC/BE3# <23,25>
<23,25> CBS_CAD24 27 61
CBS_CAD25 28 62 CBS_CAUDIO
<23,25> CBS_CAD25 28 62 CBS_CAUDIO <23,25>
CBS_CAD26 29 63 CBS_CSTSCHNG
<23,25> CBS_CAD26 29 63 CBS_CSTSCHNG <23,25>
CBS_CAD27 30 64 CBS_CAD28 CBS_CAD28 <23,25>
<23,25> CBS_CAD27 30 64
CBS_CAD29 31 65 CBS_CAD30 CBS_CAD30 <23,25>
<23,25> CBS_CAD29 31 65
CBS_RSVD/D2 32 66 CBS_CAD31 CBS_CAD31 <23,25>
<23,25> CBS_RSVD/D2 32 66
CBS_CCLKRUN# 33 67 CBS_CCD2#
<23,25> CBS_CCLKRUN# 33 67 CBS_CCD2# <23,25>
34 34 68 68
4 4
69 GND GND 70
1

71 72 C107
GND GND 1000P_0402_50V7K
73 GND GND 74
Dell-Compal Confidential
2

JAE_JC21-BRB_68P Compal Electronics, Inc.

Title
PCMCIA Ctrl OZ6912 & Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Abacus/TangII LA-1452 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, August 27, 2002 Sheet 24 of 43
A B C D E
 A B C D E

This page POP with 845GL for INT.

CBS_CAD[0..31]
CBS_CAD[0..31] <23,24>
U34B

76 CBS_CAD0
A_D3/CAD0 CBS_CAD1
A_D4/CAD1 78
1
PCI1510 A_D11/CAD2 77 CBS_CAD2
1
81 CBS_CAD3
A_D5/CAD3 CBS_CAD4
A_D12/CAD4 79
83 CBS_CAD5
A_D6/CAD5 CBS_CAD6
A_D13/CAD6 82
86 CBS_CAD7
A_D7/CAD7 CBS_CAD8
A_D15/CAD8 87
89 CBS_CAD9
A_A10/CAD9 CBS_CAD10
A_CE2#/CAD10 90
91 CBS_CAD11
U34A A_OE#/CAD11 CBS_CAD12
<18,22,23,24,26,33> AD[0..31] A_A11/CAD12 92
Multifunction& 94 CBS_CAD13
Miscellaneous A_IORD#/CAD13
PCI1510 A_A9/CAD14 96 CBS_CAD14
AD0 56 58 PIRQA# <18,23> 95 CBS_CAD15
AD1 AD0 MF0/INTA# CBS_1510MF1 A_IOWR#/CAD15 CBS_CAD16
55 AD1 MF1 59 A_A17/CAD16 97
AD2 CBS_1510MF2 CBS_CAD17

PC CARD / CARD BUS INTERFACE

53 AD2 MF2/DMAREQ# 63 A_A24/CAD17 114
AD3 52 64 115 CBS_CAD18
AD3 MF3/IRQSER SIRQ <18,23,30> A_A7/CAD18
AD4 51 67 CBS_1510MF4 116 CBS_CAD19
AD5 AD4 MF4/RI_OUT# CBS_1510MF5 A_A25/CAD19 CBS_CAD20
50 AD5 MF5/DMAGNT# 68 A_A6/CAD20 118
AD6 49 69 120 CBS_CAD21
AD6 MF6/CLKRUN# CLKRUN# <19,22,26,30> A_A5/CAD21
AD7 48 121 CBS_CAD22
AD8 AD7 A_A4/CAD22 CBS_CAD23
46 AD8 RI_OUT#/PME# 57 PCM_PME# <23,31> A_A3/CAD23 123
AD9 45 61 127 CBS_CAD24
AD9 SPKROUT PCM_SPK# <23,28> A_A2/CAD24
AD10 44 65 128 CBS_CAD25
AD10 SUSPEND# PCM_SUSP# <23,24,30> A_A1/CAD25
AD11 43 85 129 CBS_CAD26
AD12 AD11 CLK_48M_RSVD A_A0/CAD26 CBS_CAD27
42 AD12 A_D0/CAD27 139
AD13 41 125 140 CBS_CAD28
AD14 AD13 VR_EN# A_D8/CAD28 CBS_CAD29
39 AD14 VR_PORT 62 A_D1/CAD29 141
AD15 38 142 CBS_CAD30
AD16 AD15 C91 A_D9/CAD30 CBS_CAD31
25 AD16 A_D10/CAD31 144
AD17 24 1@.1U_0402_16V4Z
AD18 AD17 CBS_RSVD/A18
23 AD18 A_A18/RSVD 99 CBS_RSVD/A18 <23,24>
AD19 22 84 CBS_RSVD/D14
AD19 A_D14/RSVD CBS_RSVD/D14 <23,24>
2 AD20 18 AD20 PCI A_D2/RSVD 143 CBS_RSVD/D2
CBS_RSVD/D2 <23,24>
2
AD21 17 36 +3V_CBSD
AD22 AD21 PWR VCCP CBS_CC/BE0#
16 AD22 A_CE1#/CC/BE0# 88 CBS_CC/BE0# <23,24>
PCI BUS

AD23 15 98 CBS_CC/BE1#
AD23 A_A8/CC/BE1# CBS_CC/BE1# <23,24>
AD24 11 54 CBS_1510MF1 R75 1 2 1@10K_0402_5% 113 CBS_CC/BE2#
CBS_CC/BE2# <23,24>
CORE LOGIC

AD25 AD24 VCC1 +3V_CBSD A_A12/CC/BE2# CBS_CC/BE3#

10 AD25 VCC2 70 A_REG#/CC/BE3# 124 CBS_CC/BE3# <23,24>
AD26 9 104 CBS_1510MF2 R76 1 2 1@10K_0402_5% 100 CBS_CPAR
AD26 VCC3 A_A13/CPAR CBS_CPAR <23,24>
AD27 7 126 102 CBS_CPERR#
PWR

AD27 VCC4 A_A14/CPERR# CBS_CPERR# <23,24>

AD28 6 137 CBS_1510MF4 R66 1 2 1@10K_0402_5% 110 C BS_CIRDY#
AD28 VCC5 A_A15/CIRDY# CBS_CIRDY# <23,24>
AD29 5 12 107 CBS_CCLK_INTERNAL
AD29 VCC6 A_A16/CCLK CBS_CCLK_INTERNAL <23,24>
AD30 4 32 CBS_1510MF5 R62 1 2 1@10K_0402_5%
AD31 AD30 VCC7 CBS_CBLOCK#
3 AD31 A_A19/CBLOCK# 101 CBS_CBLOCK# <23,24>
8 103 CBS_CSTOP#
GND A_A20/CSTOP# CBS_CSTOP# <23,24>
47 21 106 CBS_CDEVSEL#
<18,22,23,26,33> C/BE#0 C/BE0# GND A_A21/CDEVSEL# CBS_CDEVSEL# <23,24>
37 40 108 CBS_CTRDY#
<18,22,23,26,33> C/BE#1 C/BE1# GND A_A22/CTRDY# CBS_CTRDY# <23,24>
<18,22,23,26,33> C/BE#2 26 C/BE2# GND GND 60 A_A23/CFRAME# 111 CBS_CFRAME#
CBS_CFRAME# <23,24>
13 80 135 CBS_CSTSCHNG
<18,22,23,26,33> C/BE#3 C/BE3# GND A_BVD1/CSTSCHG CBS_CSTSCHNG <23,24>
93 134 CBS_CAUDIO
GND A_BVD2/CAUDIO CBS_CAUDIO <23,24>
PCM_ID 14 112 131 CBS_CINT#
<23,24> PCM_ID IDSEL GND A_READY/CINT# CBS_CINT# <23,24>
132 133 CBS_CSERR#
GND A_WAIT#/CSERR# CBS_CSERR# <23,24>
20 136 CBS_CCLKRUN#
<15,23> CLK_PCI_PCM PCLK A_WP/CCLKRUN# CBS_CCLKRUN# <23,24>
35 73 75 CBS_CCD1#
<18,22,23,26> PCI_PAR PAR VCCD0# VCCD0# <23,24> A_CD1#/CCD1# CBS_CCD1# <23,24>
Card PWR

34 74 138 CBS_CCD2#
<18,22,23,26> PCI_SERR# SERR# VCCD1# VCCD1# <23,24> A_CD2#/CCD2# CBS_CCD2# <23,24>
<18,22,23,26> PCI_PERR# 33 PERR# VPPD0 71 VPPD0 <23,24>
31 72 122 CBS_CREQ#
S/W

<18,22,23,26> PCI_STOP# STOP# VPPD1 VPPD1 <23,24> A_INPACK/CREQ# CBS_CREQ# <23,24>

28 105 CBS_CGNT#
<18,22,23,26> PCI_IRDY# IRDY# A_WE#/CGNT# CBS_CGNT# <23,24>
<18,22,23,26,33> PCI_TRDY# 29 TRDY#
19 130 CBS_CVS1
<6,10,16,18,22,23,26,30,33> PCIRST# PRST# A_VS1#/CVS1 CBS_CVS1 <23,24>
30 117 CBS_CVS2
<18,22,23,26> PCI_DEVSEL# DEVSEL# A_VS2#/CVS2 CBS_CVS2 <23,24>
<18,22,23,26,33> PCI_FRAME# 27 FRAME# GRST# 66 V_PRST# <16,23,24>
2 119 CBS_CRST#
3 <18,23> GNT#2 GNT# A_RESET/CRST# CBS_CRST# <23,24> 3
<18,23> REQ#2 1 REQ# VCC_CARD 109 CBS_VCC

1@PCI1510
1@PCI1510

4 4

Dell-Compal Confidential
Compal Electronics, Inc.
Title
PCMCIA Ctrl OZ6912 & Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Abacus/TangII LA-1452 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, August 26, 2002 Sheet 25 of 43
A B C D E
 5 4 3 2 1

MINI PCI TYPE III

JP24 +3VMINI Place close to pin 25 AD[0..31]
+3VMINI <18,22,23,24,25,33> AD[0..31]
CLK_PCI_MINI C/BE#[0..3]
+3VAUXMINI <18,22,23,25,33> C/BE#[0..3]
1 TIP RING 2

2
3 4 R428
8PMJ-3 8PMJ-1
D 5 8PMJ-6 8PMJ-2 6 33_0402_5% D
7 8PMJ-7 8PMJ-4 8
9 8PMJ-8 8PMJ-5 10

2 1
<22> WLAN_ACT_LED 11 LED1_GRNP LED2_YELP 12 WLAN_LINK_10_LED <22>
<30> RADIO_DISABLE# 13 LED1_GRNN LED2_YELN 14 WLAN_LINK_80211A <22> +3VAUXMINI 1 2 +3VALW
15 16 C614
CHSGND REVERVED 22P_0402_50V8J R400 @0_0603_5%
<18> PIRQD# 17 INTB# 5V 18 +5VMINI

1
19 3.3V INTA# 20 PIRQC# <18>
21 RESERVED RESERVED 22
23 GROUND 3.3VAUX 24 1 2 +3V
<15> CLK_PCI_MINI 25 CLK RST# 26 PCIRST# <6,10,16,18,22,23,25,30,33>
27 28 R399 0_0603_5%
GROUND 3.3V
<18> REQ#1 29 REQ# GNT# 30 GNT#1 <18>
31 3.3V GROUND 32
AD31 33 34
AD31 PME# MINI_PME# <31>
AD29 35 36
AD29 RESERVED AD30
37 GROUND AD30 38
AD27 39 40
AD25 AD27 3.3V AD28
41 AD25 AD28 42
43 44 AD26
C/BE#3 RESERVED AD26 AD24
45 C/BE#3 AD24 46
AD23 47 AD23 IDSEL 48 1 2 AD18 IDSEL AD18
49 50 R403 100_0402_5% R398 100K_0402_5%
AD21 GROUND GROUND AD22 WLAN_LINK_80211A
51 AD21 AD22 52 2 1
AD19 53 54 AD20
AD19 AD20 R397 100K_0402_5%
55 GROUND PAR 56 PCI_PAR <18,22,23,25>
AD17 57 58 AD18 WLAN_LINK_10_LED 2 1
C/BE#2 AD17 AD18 AD16
59 C/BE#2 AD16 60
61 62 R429 100K_0402_5%
<18,22,23,25> PCI_IRDY# IRDY# GROUND
C 63 64 WLAN_ACT_LED 2 1 C
3.3V FRAME# PCI_FRAME# <18,22,23,25,33>
<19,22,25,30> CLKRUN# 65 CLKRUN# TRDY# 66 PCI_TRDY# <18,22,23,25,33>
67 68 R401 1K_0402_5%
<18,22,23,25> PCI_SERR# SERR# STOP# PCI_STOP# <18,22,23,25>
69 70 M66EN 2 1
GROUND 3.3V
<18,22,23,25> PCI_PERR# 71 PERR# DEVSEL# 72 PCI_DEVSEL# <18,22,23,25>
C/BE#1 73 74
AD14 C/BE#1 GROUND AD15
75 AD14 AD15 76
77 78 AD13
AD12 GROUND AD13 AD11
79 AD12 AD11 80
AD10 81 82
AD10 GROUND AD9 R405 100K_0402_5%
83 GROUND AD09 84
AD8 85 86 C/BE#0 MPCIACT# 2 1 +3VAUXMINI
AD7 AD8 C/BE#0
87 AD7 3.3V 88
89 90 AD6
AD5 3.3V AD6 AD4
91 AD5 AD4 92
93 94 AD2
AD3 RESERVED AD2 AD0
95 AD3 AD0 96
+5VMINI 97 5V RESERVED_WIP 98 DIMM_SMCLK <12,13,15,18>
AD1 99 100
AD1 RESERVED_WIP DIMM_SMDATA <12,13,15,18>
101 GROUND GROUND 102
103 104 M66EN
AC_SYNC M66EN
105 AC_SDATA_IN AC_SDATA_OUT 106
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 AC_CODEC_ID1# AC_RESET# 110
111 MOD_AUDIO_MON RESERVED 112
113 AUDIO_GND GROUND 114
115 SYS_AUDIO_OUT SYS_AUDIO_IN 116
117 118 +3VAUXMINI +5VMINI +5VS
AUDIO_OUTGND AUDIO_INGND L36
119 AUDIO_GND AUDIO_GND 120
B MPCIACT# 30mil B
121 RESEVED MPCIACT# 122 1 2
123 124 BLM21A05_0805
+5VMINI VCC5VA 3.3VAUX

1
127 127 128 128
C600 C596 C616 C610
.1U_0402_16V4Z .1U_0402_16V4Z 1000P_0402_50V7K

2
.1U_0402_16V4Z
AMP 1318914

+3VMINI +3VS
WIRELESS SUPPORT ONLY L35
.1U_0402_16V4Z 30mil 1 2
BLM21A05_0805

1
C613 C612 C599 C598 C609
10U_1206_10V4Z 1000P_0402_50V7K

2
.1U_0402_10V6K .1U_0402_16V4Z
A A

Dell-Compal Confidential
Compal Electronics, Inc.
Title
MiniPci Port
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 26 of 43
5 4 3 2 1
 A B C D E F G H

reserve for AC97 coedc using only

+5VALW +5VDDA
+5VDDA
U26 C134
5 1000P_0402_50V7K
1 W=40Mil VOUT 1
1 VIN HP_OUT_R 1 2

1
4 C555 C556
BYPASS

1
C564 C562 3 C481 C554
EN

1
4.7U_0805_10V4Z .1U_0402_16V4Z HP_OUT_L 1 2

2
@4.7U_0805_10V4Z .1U_0402_16V4Z 2 C558 .1U_0402_16V4Z 4.7U_0805_10V4Z
GND

2
2
TPS793475 C165
1000P_0402_50V7K
.1U_0402_16V4Z

<16,30,33,38> SUSP#

L30
+5VDDA 1 2

BLM21A05_0805
+3VCC Place close to pin 2
AVDD_AC97 1 2 +3VS C486 1000P_0402_50V7K CLK_CODEC_14M
R345 0_0805_5% 2 1

1
C551
1

1
4.7U_0805_10V4Z C478 1 2 R341

MAX 80mA 4.7U_0805_10V4Z C487 1000P_0402_50V7K @10_0402_5%

2

2
C484

1 2
2 2
LEFT <28>
C541 .1U_0402_16V4Z C491 C479

25

38
U24

9
.1U_0402_16V4Z C477 .1U_0402_16V4Z
RIGHT <28>
.1U_0402_16V4Z @10P_0402_50V8K

AVCC

AVCC

VCC

VCC

2
14 35 LEFT 1 2
AUX_L LINE_OUT_L C476 @1000P_0402_50V7K
15 36 RIGHT 1 2
AUX_R LINE_OUT_R C483 R350 @100K_0402_5%
C544 MDMIC
16 VIDEO_L MONO_OUT 37 1 2 1U_0603_10V4Z MD_MIC <29>
2 1
17 VIDEO_R HP_OUT_L 39 HP_OUT_L <28>
.1U_0402_16V4Z
23 LIN_IN_L HP_OUT_R 41 HP_OUT_R <28>
24 C500
LIN_IN_R R342 @0_0402_5%
BIT_CLK 6 1 2 IAC_BITCLK <19,29>
2 1 CD_L_R 1 2 18 R359 22_0402_5% @27P_0402_50V8J 1 2 CLK_CODEC_14M <15>
<21> INT_CD_L CD_L
R360 0_0603_5% C549 1U_0603_10V4Z 8 1 2
SDATA_IN IAC_SDATA_IN0 <19>
2 1 CD_R_R 1 2 20 R357 47_0402_5%
<21> INT_CD_R CD_R
R363 0_0603_5% C547 1U_0603_10V4Z 2 C485
CD_GNA 1 XTL_IN 22P_0402_50V8J
2 1 2 19 CD_GNA
R362 @6.8K_0603_1% C546 1U_0603_10V4Z X4
2 1 <28> MICIN 21 MIC1 24.576MHz30-ppm
R361 @6.8K_0603_1%
2 1 C5451 2 22 3
R369 @51K_0402_5% .1U_0402_16V4Z MIC2 XTL_OUT C542
2 1 MDSPK 1 2 13 29 22P_0402_50V8J
<29> MD_SPK PHONE AFLT1
R368 0_0402_5% C550 .033U_0402_16V4Z C499 820P_0603_50V7K
MONO_IN 1 2 1 2 12 30
3 <28> MONO_IN PC_BEEP AFLT2 3
R364 C553 1U_0603_10V4Z C493 820P_0603_50V7K
2

47K_0402_5% 28
VREFOUT
1

R365 C552 11 .1U_0402_16V4Z

<19,29> IAC_RST# RESET#
4.7K_0402_5% 27
2700P_0603_50V7K REFFLT
<19,29> IAC_SYNC 10 SYNC
2

32 C490 1 2 @1U_0603_10V4Z
FLT3D
1

<19,29> IAC_SDATAO 5 SDATA_OUT

1
C523 C498
1

C557 R344 2 1 @1K_0402_5% 45 31

R343 2 ID0# BPCFG_00/NC_50
1 @1K_0402_5% 46 ID1# FLTI_00/NC_50 33 1U_0603_10V4Z

2
.033U_0402_16V4Z 34
FLTO_00/NC_50
2

2
EAPD 47 43 SPK_SHUTDOWN#
<28> EAPD EAPD NC_00/GPIO0_50 SPK_SHUTDOWN# <28>

1
44 short the digital ground and analong ground
NC_00/GPIO1_50 C489 R354
+3VCC 2 1 48 S/PDIF_OUT
R339 10K_0402_5% 40 @4.7U_0805_10V4Z @100K_0402_5%
NC_00/HP_COMM_50

2
4 GND AGND 26

1
7 GND AGND 42

C492
@1U_0603_10V4Z
1

STAC9750 C471

1U_0603_10V4Z
2

2 1 CD_GNA
<21> CD_AGND
R367 0_0402_5%
ID0# ID1#
1

1 1 14.318 OPEN
R366
@6.8K_0603_1% 1 0 27MHZ
0 1 48MHZ
2

4 4

* 0 0 24.576MHZ

Dell-Compal Confidential
Compal Electronics, Inc.
Title
AC97 CODEC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 27 of 43
A B C D E F G H
 A B C D E

+5VDDA Gain Setting GAIN0 GAIN1 AV(inv) INPUT

IMPEDANCE

0 0 6dB 90K ohm

1
L31
1 2 +5VALW R379 R380
BLM21A05_0805 0 1 10dB 70K ohm
+5VAMP L32 @10K_0402_5%
1 2 +5VDDA 10K_0402_5%

2
1 0 15.6dB 45K ohm
1 W=40mils
@BLM21A05_0805 GAIN0
* 1
GAIN1
1 1 21.6dB 25K ohm

1
1

1
C571 C582 C583 R383 R384
C570
.1U_0402_16V4Z 10U_1206_10V4Z .1U_0402_16V4Z @10K_0402_5% 10K_0402_5%

16
15
2

2
6
U28

2
VDD
PVDD
PVDD
.1U_0402_16V4Z
Speaker Connector
1 2 7 2 GAIN0 JP16
C579 .47U_0603_16V4Z RIN+ GAIN0 INTSPK_R+ 1 1
3 GAIN1 INTSPK_R- 2
GAIN1 INTSPK_L+ 2
3 3
RIGHT 1 2 17 INTSPK_L- 4
<27> RIGHT C584 .1U_0402_16V4Z RIN- INTSPK_R+ 4
ROUT+ 18
15 mils trace Molex_53398-0410

14 INTSPK_R-
ROUT-
1 2 9 LIN+
C581 .47U_0603_16V4Z
4 INTSPK_L+
LOUT+ D44 @DAN217 D42 @DAN217

1
LEFT 1 2 5 D45 @DAN217 D43 @DAN217
<27> LEFT C576 .1U_0402_16V4Z LIN- INTSPK_L-
LOUT- 8

+3VS
2

+3VS

3
NC 12
R389
2 100K_0402_5% BYPASS 2
BYPASS 10
19 SHUTDOWN
1

<27> SPK_SHUTDOWN#

1
C580 +5VDDA

GND
GND
GND
GND
Q30 Q31 Q32 C588
2N7002 2N7002 2N7002 4.7U_0805_10V4Z .1U_0402_16V4Z 1 2
D D D

2
1

20 TI 6017A2 R327
13
11
1
2 2 HP_PLUG 2 1K_0402_5%
<27> EAPD
G G G
S S S C161
3

1
4.7U_0805_10V4Z
R328 R157
EXT. MIC

2
<30> MUTE JP11
2K_0402_5% 2K_0402_5%

2
5

4
L14 BLM11A121S
1 2 3
6
2 1 1 2 EXTMIC 2
<27> MICIN
1
L29
C548 BLM11A121S 7

1
.22U_0603_10V7K 8

2
+3VS JA6333L-100

C458
1

3 47P_0402_25V8K 3
R431 +3VS
100K_0402_5%
+3VS C621 +5VDDA +5VDDA

U15 1 2
2
5

1 .1U_0402_16V4Z
NC R436 R437 +3VS
<30> BEEP 1 R430 VCC 5
4 1 2 2 100K_0402_5% 100K_0402_5%
A
2 Y 4
10K_0402_5% C624 C619
3 GND R434
2

2
1

U14 1 2 1 2 1 2 R125
3

74AHC1G08 C617
.1U_0402_16V4Z
TC7SH14 2K_0402_5%
100K_0402_5%
HP OUT
2

1U_0603_10V4Z @.1U_0402_16V4Z JP9

HP_PLUG 5
+3V POWER <31> HP_PLUG
C620 R122
1 2 MONO_IN 0_0402_5% C142 4
MONO_IN <27>
@220U_D_6.3V
1

C623 1U_0603_10V4Z 1 2 1 2 PR_RIGHT 1 2 PR 3

+
R433 <27> HP_OUT_R
1 2 1 2 2 L12 BLM11A121S 6
<23,25> PCM_SPK# PL
Q13 1 2 1 2 PR_LEFT 1 2 2

+
2K_0402_5% 1U_0603_10V4Z <27> HP_OUT_L
2SC2411EK L13 BLM11A121S 1
3

R155 C154

1
0_0402_5% @220U_D_6.3V 7
8
R432 C622 C155 C144

2
1 2 1 2 C636 47P_0402_25V8K
<19> ICH_SPKR
220U_4B_10V JA6333L-100
2K_0402_5%
1U_0603_10V4Z 1 2

+
47P_0402_25V8K
1

C635
4 D15 220U_4B_10V 4
1 2

+
1SS355
2

Dell-Compal Confidential
Compal Electronics, Inc.
Title
AMP & Audio Jack
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 28 of 43
A B C D E
 5 4 3 2 1

+3V
@1000P_0402_50V7K
@.1U_0402_16V4Z +5VMDC 1 2 +5VALW

1
+3VMDC R435
C628 C625 C626 @0_0805_5%

1
1 2 C627 @.1U_0402_16V4Z
+3V

2
R443 0_0805_5%
1 2 @1000P_0402_50V7K

2
+3VALW R444 @0_0805_5%
JP25

2
C630 C629
<27> MD_MIC 1 MONO_OUT/PC_BEEP AUDIO_PWDN 2
4.7U_0805_10V4Z .1U_0402_16V4Z 3 4
AGND MONO_PHONE MD_SPK <27>

1
D D
5 AUXA_RIGHT RESERVED 6
7 AUXA_LEFT GND 8
9 CD_GND +5V 10
11 CD_RIGHT RESERVED 12
13 CD_LEFT RESERVED 14
15 GND RESERVED 16 1 2
As close to P17 +3VMDC 17 3.3Vaux RESERVED 18 R438 10K_0402_5% +3V 1: Have primary CODEC on mother board
19 GND RESERVED 20
21 3.3Vmain AC97_SYNC 22 IAC_SYNC <19,27>
23 24 2 R439 1
<19,27> IAC_SDATAO AC97_SDATA_OUT AC97_SDATA_IN1 IAC_SDATA_IN1 <19>
25 26 @22_0402_5%
<19,27> IAC_RST# AC97_RESET# AC97_SDATA_IN0
27 28 2 R441 1
GND GND
29 AC97_MSTRCLK AC97_BITCLK 30 1 22_0402_5%
2 IAC_BITCLK <19,27>
R442 22_0402_5%

AMP 3-1612118-0

MDC Conn.

MDC Note
Touch Pad & Status LED Conn. Pin 1 is NC for Pctel and connexant MDC modem
C C
Pin 2 is NC for Pctel and connexant MDC modem
JP13
TP_CLK TP_DATA
<30> TP_CLK 1 2 TP_DATA <30>
3 4 +5VS
+5VS 5 6
7 8 PWR_LED# +5VALW
9 10 PWR_LED# <31>
ACT_LED# BATT_LED#
<21> ACT_LED# 11 12 BATT_LED# <31>
CHARGE_LED#
<31> CHARGE_LED# 13 14 Screw Hole
15 16
+3VALW 17 18 LID_SW# <30>
H7 H8 H13 H12 H3 H19 H11 H5 H4 H2 H10 H16
19 20 C315D126 C315D126 C315D126 C315D126 C394D118 C394D118 C394D118 C315D118 C394D118 C394D118 C394D118 C394D118

JST BM20B-SRDS-G

1
C193
1 2 TP_CLK
H14 H17 H20 H21 H28 H27 H26 H23 H22 H18 H29 H1
@220P_0603_50V8J C315D118 C315D118 C315D118 C315D118 C315D118 C315D118 C315D118 C197B256D157 C197B256D157 C138D138N O197x138D197x138N C256D87
C171
1 2 TP_DATA

1
@220P_0603_50V8J
CP1
5 4 CHARGE_LED#
6 3 ACT_LED#
7 2 PWR_LED# H33 H30 H32 H15 H25 H31 H24 H9 H6
8 1 BATT_LED# O335x79D315x59 O335x79D315x59 O335x79D315x59 O335x79D315x59 H_O177x99D157x79 O335x79D315x59 O335x79D315x59 O335x79D315x59 C315D177
B B
@220P_1206_8P4C_50V8K
1

1
Fiduial Mark
FD1 FD2 FD3 FD4 FD5 FD6 FD7 FD8 FD9
1 1 1 1 1 1 1 1 1

FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK

FD10 FD11 FD12 FD13 FD14 FD15 FD16 FD17 FD18

1 1 1 1 1 1 1 1 1

FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK

A A

Dell-Compal Confidential
Compal Electronics, Inc.
Title
MDC connector / SWITCH / ACPI DEBUG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 29 of 43
5 4 3 2 1
 A B C D E

EC_AVCC
+3VALW +RTCVCC
C595 .1U_0402_10V6K 1 2 EC_3VDD
+3VALW +3VS

2
R411 0_0402_5% C608

1
C611 C607 C589 BD_ID 0V 0.5V 1.0V 1.5V

123
136
157
166

161
1
C602 1U_0603_10V4Z

16

34
45

95

1
1000P_0402_50V7K U32

2
.1U_0402_16V4Z REV 0.1 0.2

VDD

AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

VBAT
2
4.7U_0805_10V4Z .1U_0402_16V4Z
/10K 100K/10K 100K/20K 100K/30K
+5VALW
7 81 BATT_TEMP
<18,23,25> SIRQ SERIRQ AD0 BATT_TEMP <34>
8 82 I/O Address
LDRQ AD1

1
<19> LFRAME# 9 LFRAME AD2 83 VBATT BADDR1-0 Index Data
L33 <19> LAD0 15 84 BATT-OVP <35> ALI/MH#
R393 0 0 2E 2F
LAD0 AD3
+3VALW 1 2 EC_AVCC <19> LAD1 14 Host interface 87 @100K_0603_1%
* 0 1 4E 4F
LAD1 IOPE0AD4
1 MURATABLM11P600S
<19> LAD2 13 LAD2 IOPE1/AD5 88 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1 1
2

1
C594 C593
<19> LAD3 10 89 BATT_CHGI 1 1 Reserved
LAD3 IOPE2/AD6

2
CLK_PCI_LPC 18 AD Input 90
<15> CLK_PCI_LPC LCLK IOPE3/AD7 ADP_I <35>
.1U_0402_16V4Z 1000P_0402_50V7K 1 2 EC_RST 19 93 BD_ID
+3VALW LREST1 DP/AD8
1

L34 2 R402 10K_0402_5% 22 SMI DN/AD9 94

1
1 2 ECAGND 23 PWUREQ

2
MURATABLM11P600S 99 R394 C592
DA0 EN_FAN2 <7>
100 10K_0603_1%
DA output DA1 EN_FAN1 <7>
31 101 .1U_0402_10V6K
<19> SCI# IOPD3/ECSCI DA2 IREF <35>

1
DA3 102 IREF2 <35>

2
5 32 ECAGND
ADB[0..7] <18> GATEA20 GA20/IOPB5 IOPA0/PWM0
ADB[0..7] <31> <18> KBRST# 6 KBRST/IOPB6 IOPA1/PWM1 33 BEEP <28>
IOPA2/PWM2 36
KBA[0..19] KSI[0..7] PWM 37
KBA[0..19] <31> <31,32> KSI[0..7] IOPA3/PWM3 ACOFF <35>
KSI0 71 or PORTA 38
KSO[0..15] KBSIN0 IOPA4/PWM4 VLBA# <19>
<31> KSO[0..15] KSI1 72 39
KBSIN1 IOPA5/PWM5 EC_ON <32>
KSI2 73 40
KBSIN2 IOPA6/PWM6 LID_OUT# <19>
KSI3 74 43
KBSIN3 IOPA7/PWM7 PCM_SUSP# <23,24,25>
KSI4 77
KSI5 KBSIN4 KSO16
78 KBSIN5 IOPB0/URXD 153 KSO16 <32>
Place closely pin 18 KSI6 79 154 KSO17
TP_DATA KSI7 KBSIN6 Key matrix scan IOPB1/UTXD EC_DEBUG
+5VS 1 2 80 KBSIN7 IOPB2/USCLK 162
R407 10K_0402_5% CLK_PCI_LPC 163 SMB_EC_CK1
PORTB IOPB3/SCL1 SMB_EC_CK1 <16,31,34>
KSO0 49 164 SMB_EC_DA1
KBSOUT0 IOPB4/SDA1 SMB_EC_DA1 <16,31,34>

1
1 2 TP_CLK KSO1 50 165
KBSOUT1 IOPB7/RING/PFAIL/LRESET2 PCIRST# <6,10,16,18,22,23,25,26,33>
R404 10K_0402_5% R406 KSO2 51
KSO3 KBSOUT2
52 KBSOUT3 IOPC0 168 PWRBTN# <19>
10_0402_5% KSO4 53 169 SMB_EC_CK2
KBSOUT4 IOPC1/SCL2 SMB_EC_CK2 <6,8>
2 1 LID_SW# KSO5 56 170 SMB_EC_DA2
+3VALW KBSOUT5 IOPC2/SDA2 SMB_EC_DA2 <6,8>
1 2

R410 100K_0402_5% KSO6 57 171

KBSOUT6 PORTC IOPC3/TA1 FAN1_TACH <7>
C597 KSO7 58 172
2 KBSOUT7 IOPC4/TB1/EXWINT22 EC_WAKEUP# <18> 2
KSO8 59 175
KBSOUT8 IOPC5/TA2 EC_THRM# <19>
15P_0402_50V8J KSO9 60 176
KBSOUT9 IOPC6/TB2/EXWINT23 FAN2_TACH <7>
2

KSO10 61 1
KBSOUT10 IOPC7/CLKOUT PM_PWROK <10,19,32>
KSO11 64 KBSOUT11
ENV0 ENV1 TRIS
+5VS KSO12 65 26
KBSOUT12 IOPD0/RI1/EXWINT20 ACIN <18,34,36>
RP7 KSO13 66 KBSOUT13 IOPD1/RI2/EXWINT21 29 PM_SLP_S4# <19>
IRE 0 0 0
PS2_CLK 1 8 KSO14 67 PORTD-1 30
KBSOUT14 IOPD2/EXWINT24/LRESET2 PM_SLP_S3# <15,19>
PS2_DATA 2 7 KSO15 68 * OBD 0 1 0
KBD_DATA KBSOUT15
3 6 IOPE4/SWIN 2 ON/OFF <32>
KBD_CLK 4 5 EC_TINIT# 105 44 PM_SLP_S5# <19>
DEV 1 0 0
EC_TCK TINT PORTE IOPE5/EXWINT40
106 TCK IOPE6/LPCPD/EXWIN45 24 EXTVGA_IN# <16>
8.2K_0804_8P4R_5% EC_TDO 107 25 CLKRUN# <19,22,25,26>
PROG 1 1 0
EC_TDI TDO JTAG debug port IOPE7/CLKRUN/EXWINT46
108 TDI
EC_TMS 109 124 KBA0
TMS IOPH0/A0/ENV0
125 KBA1 SHBM=1: Enable shared memory with host BIOS
+3VALW IOPH1/A1/ENV1
KBD_CLK 110 PSCLK1/IOPF0 IOPH2/A2/BADDR0 126 KBA2 TRIS=1: While in IRE and OBD, float all the
RP6 KBD_DATA 111 127 KBA3 signals for clip-on ISE use
FSEL# PS2_CLK PSDAT1/IOPF1 IOPH3/A3/BADDR1 KBA4
1 8 114 PSCLK2/IOPF2 IOPH4/A4/TRIS 128
SELIO# 2 7 PS2_DATA 115 PORTH 131 KBA5
FR D# TP_CLK PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM KBA6
3 6 <29> TP_CLK 116 PSCLK3/IOPF4 IOPH6/A6 132
EC_SMI# 4 5 TP_DATA 117 133 KBA7
<29> TP_DATA PSDAT3/IOPF5 IOPH7/A7
LID_SW# 118
<29> LID_SW# PSCLK4/IOPF6
8.2K_0804_8P4R_5% 119 138 ADB0
<39> AC_LOW_PRES# PSDAT4/IOPF7 IOPI0/D0
139 ADB1
IOPI1/D1 ADB2
IOPI2/D2 140
141 ADB3
C RY1 PORTI IOPI3/D3 ADB4 +3VALW
158 32KX1/32KCLKOUT IOPI4/D4 144
R423 20M_0603_5% 145 ADB5
C RY2 IOPI5/D5 ADB6
1 2 160 32KX2 IOPI6/D6 146
147 ADB7
IOPI7/D7
32.768KHZ_12.5P
R424
KBA1 (ENV1) 2 1
2 1 150 FR D# R412 10K_0402_5%
3 PORTJ-1 IOPJ0/RD FRD# <31> 3
120K_0402_5% 151 FWR#
IOPJ1/WR0
1

C615 X5 KBA2 (BADDR0) 2 1

C618 152 SELIO# R414 10K_0402_5%
SELIO SELIO# <31>
10P_0402_50V8K 12P_0402_50V8K
2

<19> EC_SMI#
EC_SMI# 62 IOPJ2/BST0 IOPD4 41 SCRLED# <32>
KBA3 (BADDR1) 2 1
R390 LAN_DISABLE# 63 42 R416 @10K_0402_5%
<22> LAN_DISABLE# IOPJ3/BST1 PORTD-2 IOPD5 NUMLED# <32>
<16> G_RST# 2 1 69 IOPJ4/BST2 IOPD6 54 CAPSLED# <32>
70 PORTJ-2 55 KBA5 (SHBM) 2 1
<19> EC_SWI# IOPJ5/PFS IOPD7
0_0402_5% 75 R418 10K_0402_5%
<26> RADIO_DISABLE# IOPJ6/PLI
76 143 KBA8
<15,19> PM_SLP_S1# IOPJ7/BRKL_RSTO IOPK0/A8
142 KBA9
IOPK1/A9 KBA10
<33,38> SYSON 148 IOPM0/D8 IOPK2/A10 135
149 PORTK 134 KBA11
+3VALW <16,27,33,38> SUSP# IOPM1/D9 IOPK3/A11
155 130 KBA12
<33,40> VR_ON IOPM2/D10 PORTM IOPK4/A12
R415 0_0402_5% 156 129 KBA13
<19,40> VGATE IOPM3/D11 IOPK5/A13/BE0 +3VALW
2 1 3 121 KBA14
<19> RSMRST# IOPM4/D12 IOPK6/A14/BE1
1

4 120 KBA15
<28> MUTE IOPM5/D13 IOPK7/A15/CBRD JP17
R395 CPU_DT/MO# 27 IOPM6/D14 KBA16
100K_0402_5% 1 2 <16> BKOFF# 28 IOPM7/D15 IOPL0/A16 113 1 1
R417 112 KBA17 EC_TINIT# 2 For EC debug C591 .01U_0402_25V4Z
100K_0402_5% FSEL# PORTL IOPL1/A17 KBA18 EC_TCK 2 BATT_CHGI ECAGND
<31> FSEL# 173 SEL0 IOPL2/A18 104 3 3 1 2
2

CPU_DT/MO# 174 103 KBA19 EC_TDO 4

SEL1 IOPL3/A19 EC_TDI 4 C587
47 CLK IOPL4/WR1 48 FSTCHG <35> 5 5
1

EC_TMS 6 BATT_TEMP 1 2
R396 6 .01U_0402_25V4Z
7 7
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

KSO16 8
NC10

@100K_0402_5% 8
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

KSO17 9
EC_DEBUG 9 C585 .01U_0402_25V4Z
10 10
2

PC87591VPC BATT-OVP 1 2 ECAGND

17
35
46
122
159
167
137

96

11
12
20
21
85
86
91
92
97
98

+3VALW
+3VALW @96212-1011S
C586
VBATT 1 2
SUS_STAT# <16,19>
2

4 100K_0402_5% ECAGND 4
2

.01U_0402_25V4Z
CPU_DT/MO# CPU R422 3.3K_0402_5% +3VALW R421
2

Dell-Compal Confidential
G
14
1

U33B
HIGH DT
1

4 1 3 EC_FLASH# <19>
FWE# 6
Compal Electronics, Ltd.
D

<31> FWE#
LOW MOBILE 5 FWR# Q35
Title
2N7002
EC PC87591/BIOS
7

74VHC32
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom Abacus/TangII 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 30 of 43
A B C D E
 A B C D E

ADB[0..7]
<30> ADB[0..7]
KBA[0..19]
<30> KBA[0..19]

Output Port
Input Port

1 2 +5VALW
+3VS
R388 100K_0402_5% C575
1 2 +3VALW 1 2
+3VS
R386 100K_0402_5%
+3VALW 1 2 C577 .1U_0402_16V4Z
1 R233 100K_0402_5% 1
1 2

20
1 2 U27
R382 100K_0402_5% .1U_0402_16V4Z ADB0 3 2

VCC
D0 Q0 PWR_LED# <29>
ADB1 4 5

20
D1 Q1 CHARGE_LED# <29>
U30 C605 ADB2 7 6
D2 Q2 BATT_LED# <29>
2 18 ADB0 1 2 ADB3 8 9
<16,17> M_SEN# +3VALW VCHG <35>

VCC
1A1 1Y1 ADB1 ADB4 D3 Q3
<6,19> PROCHOT# 4 1A2 1Y2 16 13 D4 Q4 12
6 14 ADB2 .1U_0402_16V4Z ADB5 14 15
<16> INTVGA_IN# 1A3 1Y3 U33C D5 Q5
PME# 8 12 ADB3 ADB6 17 16

14
1A4 1Y4 ADB4 74VHC32 ADB7 D6 Q6
<28> HP_PLUG 11 2A1 2Y1 9 18 D7 Q7 19
13 7 ADB5 KBA2 9
<16> ENABKL 2A2 2Y2
15 5 ADB6 8 AA 11

GND
<39> AC_LOW_PRES2# 2A3 2Y3 CLK
17 3 ADB7 SELIO# 10 LARST# 1
2A4 2Y4 CLR
1 74HCT273_TSSOP20

GND
1G

10
19 2G
+3VALW
74LVC244_TSSOP20 C569
U33D

10
1 2 1 2

14
74VHC32 +5VALW
R377 20K_0402_5%
KBA1 12 1U_0603_10V4Z
11 CC
SELIO# 13
<30> SELIO#
NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#
7

+5VALW

+5VALW

1
1 2
2 C590 R375 2
+3VALW .1U_0402_16V4Z 100K_0402_5%
+3VALW U29

2
8 VCC A0 1
1

+5VALW 7 2
R387 AA R453 WC A1
1 2 <16,30,34> SMB_EC_CK1 6 SCL A2 3
R419 100K_0402_5% 8.2K_0402_5% 5 4
10K_0402_5% <16,30,34> SMB_EC_DA1 SDA GND
1 2 SMB_EC_DA1
CC 1 2 NM24C16
2

R420 100K_0402_5% 1 2 SMB_EC_CK1

<22> LAN_PME#
LAN_PME# 1 2 R454 EC I2C Bus Address:
R49 0_0402_5% 8.2K_0402_5%
<26> MINI_PME#
MINI_PME# 1 2 24C164: 1011xxx R/W#
R48 0_0402_5% 24C16: 1010xxx R/W#
PCM_PME# 1 2 PME#
<23,25> PCM_PME#
R45 0_0402_5%

U16
+3VALW
KSI1 4 5 <30> KBA[0..19]
KSI7
3 INT_KBD CONN. KSI6
3
2
6
7 CP2 KBA0 21 A0 VCC0 31 3
KSO9 1 8 @100P_1206_8P4C_50V8K KBA1 20 30
A1 VCC1

1
KBA2 19 C632 C631
KSI4 KBA3 A2
4 5 18 A3
KSI5 3 6 KBA4 17 25 ADB0 .1U_0402_16V4Z .1U_0402_16V4Z
A4 D0

2
KSO0 2 7 CP3 KBA5 16 26 ADB1
KSI2 KBA6 A5 D1 ADB2
1 8 @100P_1206_8P4C_50V8K 15 27
KBA7 A6 D2 ADB3
14 A7 D3 28
KSI3 4 5 KBA8 8 32 ADB4
KSO10

KSO14

KSO12

KSO6

KSO7

KSO2

KSO1

KSI3

KSO0
KSI4

KSI6

KSI1

KSO5 KBA9 A8 D4 ADB5

3 6 CP4 7 A9 D5 33
KSO1 2 7 KBA10 36 34 ADB6
KSI0 @100P_1206_8P4C_50V8K KBA11 A10 D6 ADB7
1 8 6 A11 D7 35
KBA12 5
25

23

21

19

17

15

13

11

A12 ADB[0..7] <30>

9

KSO2 4 5 KBA13 4
JP10 KSO4 KBA14 A13
3 6 3 10 1 2 +3VALW
Dummy

23

21

19

17

15

13

11

KSO7 CP5 KBA15 A14 RP# R440 100K_0402_5%

2 7 2 A15 NC 11
KSO8 1 8 @100P_1206_8P4C_50V8K KBA16 1 12
24

22

20

18

16

14

12

10

A16 READY/BUSY#
8

KBA17 40 29
KSO6 KBA18 A17 NC0
4 5 13 A18 NC1 38
24

22

20

18

16

14

12

10

Foxconn GS22250-0001 KSO3 3 6 KBA19 37

KSO12 CP6 A19
2 7
KSO15

KSO11

KSO13

KSO13 1 8 22
KSO3

KSO8

KSO4

KSI0

KSO5
KSI2

KSI5

KSO9
KSI7

@100P_1206_8P4C_50V8K <30> FSEL# CE#

<30> FRD# 24 OE# GND0 23
KSO14 4 5 9 39
<30> FWE# WE# GND1
KSO11 3 6
KSO10 2 7 CP7
KSO15 1 8
@100P_1206_8P4C_50V8K SST39VF080_TSOP40

4 4

KSO[0..15]
<30> KSO[0..15] Dell-Compal Confidential
KSI[0..7]
<30,32> KSI[0..7]
Compal Electronics, Inc.
Title
EC Extend I/O KB Conn. & BIOS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 31 of 43
A B C D E
 A B C D E

+3VALW

1
RTC Battery R186
100K_0402_5% Power BTN
BATT1 D12

- +

2
1 ON/OFF
PM_PWROK <10,19,30> ON/OFF <30>
2 1 RTCPWR ON/OFFBTN# 3
2 EC_ON# <37>
VL
C638 +3VALW
DAN202U
VL

1
1000P_0402_50V7K @1000P_0402_50V7K RTCBATT

1
1

1
1 D17 1SS355 D41 1

2
1

1
R449 C639 2 1 R188 D16

1
1
470K_0402_5% 4.7K_0402_5%
R447 1 2 +RTCVCC RLZ20A

2
+RTCVCC

2
2
G
100K_0402_5% R448 470K_0402_5% C209

2
EC_ON 22K
<30> EC_ON 1 2 2
3 1 1 2 CHGRTC R189 22K 1000P_0402_50V7K
SM_INTRUDER# <18>
2

BAS40-04 22K_0402_5%

D
D

1
Q21
2 C633 .1U_0402_16V4Z DTC124EK
Q22

3
G
S Q41
2N7002
3
2N7002

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
D
1

SHDN_1632 <36>
<36> SHDN# 2
G
S Q40
3

2N7002

2 2

+5VALW USB_AS USB_BS +3VALW

USB Over Current USB PORT
100K_0402_5%
1

R12 R212
100K_0402_5%
W=40mils USB_AS USB_BS
USB_A USB_B
2

U6 L38 L40
1 8 1 2 OVCUR#0 1 2 .1U_0402_16V4Z .1U_0402_16V4Z 2 1
GND OC1# OVCUR#0 <19>
2 7 R210 47K_0402_5% FBM-11-451616-800T FBM-11-451616-800T
IN OUT1

1
3 6 C12
EN1# OUT2
1

1
C16 4 5 1 2 OVCUR#2 C641 + + C10 + C229 + C642
EN2# OC2# OVCUR#2 <19>
R211 47K_0402_5% @100U_4A_10V C231 @100U_4A_10V
1

1
.1U_0402_16V4Z TPS2042A C238 C237
2

2
.1U_0402_16V4Z .1U_0402_16V4Z 150U_D_10VM 150U_D_10VM
2

Note: JP4
USB_AS=USB_BS=Trace width=40mils USB0D-
1 VCC VCC 5
USB2D-
<33> SYSON# 2 D0- D1- 6
USB0D+ 3 7 USB2D+
D0+ D1+
4 VSS VSS 8
3 3
10 G2 G1 9

1
12 11 @15P_0402_50V8J
@15P_0402_50V8J C232 C11 G4 G3 C13 C230

2
SUYIN_2522A-08G3T-K

@15P_0402_50V8J @15P_0402_50V8J

JP5 R209 R9
<30> KSO16 0_0402_5% 0_0402_5%
1 2 KSI0 <30,31>
<30> CAPSLED# 3 4 SCRLED# <30> 2 1 2 1
5 6 NUMLED# <30>
ON/OFFBTN#
7 8 U21 U17
+3VS 9 10 +3VALW
USBP0- USB0D- USB2D- USBP2-
<19> USBP0- 1 4 4 1 USBP2- <19>

SUYIN_12750A-10_10P USBP0+ USB0D+ USB2D+ USBP2+

<19> USBP0+ 2 3 3 2 USBP2+ <19>
@KC-JTS0402-02 @KC-JTS0402-02

2 1 U22 2 1

R208 1 R8
0_0402_5% 1 4 0_0402_5%
LID Switch & Function Button R1565, R1567 Close to L48
3 3 6
R1566, R1568 Close to L48

5
2

5
4 @CM1210_6P 4
+3VS

Dell-Compal Confidential
Compal Electronics, Inc.
Title
Power OK/Reset/RTC battery/USB Conn.& Lid Switch
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 32 of 43
A B C D E
 A B C D E

+12VALW
+1.5VALW to +1.5VS Transfer

1
+12VALW
R445
68K_0402_5%

1
+1.5VALW +1.5VS R451

2
100K_0402_5%
U66
8 D S 1

1
7 2 SUSON SYSON#
D S <32> SYSON#

1
6 3 R446
D S D
1

1
1 C568 C573 C572 R378 1
5 D G 4 D 47K_0402_5%

1
470_0805_5% C634 2 Q2
<30,38> SYSON
10U_1206_10V4Z SI4800 10U_1206_10V4Z SYSON# 2 R450 G 2N7002
2

2
G .01U_0402_25V4Z S

1 2

3
Q39 S
D

1
.1U_0402_16V4Z 2N7002
2 SUSP Q61
G 1M_0402_5%
@SMO5
S

3
Q60
RUNON 2N7002

3
+12VALW

+CPU_CORE

1
+3VALW R426
10K_0402_5%

1
R425 R427

2
2
@100K_0402_5%
+3VALW to +3V Transfer @330_0603_5%
<7,17> SUSP

2
D

1
+3VALW +3V
D

1
2 Q36
<16,27,30,38> SUSP#
U70 2 G 2N7002
8 1 G S
D S

3
1
7 2 S Q38
D S

3
1
2 @2N7002 R456 2
6 D S 3
1

5 4 C208 C210 R187 100K_0402_5%

D G D

1
470_0402_5%
1

C207 SI4800 22U_1206_10V4Z VR_ON 2

<30,40> VR_ON
2

2
G
2

22U_1206_10V4Z S Q37
2

3
@2N7002
D
1

.1U_0402_16V4Z
2 SYSON#
SUSON G
S Q20
3

2N7002

+5VALW to +5VS Transfer

+12VALW +5VS
1

+5VALW +5VS JP27

R408 100K_0402_5% <18,22,23,25,26> AD9
U31 1 2 PCI_TRDY# <18,22,23,25,26>
SI4800
<18,22,23,25,26> PCI_FRAME# 3 4 PCIRST# <6,10,16,18,22,23,25,26,30>
8 D S 1 5 6 CLK_PCI_DEBUG <15>
7 D S 2 7 8 C/BE#3 <18,22,23,25,26>
2

6 D S 3 <18,22,23,25,26> C/BE#2 9 10 C/BE#1 <18,22,23,25,26>

5 R413
D G 4 <18,22,23,25,26> AD8 11 12 AD7 <18,22,23,25,26>
1

3 C603 C604 470_0805_5% 3

D <18,22,23,25,26> AD5 13 14 AD3 <18,22,23,25,26>
1

C601 <18,22,23,25,26> AD1 15 16 AD0 <18,22,23,25,26>

SUSP 2 RUNON <18,22,23,25,26> AD2 17 18 AD4 <18,22,23,25,26>
2

G R409 <18,22,23,25,26> AD6 19 20 C/BE#0 <18,22,23,25,26>

2

Q33 S .01U_0402_25V4Z .1U_0402_16V4Z

3

2N7002 22U_1206_10V4Z Q34 @AMP 5-175638-0

D
1

1M_0402_5% 2 SUSP
+5VALW G
S
3

2N7002
1

+ C606 Debug PORT CLK_PCI_DEBUG

2
150U_D_10VM
R458
2

33_0402_5%

1 1
C637
10P_0402_50V8K

2
+3VALW +3VS
+3VALW to +3VS Transfer
U20 SI4800
8 D S 1
7 D S 2
1

6 3 C133 C131
D S R100
5 D G 4
1

22U_1206_10V4Z 470_0402_5%
2

2
1

4 + C145 4
C132
2

10U_1206_10V4Z
2

150U_D_6.3VM .1U_0402_16V4Z Q19

D
1

RUNON
2N7002
2 SUSP
Dell-Compal Confidential
G
S Compal Electronics, Inc.
3

Title
DC/DC Circuit
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 33 of 43
A B C D E
 A B C D E

Detector

+3VALWP

BATT+

PR161
BATT++

BATT+
1 100K_0402_5% 1
LOW_PWR <39>
PL5

1 2 BATT++
FBM-L18-453215-900-LMA90T_1812
PR162

1
VIN 9C/12C#/8C#
PCN1 PR163 1K_0402_5%
RP34-8RD-3PDL2J PL6 PC44 @1K_0402_5%

2
PC43 0.1U_0805_25V7K
3 ADPIN 1 2 0.1U_0805_25V7K
VIN

1
1 GND PC46 1000P_0603_50V8J FBM-L18-453215-900-LMA90T_1812
PR44
AIR_ADP
100P_0603_50V

2 10_1206_5%
1

100P_0603_50V
PC45

@EC10QS04
PR45

1000P_0603_50V8J
1

1
1K_0402_5%
4
5
6
7

1 2
PD5

PC47

PC48
1 2 BATT_TEMP
BATT_TEMP <30>
2

2
2

1
PZD1 PCN2
RLZ24B 1 PD6
BATT+
BATT+ 2 @BAS40-04

2200P_0603_50V7K
ADPGND 3
ID

1
PC219
B/I 4
TS 5

2
SMD 6

2
SMC 7
10 GND GND- 8

2
11 9 PR47
GND GND-
1 2
2 PR46 +3VALWP 2
1K_0402_5% 25.5K_0402_1%
SUYIN-200275MR009G516ZL 9P

1
PR48
100_0402_5%
1 2 SMB_EC_DA1 <16,30,31>

1
PR49 100_0402_5%
PCN2 battery connector pin assignment <16,30,31> SMB_EC_CK1
2 1
PD7
S MART Battery: @BAS40-04

1.BATT+

2
2.BATT+
3 . 9C/12C#/8C# PD8
@BAS40-04 +5VALWP
4 .B/I

3
5. TS PR51
6 . S M B _ E C_ DA1 +5VALWP 1M_0603_1%
7. SMB _EC_CK1 +5VP 1 2 2 1
VS
B+

8.GND PR50
100K_0603_5%
9.GND

1
1
PC52 PR52
0.01U_0603_50V7K 499K_0603_1%

2
PD9

2
8
3 PU5A 3
RB751V
+ 3
2 1 1
<6,36> SHDN_1632#
Vin Detector - 2

1
10K_0603_5%
1000P_0603_50V8J
PD10

1
17.90V/17.24V

0.1U_0603_16V
LM393A PR53
RB751V

4
1

1
PC50

PC51

PR54
499K_0603_1% PC49
2 1 PR55 1000P_0603_50V8J
<35> ACON

2
215K_0603_1%

2
PR56

1
1M_0603_1%

2
1 2
VIN RTCVREF
VIN
1

1
PR59
84.5K_0603_1%

PR58

10K_0603_5% PR60
10K_0603_5%
PR57

1 2 47K_0603_5% PACIN <35>

PU5B ACIN <18,30,36>
PQ12 2 2 1 PACIN
PR61 LM393A
Precharge detector
2

22K_0603_5% 2N7002

3
1 2 5 +
7
15.9V/13.2V FOR
PACIN <35>

1
6 - ADAPTOR
20K_0603_1%1
1

1
1000P_0603_50V8J
PC53

PR62

PC54 PZD2 PR63

100K
0.1U_0603_16V RLZ4.3B 10K_0603_5% 2
2

PQ13 +5VALWP
2

DTC115EUA
2

100K
4 4

3
2 1 RTCVREF
PR64
10K_0603_5% Dell-Compal Confidential
Compal Electronics, Inc.
Title
Detector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 34 of 43
A B C D E
 A B C D E

Iadp=0~4.10A(90W) Charger
Iadp=0~3.20A(70W)
B+++
Iair=0~2.25A(Air)
P3 B+
P2
PQ14 PQ15 PR65 PL8 PQ16
SI4835DY_SO-8 SI4835DY_SO-8 0.02_2010_1% SI4835DY_SO-8
VIN 8 1 1 8 2 1 1 2 1 8

4.7U_1210_25V

4.7U_1210_25V

0.1U_0805_25V7K
7 2 2 7 FBM-L18-453215-900-LMA90T_1812 2 7

1
15U_D_25V

PC55
6 3 3 6 3 6

1
+

2200P_0603_50V7K
PC226

PC56
5 5 5

1
1 1

PC57

PC58
2

2
PR66

4
200K_0402_5% PR67
47K_0603_5%
1 2 VIN

3
2
1
1

2
PD11
PR69 4 PR70
1SS355
PR68 PU6 0_0603_5%
ACOFF# 150K_0402_5% MB3887 PQ17 10K_0603_5%
1 2
1 24 SI4835DY_SO-8
-INC2 +INC2

1
ACOFF#
<30> ADP_I

1
PR72 2 1 2 23 PC59
D OUTC2 GND

5
6
7
8
1
22K_0402_5%
PR71 2200P_0603_50V7K
<34> PACIN 1 2 2
G 100K_0603_5% 3 22 CS 1 2
+INE2 CS 100K

0.01U_0402_16V
S PQ19 2 ACOFF <30>
3

2N7002

@28.7K_0603_1%
2

1
ACON

PC61
<34> ACON 4 -INE2 VCC(o) 21 1 2

1
100K

21K_0603_1%

PR74
PQ18
PR73 PR76 PC60 DTC115EUA

PR75

3
1 2 1 2 5 20 0.1U_0805_25V7K
16.9K_0603_1% 10K_0603_5% FB2 OUT PC63
1

2
PC62 0.1U_0603_16V

@30.1K_0603_1%
2
4700P_0603_50V 6 19 1 2 LXCHRG
VREF VH PC66

0.1U_0603_16V
PC64
0.1U_0805_25V7K

1
1 2 1 2 7 FB1 VCC 18 1 2

PR80
PL9 PR82

2
<30> IREF2 PC65 PR79 15U_SPC-1204P-150 0.02_2512_1% BATT+
2 2200P_0603_50V7K 1K_0603_5% 8 ACON <34> BATT+ 2
-INE1 RT 17 1 2 1 2 1 2

2
PR81

4.7U_1210_25V

4.7U_1210_25V
1 2 9 16 66.5K_0603_1%
<30> IREF +INE1 -INE3

1
PD13

47U_EC_25V

1
EA60QC04 +

0.01U_0402_16V
PR83 PR85 PC69

PC68

PC70

PC71
1
21K_0603_1% 2 1 10 15 1 2 1 2
OUTC1 FB3
1
IREF=0.82*Icharge

2
PR86
PC72
PR84 330K_0603_5% 1500P_0603_5%
20K_0603_1% 10K_0603_5%
IREF=0~3.3V 11 OUTD CTL 14
2

3
2

1
1 2
12 13 PR87
-INC1 +INC1 @10K_0603_5%
PC73
+3VALWP 10P_0603_50V

2
CS
1

PR231
1

47K_0603_5%
2

100K
2 PR164 104K_0603_0.1%
PQ63 2 1 2 1
DTC115EUA
1

100K PR89
PR36 2.2M_0603_5% 312K_0603_0.1%
BATT++
3

3 1 2 1
3 100K 3
2 PQ40 1 2
<30> FSTCHG PQ64 2N7002
Charge voltage
2
845K_0603_1%

DTC115EUA
1

100K PC74
4S CC-CV MODE : 16.8V
PR90

PR37 100K_0603_5% 22P_0603_50V

3

VS
2 1
+5VP
VCHG is H
4S PULSE MODE : 17.4V
1
2

PQ41 VCHG is L
0.1U_0603_16V
0.01U_0603_50V7K

DTC115EK
300K_0603_0.5%

PC154

100K
1

1
PC119

2
PR91

VCHG <31>
2

100K
2

PU7A
8

LM358
+ 3
1
<30> BATT-OVP - 2
4
1

143K_0603_0.5%

0.01U_0603_50V7K
1
@0.1U_0603_16V

PR92

PC76
1
PC75

PR93
@2.2K_0603_5%
2

4 4

OVP voltage :
Dell-Compal Confidential
LI-4S :18.0V----BATT-OVP=2.00V
Compal Electronics, Inc.
Title
LI-3S :13.5V----BATT-OVP=1.50V Charger
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
BATT-OVP=0.2206*BATT++ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Abacus/TangII LA-1452 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 35 of 43
A B C D E
 A B C D E

+3.3V/+5V/+12V
B+

1 1
PL10
FBM-L11-322513-151LMAT
1

PC77 4.7U_1210_25V
1 2

470P_0805_100V

1
2
PC79
DAP202U

PC78
PD14
0.1U_0805_25V7K PD15 PR94 EC11FS2

1
1 2 BST31 BST51 22_1206_5%
B++++

2
2

3
SNB 2 1 FLYBACK

2
2200P_0603_50V7K
0.1U_0805_25V7K

4.7U_1210_25V

4.7U_1210_25V

8
7
6
5
VL
15U_D_25V

PC84

1
1

+
PC227

PQ21 VS 0.1U_0805_25V7K
PC82

PC83
PC80

PC81

SI4800DY_SO-8 PR95 1 2

3
0_0402_5% PT1

4.7U_1206_10V
2

0.1U_0603_16V
4 DH31 1 2 B++++ PQ22 9U_SDT-1204P-100-120

PR96 1

1
0_0402_5%
SI4800DY_SO-8

2
PR97

PC85

PC86
10_1206_5% +12VALWP

4.7U_1210_25V

5
6
7
8
2200P_0603_50V7K

0.1U_0805_25V7K
1
2
3

15U_D_25V

4.7U_1210_25V
LX3

1
+

PC228

PC90
PC89
0.1U_0805_25V7K
8
7
6
5

PC88
PC87
+3.3V Ipeak = 6.66A ~ 10A

0.1U_0805_25V7K
4.7U_1210_25V

2
1
2 PQ23 PR98 2
4

PC91

1
47P_0402_50V

SI4810DY_SO-8 0_0402_5%

PC92
1

PC93
2

1
1

DL3
PC94

DH3

2
2

3
2
1
PL11
10U_SPC-1204P-100 1 2 DH51

5
6
7
8
1
2
3

PR99
2

1
0_0402_5% PQ24 PC96

22

21
SI4810DY_SO-8 47P_0402_50V
25 4

V+

VL
BST3 12OUT

2
2

5 DL5 4
VDD CSH5
27 DH3 BST5 18
1

1M_0402_5%

PU8 DH5 16
PR100

26 LX3 LX5 17

1
+3VALWP PR101 24 19
DL3 DL5
1

3
2
1

1
0.012_2512_1% 20
PGND PR102 PR103
CSH5 14
2

CSH3 1 13 2M_0402_5% 0.012_2512_1%

CSH3 CSL5
2 CSL3 FB5 12

2
150U_D_6.3V_FP

150U_D_6.3V_FP

3 MAX1632 15
FB3 SEQ

2
3.57K_0603_1%

<18,30,34> ACIN 1 2 10 SKIP# REF 9 2.5VREF

1

23 SHDN# SYNC 6
1

1
PC98

+ +
PR105

PR104
PC99

RST# 11

1
10K_0402_5% 7
PC102 TIME/ON5 PC103 CSL5 +5VALWP
2

100P_0402_50V PR106 28 4.7U_1206_10V

GND
RUN/ON3
2

2
@300K_0402_5%
2

150U_D_6.3V_FP
+3VALWP
1

1
150U_D_6.3V_FP
8

1
PD16 PC109 PC104 PR109 PD17 +

PC106
VL 1 2 1 2
2

3 EP10QY03 @1000P_0402_50V7K +5VP 10.2K_0402_1% PC108 EP10QY03 + 3

PC105
2
10K_0402_5%
2

680P_0402_50V PR107 PR108 100P_0402_50V

2
1
PR110
PR111

@0_0402_5% 0_0402_5%

2
1

@0_0603_5% PR112
2

PR113 @100K_0402_5%
1

1
47K_0402_5%
1

PR114 PC110

1
SHDN_1632# <6,34>
2

VL 1 2 POK PR115 @100P_0402_50V8K

NC_TEST2 10K_0402_1%

2
PR177 @0_0603_5%
1

VL PC111 20K_0603_1% PD18

2
VL @RB751V
0.047U_0603_16V
2

PR178 +5V Ipeak = 6.66A ~ 10A

1

PR118 PQ42
1.74K_0603_1%

47K_0603_1% PR116 2N7002 NC_TEST1

1
PR117

47K_0402_1%
0.1U_0603_16V

VL 200K_0603_1% 2
1

PR119
PC158

PU9A SHDN_1632 <32>

2

21K_0603_1%
3
8

LM393A
2

3 +
1 SHDN# <32>
2 -
0.047U_0603_16V
1
PC112
4

2
10K_0805_1%
1000P_0603_50V8J

4 PR120 4
1
PC113

100K_0603_1% VL
1U_0805_25V
PH1
2

CPU thermal protection at 95 degree C Dell-Compal Confidential

PC114

PR121
100K_0603_1%
Recovery at 45 degree C Compal Electronics, Inc.
Title
+3.3V/+5V/+12V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 36 of 43
A B C D E
 A B C D E

+1.5VALW+-5% +1.5VALW
+1.5VALWP
PQ26
+5VALW SI3445DV PL12
4.7U_SPC-1205P-4R7A

D
6 LX18

S
4 5

150U_D_6.3V_KO
2

0.1U_0603_16V
1

PC147
1

1
G

RB051L-40
+

PC116
PD20
3

2
1

1
10K_0603_5%

470P_0603_50V
PD19

PC148
10K_0603_5%
PC118 RB751V PQ27

PR122

2
1
1 4.7U_1206_25V 1K_0603_5% 1

2PR125
2

2
1

1M_0603_5%
1 2 2 2SC2411K
PR126

2
PR127
3
1
VL PU7B
PC121
LM358

2
2200P_0603_50V7K + 5
2

0.1U_0603_16V
1

2
PC122
- 6

PR123 2

0_0603_5%
PR124
0_0603_5%
2
PU9B

8
LM393A

1
3

+ 5 PR131

1
PQ28 2 7 200K_0603_1%
2SA1036K - 6 2 1 2.5VREF
1

301K_0603_1%
0.01U_0603_50V7K
4

1
1
PC125

PR133
2

2
2 2

PR134
200_1206_5%
1 2

PD21
PR135
RLS4148 VS1
200_1206_5% PD22
2 1 1 2 RLS4148
VIN
2 1

PD23 VS
RLS4148
PJP2

1.5K_1206_5%

1.5K_1206_5%

1.5K_1206_5%

1.5K_1206_5%
4MM

PR33 1
BATT+ 2 1

PR136

PR137

PR138
+2.5VP 1 2 +2.5V
PQ31
TP0610T
PR140
PJP3

2
10K_0603_5%
+5VP 2MM
2 1 2 1 3 1 1 2
+1.5VALWP 1 2
PR139 PZD3 B+ +1.5VALW
200_0805_5% RLZ4.3B
2

3 3
PJP4
1

0.22U_1206_25V

0.1U_0805_25V7K

3MM
PR142 1

1
100K_0603_5%

150K_0603_5%
1

0.1U_0603_16V
PC126

PC127

PZD4 1 2
+5VALWP +5VALW
PR141

PC128

RLZ5.1B
2

PJP5
2

3MM

+3VALWP 1 2 +3VALW

<32> EC_ON# 1 2
PJP6
PR143
22K_0603_5% 2MM
+12VALWP 1 2
+12VALW

PU10 RTCVREF
PJP8
S-81233SG
PR144 PR34 3MM
200_0603_5% 200_0603_5% 1 2 +1.25VS
+1.25VP
CHGRTCP 2 3 1 2 1 2 CHGRTC
IN OUT
4.7U_1206_25V

GND
1

1
1U_0805_25V

PC129
1

PZD5
RLZ16B 1
PC130

2
2
2

4 4

Dell-Compal Confidential
Compal Electronics, Inc.
Title
+1.5VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 37 of 43
A B C D E
 5 4 3 2 1

D D

PL21
HCB4532K-800T90_9A
1 2 B+

2200P_0603_50V7K

4.7U_1210_25V

4.7U_1210_25V

4.7U_1210_25V
0.1U_0805_25V7K

15U_D_25V
PR278

1
+

PC200

PC229
51_1206_5%

PC196

PC197

PC198

PC199
+5VALWP

2
+2.5V/+1.25V

PR299

0.1U_0805_25V7K
PC202
2.2_0603_5%

2.2U_0805_10V
PC201
+2.5V Ipeak =8.49A ~ 14.78A

PD34
8
7
6
5

DAP202U
+2.5VP
PQ79

2
SI4800DY_SO-8
4
DDR Termination Voltage

14

28

10U_1206_6.3V7K
PC203 PC204

PC205
12 17

VIN

VCC
SOFT1 SOFT2 PC224

1
2
3
PL22 PC206 0.01U_0603_50V7K 0.01U_0603_50V7KPC207 0.1U_0603_16V

2
C +2.5VP 4.7U_SPC-1205P-4R7A 0_0603_5% 0.1U_0805_25V7K C
8 6 BOOT1 BOOT2 23
7
6
5
PR279 0_0603_5% PR280 PQ81
@EC31QS04 PD35

0.1U_0805_25V7K FDS6984S
1

1
220U_D_4V_FP

PR281 5 24 0_0603_5% 4 5
UGATE1 UGATE2
1

+
PC208

PU20 +1.25VP
+
220U_D_4V_FP

@100_0603_5% PQ80 0_0603_5% PR282 4 25 PR283 3 6 PL23

PHASE1 PHASE2
PC209

4 1.5U_TPR6D38-1R5M
2

ISL6225 2 7 1 2
2

PR284 PR285
PC210

SI4810DY_SO-8 7 22 1 8
1K_0603_5% ISEN1 ISEN2 PR286
@1000P_0603_50V8J

1
2
3

2
220U_D_2V
PC213 2K_0603_5% @100_0603_5%

PC211
2 LGATE1 LGATE2 27
PR288 +
0.01U_0603_50V7K

PR287 0_0603_5%

1
PC214
18.2K_0603_1% 3 26 @1000P_0603_50V8J
PGND1 PGND2

9 VOUT1 VOUT2 20
10 VSEN1 VSEN2 19
8 21 PC212
EN1 EN2 SDREF 4.7U_0805_10V4Z
15 PG1 PG2/REF 16

GND

DDR

2
11 18 PC215
PR289 OCSET1 OCSET2 PC216
PR290 IS6225 4.7U_0805_6.3V6K @1000P_0603_50V8J

13

1
10K_0603_1% @10K_0603_5%
PC217 PR291
@1000P_0603_50V8J 51K_0603_1%

B +5VALWP B

+2.5VP

PR292
<30,33> SYSON 2 1
PR293
10K_0603_0.1%
0_0603_5%
PR294
2 1 SUSP# <16,27,30,33>

470P_0603_50V7K
+3VALWP

1
PC218
PR295 0_0603_5%
10K_0603_0.1%
1

2
PR296
10K_0603_5%
2

+2.5VPGD

A A

Dell-Compal Confidential
COMPAL ELECTRONICS, INC
Title
DDR POWER 2.5V & 1.25V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B Abacus/TangII LA-1452
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 38 of 43
5 4 3 2 1
 5 4 3 2 1

AC Adapter Detector

D D

AC Adapter LOW_PWR AC_LOW_PRES# AC_LOW_PRES2# IREF2

90W 0V 0 0 2.96V
VIN

VIN
70W Float 0 1 2.31V

1
PR170
10K_0603_5% +5VALWP
AIRLINE 20V 1 1 1.62V

0.01U_0603_50V7K
2

PC155

1
PR168

2
VIN 10K_0603_5%

2
C C
PU14A

8
LM393A

1
PC156 3 +
1
@1000P_0603_50V8J
2 2 - AC_LOW_PRES# <30>

4
+5VALWP
1

PR173
10K_0603_5% PR171

1
10K_0603_5%
PR169
2

VIN 10K_0603_5%
2

2
<34> LOW_PWR PU14B
8

LM393A
1

PC157 5 +
1

7 AC_LOW_PRES2# <31>
PR174 @1000P_0603_50V8J 6 -
2

10K_0603_5%
4
2

B B
1

PR172
10K_0603_5%
2

A A

Dell-Compal Confidential

Title
Adapter Detector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Abacus/TangII LA-1452 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 39 of 43
5 4 3 2 1
 A B C D E F G H

Different Pin Definition for ISL6215 in PU16 CPU_B+ PL17 B+

FBM-L18-453215-900-LMA 90T_1812
CPU_B+
+5VS
#6 RAMPS #12 ALTV #17 NODV +5VS

1
2200P_0603_50V7K
15U_D_25V

15U_D_25V

0.1U_0805_25V7K

47U_EC_25V
PC159

@10U_1210_25V

@10U_1210_25V
10U_1210_25V

10U_1210_25V
+ + +

PC230

PC231

PC160

PC161

PC162

PC163

PC164

PC165
#8 VMON #13 OFFSET #24 EN

2
5
6
7
8

5
6
7
8
PR300
#11 OCSET #15 VRTN #27 ALTEN PQ65
2.2_0603_5% IR7811A

2
4 4
#26 SOFT

0.1U_0805_25V7K
PR232 PR233
10K_0603_5% 1 2
1 PQ66 1
PU15

2
@0_0603_5%
4.7U_1206_25V
PC166
0_0603_5% IR7811A

1
2

PR236

PC167
6 VCC BOOT 2
PU16

3
2
1

3
2
1
0_0603_5% 3 1 1 2 PL18
PR238 PWM UGTE 0.6U_HK-AE26A0R6
2 1 1 VID0 VCC 28 +CPU_CORE
<6,8> CPU_VID0 ISL6207_EN 7 8 PR237 +CPU_CORE
EN PHSE

1
PR239 20_0603_5%1 2 22 0_0603_5%
<6,8> CPU_VID1 VID1 PWM1

1
4 GND LGTE 5

1
PR240 0_0603_5%

1PR244
2 1 3 23 PD28 PR241
<6,8> CPU_VID2 VID2 ISEN1

0.01U_0603_50V7K
@5.1_0805_5% PD29

5
6
7
8

2
1U_0805_25V
PR242 2 0_0603_5%
1 4 18 ISL6207 EC31QS04
<6,8> CPU_VID3 VID3 PWM3

5
6
7
8
PC168
PH6 EC31QS04

2
2

1
PR243 2 0_0603_5%
1 5 19 0_0603_5%

@100K_0603_5%
<6,8> CPU_VID4 VID4 ISEN3

2
PC169
4

2
<19,30> VGATE 25 21 4 PC170
PGOOD PWM2

2
PR246 0_0603_5% @1000P_0603_50V8J
24 20 PQ67 PQ68
NC ISEN2 SI4362DY_SO-8 SI4362DY_SO-8
<19> PM_DPRSLPVR 27 10
NC COMP

2
5.6N_0603_50V7K

3
2
1
PC171

47P_0603_50V8J PC172
17 9 PR245
NC FB

3
2
1
1
<15,19> PM_STPCPU# 6 ISL6219 8
1.96K_0603_1%
NC NC

1
2

1
PR247
11 NC VSEN 16 DE-POP all items in dash- area if
ISL6215is used for mobile CPU
2

1 PR249 2
4.7K_0603_1% 681_0603_1% 7.5K_0603_1%
@10K_0603_5% 12 15
NC NC

2
PR248
13 26 +5VS
NC NC
1

@3.09K_0603_1% CPU_B+

2200P_0603_50V7K
0.1U_0805_25V7K
7 14 PQ69
FSET/EN GND
1

5
6
7
8

5
6
7
8

1
2 @0.1U_0603_16V 2

15U_D_25V

15U_D_25V
1 PC179

10U_1210_25V

10U_1210_25V

10U_1210_25V

10U_1210_25V
2

+ +

5.6N_0603_50V7K
IR7811A

PC232

PC233

PC173

PC174

PC175

PC176

PC220

PC221
2

2
PC178

2
1 PR298 2
CPU_B+ PR250 PR251 4 4
1
2

0.1U_0805_25V7K
PR253
PR254
@10.2K_0603_1% @5.1_0603_5%
1 2

PR297
PQ70
1

1 PR257 2 2

1
PU17
2

2
90.9K_0603_1%

PR255 0_0603_5% IR7811A

0_0603_1%
PR252

PC180
6 VCC BOOT 2
1

1
2

@80.6K_0603_1%

3
2
1

3
2
1
1

2
PR258 PL19
1.15K_0603_5%
3 PWM UGTE 1 1 2
0.6U_HK-AE26A0R6 +CPU_CORE
1

+CPU_CORE

909_0603_1%
@3.24K_0603_1% 1 PH5 ISL6207_EN 7 EN PHSE 8 PR259
PQ71 0_0603_5% PQ72 PQ73
100K
1
2

5
6
7
8

5
6
7
8
DTC115EUA

@100K_0603_5% PR262
2 4 5 SI4362DY_SO-8 SI4362DY_SO-8
PR260 GND LGTE

2
1U_0805_25V

1U_0805_25V

@0.01U_0603_50V7K
PR261
2

1
100K
1.74K_0603_1%

@10K_0603_1% ISL6207 4 4 PH7 @5.1_0805_5%

+5VALWP
2

PC183
PD31
1

PC181

PR256

PC182
0_0603_5%

1
EC31QS04
1

1
1

2
2

PC184

2
PR265 PR266 @1000P_0603_50V8J

3
2
1

3
2
1

2
100K_0603_5%
10K_0603_5% PR263
1.43K_0603_1%
1

1 1

ISL6207_EN

1
+3VALWP PR269
1

100K_0603_5% 2
3 PQ74 3
1

2N7002 CPU_B+
3

+5VS

2200P_0603_50V7K
0.1U_0805_25V7K
PC185 PQ75

10U_1210_25V
2 PQ82

5
6
7
8

5
6
7
8

1
15U_D_25V

15U_D_25V

PC186

PC187

PC188

PC189
10U_1210_25V

10U_1210_25V

10U_1210_25V
2

0.1U_0603_16V 2N7002 + +

PC234

PC235

PC222

PC223
3

IR7811A

2
2
@280K_0603_1%
PR267

4 4
@300K_0603_5%

0.1U_0805_25V7K
PR272 PU18
PR268

+1.2VP PR270 PR271

1 2 PQ76
0_0603_5% 1.2VDD @5.1_0603_5% IR7811A
1 VIN VOUT 5
1

PU19
1

2
0_0603_5%
1

PC190

PC191
4 PG 6 VCC BOOT 2
4.7U_1206_16V PL20
2

3
2
1

3
2
1
1

4.7U_1206_16V
PC192

3 EN GND 2 3 PWM UGTE 1 1 2

0.6U_HK-AE26A0R6 +CPU_CORE
ISL6207_EN 7 8 PR273 +CPU_CORE
EN PHSE
2

PR274 CM2843 0_0603_5%

1
0_0603_5%
PR277

4 GND LGTE 5

5
6
7
8

5
6
7
8

2
+5VALWP PD32 PR275
2

PH8 @5.1_0805_5%
<30,33> VR_ON
@100K_0603_5%

@0.01U_0603_50V7K

PR301 ISL6207 EC31QS04

1U_0805_25V
2

100K_0603_5% 4 4 0_0603_5%

2
2

1
PC194

1
PC193

PQ77 PQ78
1

SI4362DY_SO-8 SI4362DY_SO-8 PC195

1

2
@1000P_0603_50V8J
1

2
PR276

3
2
1

3
2
1
1.5K_0603_1%
DE-POP PR249 PR256 PR268 PC171

1
4 4

ISL6219 PR247, PR255, PR260

for desk-top PR248, PR250,PR258, 3.48K 2 K 300K 6.8nF Dell-Compal Confidential
PC178,PC172,PR236 1.PH6,PH7,PH8 pop thermal resistor
2. Non-pop PR298 and PH5
PTC solution 3.PR297 0 ohm
COMPAL ELECTRONICS, INC
Title
ISL6215 PR266, PQ74, PQ71
6.04K 1.5K 130K 4.7nF +CPU_CORE
for mobile PR253, PC179, PR257 NTC solution
1.PH6,PH7,PH8 pop 1.5K resistor
2. Pop PR298 357_0603_1%,PR297 1.2K_0603_1% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
3. Pop PH5 3K thermal resistor
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B Abacus/TangII LA-1452 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Monday, August 26, 2002 Sheet 40 of 43
A B C D E F G H
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1

Item Fixed Issue Reason for change Rev. PG# Modify List B.Ver# Phase

1 Fireware issue The ICH4 GNTA# strap pull up for EC BIOS 0.1A 18 Depop R153, GNTA# have internal pull up 0.1 SST

D 2 Leakage current issue Reduce Broadcom 4401L leakage current 0.1A 22 Depop L39 and pop L7, conncetor power source from +3VALW 0.1 SST D
to +3V, R31, R32, R33 pull up to +3VAUXLAN
3 Fix schematics part value L21, L22, L23, L26 part value different with BOM 0.1B 15 Change L21, L22, L23, L26 part value from CHB2012U121 to 0.1 SST
BLM21A601SPT on schematics
4 BOM issue R445 include wrong part number 0.1B 33 Change R445 part number from SD028470200 to SD028680200. 0.1 SST
PN indicate value from 47K_0402_5% to 68K_0402_5%
5 HDD leakage current issue When AC in +5VSHDD will go up to 5V 0.1C 21 Q6 change to SI2302DS as schematics, SIDEPWR active low 0.1 SST
when HDD power on
6 Capture library package issue 2N7002 Drain is pin1, Source is pin3 0.1C 28 Fixed Q30, Q31, Q32 Capture libaray , pin1 fixed to pin3, 0.1 SST
pin3 fixed to pin1
7 BOM issue Fixed R196~R199 from 56.2K ohm to 56.2 ohm 0.1C 23 Change R196~R199 PN from SD014562207 to SD014562A00 on 0.1 SST
schematics
8 Fix LOM EEPROM issue U8 (AT93C46) is used X16 organization 0.1C 22 NC U8 pin6 for X16 organization select 0.1 SST

9 Fix CLKRUN# leakage issue ICH4 not implement CLKRUN#, GPIO24 is resume power well. 0.1D 19 Add a diode D46 to isolate GPIO24 from ICH4 to PCI devices, 0.2 PT
and depop D46.
10 LOM EEPROM issue U8 (AT93C46) is used X16 organization. U8 pin6 pull up or 0.1D 22 U8 pin6 pull up +3VAUXLAN via R452 , and depop R452. 0.2 PT
NC for X16 organization select, pull down for X8
organization selcet.

C 11 SW BD LED keep turn on SW BD LED control transistor Emitter conncet to +5VALW be 0.1D 32 Change JP5 pin9 from +5VALW to +3VS 0.2 PT C
keep LED always turn on
12 Fix VCCA_SM voltage drop issue Add current rating for VCCA_SM, VCCA_DPLL, VCCA_FSB 0.1E 10 Change L3, L4, L27, L28 from MLF2012DR68XT to FBM-L11-201209- 0.2 PT
(1.5VS) 121LMA05
13 Change address and control signals Change ddr address and control signal layout 0.1E 12,13 DDR address and control signals layout topology same the 0.2 PT
layout topology topology ddr data layout topology
14 Fix EE issue item 89 Signal COMP/B and Y/G connect error 0.1E 17 Swap COMP/B and Y/G to correct connection 0.2 PT

15 Fix EE issue item 91 BEEP# from EC should be high active 0.1E 28 Change net name BEEP# to BEEP 0.2 PT

16 Fix EE issue item 92 Fix FSB 400MHz when 845GL pop 0.1E 15 Add R455 (8.2K_5%) pull down for H_BSEL0 0.2 PT

17 Fix EE issue item 95 When AC insertion SUSP# may be floating before the KBC 0.1E 33 Add R456 (100K_5%) pull down SUSP# 0.2 PT
can programit.
18 Fix EE issue item 47 Provide enough current rating 0.1F 15 L22 and L26 change frome BLM21A601SPT (300mA) to 0.2 PT
FBM-L11-201209-121LMA05 (500mA) and depop L22
19 Card Bus power bead current rating not Provide enough current rating 0.1F 24 L5 and L6 change frome FBM-11-160808-800LMT_0603 (300mA) 0.2 PT
enough to FBM-L11-201209-121LMA05 (500mA)
20 Fix EE issue item 102 Fix Intel CPU FSB frequency issue 0.1F 10,15 H_SEL0 connect to R270 pin1 from CLK generator, HBSEL0 0.2 PT
B
connector to R270 pin2 from CPU. Depop R270 on GL board. B
21 Battery charge issue ACIN pull up +3VALW can't change power supplier to battery 0.1F 18 Depop R161 0.2 PT
when AC exit
22 NO Change PCMCIA connector 0.1F 24 Change PCMCIA conncetor from AMP_0-1376275-1 to 0.2 PT
JAE_JC21-BRB
23 Fix INTRUDER issue ESD protect for Q22 0.1F 32 Add C638, C639 for Q22 protection 0.2 PT

24 Remove PS2 connector No necessary 0.1G 29 Remove RP7, JP26 0.2 PT

25 Add debug port PE board have not pop minipci connector, we need a port 80 0.1G 33 Add R458, C637 and JP27 0.2 PT
debug tool
27 For cost save For cost save 0.1G 32 Depop C10, C229 (150U Poly Cap), add C641, C642 (100U 0.2 PT
Petit Cap)
28 It no need Use R19 pop and depop to control H_SEL0 high or low 0.1G 15 Remove R455 0.2 PT

29 Fix EE issue item 134 Change ddr address and control signal layout 0.1H 12,13 Change DDR address and control signal to go back SST 0.2 PT
topology topology
30 Fix EE issue item 149 Pop Petit Cap after EA test 0.1H 32 Depop C641, C642 and pop C10, C229 0.2 PT

A
31 Fix EMI issue EMI team's recommendation 0.1I 10 Pop R52, C79 for CLK_CLK_PCI_LAN; R428, C614 for 0.2 PT A
CLK_PCI_MINI; R406, C597 for CLK_PCI_LPC; R321, C395 for
CLK_ICH_66M

Compal Electronics, Inc.

Title
P.I.R History
Size Document Number Rev
ADY13 LA-1271 0.2

Date: Tuesday, August 27, 2002 Sheet 41 of 43

5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1

Item Fixed Issue Reason for change Rev. PG# Modify List B.Ver# Phase

32 Fix EE issue item 171 For CRT Hsync and Vsync to allow tuning 0.1I 17 Add series resistors R459, R460 for Hsync and Vsync 0.2 PT

D 33 No Schematic version change for PT build 0.2 ALL Change revision from 0.1I to 0.2 0.2 PT D

C C

B B

A A

Compal Electronics, Inc.

Title
P.I.R History
Size Document Number Rev
ADY13 LA-1271 0.2

Date: Monday, August 26, 2002 Sheet 42 of 43

5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1

Item Fixed Issue Reason for change Rev. PG# Modify List B.Ver# Phase

D 1 CPU_CORE can't power up Pin7 of PU16 can't be used as on/off control pin 0.1B 40 1. Change VCC power source of PU16 from +5VALWP to +5VS 0.1 SST D

Current limtited is about 37A while PH6,PH7,PH8 is 1.5K

2 current limited is not up to 60A that is not enough for design target.Because we don't use 0.1B 40 1. Change PH6,PH7,PH8 from 1.5K_0603_5% to 3K_0603_1% 0.1 SST
PTC resistor on PCB now, the value must be tuned later.

3 Turn on voltage of PQ19 is not eonugh Vgs of PQ19 is 2V while PR72 is 47K. That is not enough. 1. Change PR72 from 47K_0402_5% to 22K_0402_5% 0.1 SST
While PR72 is 22K, the Vgs can be improved to 2.5V. 0.1B 35

4 current rating is not enough. FBM-L11-322513-151LMAT is 5A that is not enough.So FBM 1. Change PL8 from FBM-L11-322513-151LMAT to 0.2 PT
-L18-453215-900LMA90T1812 is 9A that is better. 0.1B 35 FBM -L18-453215-900LMA90T1812.

5 Fix noise issue On SST PCB, we can sound some noise due to PC77, the
cernamic capacitor has sounded noise with thinner type. 0.1C 36 1. Change PC77 from 2.2U_1206_25V to 4.7U_1210_25V 0.2 PT

6 The transient response is too slow. We must to 1. Change PR249 from 3.48K_0603_1% to 5.76K_0603_1%.
Fix CPU_CORE Transient Response fail tune feedback resistor and capacitor to fix it. 0.1E 40 2. Change PR257 from 49.9_0603_1% to 1.1K_0603_1% 0.2 PT
3. Populate PC172 68PF_0603_50V.

C C
7 SDREF output voltage is over spec. Add bypass capacitor pallel pin18 of ISL6225 0.1E 38 Populate PC218 470P_0603_50V7K 0.2 PT

8 PG of CM28423 has a glitch

while VCC is ready and VR_ON is float Add pulldown resistor tie to GND while 0.2 PT
VR_ON is float that can be made sure the logic is low. 0.1E 40 Add PR301 100K_0603_1%

Change VCC power source of PU15, Negative voltage was observed on +5VALWP
9 PU17, PU19 from +5VALWP to +5VS when system powered off 0.1E 40 1. Change VCC power source of PU15, PU17, PU19 0.2 PT
from +5VALWP to +5VS
Prevent abnoral function OVP 1. Add PQ82 2N7002
10 caused by ISL6219 while system ISL6219 caused OVP when on/off pin 0.1E 40 2. Change PR232 from 5.1_0603_5% to 10K_0603_5%
powerwd off ; bouble pulses was observed changed from high to low level 3. Change PC168 from 1U_0805_25V to 0.01U_0603_50V. 0.2 PT
at output PW1, PW2, PWM3 of ISL6219 4. Depop PR251, PR270, PC183, PC194
5. Tie the EN pin of PU15, PU17, PU19 to Pin1 of PQ82

11
Fine-tune current sharing uneven current sharing found 0.1E 40 1. Change PH6, PH7, PH8 form 3K_0603_1% to 0_0603_5%
of CPU VR phase1,2,3 to have 2. Change PR245 from 0_0603_5% to 1.96K_0603_1% 0.2 PT
thermal balance 3. Change PR263 from 0_0603_5% to 1.43K_0603_1%.
4. Change PR276 from 0_0603_5% to 1.5K_0603_1%

B 12 Fine-tune CPU load-line with NTC Fine-tune CPU load-line with NTC 0.1E 40 1. Keep PR268 nonpop B

2. Change PR256 from 2K_0603_1% to 1.74K_0603_1%

3. Change PR297 from 0_0603_5% to 1.15K_0603_1%.
4. Change PH5from depop to 4.7K_0603_1%
5. Change PR298 from depop to 681_0603_1%
6. Change PR257 from 49.9_0603_1% to 909_0603_1% 0.2 PT
7. Change PC179 from 3900P_0603_50V to 5.6N_0603_50V
8. Change PR249 from 3.48K_0603_5% to 7.5K_0603_1%
7. Change PC171 from 6800P_0603_50V to 5.6N_0603_50V
8. Change PC172 from depop to 47P_0603_50V

13 Audio noise found

Still find root cause 0.1E 35, 36, 1. reserve 15U_D_25V capacitors on PC226-PC235, 0.2 PT
38, 40

1. change the size of PC212 from D size to 0805 and

14 PC212 location space change requested by ME to put a connector around 0.1E 38 pop 4.7U_0805_10V 0.2 PT

A A

Compal Electronics, Inc.

Title
PIR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPET

Size Document Number Rev

Abacus/TangII LA-1452 0.2

Date: Monday, August 26, 2002 Sheet 43 of 43

5 4 3 2 1
www.s-manuals.com