Professional Documents
Culture Documents
Question Paper Code:: Reg. No.
Question Paper Code:: Reg. No.
Reg. No. :
12. a) i) Design a network with four inputs and three outputs which realizes the
following functions.
F1(a, b, c, d) = Σm (11, 12, 13, 14, 15)
F2(a, b, c, d) = Σm (3, 7, 11, 12, 13, 15)
F3(a, b, c, d) = Σm (3, 7, 12, 13, 14, 15) (8)
ii) Explain the operation of the tristate TTL inverter. (8)
(OR)
b) i) Design a combinational logic circuit that will generate the square of all
the combinations of a 3-bit binary number. (8)
ii) Find the reduced POS form of the following equation
F(a, b, c, d) = Σm(1, 3, 7, 11, 15) + d(0, 2, 5). Implement using NAND logic. (8)
13. a) i) Design and implement a full adder with two half adders and an OR gate. (8)
ii) Design a combinational circuit with three inputs and one output. The
output is 1, when the binary value of the inputs is less than 3. The output
is 0 otherwise. (8)
(OR)
b) i) Design and implement a four bit magnitude comparator. (8)
ii) Implement the function F(A, B, C, D) = Σ(0, 1, 3, 4, 8, 9, 15) using a
multiplexer. (8)
15. a) i) Determine if there is any race condition in the following transition table : (8)
00 01 11 10
00 00 , 0 00 , 0 11, 1 01, -
01 00, - 11, - 01 , 0 01 , 0
11 00, - 11 , 1 11 , 1 01, -
10 - - - -
ii) State two rules of thumb for getting reasonably good state assignment. (8)
(OR)
b) i) Consider asynchronous sequential circuits with pulse inputs, state the
two restrictions that must be placed on the duration of the input pulses. (6)
ii) Design a static hazard free two level AND-OR gate network to implement
the switching function F = Σ(1, 3, 4, 5). (10)
–––––––––––––