*X62303*

Reg. No. :

Question Paper Code : X 62303

B.E./B.Tech. DEgREE ExamiNaTioNs, NoVEmBER/DECEmBER 2020
Third/Fourth/sixth/Seventh semester
Electronics and Communication Engineering
Cs 1251/Cs 1202 a – CompuTER aRChiTECTuRE
(Common to Computer science and Engineering,Electrical and Electronics Engineering
and Information Technology)
(Regulations 2004/2007)
(Common to CS1251 for B.E (part–Time) Third semester-Computer science and
Engineering and Fifth semester – Electronics and Communication
Engineering – Regulations 2005)

Time : Three hours maximum : 100 marks

Answer all questions

Part – A (10�2=20 Marks)

1. What is meant by Central Processing Unit (CPU) ?

2. Define Control Bus.

3. Draw the block diagram of n-bit ripple-carry adder.

4. What do you understand about von Neumann rounding ?

5. Compare horizontal and vertical format.

6. When does imprecise exception arise ?

7. Design a 1m × 16 memory using 512 k × 8 static memory chips.

8. Find average memory access time if the hit rate is 90% and access time for main
memory is 50 ns and cache is 5 ns. Find performance improvement.

9. Compare between memory mapped I/O and I/O mapped I/O.

10. What is an interrupt ? State its significance.

X 62303 *X62303*
Part – B (5�16=80 Marks)

11. a) Explain the different types of addressing modes with necessary example. (16)

(OR)
b) i) With necessary diagram, explain the basic functional units of a computer. (8)
ii) Write short notes on performance of a computer. (8)

12. a) i) Perform 25 × (–16) using booth’s multiplication algorithm. (8)

ii) What are the problems in floating point arithmetic ? (8)

(OR)

b) Describe the algorithm for integer division with suitable example. (16)

13. a) i) What are superscalar processors ? Explain the structure of a typical superscalar
processor. (10)

ii) Draw and explain the timing diagram for memory read operation. (6)

(OR)
b) i) Explain the basic organization of a microprogrammed control unit
and what modification is required in the basic organization to support
microprogram branching. (8)
ii) What are the three types of hazards that cause performance degradation
in pipelined processors ? Explain them in detail. (8)

14. a) Explain virtual memory and its management. (16)

(OR)
b) Explain in detail about cache memory and its mapping functions. (16)

15. a) What is the use of DMA controller ? Explain the function of DMA controller
with necessary diagram. (16)

(OR)
b) Describe in detail about standard I/O interfaces with necessary diagram. (16)

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