2SK3462

TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type (π-MOSV)

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2SK3462
Switching Regulator, DC/DC Converter and
Motor Drive Applications Unit: mm

• 4 V gate drive
• Low drain-source ON-resistance: RDS (ON) = 1.2 Ω (typ.)
• High forward transfer admittance: |Yfs| = 2.2 S (typ.)
• Low leakage current: IDSS = 100 μA (VDS = 250 V)
• Enhancement mode: Vth = 1.5~3.5 V (VDS = 10 V, ID = 1 mA)

Absolute Maximum Ratings (Ta = 25°C)

Characteristic Symbol Rating Unit

Drain-source voltage VDSS 250 V

Drain-gate voltage (RGS = 20 kΩ) VDGR 250 V
Gate-source voltage VGSS ±20 V
DC (Note 1) ID 3
Drain current Pulse (t = 1 ms) A
IDP 6
(Note 1)
JEDEC ―
Drain power dissipation (Tc = 25°C) PD 20 W
JEITA SC-64
Single pulse avalanche energy
EAS 36.2 mJ
(Note 2) TOSHIBA 2-7B1B
Avalanche current IAR 3 A Weight: 0.36 g (typ.)
Repetitive avalanche energy (Note 3) EAR 2 mJ
Channel temperature Tch 150 °C
Storage temperature range Tstg −55~150 °C

Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in temperature, etc.)
may cause this product to decrease in the reliability significantly even if the
operating conditions (i.e. operating temperature/current/voltage, etc.) are
within the absolute maximum ratings. Please design the appropriate reliability
upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/Derating Concept and Methods) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).

Thermal Characteristics

Characteristic Symbol Max Unit

Thermal resistance, channel to case Rth (ch-c) 6.25 °C/W

Thermal resistance, channel to ambient Rth (ch-a) 125 °C/W JEDEC ―

Note 1: Ensure that the channel temperature does not exceed 150°C. JEITA SC-64

Note 2: VDD = 50 V, Tch = 25°C, L = 6.7 mH, IAR = 3 A, RG = 25 Ω TOSHIBA 2-7J1B

Note 3: Repetitive rating: pulse width limited by maximum channel Weight: 0.36 g (typ.)
temperature

This transistor is an electrostatic-sensitive device. Handle with care.

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Electrical Characteristics (Ta = 25°C)
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Characteristic Symbol Test Condition Min Typ. Max Unit

Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ⎯ ⎯ ±10 μA

Drain cutoff current IDSS VDS = 250 V, VGS = 0 V ⎯ ⎯ 100 μA
Drain-source breakdown voltage V (BR) DSS ID = 10 mA, VGS = 0 V 250 ⎯ ⎯ V
Gate threshold voltage Vth VDS = 10 V, ID = 1 mA 1.5 ⎯ 3.5 V
Drain-source ON-resistance RDS (ON) VGS = 10 V, ID = 1.5 A ⎯ 1.2 1.7 Ω
Forward transfer admittance ⎪Yfs⎪ VDS = 10 V, ID = 1.5 A 0.5 2.2 ⎯ S
Input capacitance Ciss ⎯ 267 ⎯
Reverse transfer capacitance Crss VDS = 10 V, VGS = 0 V, f = 1 MHz ⎯ 32 ⎯ pF

Output capacitance Coss ⎯ 98 ⎯

Rise time tr 10 V ID = 1.5 A VOUT ⎯ 5 ⎯

VGS
0V
Turn-on time ton ⎯ 20 ⎯
RL = 67 Ω
Switching time 4.7 Ω ns
Fall time tf ⎯ 5 ⎯
VDD ∼
− 100 V
Turn-off time toff ⎯ 30 ⎯
Duty <
= 1%, tw = 10 μs
Total gate charge Qg ⎯ 12 ⎯
Gate-source charge Qgs VDD ∼
− 200 V, VGS = 10 V, ID = 3 A ⎯ 6 ⎯ nC

Gate-drain charge Qgd ⎯ 6 ⎯

Source-Drain Ratings and Characteristics (Ta = 25°C)

Characteristic Symbol Test Condition Min Typ. Max Unit

Continuous drain reverse current

IDR ⎯ ⎯ ⎯ 3 A
(Note 1)
Pulse drain reverse current (Note 1) IDRP ⎯ ⎯ ⎯ 6 A
Forward voltage (diode) VDSF IDR = 3 A, VGS = 0 V ⎯ ⎯ −2.0 V
Reverse recovery time trr IDR = 3 A, VGS = 0 V, ⎯ 125 ⎯ ns
Reverse recovery charge Qrr dIDR/dt = 100 A/μs ⎯ 470 ⎯ nC

Marking

K3462 Part No. (or abbreviation code)

Lot No.

A line indicates
lead (Pb)-free package or
lead (Pb)-free finish.

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ID – VDS ID – VDS
3 6
Common source 6 Common source 15 6
8 4.6 5.5
Tc = 25°C 10 Tc = 25°C
Pulse test Pulse test 8
10

15 4.4
Drain current ID (A)

Drain current ID (A)

5
2 4
4.2

4.5
VGS = 4 V

1 2
VGS = 4 V

0 0
0 2 4 6 0 10 20 30

Drain-source voltage VDS (V) Drain-source voltage VDS (V)

ID – VGS VDS – VGS

6 10
Common source Common source
VDS = 10 V Tc = 25°C
Pulse test
5 Pulse test
VDS (V)

8
Drain current ID (A)

4
6
Drain-source voltage

3
3A
4
2
25

Tc = −55°C 2
1 ID = 1 A
100

0 0
0 1 2 3 4 5 6 0 4 8 12 16 20

Gate-source voltage VGS (V) Gate-source voltage VGS (V)

⎪Yfs⎪ – ID
10
Common source RDS (ON) − ID
VDS = 10 V 10
(S)

5 Pulse test Common source

Tc = 25°C
Forward transfer admittance ⎪Yfs⎪

Tc = −55°C 5 VGS = 10 V
3
25 Pulse test
3
100
Drain-source ON-resistance

1
RDS (ON) (Ω)

0.5
0.5
0.3
0.3

0.1 0.1
0.1 0.3 0.5 1 3 5 10 0.01 0.03 0.1 0.3 1 3 10

Drain current ID (A) Drain current ID (A)

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RDS (ON) – Tc IDR – VDS
5 100
(Ω)

Common source Common source

VGS = 10 V Tc = 25°C
Pulse test
Drain-source ON-resistance RDS (ON)

Pulse test

(A)
4
ID = 3 A

Drain reverse current IDR

10
3

ID = 1 A
2
VGS = 10 V
1

1
5
3 0, −1
0 0.1
−80 −40 0 40 80 120 160 0 −0.2 −0.4 −0.6 −0.8 −1.0 −1.2 −1.4

Case temperature Tc (°C) Drain-source voltage VDS (V)

Capacitance – VDS Vth – Tc

10 5
Common source
VDS = 10 V
ID = 1 mA
Pulse test
4
Ciss
Vth (V)
(pF)

100
3
Capacitance C

Coss
Gate threshold voltage

2
Crss
10
1

Common source 0
VGS = −80 −40 0 40 80 120 160
1
0.1 0.3 1 3 10 30 100 Case temperature Tc (°C)

Drain-source voltage VDS (V)

PD – Tc Dynamic input/output characteristics

40 250 25
Common source
ID = 3 A
Tc = 25°C
Drain power dissipation PD (W)

Pulse test
VDS (V)

VGS (V)

200 20
30

150 15
Drain-source voltage

Gate-source voltage

100
20
50 VDD = 200 V
100 10

10
50 5

0 0 0
0 40 80 120 160 200 0 5 10 15 20 25

Case temperature Tc (°C) Total gate charge Qg (nC)

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rth – tw
10
Normalized transient thermal impedance
5
3

1
rth (t)/Rth (ch-a)

Duty = 0.5
0.5
0.3 0.2

0.1 PDM
0.05 Single pulse
0.1 t
0.05 0.02
T
0.03 0.01
Duty = t/T
Rth (ch-c) = 6.25°C/W
0.01
10 μ 100 μ 1m 10 m 100 m 1 10

Pulse width tw (S)

Safe operating area EAS – Tch

100 100

50
Avalanche energy EAS (mJ)

30 80

10 60
ID max (pulsed) *
5 100 μs *
(A)

ID max (continuous)
3 1 ms * 40
Drain current ID

DC
1
20

0.5

0.3 0
25 50 75 100 125 150

0.1 Channel temperature (initial) Tch (°C)

* Single nonrepetitive pulse
0.05
Tc = 25°C
0.03 Curves must be derated linearly
BVDSS
with increase in temperature. 15 V
VDSS max
IAR
0.01 −15 V
1 3 5 10 30 50 100 300 500 1000
VDD VDS
Drain-source voltage VDS (V)

Test circuit Waveform

RG = 25 Ω 1 ⎛ B VDSS ⎞
Ε AS = ⋅ L ⋅ I2 ⋅ ⎜ ⎟
VDD = 50 V, L = 6.7 mH 2 ⎜B − ⎟
⎝ VDSS VDD ⎠

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RESTRICTIONS ON PRODUCT USE 20070701-EN

• The information contained herein is subject to change without notice.

• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc.

• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his
document shall be made at the customer’s own risk.

• The products described in this document shall not be used or embedded to any downstream products of which
manufacture, use and/or sale are prohibited under any applicable laws and regulations.

• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patents or other rights of
TOSHIBA or the third parties.

• Please contact your sales representative for product-by-product details in this document regarding RoHS
compatibility. Please use these products in this document in compliance with all applicable laws and regulations
that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses
occurring as a result of noncompliance with applicable laws and regulations.

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