vili Programmable Logle Controllers and Industrinl Autotna

ntlon: An
2.3
24
Numbering System of Inputs ant Outputs
Pogram Rormat
Iritrty
25 ntroduction to Logic
2.5.1 Fquivalent Ladder Diagram of AND Gate
2.5.2 Equivalent Ladder Diagram of OR Gate
2.5.3 Equivalent Ladder Diagram of NOT Gate
2.5.4 Equivalent Ladder Diagram of XOR Gate
2.5.5 Equivalent Ladder Diagram of NAND Gate
2.5.6 Equivalent Ladder Diagram of NOR Gate
2.5.7 Equivalent Ladder Diagram to Demonstrate De Morgan's Therwe
2.6 Ladder Design orem
Sobed Problems
Exercises
27 Switches
Sobed Problems
Chapter 3 PLC Timers and Counters
3.1 Definition and Classification of a Timer
3.2 Characteristics of a PLC Timer
3.2.1 Punctions ina Timer
3.2.2 Resetting-Retentive and Non-retentive
3.3 Classification of a PLC Timer
3.4 On-Delay and Off-Delay Timers
3.5 Timer On-Delay
3.6 Timer Off-Delay
3.7 Retentive and Non-retentive Timers
3.8 Format of Timer Instructions
Solved Problems
3.9 PLC Counter
3.10
Operation of a PLC Counter
3.11 Counter Pararneters
3.12 Overview of Counter Instructions
3.12.1 Count Up (CTU)
3.12.2 Count Down
Solued Problems (CTD)
Exercises
Chapter 4 Advanced
4.1 Introduction Instructions
4.2 Conparison Instructions
 4.3 Discussions on Comparison lnstruc tions
4.3.1 "EQUAL" or "EQU" Instruction
4.3.2 "NOT EQUAL" or "NEQ" Instruction
4.3.3
"LESS THAN " or "LES" Instrnuction 54
4.3.4 "IESS THAN OR EQUAL" or "LEQ" Instruction
"GREATER THAN" or "GRT" Instruction 55
4.3.5
4.3.6 "GREATER THAN OR EQUAL TO" or "GRQ" Instruction
4.3.7 "MASKED cOMPARISON FOR EQUAL" or "MEQ" Instruction
4.3.8 "LIMIT TEST "or "LIM" Instruction
Sohed Poblems
57

44 Addressing Data Files

45 Format of Logical Address
59
4.6 Addressing Format for Micrologic System
60
4.7 Different Addressing Types
Word within an Integer File 60
4.7.1
Bit within an Integer File 60
4.7.2
Bit within a Bit File 61
4.7.3
Data Movement Instructions
62
4.8
4.9 Logical Instructions
62
Main Features of Logical Instructions 62
4.9.1
Logic AND Instruction
63
4.9.2
Logic OR Instruction 64
4.9.3
65
4.9.4 Logic Exclusive OR Instruction
Logic NOT Instruction 66
4.9.5
Logic NEGATE Instruction 66
4.9.6
67
Solved Problems
69
4.10 Mathematical Instructions
69
4.10.1 Main Features of Mathematical Instructions
4.10.2 Logic ADD Instruction 70
4.10.3 Logic SUB Instruction 71
Logic MUL Instruction 72
4.10.4
4.10.5 Logic DIV Instruction 72
4.10.6 Logic DDV Instruction 73
4.10.7 Logic CLR Instruction 74
4.10.8 Logic SQR Instruction 74
Solved Problems 74
76
4.11 Special Mathematical Instructions

4.11.1 Main Features of Special Mathematical Instrucions

76
4.11.2 Scale with Parameters or SCP Instruction 78
 Automation: An Introduc
Industrial.
and
C o n t r o l l e r s

Logic
P r o g r a m m a b l e

I n s t r u c t i o n
79
SCL
Scale
Data or
I n s t r u c t i o n 80
4.11.3 or
ABS
Absolute I n s t r u c t i o n

4.11.4 CPT
Compute
or
I n s t r u c t i o n
81
4.11.5
Swap
or
SWP
Instruction
81
4.11.6 ASN
Arc Sine o r Instruction 82
4.11.7 ACS
Cosine o r 33
Arc Instruction

4.11.8 o r ATN
Arc Tangent
4.11.9 Instruction

Cosine o r COS 4
Instruction
4.11.10 LN
or
Natural Log Instruction

4.11.11 10 o r LOG
Base
4.11.12 Log to the 85
Instruction

4.11.13 Sine or SIN

Instruction
86
TAN
4.11.14 Tangent or
XPY
Instruction 87
Y or
4.11.15 X to the
Power
87
Instructions
Data Handling
Instructions 88
4.12 of Data Handling
4.12.1 Main Features
Instruction
90
o r TOD
Convert to BCD 91
4.12.2 Instruction
BCD o r FRD
Convert from 2
4.12.3 or DEG Instruction
Radian to Degrees 92
4.12.4 Instruction
Radian o r RAD
4.12.5 Degrees to Instruction 3
Decode 4 to I of
16 or DCD
4.12.6 93
ENC Instruction
4.12.7 Encode I of 16 or 3
COP Instruction
Copy a File or
4.12.8 94
Fill File or FLL Instruction
.12.9 94
Instruction
4.12.10 Move or MOV 95
or MVM
Instruction
4.12.11 Masked Move 95
Instruction
4.12.12 FIFO Load or FFL 95
Instruction
4.12.13 FIFO Unload or FFU 6
4.12.14 LIFO Load or LFL Instruction 96
4.12.15 LIFO Unload or LFU Instruction
97
4.13 Program Flow Control Instructions
97
4.13.1 Main Features of Program Flow Control Instructions
97
4.13.2 Jump or JMP and Label or LBL Instruction 98
4.13.3 Temporary End or TND Instruction
4.14 Proportional Integral Derivative (PID) Instruction
4.14.1 PID Control
4.14.2 PID Equation
4.14.3 PID Instruction

Chapter 5 PLC Input 100

Output (1/0) Modules and Power Supply 100
5.1 Introduction
5.2 Classification of VO Modules 100
 CHAPTER3

COUNTERS
TIMERS AND
PLC

Classification of a Timer
3.1 Definition and unng its ON or OFF
time delay in a circuit or a system
is device that introduces a
e r aTimers can be classified as follows:
condition.

aElectromechanical timers, Gi) (ii) PLC timers.

Electronic timers,

timer uses an oil dashpot or a spring

to introduce a time delay as

An electromechanical electronic
timer uses a n circuit for
An electronic
Soon as an electrical signal initiates it. introduced by programmina
PLC timer, the time delay is
incorporating a time delay and in a

3.2 Characteristics of a PLC Timer

shown in Fig. 3.1.
The schematic diagram of a function block PLC timer is

TIMER
(EN)
Timebase (DN)
Preset
Accumulator

Fig. 3.1 Schematic Diagram of a Function Block PLC Timer

The contacts on the left side of the timer function block are the
timer enable contac
When they are closed, power passes to the left terminal of the timer, its clock is enabled
it starts tining. When they are
a
open, power stops flowing through this terminal, and the
stops functioning. u
 35
PLC Tmers and Counters

A timer function block has three output contacts. When the timer is tirned out, Done Bt
(DN) is set. The enable bit follows the input enable contact status. 1f the enable contact is true
then output Enable Bit (EN) is true. The Timer Timing (TT) bit is set when the tirner is operatirng

3.2.1 Functions in a Timer

One outstanding feature of programmable timer is the variety of time base available. Most
three time bases. The most time bases 0.01 0.1 sec and
PLCS offer two or common are sec,
1 sec. intervals.
Accumulator value (ACC) - This is the time that has elapsed, since the tirmer was last
reset. When enabled, a timer updates this continually
Preset value (PRF) - This specifies the value that the timer must reach before the
controller sets the done bit. The programmer determines the preset time. When the
accumulator value becomes equal to or greater than the preset value, the timer stops operating
accumulator
and the done bit is set. This bit can be used to control an output device. Preset and
values for timers range from 0 to +32, 767. If a timer preset on accumulator value is a negative
number, a run time error occurs.

3.2.2 Resetting - Retentive and Non-retentive

When the accumulative value of a timer is to be in the reset condition. When

0, it is said
the timer's accumulative values are reset to zero each time the input enable contact is open,
non-retentive timer. The timer does not retain or remember the accumulative
it is said to be a
value when the enabled contacts are opened.
timer or
There may be times in an industrial process when one wants to retain the
remember the accumulative value the timer has reached even though the
enabled contacts
are opened. For instance, a person wants to keep
track of the total running time of a motor
over one year. The motor may only run three or
four hours a day and may turn on and off
zero when its enabled
several times. A retentive timer does not reset its accumulative value to
contacts are opened. Instead, it remembers or
retains its accumulative value. Opening its enable
contacts only stopsthe timer from running. In order to reset the retentive timer a reset
instruction is used.

3.3 Classification of a PLC Timer

PLC timers are classified as shown in Fig. 3.2.

3.4 ON-Delay and OFF-Delay Timers

Timer (TON or TDE)
As shown in Fig. 3.2, there are two types of delay timers i.e. ON Delay
and OFF Delay Timer (TOF or TDD). If the timer contact is made ON after lapse
of a certain
time counted from the instant of energisation of the timer coil, that timer is called an ON delay
from the instant
timer. If the timer contact is made OFF after lapse ofa certain time counted
of de-energisation of the timer coil, that timer is called an OFF delay timer.
 36 Programmable ogic Controllers and Ineduntrial Automaton:
An Introe
PLC TIMER
rodutm

ON Delay Tiner
OFF Delay Timer

Retentive Non Retentive Retentive Non Retentive

FHg. 3.2 Classification of PLC Timers

3.5 Timer ON-Delay

This instruction is used to
delay turning an output on or off. The TON instruction begins
to count time base intervals when the
rung condition becomes true. As long as the rung
condition remains true the timer increments
its accumulator value, over each scan until
reaches the preset value. The accumulator value is
reset when the rung condition becomes
false, regardless of whether the timer has timed out. The schematic
is shown in Fig. 3.3, and the timer functions are shown in Table
diagram of such a timer
3.1.

TON
TIMER On-Delay EN-
Timebase
Preset DN
Accumulator (TT

Fig. 3.3 Function Block of an ON-Delay Timer

Table 3.1 Functlons of an ON-Delay Timer

Output bit Is set when Remains set until use

of the following

Tirner Done Bit (DN) Accumulator value is normally
greater than the preset value.
Tirner Enable Bit (EN) Rung conditions are true.
Timer Tining Bit (TT) Rung conditions are true and the
all values are less than the
PRESET value.
Rung condition becomes false.
Rung conditions become false.
Rung conditions become false
or when the done bit is
set.
PLC Timers and Counters 37

3.6 Timer OFF-Delay

This instruction is used to delay turning an output on or of. The TOF instruction begins
to count time base intervals when the rung condition nakes a true-to-false transition. As kong
as the run8 condition remains false the timer increnents its accunulator value over each scan
until it reaches the preset value. The controller resets the accumulated value wthen the run
condition becomes true regardless of whether the timer has timed out. A schematic diagram
of such a timer is showm in Fig. 3.4. and the timer functions are shown in Table 3.2.

TOF
Timer OFF-Delay
Time base
Preset
Accumulator

Fig. 3.4 Function Block of an OFF-Delay Timer

Table 3.2 Functions of an OFF-Delay Timer

Output bit Is set when And remaining set until one

of the following

DN Rung conditions are true. Rung condition becomes false

and the accumulator value is
greater than or equal to the
preset value.
TT Rung conditions are false and the Rung conditions become true
accumulator value is less than the or when the done bit is set.
preset value.

EN Rung conditions are true. Rung conditions become false.

3.7 Retentive and Non-Retentive Timers

The Retentive Time (RTO) instruction is used to turn an output on or off after its timer
has been on for a preset time interval. The RT0 instruction is a retentive instruction that lets
the timer stop and start without reseting the accumulated value. The RTO instruction retains
its accumulated value when any of the following occurs:
(i) The rung condition is false
(i) The controller loses power
(ii) A fault occurs

To reset the retentive tirner accumulated value and status bit after the RTO rung becomes
false, a reset (RES) program is carried out. The timer function is shown in Table 3.3.
38 Programnable Logle Controllers and Industrial Automation: An Introduction

Table 3.3 Punctlons of a Retenttve T\mer

Output blt Is set when And remaining set until one

of the following
DN The accumulator value is equal to or The appropriate RES
greater than the preset value. instruction is enabled.
Rung conditions are true and Rung conditions become false
the accumulator value is less than or DN bit is set.
the preset vale.
EN Rung conditions are true. Rung conditions become false.

RESET (RES) When the reset instruction is executed, it resets the data having the same
address as the RES instruction.
Using Reset instruction
Accumulator value is reset to 0
DN bit is reset
TT bit is reset
EN bit is reset

Function block
Each timer address is made up of a 3word element. Word '0' is the control word, Word
T stores the preset value and Word 2' stores the accumulated value.
EN timer enable bit
TT timer timing bit
DN -timer done bit
Table 3.4 Explanation of Tmer Words
15 14 13 12 11 109 8
Word 0 EN T DN Internal bit
Word 1 Preset value (PRE)
Word 2 Accumulator value (ACC)

EN, TT, DN are bit storage. EN is stored in bit 15 Word 0', TT is bit 14 and DN is bit 13
of Word 0. 0-7 bits of Word 0 are the internal bits. Each preset value (PRE) and accumulated
value (ACC) are 16 bit Words stored in Word I and Word 2 of the timer file.
PLC Tmers and Counters 39

3.8 Format of Timer Instructions

The fomat of timer instructions along with the meaning of different terms is show in
Table 3.5.

Table 3.5 Format of Tmer Instructlon

T
b
Timer File Element Element Word Sub element Bit Bit
file number. delimiter number delimiter
delimiter
Typical file
no is 4 for
Typically
for micro
micro logix 1000
logix 1000 range is
controller 0-39
Some examples of such înstructions are as follows:
T 4:0/15 or T 4:0/EN Enable bit
T4:0/13 or T4:0/DN - Done bit
T4:0.1 or T4:0. PRE - Preset value of time

T4:0.1/0 or T4:0.PRE/0 Bit 0 of the preset value

Problem 3.1: Draw a ladder diagram for a two-motor system having the following conditions:
(1) Starting push button starts motor -
(2) After 10 seconds, motor-2 is ON
(3) Stopping the switch stops motor 1 and 2
Time base = 1 sec.

Input Output
Start I:0/10 M1 = 0:0/1
Stop I:0/1 M2 = O:0/2

Based on the above inputs, outputs and time base, the ladder diagram has been
developed as shown in Fig. 3.6.

I:0/10 I:0/1 O:0/1

O:0/1

0:0/1
TON E
T4:0
Time Base Is
DN
Pr-10

T4:0/DN O:0/2

Fig. 3.6 Ladder Diagram for Problem 3.1

 Controllers and Industrial Automa.
40 Programmable Logic omation: An Introd
ladder diagram for a two-motor systerm having the
ne
Problem 3.2: Draw

The start
a

switch starts motors 1 and 2. The stop switch stops motor 16..
ollowing
irst, after
motor 2 stops. \s *
Input Output
M1 = O:0/1
Start= 1:0/1
Stop= 1:0/2 M2=O:0/2
Based on the above inputs and outputs, the ladder diagram has been des.

in Fig. 3.7.
developed as stsh
1:0/1 1:0/2 O:0/1

TOF
O:0/1
T4:1
Time Base Is
Pr-15

T4:0/DNN O:0/2

Fig. 3.7 Ladder Diagram for Problem 3.2

Probiem 3.3: Draw a ladder diagram for a two-motor system having the following conditions

The start svwitch starts motor 1; and 10 seconds later motor 2 starts; the stop switchstos
motor 1 and 15 seconds later motor 2
stops.
Input Output
Start = I:0/1
MI = O:0/1
Stop = I:0/2
M2= O:0/2
 Timers and Counters
41
PLC

Based above inputs has been developed as

on
the
3.8.
and outputs, the ladder diagram
shown in Fig.

I:0/1 I:0/2 O:0/1

TON
1:0/1
T4:0
Time Base is
Pr-10

TON
1:0/1
T4:1
Time Base 1s
Pr-15

T4 0/DN O o/2

L T4 1/DN 0 / 2
Ladder Diagram for Problem 3.3
Fig. 3.8

conditions:
for a three-1notor systen having the following
Problem 3.4: Draw a ladder diagram
(M1) starts, when M2 is running, Motor
start 5 seconds after Motor 1
Motor 2 (M2) can

3 (M3) can be started.

both M2 and M3 stop.
turmed off, M3 is off. When MI is turned off,
When M2 is
 Programmable Logle Controllers and lndustrlal Autounation: An latruduetion
42

lo develop the ladder diagram, the following inputs and outputs are conskdered

Input Output
Start :0/10 MI MI O:00
Stop :0/1uorMI1
Start I2For N2 M2 O:0/1
Stop =l:0/13
Start 1014For M3 M3 O:0/2
Stop =:0/15 For M3
Based on the above inputs and outputs, the ladder diagram has been developed as shown
in Fig. 3.9.

I:0/10 1:0/11 0.00

0:0/0

TON
O:0/0
T4:0
Time Base ls
Pr5

T40/DN 1:0/12 1:0/13 0:0/1

O:0/1
I:0/14

0:0/1 1:0/15 O:002

0:0/2
Fig. 3.9 Ladder Diagram for Problem 3.4

Problem 3.5: Draw a ladder diagram for a three-motor system having the folowing concitions
Motor 1 (M1) starts as soon as the start switch is on; after 10 seconds, Ml goes ofl aid
motor 2 (M2) starts. After 5 seconds, M2 goes off and M3 starts. After 10 seconds, M3 goes off
MI starts and the cycle is repeated.
PLC Tmers and Counters 43

To develop the ladder diagram, following inprts and onutputs are considered:
Input Output
Start=1:0/1 M1 = O:0/1; M2 = O:0/2; M3 = O:0/3; Systern=O:0/4
Stop l:0/2
Based on the above inputs and outputs, the ladder diagram has been deveoped as shwn
in Fig. 3.10.

1:0/1 I:0/2 O:0/4

0:0/4 TON
T4:2/DN
T4:0
Time Base Is
| Pr=10
T4:0/DN|TON
HH T4:1
Time Base 1s
Pr-5

T4:1/DN TON
T4:2
TimeBase 1s|
Pr 10
T4:0/TT O:0/1
T4:1/TT O:0/2

T4:2/TT O:0/3

Fig. 3.10 Ladder Diagram for Problem 3.5

Problem 3.6: Draw a ladder diagram for a three-motor system having the following conditions:
off and
Motor 1 (M1) starts as soon as the start switch is on, after 10 seconds, M1 goes
off and
M2 starts. After 5 seconds, M2 goes off and M3 comes on. After 10 seconds, M3 goes
M2 comes on; and after 5 seconds, M2 goes off and M1 comes on, and the cycle is repeated.

considered.
To develop the ladder diagram, the following inputs and outputs are

Input Output
Start I:0/1 M1 = 0:0/1; M2 = O:0/2; M3 = 0:0/3; System=0:0/4
Stop = I:0/2
44 Programmable Logie Controllers and Industrial
Automation: An lIntroduuti

Baxed on the alwe inpmits anul outuls, tlhe ladder diagran Jhas been devekped as shrses

in Fig 31

102 O04

JON
140
limeBase Is
O04 14 DN
P10

TON
T4:1
TimeBase Is
14:0DN Pr 5

TON
T4:2
Time Base 1s
T4:1 DN
Pr- 10

TON
T4:3
Time Basc ls
T4:2/DN
Pr5

T4:0/TT O:0/1

O:0/2

14:3/TT

T4:2 TT O:0/3

Fig 3.11 Ladder Diagram for Problem 3.6

PLC Timers and Counters 45

Problem 3.7: Draw a ladder diagram for an agitator-motor system having the foliowing
conditions:

Agitator starts; After 5 seconds the pump can be started; when the pump is switched ofi,
the agitator also stops; when the agitator goes off, it cannot be started for 3 seconds.

To develop the ladder diagram, the following inputs and outputs are considered.
Input Output
Start Switch = !:0.1
Agitator on = 1:0/10; Agitator off = 1:0/11 Agitator = 0:0/1
pump on = I:0/12 ; pump off I:0/13 Pump O:02

Based on the above inputs and outputs, the ladder diagram has been developed as shown
in Fig. 3.12.

I:0/10 T4:1/DN 0:0/1

0:0/1 I:0/11 I:0/13

TON
T4:0
Time Base Is DN
Pr-5
0:0/2
I:0/12
T4:0/DN H
H
O:0/2 I:0/13

TON
T4:1
TimeBase Is
Pr-3
3.12 Ladder Diagram for Problem 3.7
Fig.
circuit
Problem 3.8: Blinking indicator lights are used quite extensively in industry. Design a

alternately every 5 seconds.

In which wo lights are lashed
and outputs are considered.
the ladder diagram, the following inputs
To develop
Output
Input
1= 001: Light 2 = 0:02
Start 1:0/1 Light
46 Programmable Logic Controllers and Industrial Automation: An Introduction
on

Starting Light 2
Instant

1:0/1 T4:1/DN TON EN Light

T4:0
Time Basc ls
Pr-5

TH:0DN 0:0/24 -

T4:0/TT

T4:0/DN TON EN
T4:1
Time Base Is
Pr-5

Pulse width = One

Scan cycleC

Fig. 3.13 Ladder Diagram for Problem 3.8

Based on the above inputs and outputs, the ladder diagram has been developed as
shown in Fig. 3.13.

3.9 PLC Counter

In the manufacturing process industry, it is always necessary to count the number of items
produced, and the number of operations performed (either of one particular operation or a
combined number of a few operations). In such operations, counters are used. An electro
mechanical counter comprises solenoids, springs, lever mechanisms etc. for counting an acton
and recording it. This has the disadvantage that, failure of any part of the counter leads to errors
in its readings. On the other hand, a counter in a PLC utilises a sensor to count operations,
which is processed by software execution in the PLC. Thus, the failure rate is reduced and the
accuracy level is increased in a PLC counter. The 'range of count' of a PLC counter is much
larger than that of an electromechanical counter.

3.10 Operation of a PLC Counter

The counter instructions operate in a similar manner to those of the timer instructions in
the PLC. The major difference between the counter and the timer is that tinmer instructions will
continually increment its accumulative value at a rate determined by the tinme base when the
enable contact is on. On the other hand, the counter must see a complete contact transition
from 0 to 1 each time it increments the accumulative value. This means that the contact must
return to its zero state before it can have a transition for a second time. In a counter, the contact
PLC Timers and Counters 47

can stay closed for any amount of time after a transition. What is important is that the transition
has taken place.

3.11 Counter Parameters

In general, a PLC counter has two parameters: (a) The accumulator value (ACC) and (b)
The Pre-set value (PRE).
(a) The accumulator value (ACC) is the number of false-to-true transitions that have occurred
since the counter was last reset.
b) The preset value (PRE) specifies the value that the counter must reach, before the controller
sets the done bit. When the accumulator value becomes equal to or greater than the preser
value, the done status bit is set. This can be used to control an output device.

Preset and accumulated values for counters range from-32,768 to +32,767 and are stored
as signed integers. Negative values are stored as 2's compliment form.

3.12 Overview of Counter Instructions

Each counter address is made up of a 3-word data file element. Word 0' is the control
word, continuing the status bits of the instruction, Word 1 is the preset value and Word 2 is
the accumulated value.
The addressing format is shown in Table 3.7.

Table 3.7 Format of Counter Instruction

Counter file File number. Element delimiter Element number

Typical file number is 5 (ranges from 0 39)
Each counter data file consists of three word data file elements. Word 0 is the control word
containing the status bits of the instruction. Word 1 is the preset value and Word 2 is the
accumulated value. The counter data file format is shown in Table 3.7(a).

Table 3.7(a) Format of Counter Data File

15 14 13 12 11 10 9 8 7

Word 0
cuCD DN Ihternal use
Word 1 Preset value (PRE)
Word 2 Accumulator value (ACC)

CU' is count-up bit, 'CD' is count down bit and 'DN' is done bit. A few counter instructions
are given in the subsequent sections.
 48 Programmable Logic Controllers and Industrial Automation: An Introduction

3.12.1 Count Up (CTU)

The CTU is an instruction that counts false-to-true rung transitions. Rung transition
can
caused by events occurring in the program (from internal logic or by external field
devices)
When the rung condition for a CTU instruction has made a false to true
transition, the
accumulated value is incremented by one count, provided that, the rung
containing the CTu
instruction is evaluated between these transitions. The ability of the counter to detect a
false-
to-true transition depends on the speed (frequency) of the incoming signal. The on and off
duration of an incoming signal must not be faster than the scan time.
The accumulated value is retained when the rung condition again
becomes false, The
accumulated count is retained until cleared by a reset (RES) instruction that
has the same
e
address as the counter reset.
The accumulated value is retained after the CTU instruction
becomes false, or when the
power is removed from, and then restored to, the controller. Also the on or
off status of a
counter done, overflow and underflow bits is retentive. The
accumulated value and
are reset when the control bits
appropriate RES instruction is enabled. The function block of a
CTU is shown in Fig. 3.14. count-un

CTU
Count up
Counter
Preset
Accumulator
Fig. 3.14 Function Block of a CIU

3.12.2 Count Down (CTD)

The CTD is a retentive
output instruction that counts false to true
the rung condition for a CTD rung transitions. When
instruction has made a false-to-true
value is decremented by one transition, the accumulated
count, provided that the rung
evaluated between these transitions. The containing the CTD instruction is
condition again becomes false. The accumulated counts are retained when the
rung
accumulated count is retained until cleared a reset (RES)
instruction that has the same address as the by
counter reset. The function block of a
CTD is shown in Fig. 3.15. count-down

CTD
Count down
Counter
Preset
Accumulator
Fig. 3.15 Function Block of a CTD
PLC Timers and Counters

49
When the reset
instruction is used for
CU bit is reset, and CD bit is a
counter, the ACC value is '0' and DN bit
reset. is reset,
Problem 3.9: Draw a ladder
conditions. diagram for a box packaging system having the following
Five boxes are stacked at a time and then
The
bound with a
wrapper.
input and
output are as follows:
Box present signal
:0/1 =

(i) Wrapper machine relay

0:0/1 =

i ) Go to step
Based on the above
inputs and outputs, the ladder
in Fig. 3.16. diagram has been developed as shown

101 CTU
C5:1 CU
Pr-5

C5:1 DN TON
T4:1
Time Base 0.1s
Pr 50
T4:1/TT
O.01

T4:1 DN
C5:1
-RES

Fig. 3.16 Ladder Diagram for Problem 3.9

Problem 3.10: Design ladder diagram that will control a

a
stepper motor so that it moves 10
steps forward, waits for 20 seconds, and then cause the motor
to move 10 steps in the reverse
direction.
The inputs and outputs be
arrayed as follows:
can

Start Switch 1:0/1; For forward/reverse motion O:0/2

=
=

For stepper pulse out =0:0/1

1The stepper input pulse is 0.5 second ON and 0.5 second
OFF]
50 Programmable Logic Controllers and Industrial Automation: An Introduct
ctlon

The rules can be written as shown in Table 3.8.

Table 3.8 Summary of Rules of Operation

T4:2 DN O:02 O:0n Remarks

0 0
XOR
0 Gate
1 0

n is the number of
program cycle
Based on the above inputs and outputs, the ladder diagram has been developed as showr
in Fig. 3.17.

TON
I0/1 C5 0DN T4:1/DN
T4:0
Time Base 0.01s
Pr 50

T4:0/DN TON
T4:1
Time Base 0.01s
Pr 50
T4:0/TT 0:0/1

0:0/1 CTU
C5:0

Pr 10

C5:0/DN TON
T4:2
TimeBase ls
Pr 20

O:0/2 T4:2/DN O:0/2

H

T4:2/DN O:0/2
C5:0
(Res)
T4:2/DN

Fig. 3.17 Ladder Diagram for Problem 3.10

PLC Timern and Counters

Exercise 3.1: Create a 24 hours time

delay that will give analarn f 19 conds diursti, ate
which te entire systern is reset. This
system is repeated. Draw a larider diaurarn lor tis ssest.
Exercise 3.2: Wrile a program to show a counter that will count upto 40,00) raw a hdder
diagta for this system
Exercise 3.3: Make a progran to turn a lamp ON after a specific tine and then to tiurn a tars
ON a fixed tirne after turning the larnp ON. Draw a ladder diagrarn for this syster
Exercise 3.4: Design a counter to count the nunber of vehicles
city. Draw
passing a major intersert
in a a ladder diagram for this system.