EXPERIMENT-8

CHALAMALA SUJITH REDDY

19CS01009

PART-1

Aim: Studying SR latch

Theory:
SR latch is a device used to store data as memory, using S(set) and
R(Reset) inputs. SR Latch can be created using 2 NOR gates that have a
cross-feedback loop. SR latch can also be made using 2-NAND gates
with negated inputs and swapped outputs and hence this is sometimes
called S'R' latch. When a 1 input is applied to the Set line of the SR latch,
the Q output becomes 1. The feedback mechanism ensures that the Q
output will remain 1, even when the S goes to 0 again. This way the
latch serves up as a memory device. Conversely, a 1 input on the Reset
line will drive the Q output to 0 (and Q’ to 1), thus resetting the latch
memory. When both inputs are low, the latch "latches" – means that
there is no change in latch state and remains in the same state as
previous.
TruthTable:

Circuit Diagram:
(SR Latch Using NAND Gate)
(SR Latch using NOR Gate)

Applications:

1. Used as single bit storage elements

2. Used in circuits like power gating, clocks, etc. as storage
devices.

Discussion & conclusion:

SR Latches can be built using nand/nor gates. And their truth
table has also been verified.In this experiment S and R were used
for setting and resetting inputs, whereas Q’ and Q were
corresponding memory bits.
PART-2

Aim: Studying flip-flops

Theory:
In electronics, a flip-flop or latch is a circuit that has two stable states
and can be used to store state information. Flip-flops and latches are
used as data storage elements. A flip-flop is a device which stores a
single bit (binary digit) of data; one of its two states represents a "one"
and the other represents a "zero". Such data storage can be used for
storage of state, and such a circuit is described as sequential logic in
electronics. When used in a finite-state machine, the output and next
state depend not only on its current input, but also on its current state
(and hence, previous inputs)There are 2 types of flip-flops categorized
as “negative-edge” and “positive-edge” triggered flip-flops. In the first
kind of flip-flop the information is stored when there is transition from
one(1) to (0) in the clock cycle, whereas “positive-edge” triggered
flip-flops store information when there is transition from zero(0) to
one(1) in the clock cycle.
Truth Table:
(J-K flip flop)

(D flip flop)
(T flip flop)

(J-K flipflop)
Circuit Diagram:
Timing Diagram and Logging:
(D flipflop)
Circuit diagram & Timing Diagram and Logging:
(T flipflop)
Circuit diagram & Timing Diagram and Logging:
Study of IC circuits:
1. SN7476 (J-K flip-flop)

➢It consists of 2 independent J-K flip-flops.

➢Clock-1/Clock-2: Provide clock pulse for flip flop
➢Preset-1/Preset-2: Will set Q=1 and Q’=0
➢Clear-1/Clear-2: Will set Q=0 and Q’=1
➢K-1/K-2/J-1/J-2: Input pins
➢Q-1/Q-2/Q’-1/Q’-2: Output pins
➢Vcc: Powers the IC with 5V
➢Ground: Connected to ground of the system
2. 74LS74 (D flip-flop)

➢It consists of 2 independent D flip-flops

➢Clock-1/Clock-2: Provide clock pulse for flip flop.
➢Preset-1/Preset-2: Will set Q=1 and Q’=0
➢Clear-1/Clear-2: Will set Q=0 and Q’=1
➢D-1/D-2: Input pins
➢Q-1/Q-2/Q’-1/Q’-2: Output pins
➢Vcc: Powers the IC with 5V
➢Ground: Connected to ground of the system.
 3. T flip flop :

It is usually implemented with IC of J-K flip-flop with J

and K input as shorted as supplied to IC as input (in
place of T). Therefore it is also called a single input J-K
flip-flop.

Applications:
1. Flip flops are used to design registers that as the name implies are
used to store multiple-bits of data which is achieved by storing
each bit of data in a single flip-flop.
2. They also find applications in frequency dividers and data transfer,
etc.

Discussion & Conclusion:

JK, D, and T flip-flops are studied and implemented.All the
flip-flops used in the experiment were “positive-edge” triggered
flip-flops. Also flip-flop states were updated based on previous
inputs