Module5 Magnitude Comparator

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Module5_Magnitude Comparator

Design of 4-bit magnitude comparator


Magnitude Comparator
• Definition: A magnitude comparator is a combinational circuit that
compares two numbers A & B to determine whether:
• A > B, or
• A = B, or
• A<B n-bit input n-bit magnitude GT
A comparator
• Inputs
• First n-bit number A EQ
• Second n-bit number B n-bit input

• Outputs B LE
• 3 output signals (GT, EQ, LT), where:
• GT = 1 IFF A > B
• EQ = 1 IFF A = B
• LT = 1 IFF A < B
• Note: Exactly One of these 3 outputs equals 1, while the other 2
outputs are 0`s
1 bit comparator

Y=A’B’+AB

Y=AB’ Y=A’B
Equality Comparator
XNOR
X Y Z

2009
Ahmad Almulhem, KFUPM
X 0 0 1
Z 0 1 0
Y 1 0 0
1 1 1
4-Bit Equality Comparator
A0 C0
B0
A1 C1
B1 A_EQ_B

2009
Ahmad Almulhem, KFUPM
A2
B2 C2
A3
B3 C3
4-bit Magnitude Comparator

A_LT_B
A[3..0] Magnitude
Detector A_EQ_B
B[3..0]
A_GT_B
Magnitude Comparator
A0 C0
B0
A1 C1 Find A_GT_B
B1 A_EQ_B
A2
B2 C2
A3
B3 C3
Because A3 > B3
If A = 1001 and i.e. A3 & !B3 = 1
B = 0111 Therefore, one term in the
is A > B? logic equation for A_GT_B is
Why? A3 & !B3
Magnitude Comparator
A0 C0
B0 A_GT_B = A3 & !B3
A1 C1
B1 A_EQ_B + …..
A2
B2 C2
A3
B3 C3 Because A3 = B3 and
A2 > B2
If A = 1101 and i.e. C3 = 1 and
B = 1011 A2 & !B2 = 1
is A > B? Therefore, the next term in the
Why? logic equation for A_GT_B is
C3 & A2 & !B2
Magnitude Comparator
A0 C0
B0 A_GT_B = A3 & !B3
A1 C1
B1 A_EQ_B + C3 & A2 & !B2
A2 + …..
B2 C2
A3 Because A3 = B3 and
B3 C3 A2 = B2 and
A1 > B1
If A = 1010 and i.e. C3 = 1 and C2 = 1 and
B = 1001 A1 & !B1 = 1
is A > B?
Therefore, the next term in the
Why?
logic equation for A_GT_B is
C3 & C2 & A1 & !B1
Magnitude Comparator
A_GT_B = A3 & !B3
A0 C0
B0 + C3 & A2 & !B2
A1 C1 + C3 & C2 & A1 & !B1
B1 A_EQ_B
A2 + …..
B2 C2
A3
Because A3 = B3 and
B3 C3 A2 = B2 and
If A = 1011 and A1 = B1 and
B = 1010 A0 > B0
is A > B? i.e. C3 = 1 and C2 = 1 and
Why? C1 = 1 and A0 & !B0 = 1
Therefore, the last term in the
logic equation for A_GT_B is
C3 & C2 & C1 & A0 & !B0
Magnitude Comparator
A0 C0
B0
A1 C1
B1 A_EQ_B
A2
B2 C2
A3
B3 C3
A_GT_B = A3 & !B3
+ C3 & A2 & !B2
+ C3 & C2 & A1 & !B1
+ C3 & C2 & C1 & A0 & !B0
The 2-bit Magnitude Comparator
2-bit Comparator
Example 1: Magnitude Comparator (4-bit)

• Problem: Design a magnitude comparator


that compares two 4-bit numbers A and B
and determines whether:
• A > B, or
• A = B, or
4-bit input 4-bit magnitude GT
• A<B A comparator

EQ
4-bit input
B LE
Example 1: Magnitude Comparator (4-bit)

• Solution:
• Inputs: 8-bits (A ⇒ 4-bits , B ⇒ 4-bits)
• A and B are two 4-bit numbers
4-bit input 4-bit magnitude GT
• Let A = A3A2A1A0 , and A comparator
• Let B = B3B2B1B0
EQ
• Inputs have 28 (256) possible 4-bit input
combinations (size of truth table and B LE
K-map?)
• Not easy to design using conventional
techniques

The circuit possesses certain amount of regularity


⇒ can be designed algorithmically.
Example 1: Magnitude Comparator (4-bit)

• Designing EQ:

• Define Xi = Ai xnor Bi = Ai Bi + Ai’ Bi’


•  Xi = 1 IFF Ai = Bi ∀ i =0, 1, 2 and 3
•  Xi = 0 IFF Ai ≠ Bi
• Therefore the condition for A = B or EQ=1 IFF
• A3= B3 → (X3 = 1), and
• A2= B2 → (X2 = 1), and
• A1= B1 → (X1 = 1), and
• A0= B0 → (X0 = 1).
• Thus, EQ=1 IFF X3 X2 X1 X0 = 1. In other words,
• EQ = X3 X2 X1 X0
Example 1: Magnitude Comparator (4-bit)

• Designing GT and LT:

• GT = 1 if A > B:
• If A3 > B3  A3 = 1 and B3 = 0
• If A3 = B3 and A2 > B2
• If A3 = B3 and A2 = B2 and A1 > A1
• If A3 = B3 and A2 = B2 and A1 = B1 and A0 > B0

• Therefore,
• GT = A3B3‘ + X3 A2 B2‘ + X3 X2 A1 B1‘ + X3 X2 X1A0 B0‘
• Similarly, LT = A3’B3 + X3 A2‘B2 + X3 X2 A1’B1 + X3 X2 X1A0’ B0
Example 1: Magnitude Comparator (4-bit)

• EQ = X3 X2 X1 X0

• GT = A3B3’
+ X3A2B2’
+ X3X2A1B1’
+ X3X2X1A0B0’

• LT = B3A3’
+ X3B2A2’
+ X3X2B1A1’
+ X3X2X1B0A0’

4-bit magnitude comparator


Example 1: Magnitude Comparator (4-bit)

• Do you need all three outputs?


• Two outputs can tell about the third one
• Example: when A is NOT GREATER THAN B, and A is NOT LESS
THAN B THEN A is EQUAL TO B
• Therefore, we can save some logic gates:

4-bit input 4-bit magnitude GT


A comparator
EQ
EQ
4-bit input
B LE
Design a 8 bit comparator using 4-bit comparator
References
• Digital Logic and Computer Design By Morris Mano

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