IRFP3006PbF
VDSS 60V    
D
RDS(on) typ. 2.1m
max. 2.5m S
270A G D
ID (Silicon Limited)
G
ID (Package Limited) 195A
S
TO-247AC

Applications G D S
 High Efficiency Synchronous Rectification in SMPS
 Uninterruptible Power Supply Gate Drain Source
 High Speed Power Switching
 Hard Switched and High Frequency Circuits

Benefits
 Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
 Fully Characterized Capacitance and Avalanche SOA
 Enhanced body diode dV/dt and dI/dt Capability
 Lead-Free

Base Part Number Package Type Standard Pack Orderable Part Number
    Form Quantity  
IRFP3006PbF TO-247 Tube 25 IRFP3006PbF

Absolute Maximum Ratings      

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 270 A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V(Silicon Limited) 190  
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 195  
IDM Pulsed Drain Current  1080  
PD @TC = 25°C Maximum Power Dissipation 375 W
Linear Derating Factor 2.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery  10 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbfin (1.1Nm)
Avalanche Characteristics      
EAS (Thermally limited) Single Pulse Avalanche Energy  320 mJ
IAR Avalanche Current  See Fig. 14, 15, 22a, 22b A
EAR Repetitive Avalanche Energy  mJ
Thermal Resistance      
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case  ––– 0.4
RCS Case-to-Sink, Flat Greased Surface 0.24 ––– °C/W
RJA Junction-to-Ambient ––– 40

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IRFP3006PbF

Static @ TJ = 25°C (unless otherwise specified)        

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA
RDS(on) Static Drain-to-Source On-Resistance ––– 2.1 2.5 m VGS = 10V, ID = 170A 
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 60V, VGS = 0V
––– ––– 250 VDS = 60V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 2.0 ––– 
Dynamic @ TJ = 25°C (unless otherwise specified)        
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 280 ––– ––– S VDS = 25V, ID = 170A
Qg Total Gate Charge ––– 200 300 ID = 170A
Qgs Gate-to-Source Charge ––– 37 ––– VDS =30V
nC
Qgd Gate-to-Drain ("Miller") Charge ––– 60 ––– VGS = 10V 
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 140 ––– ID = 170A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 16 ––– VDD = 39V
tr Rise Time ––– 182 ––– ID = 170A
ns
td(off) Turn-Off Delay Time ––– 118 ––– RG = 2.7
tf Fall Time ––– 189 ––– VGS = 10V 
Ciss Input Capacitance ––– 8970 ––– VGS = 0V
Coss Output Capacitance ––– 1020 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 534 ––– ƒ = 1.0 MHz, See Fig. 5
pF
Coss eff. (ER) Effective Output Capacitance ––– 1480 ––– VGS = 0V, VDS = 0V to 48V 
(Energy Related) See Fig. 11
Coss eff. (TR) Effective Output Capacitance ––– 1920 ––– VGS = 0V, VDS = 0V to 48V 
(Time Related)
Diode Characteristics        
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 257

(Body Diode) showing the
A
integral reverse
G
ISM Pulsed Source Current
––– ––– 1028
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 170A, VGS = 0V 
trr Reverse Recovery Time ––– 44 ––– ns TJ = 25°C
––– 48 ––– TJ = 125°C
Qrr Reverse Recovery Charge ––– 63 ––– nC TJ = 25°C VR = 51V,
IF = 170A
––– 77 ––– TJ = 125°C
di/dt = 100A/µs 
IRRM Reverse Recovery Current ––– 2.4 ––– A TJ = 25°C

Notes:
 Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A.Note that
current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
 Repetitive rating; pulse width limited by max. Junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.022mH, RG = 50, IAS = 170A,VGS =10V. Part not Recommended for use above
this value.
 ISD ≤ 170A, di/dt ≤ 1360A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
 Pulse width ≤ 400µs; duty cycle ≤ 2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
* All spec data and curves based on (TO-220 Pak -IRFB3006PbF) Datasheet.

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IRFP3006PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
6.0V 6.0V
5.0V 5.0V
4.5V 4.5V
100
4.0V 4.0V
BOTTOM 3.5V BOTTOM 3.5V

100

10
3.5V

3.5V  60µs PULSE WIDTH  60µs PULSE WIDTH

Tj = 25°C Tj = 175°C
1 10
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.5
ID = 170A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
ID, Drain-to-Source Current)

2.0
100 TJ = 175°C
(Normalized)

1.5
TJ = 25°C
10
1.0

VDS = 25V
 60µs PULSE WIDTH
1 0.5
2.0 3.0 4.0 5.0 6.0 7.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

16000 16
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED ID= 170A
VDS = 48V
VGS, Gate-to-Source Voltage (V)

Crss = Cgd
Coss = Cds + Cgd VDS = 30V
12000 12
C, Capacitance (pF)

C iss

8000 8

4000 4
C oss

Crss
0 0
1 10 100 0 40 80 120 160 200 240 280
VDS , Drain-to-Source Voltage (V) QG Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage

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IRFP3006PbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
TJ = 175°C

ID, Drain-to-Source Current (A)

ISD , Reverse Drain Current (A)

1000
100
100µsec

100
10
LIMITED BY PACKAGE 1msec
TJ = 25°C 10

10msec
1
1 Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.0 0.4 0.8 1.2 1.6 2.0 0.1 1 10 100
VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-to-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage

300 80
LIMITED BY PACKAGE ID = 5mA

250
75
ID , Drain Current (A)

200
70

150
65
100

60
50

0 55
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

TC , Case Temperature (°C) TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage

2.0 1400
EAS, Single Pulse Avalanche Energy (mJ)

ID
1200 TOP 20A
27A
1.5 BOTTOM 170A
1000
Energy (µJ)

800
1.0
600

400
0.5

200

0.0 0
0 10 20 30 40 50 60 25 50 75 100 125 150 175

VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)

Fig 11. Typical Coss Stored Energy Fig 12. Maximum Avalanche Energy vs. Drain Current

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IRFP3006PbF
1

D = 0.50
Thermal Response ( Z thJC ) 0.1
0.20
0.10
0.05
0.01 0.02
0.01

0.001
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)

100
0.01

0.05

10
0.10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming  j = 25°C and
Tstart = 150°C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs. Pulsewidth

400
TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 14, 15:
BOTTOM 1% Duty Cycle (For further info, see AN-1005 at www.irf.com)
ID = 170A 1. Avalanche failures assumption:
EAR , Avalanche Energy (mJ)

300
Purely a thermal phenomenon and failure occurs at a temperature
far in excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
200 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
100 6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
0
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC

Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFP3006PbF
20
4.0
ID = 1.0A
VGS(th) Gate threshold Voltage (V)

3.5 ID = 1.0mA 16
ID = 250µA

3.0
12

IRRM - (A)
2.5
8

2.0 IF = 112A

4 VR = 51V
1.5 TJ = 125°C
TJ = 25°C
0
1.0
100 200 300 400 500 600 700 800
-75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( °C ) dif / dt - (A / µs)

Fig. 16 Threshold Voltage vs. Temperature Fig. 17 Typical Recovery Current vs. dif/dt

20 700

600
16
500
QRR - (nC)
12
IRRM - (A)

400

300
8

IF = 170A 200 IF = 112A

4 VR = 51V VR = 51V
TJ = 125°C 100 TJ = 125°C
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 100 200 300 400 500 600 700 800

dif / dt - (A / µs) dif / dt - (A / µs)

Fig 18. Typical Recovery Current vs. dif/dt Fig 19. Typical Stored Charge vs. dif/dt

700

600

500
QRR - (nC)

400

300

200 IF = 170A
VR = 51V
100 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800

dif / dt - (A / µs)

Fig 20. Typical Stored Charge vs. dif/dt

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IRFP3006PbF

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform

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IRFP3006PbF

TO-247AC Package Outline (Dimensions are shown in millimeters (inches))

TO-247AC Part Marking Information

TO-247AC package is not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFP3006PbF

Qualification information†
Industrial
Qualification level
(per JEDEC JESD47F )††

Moisture Sensitivity Level TO-247AC N/A

   
RoHS compliant Yes

† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability

†† Applicable version of JEDEC standard at the time of product release.

IR WORLD HEADQUARTERS: 101N Sepulveda Blvd, El Segundo, California 90245, USA

To contact Interna onal Rec fier, please visit h p://www.irf.com/whoto‐call/

9 www.irf.com © 2013 International Rectifier September 06, 2013

IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized representatives of Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.