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Datasheet
Datasheet
HEX INVERTER
■ HIGH SPEED: tPD = 4.7 ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA = 25 oC
■ COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX) M T
■ POWER DOWN PROTECTION ON INPUTS & (Micro Package) (TSSOP Package)
OUTPUTS
ORDER CODES :
■ SYMMETRICAL OUTPUT IMPEDANCE:
74VHCT04AM 74VHCT04AT
|IOH| = IOL = 8 mA (MIN)
■ BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL The internal circuit is composed of 3 stages
■ OPERATING VOLTAGE RANGE: including buffer output, which provide high noise
VCC (OPR) = 4.5V to 5.5V immunity and stable output.
■ PIN AND FUNCTION COMPATIBLE WITH Power down protection is provided on all inputs
74 SERIES 04 and outputs and 0 to 7V can be accepted on
■ IMPROVED LATCH-UP IMMUNITY inputs with no regard to the supply voltage. This
■ LOW NOISE: VOLP = 0.8V (Max.) device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
DESCRIPTION protection circuits against static discharge, giving
The 74VHCT04A is an advanced high-speed them 2KV ESD immunity and transient excess
CMOS HEX INVERTER fabricated with voltage.
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
TRUTH TABLE
A Y
L H
H L
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74VHCT04A
DC SPECIFICATIONS
Symb ol Parameter T est Cond ition s Value Un it
V CC T A = 25 o C -40 to 85 o C
(V) Min. Typ . Max. Min . Max.
VIH High Level Input 4.5 to 5.5 2 2 V
Voltage
VIL Low Level Input 4.5 to 5.5 0.8 0.8 V
Voltage
VOH High Level Output 4.5 I O =-50 µA 4.4 4.5 4.4
V
Voltage 4.5 IO=-8 mA 3.94 3.8
VOL Low Level Output 4.5 I O=50 µA 0.0 0.1 0.1
V
Voltage 4.5 IO=8 mA 0.36 0.44
II Input Leakage Current 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA
ICC Quiescent Supply 5.5 VI = VCC or GND 2 20 µA
Current
∆ICC Additional Worst Case 5.5 One Input at 3.4V, 1.35 1.5 mA
Supply Current other input at VCC or
GND
IOPD Output Leakage 0 VOUT = 5.5V 0.5 5.0 µA
Current
CAPACITIVE CHARACTERISTICS
Symb ol Parameter T est Cond ition s Value Un it
T A = 25 o C -40 to 85 o C
Min. Typ . Max. Min . Max.
C IN Input Capacitance 4 10 10 pF
CPD Power Dissipation 14 pF
Capacitance (note 1)
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/6 (per Gate)
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74VHCT04A
TEST CIRCUIT
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74VHCT04A
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45 (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S 8 (max.)
P013G
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74VHCT04A
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.1 0.433
K 0o 4o 8o 0o 4o 8o
A A2
K L
A1 b e
c E
E1
PIN 1 IDENTIFICATION
1
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74VHCT04A
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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