PrimeTime® 2011 Webinar Series

Reducing Design Margins Using

PrimeTime Advanced OCV –
TSMC and User Views

Norb Heindl – Synopsys

Willy Chen – TSMC
February 23rd, 2011

Copyright
©Synopsys© Synopsys
2011 12011 PrimeTime™ 2011 Webinar Series
 PrimeTime 2011 Webinar Series
Highlighting Signoff Technologies & Techniques

Advanced • Reducing Design Margins Using PrimeTime Advanced OCV

– TSMC and User Views
OCV - February
F b 23 2011
23,

Multi-Scenario
• Multi-scenario Timing, Analysis and Debug Using PrimeTime
Design - April 20, 2011

Design • Faster Block-to-Top and SDC-to-SDC Constraint Checking with

Constraints Galaxy Constraint Analyzer
- May 18, 2011

GigaScale • Speed Timing Signoff by 10X Using PrimeTime HyperScale

Design Technology
ec o ogy
- July 20, 2011

ECO Fixing
g • Next generation ECO flow with PrimeTime and IC Compiler
- August 17, 2011

©Synopsys 2011 2 PrimeTime™ 2011 Webinar Series

Advanced OCV Improves Margin Accuracy
Depth 1 2 3 4 5 15
Variable 1.2 1.16 1.14 1.13 1.12 1.08
Derate
eae
Flat 1.25 1.25 1.25 1.25 1.25 1.25
Derate

Design-Specific Tables Replace

Single-Value OCV Derates

OCV AOCV
Path Delay

AOCV Modeling Approach

SSTA Improves Accuracy,
Reduces Margins
# Stages

©Synopsys 2011 3 PrimeTime™ 2011 Webinar Series

 Reduced Design Margins Help Increase
Design Windows
“Design Windows”
• Feature size is shrinking, chip size is not
• SOC designs must operate in many modes under many
conditions
• Today
Today’ss challenges include: power
power, frequency
frequency, margin

Design Variation Driven

Constraints Æ ÅEffects

Reduced Design Margins: “Safety”

Improves the “design
design window”
window Margin

Coupling Gates & Clocks & Process Voltage Temperature

Wires Flops

©Synopsys 2011 4 PrimeTime™ 2011 Webinar Series

 Presenter Introductions
Willy Chen
Program Manager
Design Methodology and Service Marketing
Design Infrastructure Marketing Division,
TSMC • Technology Scaling Trend
• Variation Aware Timing Comes into Play
• Stage-Based OCV
• TSMC’s SBOCV Support Model

Norb Heindl
Principal Corporate Applications Engineer
Implementation Group
Synopsys • AOCV Design Flow (Stage and Distance)
• What’s new in PrimeTime Advanced OCV
• Table Generation Improvements
• Lessons Learned – User Views

©Synopsys 2011 5 PrimeTime™ 2011 Webinar Series

 Variation Aware Timing TSMC Property

Willy Chen, TSMC

z Technology
gy Scaling
g Trend
z Variation Aware Timing Comes into Play
z Stage-Based
g OCV
z TSMC’s SBOCV Support Model
z Next Steps in TSMC/Synopsys SBOCV Collaboration

© 2010 DMD/DTP, Ltd

 Technology
gy Scaling
g Results in Variation TSMC Property

Increase

σ 2 = σglobal
2
+ σlocal
2
Variation
n

Local Variation
A 2VT
σ
Process

2
local =
WL

Global Variation
P

Technology Scaling

© 2010 DMD/DTP, Ltd

 Variation-Aware
Variation Aware Timing Approaches TSMC Property

Corner-Based Stage-Based Statistical STA

Methodology OCV (SBOCV)
Design Overly Reduced margin More realistic
Margin Pessimistic ~5% to corner- ~10-15% to
based corner based
corner-based
Variations Rough OCV table to Statistical model
approximation cover to cover global
with single,
single global local/random and local
OCV derate value variations variations
on all paths
Cost Included with STA OCV Table Significant
g cost
Characterization of statistical
library
characterization

© 2010 DMD/DTP, Ltd

 Challenges: Statistical Cancellation TSMC Property

Eff t C
Effects Cause E
Excess M Margin
i
Statistical
A
Cancellation

probability
Traditional
WC corner real 3σ points

excess margin A Slack

violation
i l i

z What works for 90nm and 65nm may not be optimal

solution for 40nm and below
9

© 2010 DMD/DTP, Ltd

 A Closer Look at Statistical Cancellation TSMC Property

Effect
TC
3σ WC
(σ=1) 3ns 3ns 3ns 3ns 3ns
5ns 8ns 5ns 8ns 5ns 8ns 5ns 8ns 5ns 8ns

Assume all worst case Path

Corner Methodology
delay
Dwc=8+8+8+8+8=40 (ns)

Statistical Methodology Assume independent Statistical 3σ

6.7ns
σ = sqrt(σ12+ σ22+ σ32+ σ42+ σ52) = (3σ)
sqrt(1+1+1+1+1) = 2.24
25ns 31.7ns 40ns
D3σ =DTC+3σ=25+(3*2.24)=31.7
( ) ((ns))
DTC D3σ DWC

10

© 2010 DMD/DTP, Ltd

 Current Challenges in SSTA TSMC Property

z Maturity
y of statistical SPICE model
z Availability of SSTA Libraries
„ Long characterization run time
„ Large library size
„ Getting worse with more variables in advanced technologies
z Readiness of EDA Solutions
„ Optimization speedup
„ L
Long qualification
lifi ti ti time ffor M
Monte
t CCarlo
l simulations
i l ti

11

© 2010 DMD/DTP, Ltd

 TSMC’s Stage-Based OCV for Local TSMC Property

Variation Design Margin Reduction

z Cost effective statistical timing approach
z Methodology: Apply a depth-dependent OCV factor based on
the depth of the cells in the timing path
„ Small OCV factor for long depth
„ Large OCV factor for short depth
Patth Delay

OCV flow : slope = OCV derate factor

OCV flow is too
Stage-based OCV
pessimistic in long path
OCV flow is too
optimistic in SSTA flow : calculated by Monte-Carlo simulation
short p
path

Logic Level of path

12

© 2010 DMD/DTP, Ltd

 Design Margin Reduction TSMC Property

z Examples of Design Margin Reduction, Comparing SSTA,

SBOCV and OCV

z ARM1176 in TSMC 40G

z 4% of performance gain vs. STA at setup time (WCL)
z Apply additional constant OCV for temperature and IR drop
13

© 2010 DMD/DTP, Ltd

 SBOCV Separates
p Data / Clock Derating
g TSMC Property

z Skew based for clock cells

z Delay
D l b based
d for
f data
d t cells
ll
Q Data3 Data4
Register_D1
Clk D t 5
Data5
Data path (arrival time)
Data6 Data7 D Q
Register_D2
Data2
Clk

Data1

Com1 Com2 Clk1 Clk2

Clock path (require

Common p
path time))

z Separate tables are characterized for the same cell –

one for data path and one for clock path analysis

14

© 2010 DMD/DTP, Ltd

 Applying
pp y g TSMC’s SBOCV Tables TSMC Property

z Use data type of SBOCV table on the cells in data path

„ Ex: 6 data stages in data path: (purple cells on top path)
(Register_D1, Data 3~7)

Q
1stt Register
R i t Register_D1
D t 3
Data3 D t 4
Data4

Clk Data5
Data path (arrival time)
Data6 Data7 D Q
Register_D2
Data2 Clk
2nd Register
Data1

Com1 Com2
Clk1 Clk2

Clock path (require time)

Common path

z Use clock type of SBOCV table on the cells in clock path

„ Ex: ((blue cells on bottom paths
p driving
g the registers)
g )
‹ 2 clock stages in launch path: (Data1, Data2)
‹ 2 clock stages in capture path: (Clk1, Clk2)
15

© 2010 DMD/DTP, Ltd

 TSMC’s Stage-Based
g OCV Support
pp Model TSMC Property

z Design
g Methodology
gy
„ Reference Flow 11.0 announced June 2010
„ PrimeTime 2010.06 AOCV
„ Supporting separate data and clock SBOCV tables
z SBOCV Tables
„ Based on TSMC in-house library
„ 40nm and below
„ Have deployed to tens of customers world wide
z Contact Your TSMC regional technical support

16

© 2010 DMD/DTP, Ltd

 Next Steps
p in TSMC/Synopsys
y p y SBOCV TSMC Property

Collaboration

z AOCV optimization in ICC

z Traditionally OCV and SBOCV are mutually exclusive
„ AOCV only covers process variation
„ Voltage and temperature variations need to be taken care
separately
„ Use the incremental or add-on option in OCV setting to
enable both at the same time
z Would be part of Reference Flow 12

17

© 2010 DMD/DTP, Ltd

 AOCV Webinar Topics

• TSMC Perspective
• PrimeTime Advanced OCV Modeling
– AOCV Design
g Flow ((Stage
g and Distance))
– What’s new in AOCV
– Table Generation Improvements
p
– Lessons Learned – User Views
• Summaryy
• Q&A

©Synopsys 2011 18 PrimeTime™ 2011 Webinar Series

 Deploying PrimeTime Advanced OCV
Simple
p extension to familiar STA tool flow
Read & Link read_verilog ...
Design link_design

Back-annotate set read_parasitics_load_locations true

Retain Coordinate Data *
Parasitics read_parasitics ...
** only for distance based derates

read_sdc …..create_clock ...

Apply Design set_timing_derate –early 0.80 Read in Advanced
Constraints set_timing_derate –late 1.20 OCV Derate Tables
read_aocvm ... Report mapping of
report aocvm ...
report_aocvm t bl tto d
tables design
i

Delay Calc & set timing_aocvm_enable_analysis true

Timing Analysis update_timing Enable Advanced OCV
Analysis
report_constraint ...
Generate report_analysis_coverage ...
Reports report_clock_timing –derate ... Report paths with
report_timing –derate … derates
Copyright © Synopsys 2011

©Synopsys 2011 19 PrimeTime™ 2011 Webinar Series

 IC Compiler Support for AOCV
Reduces Pessimism & Overdesign At 32/28nm

• Supported in post-route flow

through PrimeTime exact link

• Extended to post-CTS for hold

fixing
– AOCV derates used on clock
network (global derates used on
data paths)
– Uses PrimeTime derating tables
– Tables available thru
vendor/Synopsys TCL scripts
Depth 1 2 3 4 5 6
• Qualified in TSMC Ref Flow Derate 1.2 1.2 1.15 1.15 1.08 1.08
beginning 10
10.0
0

©Synopsys 2011 20 PrimeTime™ 2011 Webinar Series

 Supports Separate Clock and Data Tables

• More control and flexibility

– Separate clock and data
derate tables for stage and
distance
– Separate metrics computation
for Clock & Data paths version: 2.0 version: 2.0
object_type: lib_cell object_type: lib_cell
– Supported
pp in GBA & PBA object_spec: LIB/BUF1X
rf_type:
f t rise
i ffallll
object_spec: LIB/BUF1X
rf_type:
f t rise
i ffallll
delay_type: cell delay_type: cell
– Clock derate applied when derate_type: late
path_type: clock // Optional field
derate_type: late
path_type: data // Optional field

clock as data depth: 1 2 3 4 5

distance: 500 1000 1500 2000
depth: 1 2 3 4 5
distance: 500 1000 1500 2000
table: \ table: \
1.123 1.090 1.075 1.067 1.062 \ 1.174 1.133 1.113 1.098 1.091 \
1
1.124
124 11.091
091 11.076
076 1
1.068
068 1
1.063
063 \ 1 176 1
1.176 135 1
1.135 115 1
1.115 100 1
1.100 093 \
1.093
1.125 1.092 1.077 1.070 1.065 \ 1.179 1.137 1.118 1.102 1.095 \
1.126 1.094 1.079 1.072 1.067 1.181 1.140 1.121 1.105 1.098

• Released in TSMC Path_type: clock Path_type: data

Ref Flow 11.0 Copyright © Synopsys 2011

©Synopsys 2011 21 PrimeTime™ 2011 Webinar Series

 PrimeTime OCV/AOCV Precedence Rules

OCV / AOCV Derate Precedence

highest OC leaff cell
OCV
precedence AOCV lib_cell
OCV lib_cell
AOCV hierarchical cell
OCV hierarchical cell
lowest AOCV current_design
precedence OCV current_design
Copyright © Synopsys 2011

• Provides user flexibility to fill gaps in AOCV derate table

availability
– Use OCV when table data not available
– Override specific cells if desired
• Consistent with Design Compiler and IC Compiler
©Synopsys 2011 22 PrimeTime™ 2011 Webinar Series
 Table Generation Script Improvements
• Predriver cell chain
• Drive_cell chain mode for complex cells
Accuracy • Path_type/voltage AOCV table support
• Pin/arc based AOCV table merging

• Sqrt-N AOCV table generation

Performance • Drive_cell chain mode for complex cell

• Tcl based Code instead of Byte code

• User Tcl include file support
Ease of Use • Min/max derate cutoff
• Alternate & custom cell chain mode support
Details in appendix – See SolvNet Article # 032373

©Synopsys 2011 23 PrimeTime™ 2011 Webinar Series

 Customer Feedback on AOCV Benefits
Failing paths and TNS
reduced by 20%- 50%

More Slack
improvement on
longer paths

Accuracy improved,
pessimism removed
p
Source: June 2010, PrimeTime SIG at DAC

©Synopsys 2011 24 PrimeTime™ 2011 Webinar Series

 AOCV Lessons from Customers:
Deployment Tips
• Characterization effort can be significantly reduced
Table by grouping cells with similar variation and
characterizing one per each group.
Creation • Run simulations on test circuits with varying depths
to estimate variation percentages.

• Apply AOCV in conjunction with OCV and guard-

bands.
Flow • Variation analysis on clock tree alone is a low cost
and an effective approach if data path variation can
be bounded by corner analysis.

• Coefficients based on cell type can be used to

improve accuracy of the analysis.
Accuracy • Use separate derate tables for clock and data paths
when same cell used in different environment – e.g.
different loading
loading, fanout,
fanout edge rate
rate, etc on a cell
cell.

©Synopsys 2011 25 PrimeTime™ 2011 Webinar Series

 PrimeTime Advanced OCV
In Use at 15 of Top 20 Semiconductor Companies

• AOCV improves modeling accuacy Advanced OCV

– Reduces slack 1.5

1.0
– Removes pessimism

ck (ns)
0.5

– Offers improved performance 0.0

Hold Slac
-0.5
– Increases designer productivity -1.0

-1.5
Endpoints
OCV AOCV Cl
Clock
kOOnly
l AOCV Clock
Cl k & Data
D t
• Synopsys and TSMC support Margining Method # Violations
clock and data path derate OCV 1704
AOCV Clock Only 850
AOCV Clock & Data 176

• Tables available from vendor or Source: Synopsys

can be generated in-house Less violations to fix

©Synopsys 2011 26 PrimeTime™ 2011 Webinar Series

 PrimeTime 2011 Webinar Series!
Today’s Webinar References: SolvNet Article # 032373

• PrimeTime 2010 Advanced OCV Webinar:

https://solvnet.synopsys.com/retrieve/029550.html

• PrimeTime SIG Events on Advanced OCV

DAC, Anaheim; India SNUG, Bangalore
https://solvnet.synopsys.com/retrieve/031743.html

• PrimeTime Advanced OCV Technology:

Video and White Paper
http://www.synopsys.com/Tools/Implementation/SignOff/Pri
meTime/Pages/PT-OCVTech.aspx

Email comments to:

PrimeTimeWebinars@synopsys.com
©Synopsys 2011 27 PrimeTime™ 2011 Webinar Series
 Webinar Appendix Slides

AOCV Table Generation Script Improvements

• Predriver cell chain
• Drive_cell chain mode for complex cells
Accuracy • Path_type/voltage AOCV table support
• Pin/arc based AOCV table merging

• Sqrt-N AOCV table generation

Performance • Drive_cell chain mode for complex
p cell

• Tcl based Code instead of Byte code

• User Tcl include file support
Ease of Use • Min/max derate cutoff
• Alternate & custom cell chain mode support

©Synopsys 2011 28 PrimeTime™ 2011 Webinar Series

 Webinar Appendix Slides

Accuracy Improvements
• Predriver cells
– Add predriver cells to cell chains for more consistent derate calculation

• Drive-Cell chain mode

– Specify a unique driver cell for driving cell under test
– Speeds up monte-carlo analysis of Flip-Flop chains(requires only one single
flip flop in chain)
flip-flop
– Can be more accurate as old same_cell chain mode connected all flip-flops
in series

• Added support for new 2010.06 features

– Support of path_type/voltage AOCV table attributes

• AOCV table merging of all pins/sensitizations of cells

– Create individual AOCV tables for each input, output & sensitization
combination of a cell
– Merge
M iindividual
di id l tables
bl into
i cellll based
b d AOCV table
bl

©Synopsys 2011 29 PrimeTime™ 2011 Webinar Series

 Webinar Appendix Slides

Performance Improvements

• Sqrt-N mode
– Speeds up monte-carlo analysis by using smaller depth chain to
predict larger depth variation

• Drive-Cell chain mode

– Specify a unique driver cell for driving cell under test
– Speeds
S d up monte-carlo
t l analysis
l i off Fli
Flip-Flop
Fl chains(requires
h i ( i only
l
one single flip-flop in chain)
– Can be more accurate as old same-cell chain mode connected
allll fli
flip-flops
fl iin series
i

©Synopsys 2011 30 PrimeTime™ 2011 Webinar Series

 Webinar Appendix Slides

Ease of Use Enhancements

• TCL based instead of Tcl Byte code

– Allows users to customize their flow and runscript
• User tcl include file
– Allows users to create specialized TCL for their custom flows and
link it in the general flow(ie
flow(ie. allows use of variables for script
options)
• Min/max derate cutoff support
– Allows users to control the min or max derate value allowed in
AOCV tables
• Alternate & custom cell chain modes supported as well
• Spice lib option to force spice models file calls into the cell
chain file
– Compacts the flow by not requiring separate technology files

©Synopsys 2011 31 PrimeTime™ 2011 Webinar Series

 Synopsys

P di t bl Success
Predictable S

©Synopsys 2011 32 PrimeTime™ 2011 Webinar Series