Analog Electronic Circuits

Prof. Shouribrata Chatterjee

Department of Electrical Engineering
Indian Institute of Technology, Delhi

Lecture – 03
MOS device, characteristics

This is the lecture 3 of Analog Electronic Circuits course. We are going to start working
with active circuit elements. Our basic active circuit element is going to be the MOSFET.
In this course we are not going to get in to the physics of the MOSFET, but we are going
to start from the symbol and then work with the MOSFET as if it was a black box and we
have the operating characteristics of it.

Figure 1

The symbols we are going to use are as shown in Figure 1 and they are most importantly
three terminals. There also happens to be a fourth terminal which is under played and we
normally do not talk about it. The terminals are labeled drain, gate and source, and the
fourth terminal marked ‘B’ with red in Figure 1 is called the body. The source is the one
with the arrow. There are other popular symbols to represent MOSFET in digital circuits,
in which there is no arrow. The reason why there is no arrow is because the MOSFET is
symmetric the source and drain can be interchanged and secondly, in digital circuits the
MOSFET operates as a switch. So, the switch is either ON or it is OFF.
In n-channel MOSFET, when the gate voltage is high, the electronic switch between drain
and source is ON; when the gate voltage is low, the electronic switch between drain and
source is open. It is almost like the gate terminal is pushed in when the voltage is high and
the connection is made between drain and source. That is the logic behind this symbol
behind the symbol that is used for digital circuits. In p-channel MOSFET, there is a bubble
at the gate as shown in figure above. This implies that when the gate is low, the electronic
switch between source and drain turns ON.

In analog circuits, the MOS symbol has an arrow at the source irrespective of whether it
is a PMOS or an NMOS. But the source has been put on the top and the drain has been put
on the bottom in case of p-channel MOSFET. The reason is that we like to show the current
flowing from top to bottom. So, in the n-channel MOSFET, the current flows from drain
to source; in the p-channel MOSFET, the current is actually flowing from source to drain.
So, that is why the symbol is flipped and the arrow is always in the direction of the flow
of current.

We have discussed that in digital circuits the symbol does not have an arrow and the one
of the reasons is because the MOSFET is a symmetrical device and it does not matter
which is source and which is drain. But does it matter in analog circuits? How can we
figure out which is source and which is drain especially when the MOSFET is a
symmetrical device.

Figure 2
There is no real distinction between source and the drain as far as manufacturing goes,
they look exactly the same. It is actually the flow of current which determines which is
source which is drain. The way we like to draw our circuits is that higher potential is above
and lower potential is below Just like water current will always flow from higher to lower
potential.

In BJT, the collector is manufactured differently from the emitter. So, we cannot flip the
BJT and hope that it works, there is no way it is going to work. As far as the MOSFET
goes, you can interchange the terminals. If I interchange the source and drain terminals of
a MOSFET, the flow of the current will still remain the same.

The example is shown in Figure 3 below.

Figure 3

In electronic circuits we try not to draw the voltage sources it is implicit. We can simply
write VDD as shown in Figure 3 and that automatically means that there is a voltage source
between that terminal and ground terminals worth VDD. And if we do not write a voltage
source, then it is implicit that this terminal is connected to 0 volts or ground. So, this is the
reference potential. In all electronics analog digital circuits, we just do not draw the voltage
sources so explicitly anymore. Suppose you have a circuit as shown in Figure 3, we have
applied some volts at the gate terminal, then the direction of the current will as shown by
the path in red color.
The flow of current is always going to be from high to low potential whichever way you
have placed the MOSFET. Since, the current is going to flow through the arrow and come
up, it implies that the lower terminal is the source and the upper terminal is the drain.

In the second circuit diagram in Figure 3, we have put a PMOS and the direction of the
current will still be from top to bottom when required voltage I is applied at the gate. Since
arrow is always in the direction of the flow of current, it implies that the upper terminal is
the source and the bottom terminal is the drain.

The convention is that the current flows from top to bottom. We will follow this convention
in all of our circuit schematics. There are some places of confusion where the potentials
of drain and source are equal. In such scenarios where the MOSFET acts like a switch in
analog circuits, we show the MOSFET horizontally and we are not sure which terminal is
high potential and which one is low potential. At that time, it does not matter which
terminal is acting like a source and which one is as drain.

Another point that needs to be to be mentioned is when two wires cross and I do not put a
dot at the middle, then it means that they do not have a contact. But if I put a dot in the
middle then there is a contact. This is the convention of drawing circuits. There is no need
to draw loops around the crossing wire to show that they are disconnected. The absence of
the dot itself implies that there is no connection between the crossing wires. And in case
of a contact you draw the dot. We are pointing these things out because these are
conventions that we follow in engineering and practicing these conventions is a good idea.

Next we will start understanding the characteristics of the MOSFET and will start with
NMOS. We will first, draw the current characteristics with respect to VDS and VGS. Let us
keep VDS at some large voltage where large depends on the rating of the MOSFET.
Suppose we are using a 1.8 micron device, then the absolutely largest voltage that we can
operate this MOSFET at is 1.8 volts. With VDS equal to 1.8 volt, we will sweep the voltage
VGS and find out the currents ID. Unlike the BJT in the MOSFET, there is no current in the
gate.
 Figure 4

The gate(G), drain(D) and source(S) terminals and the current ID has been shown in Figure
4 above. Unlike the BJT, in the MOSFET there is no current in the gate. We go back to
the picture in Figure 2 for a brief recap. The gate is made up of metal here. Modern
MOSFET’s are no longer made up of metal, they are made up of poly silicon.

The area marked as SiO2 is called the oxide, which is a very thin oxide layer of silicon
dioxide. The region marked as Semiconductor is the crystalline silicon which has been
doped lightly doped with p-. The silicon in drain and source region is doped with n+. So,
this is the structure of MOSFET. We have got metal, oxide layer and then we have a
semiconductor: a stack of metal oxide semiconductor. This is what makes the acronym for
MOSFET: metal oxide semiconductor field effect transistor. This is a field effect
transistor.

One can study the physical electronics and operation of the MOSFET in devices course.
We just want to point out that there is a stack of metal oxide semiconductor and the oxide
is an insulator. The silicon dioxide we use for gate is a perfect insulator, and unless we
apply large voltages we are not going to have any current. Given that, the current in the
gate terminal is going to be 0. It is not an approximation. In very modern devices, the oxide
layer is just a few atoms thick and we can have some quantum tunneling current through
gate terminal. But in ordinary MOSFETs, the gate current is going to be 0. In this course,
we are nicely going to assume the gate current to be perfectly zero and it’s not an
approximation. The current in the drain is same as the current in the source. We are going
to sweep the voltages VGS VDS and understand its effect on current ID.

Now, in our first experiment we have placed VDS at 1.8 volts which is the maximum
voltage that this device can tolerate in any of its terminals is 1.8 volts. Now you sweep
VGS and measure ID and what we find is that the characteristics looks somewhat like that
shown in ID vd VGS curve Figure 4. It is mostly quadratic in nature and there is a voltage
below which current does not flow. This voltage is called VT, the threshold voltage. If you
try to make a crude model of its equation, you will find that it closely resembles ID equal
to some K constant times VGS minus VT the whole squared.

Now as we had placed VDS at 1.8 volts, if you change it to 1.6 volts or 1.5 volts or 1.7
volts, there is not going to be any change in this curve. So, we can wiggle V DS around,
there is not going to be any significant change in the drain current, this is the
characteristics. Next we are going to sweep VDS and measure ID and for this I have to set
a value of VGS something little above VT. Then we will increase VGS in steps and measure
the value of current ID with respect to VDS. We will find that as we increase VDS beyond a
certain value, the current ID does not change, and we need to find out that value of VDS on
the curve for different values of VGS. If we join all those values of VDS, the curve looks
exactly same as it looks for ID vs VGS curve in Figure 4.

Figure 5
The condition we are going to come up with is that if VDS is greater than or equal to VGS
minus VT, then there is no change in ID, it is going to be flat. This is an approximation
which we are going to correct later on. Later on we are going to find that it is not really so
flat.

Suppose we have got an element and we do not know what this circuit element is and there
is the drain terminal and the source terminal and ID is flowing between drain and source.
Even if we change the voltage between drain and source VDS, ID does not change; In that
case, the circuit element inside is a current source. A current source is a circuit element
across which if we change the voltage, it does not matter the current remains the same.
Almost all analog circuits operate in this region of the MOSFET, where we make sure that
VDS is greater than (VGS - VT), so that the drain to source terminal behaves like a current
source. For nomenclature, this region is called saturation region. Now unfortunately in the
bipolar junction transistor, the saturation region is the opposite exact opposite when VCE
is less than (VBE - Vt), where Vt is the thermal voltage. To avoid confusion on case of
MOSFETs, we are going to call this region as flat region and the region in which VDS is
less than (VGS - VT) as triode region.

An analog circuits do not like to be over triode region. Only under very special situations,
we are going to operate the MOSFET in the triode region otherwise we are going to be in
the flat region of the MOSFET. I am going to call this as the flat region of MOSFET and
flat means that the characteristics is flat in this region and that is exactly where we want
to operate out MOSFET.

Suppose I have set VGS and VDS such that the device is operating in the flat region. Now,
depending on the value of VGS, the current from drain to source is going to change. It
becomes a voltage controlled current source, where the controlling voltage is the voltage
between gate and source. In a voltage controlled current source, the current is the
controlling voltage times some transconductance. But in our case, the current goes by the
equation: ID = (VGS - VT)2.

The relationship is not some linear equation: ID is not equal to some transconductance
times VGS. It is a quadratic equation but as far as conceptual understanding goes it still
looks like a voltage controlled current source.
So, there is a voltage which controls the value of the current and this current happens to
be quadratically related to the voltage between gate and source. Is this understood so far?
In the bipolar junction transistor, we end up with the current controlled current source and
it depends on the base current. There is a current in the base in the BJT, but in MOSFET
the gate does not have any current hence it is a voltage controlled current source.

Before I place the MOSFET, I am going to generalize and write ID equal to some function
of VGS.

Figure 6

The following equation is the model for the MOSFET that we are going to use in this
course.

ID = (VGS - VT)2.

But sometimes if we say that this flat region is not absolutely flat and there is a slight slope
to it, in that case ID is no longer a function only of VGS, it is also a function of VDS. It is a
very strong function of VGS and a very weak function of VDS, but it is still a function of
both VGS and VDS.

What is the slope we are talking about? The answer is suppose ID is some function of VDS.
The slope is the derivative of function of ID with respect to VDS. It is actually the partial
derivative of ID with respect to VDS, since ID is function of both VGS and VDS.
Next, we will do Taylor series:
We had applied VGS and VDS and the current flowing from drain to source is ID. Now we
will add a slight small voltage source of value small vds in addition to capital VDS and small
vgs in addition to capital VGS. The resultant current is iD which is the summation of ID and
id, and is a function f of vDS and vGS. Applying Taylor series on the function f,
𝑖𝐷 = 𝐼𝐷 + 𝑖𝑑 = 𝑓(𝑉𝐺𝑆 + 𝑣𝑔𝑠 , 𝑉𝐷𝑆 + 𝑣𝑑𝑠 )
2
𝜕𝑓 𝜕𝑓 𝜕2 𝑓 𝑣𝑔𝑠
𝑖𝐷 = 𝑓(𝑉𝐺𝑆 , 𝑉𝐷𝑆 ) + (𝜕𝑉 |𝐼𝐷 ). 𝑣𝑔𝑠 + (𝜕𝑉 |𝐼𝐷 ). 𝑣𝑑𝑠 + 𝜕𝑉 2 .2
+….
𝐺𝑆 𝐷𝑆 𝐺𝑆

In addition to the first and second order terms in above equation, there were second order
and higher order terms also. Now, if we assume that small vgs and small vds are very small,
then the second and higher order terminals do not count in the Taylor series expression.
So, our assumption is going to be that small vgs and small vds are infinitesimally small
quantities. In that case, my derivation reduces to:

𝜕𝐼𝐷 𝜕𝐼𝐷
𝑖𝐷 = 𝐼𝐷 + . 𝑣𝑔𝑠 + . 𝑣𝑑𝑠
𝜕𝑉𝐺𝑆 𝜕𝑉𝐷𝑆

The function f of VGS and VDS is nothing but ID.

Figure 7

How to solve the Taylor series? For the given values of VGS and VDS, we have to figure
out the curves in the ID vs VGS graph and the ID vs VDS graph. The points are as marked
with black dots in graphs in Figure 7 above.
Now, if I apply an incremental change in VDS and an incremental change in VGS, the new
current is going to be the old current plus something more. So, for that I work out the slope
over ID vs VDS curve that gives me partial derivative of ID with respect to VDS, and I work
out the slope over ID vs VGS curve that gives me partial derivative of ID with respect to
VGS. Once I compute these two slopes, the small id is equal to the first slope times the
incremental change in vds and the second slope times the incremental change in vgs. This
is shown in Figure 8 below.

Figure 8

Few notes about convention. Whenever we talk about a capital letter voltage or a capital
letter current with a capital subscript, these are fixed voltages and currents. For example,
VDS, VGS and ID. And whenever we talk about a small voltage with a small subscript then
that indicates that it is a small incremental voltage riding on top of the big one. For
example, vds, vgs and id. The sum of the fixed and incremental one is going to be indicated
by small voltage with capital subscript. For example, vDS, vGS and iD. So, the current ID
plus small id is going to be iD. And at last, one which is capital with small subscripts is the
Fourier transform of the small one with small subscript. So, these are the four possibilities.

So, the work done so far is: we first started with applying two voltages VGS and VDS then
we found out the current ID for the given VGS and VDS. Then if I incrementally change VDS
and VGS, we know from Taylor series that I will get a wiggle on the current and the
incremental current is going to come from the Taylor series. There is going to be one
incremental current because of VGS and another incremental current because of VDS.

𝜕𝐼𝐷 𝜕𝐼𝐷
𝑖𝑑 = . 𝑣𝑔𝑠 + . 𝑣𝑑𝑠
𝜕𝑉𝐺𝑆 𝜕𝑉𝐷𝑆

The above equation is modeled in terms of a little circuit. The small id is the sum of two
currents. One current branch is equal to the slope of ID with respect to VGS times the
incremental voltage vgs, and it looks like a voltage dependent current source from drain
terminal to source terminal. Another branch is equal to the slope of ID with respect to VDS
times the incremental voltage vds, and this looks like a resistor between the drain and
source terminals. The value of the resistor is the inverse of the slope.