PD - 91347D

IRLZ44NS/L
l Logic-Level Gate Drive HEXFET® Power MOSFET
l Advanced Process Technology
D
l Surface Mount (IRLZ44NS) VDSS = 55V
l Low-profile through-hole (IRLZ44NL)
l 175°C Operating Temperature RDS(on) = 0.022Ω
l Fast Switching G
l Fully Avalanche Rated ID = 47A
Description S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of D 2 P ak T O -26 2
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRLZ44NL) is available for low-
profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V… 47
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V… 33 A
IDM Pulsed Drain Current … 160
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 110 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ±16 V
EAS Single Pulse Avalanche Energy‚… 210 mJ
IAR Avalanche Current 25 A
EAR Repetitive Avalanche Energy 11 mJ
dv/dt Peak Diode Recovery dv/dt ƒ… 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.4
°C/W
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40

5/11/98
IRLZ44NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.070 ––– V/°C Reference to 25°C, ID = 1mA…
––– ––– 0.022 VGS = 10V, ID = 25A „
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.025 Ω VGS = 5.0V, ID = 25A „
––– ––– 0.035 VGS = 4.0V, ID = 21A „
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V V DS = V GS, ID = 250µA
gfs Forward Transconductance 21 ––– ––– S VDS = 25V, ID = 25A…
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
Qg Total Gate Charge ––– ––– 48 ID = 25A
Qgs Gate-to-Source Charge ––– ––– 8.6 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 25 VGS = 5.0V, See Fig. 6 and 13 „…
td(on) Turn-On Delay Time ––– 11 ––– VDD = 28V
tr Rise Time ––– 84 ––– ID = 25A
ns
td(off) Turn-Off Delay Time ––– 26 ––– R G = 3.4Ω, VGS = 5.0V
tf Fall Time ––– 15 ––– RD = 1.1Ω, See Fig. 10 „…
Between lead,
LS Internal Source Inductance ––– 7.5 ––– nH
and center of die contact
Ciss Input Capacitance ––– 1700 ––– VGS = 0V
Coss Output Capacitance ––– 400 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz, See Fig. 5…
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 47
(Body Diode) showing the
A
I SM Pulsed Source Current integral reverse G

––– ––– 160

(Body Diode)  p-n junction diode. S

V SD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 25A, VGS = 0V „

trr Reverse Recovery Time ––– 80 120 ns TJ = 25°C, IF = 25A
Q rr Reverse Recovery Charge ––– 210 320 nC di/dt = 100A/µs „…
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by ƒ ISD ≤ 25A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
max. junction temperature. ( See fig. 11 ) TJ ≤ 175°C

‚ VDD = 25V, starting TJ = 25°C, L =470µH „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = 25A. (See Figure 12)
… Uses IRLZ44N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
 IRLZ44NS/L

1000 VGS 1000 VGS

TOP 15V TOP 15V
12V 12V
10V 10V
8.0V 8.0V
ID , Drain-to-Source Current (A )

ID , Drain-to-Source Current (A )
6.0V 6.0V
4.0V 4.0V
3.0V 3.0V
BOTTOM 2.5V BOTTOM 2.5V
100 100

10 10
2.5 V

2.5V

2 0µ s P U LS E W ID TH 2 0µ s P U LS E W ID TH
T J = 2 5°C T J = 1 75 °C
1 A 1 A
0.1 1 10 100 0.1 1 10 100
V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.0
I D = 4 1A
R D S (on ) , D rain-to-S ource O n R esistance
I D , D ra in -to-S ourc e C urrent (A)

2.5

T J = 2 5 °C
100 2.0
(N orm alized)

T J = 1 7 5 °C
1.5

10 1.0

0.5

V D S= 2 5 V
2 0 µ s P U L S E W ID T H V G S = 10 V
1 A 0.0 A
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

V G S , G a te -to -S o u rc e V o lta g e (V ) T J , Junction T em perature (°C )

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
IRLZ44NS/L

2800 15
V GS = 0V, f = 1MHz I D = 25 A
C is s = C g s + C g d , C d s S H O R TE D V D S = 4 4V

V G S , G ate-to-S ource V oltage (V )

2400 C rs s = C gd V D S = 2 8V
C oss = C ds + C gd 12
C iss
C , Capacitance (pF)

2000

9
1600

C oss
1200
6

800

C rss 3
400
FO R TE S T C IRC UIT
S E E FIG U R E 1 3
0 A 0 A
1 10 100 0 10 20 30 40 50 60 70
V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC )

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
O P E R A TIO N IN TH IS A R E A L IM ITE D
B Y R D S (o n)
I S D , R everse Drain C urrent (A )

I D , Drain C urrent (A )

100 10µ s

100
100µ s

T J = 1 75 °C
10
1m s
T J = 25 °C

T C = 25 °C 10m s
T J = 17 5°C
V G S = 0V S ing le P u lse
10 A 1 A
0.4 0.8 1.2 1.6 2.0 2.4 1 10 100
V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
 IRLZ44NS/L

50 RD
V DS

VGS
40 D.U.T.
RG
I D , Drain Current (A)

+
V- DD
30
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20

Fig 10a. Switching Time Test Circuit

10
VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature

Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

1
D = 0.50

0.20

0.10
PDM
0.1 0.05
t1
0.02 SINGLE PULSE
0.01 (THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRLZ44NS/L

500
L ID

E A S , S ingle Pulse Avalanc he E nergy (m J)

VDS TOP 10 A
1 7A
D.U.T. B O TT O M 25 A
400
RG +
V
- DD
300
5.0 V IAS
tp
0.01Ω

200

Fig 12a. Unclamped Inductive Test Circuit

100

V(BR)DSS V D D = 25 V
0 A
25 50 75 100 125 150 175
tp
S tarting T J , J unc tion T em perature (°C )
VDD

Fig 12c. Maximum Avalanche Energy

VDS Vs. Drain Current

IAS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

5.0 V +
V
QGS QGD D.U.T. - DS

VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
 IRLZ44NS/L
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. V DD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS

IRLZ44NS/L
D2Pak Package Outline

1 0.54 (.4 15) -B - 1 0.16 (.4 00 )

1 0.29 (.4 05) 4.69 (.1 85) RE F.
1.4 0 (.055 ) 4.20 (.1 65)
-A- 1.3 2 (.05 2)
M AX. 1.2 2 (.04 8)
2
6.47 (.2 55 )
6.18 (.2 43 )

1.7 8 (.07 0) 15 .4 9 (.6 10) 2.7 9 (.110 )

1.2 7 (.05 0) 1 3 14 .7 3 (.5 80) 2.2 9 (.090 )

5 .28 (.20 8) 2.61 (.1 03 )

4 .78 (.18 8) 2.32 (.0 91 )

8.8 9 (.3 50 )
1.40 (.0 55) 1.3 9 (.0 5 5) R E F.
3X
1.14 (.0 45) 0 .93 (.03 7 ) 0.5 5 (.022 ) 1.1 4 (.0 4 5)
3X 0.4 6 (.018 )
0 .69 (.02 7 )
5 .08 (.20 0) 0 .25 (.01 0 ) M B A M M IN IM U M R E CO M M E ND E D F O O TP R IN T

1 1.43 (.4 50 )

NO TE S: LE A D A SS IG N M E N TS 8.89 (.3 50 )
1 D IM EN S IO N S A FTER SO L D ER D IP. 1 - G A TE
2 - D R AIN 17 .78 (.70 0)
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 - S O U RC E
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
3 .8 1 (.15 0)

2.5 4 (.100 )
2 .08 (.08 2) 2X
2X

Part Marking Information

D2Pak

A
IN TE R N A TIO N A L PART NUM BER
R E C T IF IE R
F530S
LO G O
9 24 6
9B 1M DATE CODE
(Y YW W )
A S S E M B LY
YY = Y E A R
LO T C O D E
W W = W EEK
 IRLZ44NS/L
Package Outline
TO-262 Outline

Part Marking Information

TO-262
IRLZ44NS/L
Tape & Reel Information
D2Pak

TR R

1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .60 (.06 3)
4 .1 0 (.1 6 1 ) 1 .50 (.05 9)
3 .9 0 (.1 5 3 ) 0 .3 68 (.0 1 4 5 )
0 .3 42 (.0 1 3 5 )

F E E D D IRE CTIO N 1 .8 5 (.0 7 3 ) 1 1 .6 0 (.4 5 7 )

1 .6 5 (.0 6 5 ) 1 1 .4 0 (.4 4 9 ) 2 4 .3 0 (.9 5 7 )
1 5 .4 2 (.6 0 9 )
2 3 .9 0 (.9 4 1 )
1 5 .2 2 (.6 0 1 )
TR L
1 .75 (.06 9 )
10 .9 0 (.42 9) 1 .25 (.04 9 )
10 .7 0 (.42 1) 4 .7 2 (.1 3 6)
16 .10 (.63 4 ) 4 .5 2 (.1 7 8)
15 .90 (.62 6 )

F E E D D IRE C TIO N

13.50 (.532 ) 2 7.4 0 (1.079)

12.80 (.504 ) 2 3.9 0 (.9 41)

33 0.00 60.00 (2.3 62)

(1 4.1 73) MIN .
MA X.

3 0.40 (1.1 97)

NO TES : MAX.
1. C O M F O R M S TO E IA -4 18. 26 .40 (1.03 9) 4
2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER . 24 .40 (.961 )
3. D IM E N S IO N ME A S U R E D @ H U B .
3
4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E .

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
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http://www.irf.com/ Data and specifications subject to change without notice. 5/98