Q1. How are ON state losses of GaN devices are minimized?

A1. Low values of RON×A for a given V br ensure that ON state losses are minimized.

Q2. What is the use of Qg?

A2. Qg limits the maximum obtainable switching speed and is also an important performance
indicator.

Q3. How does the absence of PN junction affect the GaN HEMTs?
A3. The absence of PN junctions in the device structure ensures that GaN HEMTs
offer significantly less reverse recovery charge (Qrr) in comparison to Si. Moreover, GaN HEMTs
are planar in structure as compared to Si power MOSFETs which essentially are vertical
devices. As a result, GaN HEMTs have lower terminal capacitances in comparison to their Si
counterparts.

Q4. What is the use of Field Plates(FPs) in GaN HEMTs?

A4. Field plates (FPs) have been extensively incorporated in GaN HEMTs like any other power
device to enhance the Vbr of the device by redistributing the electric
field and therefore avoiding gate-actuated breakdown effects

Q5. What FP layouts are used in advanced devices? Indicate its advantage and
disadvantage?
A5. Stacked FP layouts are also used in advanced devices to have multiple connected FPs to
further increase Vbr. However, it leads to increased inter-electrode capacitances which can be
reduced by employing an air-bridge type layout.

Q6. What is the use of n-SiC substrate in Modified Epitaxial Buffer Structures?
A6. The substrate layer has a tendency to act as an alternate conduction path, which is
detrimental to normal device operation. It can lead to the breakdown of the device vertically
across the epitaxial layer stack. In order to prevent that from happening, advanced power
devices take the help of Carbon or Iron doped buffer structures with high vertical blocking
strength to create a separation between the substrate and the GaN channel layer thereby
minimizing leakage currents through them.

Q7. What is the normal state of GaN HEMTs and why?

A7. GaN HEMTs are inherently normally ON in nature due to the existence of 2DEG
at the AlGaN/GaN interface without applying any gate bias. This is an undesirable
feature as far as power electronic circuits are concerned as it would lead to static
power loss as well as it would also complicate the required gate-drive circuit

Q8. In the recess gate approach, why is the thickness of the AlGaN barrier layer is kept
lower?
A8. In the recess gate approach thickness of the AlGaN barrier layer is kept lower than the
critical thickness required for the formation of the 2DEG due to spontaneous and piezoelectric
polarization, as was discussed earlier. As a result, a positive potential at the gate is required to
cause bending of the GaN conduction band at the interface upon which 2DEG formation starts.

Q9. How is the complete removal of the AlGaN barrier helpful in order to overcome the
problem of the normally ON nature of GaN HEMTs?
A9. In the complete removal of the AlGaN barrier, an inversion channel is formed upon applying
positive gate bias. In this case, the current is governed by the bulk properties of GaN and not
the 2DEG, which is a significant drawback of the approach. The resulting transistor is only a
GaN MOSFET and it is devoid of the fundamental advantages offered by a high density and
high mobility 2DEG. It, therefore, bypasses the very motivation of using a HEMT structure in the
first place.

Q10. Explain Cascode structure and its result.

A10. Cascode structure, which is the most recent approach, where a low voltage Si MOSFET is
connected with a normally ON GaN HEMT in cascade configuration. The resultant effective
The transistor is an enhancement-mode transistor with the gate drive the same as that of a
MOSFET, however, it requires the packaging of two switching devices in a leaded multichip
package, which is its possible downside as it might not be cost effective.