Letter of Recommendation for Satish B S

I am writing this letter to give my highest recommendation to Mr. Satish B S to be enrolled for Masters
Program in Electrical and Computer Engineering at your university.

I am the Sr. Design Manager of Networking Component Division at LSI India R&D Pvt. Ltd. in Bangalore.
My team is responsible for the RTL design and verification of some of the most complex Network
Communication Processors in the semiconductor industry today. He was one of the two students selected for
paid internship in my team and later recruited as a Graduate Trainee (contract) Engineer.

During the interview, he was tested on the concepts of ASIC Design flow, Digital Logic design, Processor
architectures, FSM coding, Verilog HDL, developing automated testbenches and C. I observed that he liked
reaching the Kernel of any given problem: starting from the black-box till the switch-level, which
demonstrated his research oriented thinking; a much needed quality to strive in an R & D based company.

During the internship he was trained on basic to advanced ASIC verification languages and methodologies:
Verilog, UNIX, SystemVerilog (SV), Verification Methodology Manual (VMM), Register Abstraction Layer
(RAL), functional coverage and AMBA protocols. With his excellent academics and impressive projects in
both front-end and back-end, he had a great head-start. During his internship, he balanced both work and
academics with ease and even ended up securing a university rank during this period which clearly
demonstrated his multi-tasking ability.

After the training, he was recruited as a GT Engineer to work on one of our Network Communication
Processor which is LSI’s standard chip and worked on one the most challenging blocks in SoC- the “ PCI
Express (PCIe) 3.0” block- in the AXI subsystem. Satish was responsible for the functional verification of the
4GB MPage feature which involved a thorough understanding of the AXI & AHB protocols. He worked on
automated register verification, wrote scripts for running block level regressions and debugged & fixed the
resulting errors either by back-tracing or simulation waveform interpretation.

He shared a good rapport with the team and is a confident speaker; be it in meetings or work-related
discussions with the US team. He is always keen on continuously improving his inter-personal skills.

Satish is very passionate about learning new concepts. Though he can multitask, he often ends up trying to
concurrently do diverse tasks beyond his limitations which can be burdensome. Nevertheless, he is very
sincere and hardworking and has the courage to take up some pretty daunting assignments!.

I believe that his ability to delve deep into the subject & his strong analytical skills will contribute significantly
to the research at any Institute he is part of. I would strongly recommend him for admission at your
University for Masters Program with full financial aid. I am confident that he will prove to be a very valuable
asset to your University.

Jayendra Dwaraka Bhamidipatti

Sr. IC Design Manager Email:jayendra.DB@avagotech.com
NCD-IDC Baseband Dev. and Validation Phone: (+91) 9900129181
Avago Technologies Pvt. Ltd., Bangalore. Work Phone: 8041979540

(previously LSI India R & D Pvt. Ltd.)