Efraim Rotem, Yuli Mandelblat, Vadim Basin, Eli Weissmann, Arik Gihon,

Rajshree Chabukswar, Russ Fenger, Monica Gupta

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Built for Performance Hybrid

All Client Segments – 9W to 125W – built on Intel 7 process

Intelligence built into the Core

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 • Single Thread general purpose compute still critical
- Low latency high IPC - ST and serial segments
• Support vector and ML instructions
• Drives size and power

• Increase in Parallel apps (MT)

- Machine Learning/AI
- Concurrent usage
- Focus on user experience

Shift from multi-ST-performance cores → Performance Hybrid

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Performance Hybrid → E-cores deliver throughput P-Core deliver Performance

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 Built for Performance Hybrid

All Client Segments – 9W to 125W – built on Intel 7 process

Intelligence built into the Core

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▪
▪
▪

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 MT Performance

Apps thread
scalability

30%
8+Core 44%
ST
26%
2-4Core
ST Performance
▪
High core count of High ST performance cores is non-scalable → Hybrid
▪
Hot Chips 2021 7
 1 P-Core 4 P-Core
2 P-Core + 8 E-core
1 E-core

P-Core delivers higher Performance on E-Core provide higher computational

single and lightly threaded scalable apps. density under given physical constraints

Note: Charts are for illustrative purposes only

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 Built for Performance Hybrid

All Client Segments – 9W to 125W – built on Intel 7 process

Intelligence built into the Core

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 BGA Type4 HDI BGA Type3 LGA 1700
28.5 x 19 x 1.1 mm 50 x 25 x 1.3 mm Socket

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 Built for Performance Hybrid

All Client Segments – 9W to 125W – built on Intel 7 process

Intelligence built into the Core

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Monitors the runtime instruction mix
of each thread and as well as the state of each core – with
nanosecond precisionv

Provides runtime feedback to the OS

to make the optimal scheduling decision for any workload
or workflow

Dynamically adapts guidance

based on the thermal design point, operating conditions,
and power settings – without any user input

Power and energy management

Adjust Voltage and frequency to meet user experience while
optimizing power, thermal and energy consumption
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 ▪
▪

0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
523-xalancbmk_043
510-pares t_007
557-xz_022
557-xz_011
510-pares t_008
541-leela_030
531-deepsjeng_031
541-leela_008
541-leela_011
505-mcf_032
531-deepsjeng_030
541-leela_046
531-deepsjeng_012
502-gcc_041
541-leela_017
505-mcf_010
525-x264_030
Busy loops and
→

502-gcc_047
525-x264_048
non scalable apps

549-fotonik3d_059
502-gcc_016
500-perlbench_01 8
525-x264_022
525-x264_041
527-cam4_027
520-omnetpp_0 13
526-blender_046
520-omnetpp_0 27
548-exchange2_0 17
525-x264_016
520-omnetpp_0 11
502-gcc_002
548-exchange2_0 22
520-omnetpp_0 16
526-blender_062
500-perlbench_03 1
521-wrf_062
Mainstream
Applications

538-imagick_011
500-perlbench_02 2
521-wrf_060
523-xalancbmk_035
508-namd_020
548-exchange2_0 28
548-exchange2_0 19
508-namd_023
500-perlbench_05 0
557-xz_005
548-exchange2_0 11
523-xalancbmk_047
548-exchange2_0 48
544-nab_012
508-namd_048
521-wrf_044
508-namd_030
511-povray_050
549-fotonik3d_013
508-namd_045
508-namd_041
519-lbm_038
549-fotonik3d_012
523-xalancbmk_034
521-wrf_048
554-roms_018
500-perlbench_03 3
549-fotonik3d_021
523-xalancbmk_046
503-bwaves_014
511-povray_014
521-wrf_054
554-roms_006
Emerging

527-cam4_022
Applications

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 •
•
•

•
•
•

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Intel Confidential
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▪
▪
▪
-
-

Real app. Class Class 1 + 3 Class 0 + 2

Int + AI 0+1

* Note: Chart is for illustrative purposes and not at scale

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Alder Lake power management rearchitected - hybrid aware
- Core properties and topology
- Impacted by and controls thread scheduling
Example
Each core type may run a mix of thread priorities
- Background threads → low frequency
- Priority threads → high frequency
- Frequency is balanced between core types
- Adjusted to compute load

On power constrained system → power balancing

▪ Power budget distribution optimized

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 Built for Performance Hybrid

All Client Segments – 9W to 125W – built on Intel 7 process

Intelligence built into the Core

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