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Current Source Inverter Based Cascaded Solid State Transformer For AC To DC Power Conversion
Current Source Inverter Based Cascaded Solid State Transformer For AC To DC Power Conversion
Abstract- There are applications like railway traction converters produce the required DC bus voltage for a
system where power converters for HVAC to MVDC or particular application. The topology is based on voltage
MDAC to LVDC are required with a high power/weight source converters. [5, 6] discuss about basic power
ratio. The conventional way is to use heavy line frequency
electronic based high frequency transformer concept
or medium frequency transformers followed by a controlled
which can be used to replace the bulky line frequency
rectifier. The availability of high voltage SiC devices has
made it possible to raise the switching frequency to higher
transformer.
value and hence the size and weight of the transformer can
be reduced. This paper proposes a cascaded current source In this paper, a cascaded converter based topology with
converter based topology with high frequency isolation as a high frequency transformer is proposed where current
replacement of the huge line frequency transformer. The source converters are used. [t is well known that in
paper also presents experimental results as a validation of medium and high voltage applications current source
the functionality of the converter. converters are preferred compared to the voltage source
converters. It is because of the fact that current source
Keywords- Cascaded converter, Solid state transformer,
converters have better control on the short circuit current
and current source converter.
during fault conditions. [7] (Chapter 10) has shown a
current source converter topology with high frequency
I. INTRODUCTION
fly-back transformer in the middle. A new topology for
solid state transformer and its cascaded form for MY
The conventional power converters for MVAC to LVDC application is discussed in [8].
applications require a line frequency transformer at the This paper proposes the cascaded CSI based
front end. With the invention of solid state transformer, converter for MVAC to LVDC application. A laboratory
the bulky and heavy line frequency transformer can be prototype of this converter has been build and
replaced with the compact high frequency one. The experimental results are presented here to validate the
problem in selecting high switching frequency for the operation of the converter.
transformer is the unavailability of suitable devices (low
switching loss) at that high voltage. For some particular
application like traction system, the heavy and bulky II. CONVERTER TOPOLOGY
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The 2014 International Power Electronics Conference
voltage to each of the cascaded sections. The switching the fly-back inductor. During this charging time, the rear
scheme of the cascaded sections is same. Therefore, the end converter remains in sleeping mode. The rear end
current in the series connected front end converters may converter switches are turned ON and the front end pairs
differ and hence the voltage distribution of the capacitors are turned OFF when the inductor current reaches a
can be unequal. This unequal voltage sharing appears as specified value. The switches are so selected that the
an extra voltage burden to some of the switches on the energy stored in the air gap is dumped into the output
high voltage side. To mitigate this problem, either capacitor. During this mode the front end converter goes
external hardware circuits balancing the capacitor to sleeping mode like the rear end converter in inductor
voltages can be implemented, or special control charging mode. Fig. 3(a) and (b) show the possible
algorithm for the cascaded converters can be inductor charging and discharging current paths
implemented so as to balance the series connected respectively. In practice, there should be an overlapping
capacitor voltages. Moreover, the design and fabrication time between the two converters to avoid voltage spike
of the fly-back inductors should be identical to the extent due to high Ldi/dt. This charging and discharging of the
it is possible so that the unequal voltage sharing issue is inductor is performed within a short period compared to
minimized at the root. the fundamental period of the source voltage. The fly
The output sections of the cascaded converters back transformer size and weight depends on the selected
are connected in parallel to the DC bus capacitor. frequency of this charging and discharging cycle.
Therefore, any mismatch in the secondary side of the fly The switching sequence of the cascaded
back inductors current should not lead to any problem. converters remains same. This equalizes the voltage
As shown in Fig.l, suitable resistances are connected sharing of the series connected capacitors at the input
across each series connected capacitor at the input side to side. However, there may be differences in the switching
have proper distribution of the input voltage. characteristics of the switches and the fly-back inductors
may not be identical. This will lead to unequal voltage
distribution in the input capacitors. The control oc
converters should be able to take care of this unequal
----
Flyback voltage distribution at steady state.
Converter 1 Transformer
.....
Traction Motor
- - - =@
� �t - C-·�{::- �f
AC
�
, - l-�- �-�-,-----1--l�
_____ __ .r-i _____
- l-----j- - - - 1
1 ' '
I
: � I
1 1
I
I Figure 2: A section of the cascaded converter
I
_____ __ .r-i _____
652
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The 2014 International Power Electronics Conference
V
f-1 L HPWM f- liB
dCreed back
V
�PWM f- liB
C 1 reed back
Vac Pulses to slave 2
L
(b) During charging period of the fly-back inductor
653
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The 2014 International Power Electronics Conference
compared to the other two with the simple PWM scheme. 'II '
This voltage gets distributed equally between the
converter sections with the modified control scheme
working.
Fig. 7 shows the input side capacitor voltages
(top and middle) with and without the voltage balancing
algorithm working. Without the voltage balancing
algorithm, the capacitor peak voltages are 51.1V and
67.3V respectively. These voltages become 58.6V and
58.1V respectively when the algorithm is working.
Similarly, the top and bottom capacitor voltages are
shown in Fig. 8. Figure 6(b): With the voltage balancing algorithm of the input
capacitors working.
10,3370ms 0 f-110V
Figure 6(a): With the voltage balancing algorithm of the input o 50,OV .. SO,OV '" -47,500 ? 0+
capacitors working.
Figure 8(a): With the voltage balancing algorithm of the input
capacitors working.
654
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The 2014 International Power Electronics Conference
655
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