Unit-IV

SHORT ANSWER QUESTIONS

1. What is an Op-amp? List the building blocks of an Op-amp.

Ans: An operational amplifier is a direct coupled high gain amplifier consisting of
one or more differential amplifiers and followed by a level translator and an output stage. It is
designed for computing mathematical operations such as Addition, Subtraction,
Multiplication, integration and Differentiation.

Block Diagram:

2. What are the ideal characteristics of Op-amp?

Ans: An ideal Op-Amp would exhibit the following electrical characteristics.

1. Infinite voltage gain. (A=∞).

2. Infinite input resistance. (Ri=∞),
3. Zero output resistance .(RO=∞),
4. Zero output voltage when input voltage is zero.
5. Infinite bandwidth .(BW=∞)
6. Infinite common mode rejection ratio.(CMRR= ∞)
7. Infinite slew rate.(SR=∞)

3. Mention applications of Op-amp.

Ans: Op amps are used in a wide variety of applications in electronics. Some of the

more common applications are: as a voltage follower, inverting amplifier, non
inverting amplifier, difference amplifier, logarithmic and anti-logarithmic amplifier,an
current-to-voltage converter, Precision rectifier, integrator, active filter, and a voltage
comparator

4. Define the terms Slew rate and CMRR.

Ans: Slew rate (SR) is defined as the maximum rate of change of output voltage per
unit of time and is expressed in volts / micro seconds.

Common Mode Rejection Ratio(CMRR) is defined as the ratio of the differential

voltage gain Ad to the common mode voltage gain ACM.
A
CMRR  d
A CM

The differential voltage gain Ad is same as the large signal voltage gain A.
The common mode voltage gain ACM is determined by using the equation

Vocm
A CM 
Vcm

Where Vocm =Output common mode voltage

Vcm = Input common mode voltage

ACM =Common mode voltage gain

5. What is an instrumentation amplifier?

Ans: Instrumentation amplifier is a kind of differential amplifier with additional input
buffer stages. Instrumentation amplifiers are commonly used in industrial test and
measurement application
6. Give the truth table of full subtractor.
Ans:

7. Give the truth table of half subtractor.

Ans:

8. Describe the limitations of Op-amp in its open loop configurations.

Ans: Because op-amp is a high gain device even a noise voltage can be amplified to large extent.
If we are not using a feedback, the output of open loop configuration is always at saturation. So
we get only a constant saturated voltage, such types of configuration is useless in real application
that’s why open loop configuration is not using.
9. Draw the symbol and give the truth table for Ex-OR?
Ans:

10. Draw the truth tables of OR, AND and NOT gates.
Ans:
 11. What is half adder? Give its truth table.
Ans: Half adder is a combinational arithmetic circuit that adds two numbers and
produces a sum bit (S) and carry bit (C) as the output. If A and B are the input bits,
then sum bit (S) is the X-OR of A and B and the carry bit (C) will be the AND of A
and B. From this it is clear that a half adder circuit can be easily constructed using one
X-OR gate and one AND gate.

12. Differentiate between a combinational circuit and sequential circuit.

Ans: Combinational logic circuit  is a type of logic circuit whose output depends only
on the present value of its input signals where as Sequential logic circuit  is a type of
logic circuit whose output depends not only on the present value of its input signals
but on the sequence of past inputs.

13. Write DeMorgon’s theorems.

Ans: DeMorgan’s Theorems are two additional simplification techniques that can be
used to simplify Boolean expressions.
Theorem 1: The compliment of the product of two variables is equal to the sum of
the compliment of each variable. Thus according to De-Morgan's laws or De-Morgan's
theorem if A and B are the two variables or Boolean numbers. Then accordingly

Theorem 2: The compliment of the sum of two variables is equal to the product of
the compliment of each variable. Thus according to De Morgan’s theorem if A and B are the
two variables then.

14. Draw the circuit for full adder.

 15.How a half adder can be converted into a full adder?
Ans: A full adder can be implemented by combining two half adders.

LONG ANSWER QUESTIONS

1. Explain the applications of Op-amp with expressions.

(i)Summer (ii) Integrator (iii) Differentiator.

Ans: Inverting summer:

The configuration is shown in fig. With three input voltages Va, Vb & Vc. Depending upon
the value of Rf and the input resistors Ra, Rb, Rc the circuit can be used as a summing
amplifier, scaling amplifier, or averaging amplifier.

Applying KCL at V2 node

This means that the output voltage is Fig.

equal to the negative sum of all the
inputs times the gain of the circuit Rf/
R; hence the circuit is called a summing
amplifier. When Rf= R then the output
voltage is equal to the negative sum of
all inputs.

Vo= -(Va+ Vb+ Vc)

Hence it is called inverting summer.

OR

Non-inverting Summer:

If the input voltages are connected to non-inverting input through resistors, then the circuit
can be used as a summing or averaging amplifier through proper selection of R1, R2, R3 and
Rf. as shown in fig.

To find the output voltage expression, V1 is

required. Applying superposition theorem,
the voltage V1 at the non-inverting terminal
is given by

Hence the output voltage is

Fig.

This shows that the output is equal to the average of all input voltages times the gain of the
circuit (1+ Rf / R1), hence the name averaging amplifier.

If (1+Rf/ R1) is made equal to 3 then the output voltage becomes sum of all three input
voltages.

Vo =V a + Vb+ Vc

Hence, the circuit is called summer

INTEGRATOR

A circuit in which the output voltage waveform is the integral of the input voltage waveform
is called integrator. Fig. , shows an integrator circuit using OP-AMP.
Here, the feedback element is a capacitor. The current drawn by OP-AMP is zero and also
the V2 is virtually grounded.

Therefore, i1 = if and V2 = V1 = 0

Integrating both sides with respect to time from 0 to t, we get

The output voltage is directly proportional to the negative integral of the input voltage and
inversely proportional to the time constant RC.

If the input is a sine wave the output will be cosine wave. If the input is a square wave, the
output will be a triangular wave. For accurate integration, the time period of the input signal
T must be longer than or equal to RC.

Fig. Shows the output of integrator for square and sinusoidal inputs.
 DIFFERENTIATOR

Differentiator: A circuit in which the output voltage waveform is the differentiation of input
voltage is called differentiator. As shown in fig.

The expression for the output voltage can be obtained from the Kirchhoff’s current equation
written at node V2.
Thus the output Vo is equal to the RC times the negative instantaneous rate of change of the
input voltage Vin with time. A cosine wave input produces sine wave output and a
Square wave input produces Spikes as output.

Practical Differentiator :(not important in the exam point) The input signal will be
differentiated properly if the time period T of the input signal is larger than or equal to Rf C,
i.e T ≥  Rf C.As the frequency changes, the gain changes. Also at higher frequencies the
circuit is highly susceptible at high frequency noise and noise gets amplified. Both the high
frequency noise and problem can be corrected by adding, few components. As shown in fig.

2. Draw the instrumentation amplifier using Op-amp. Explain its operation.

Ans:
INSTRUMENTATION AMPLIFIER USING TRANSDUCER BRIDGE

Following figure shows a simplified instrumentation amplifier using a transducer bridge.

A resistive transducer whose resistance changes as a function of some physical energy is
connected in one arm of the bridge with a small circle around it and is denoted
by  where RT is the resistance of the transducer and ∆R is the change in
resistance RT.
The bridge in circuit is dc excited .For the balanced bridge at some reference condition,

 Generally, resistors RA, RB, and Rc are selected so that they are equal in value to the
transducer resistance RT at some reference condition.
 The bridge is balanced initially at a desired reference condition. However, as the
physical quantity to be measured changes, the resistance of the transducer also
changes, which causes the bridge to unbalance (Va≠Vb). The output voltage of the
bridge can be expressed as a function of the change in resistance of the transducer, as
described next.
 Let the change in the resistance of the transducer be ∆R. since RB and Rc are fixed
resistors, the voltage Vb is constant. However, voltage Va, varies as a function of the
change in transducer resistance.
 Therefore, according to the voltage-divider rule,

The negative sign in this equation indicated that Va<Vb because of the increase in the value of
∆R.
The output voltage Vab of the bridge is then applied to the differential instrumentation
amplifier composed of three op-amps. The voltage followers preceding the basic differential
amplifier help to eliminate loading of the bridge circuit. The gain of the basic differential
amplifier is (-Rf/R1); therefore, the output Vo of the circuit is,

Generally, the change in resistance of the transducer ∆R is very small. Therefore, we can
approximate (2R+∆R) ≈2R. Thus, the output voltage is,
The equation indicates that Vo is directly proportional to the change in resistance ∆R of the
transducer. Since the change in resistance is caused by a change in physical energy, a meter
connected at the output can be calibrated in terms of the units of that physical energy.

3. Show that Op-amp can be used as a non-inverting summing amplifier.

Ans: Ref: Non-inverting Summer in Question 1

4. What are the universal logic gates? Realize the basic logic gates from universal logic
gates.
Ans: The NAND and NOR gates are called universal logic gates because combination of
these can be used to realize all the basic logic gates.

Realization of basic logic gates i.e. NOT, AND and OR using NAND gates is as
shown below.

Realization of basic logic gates i.e. NOT, AND and OR using NOR gates is as shown
below.
5. Give the logical symbols, Boolean expressions and the truth tables of a two input
NOR and NAND gates.
Ans:
NOR Gate: The output of NOR gate is high when inputs neither A nor B is high.

NAND Gate: The output of NAND gate is high when either of inputs A or B is high.
 6. Draw the circuit for full adder using Universal gates with the help of truth tables.
Ans:
Full adder: Full adder is a logic circuit that adds two input bits A,B and a Carry in bit
and outputs are Carry out bit and a sum bit.. The Sum out (Sout) of a full adder is the XOR of
input bits A, B and the Carry in (Cin) bit.  Truth table and schematic of Full adder is shown
below.

Full adder using NAND and NOR logic.

Full adder can be made using NAND logic as shown below.

Full adder can be made using NOR logic as shown below.

 7. Draw the circuit for half adder using Universal gates with the help of truth tables.
Ans: Half adder is a combinational arithmetic circuit that adds two numbers and produces
a sum bit (S) and carry bit (C) as the output. If A and B are the input bits, then sum bit (S)
is the X-OR of A and B and the carry bit (C) will be the AND of A and B. From this it is
clear that a half adder circuit can be easily constructed using one X-OR gate and one
AND gate. The truth table, schematic representation and XOR//AND realization of a half
adder are shown in the figure below.

NAND gates or NOR gates can be used for realizing the half adder in universal logic and
the relevant circuit diagrams are shown in the figure below.

Implementation of Half Adder Using NAND Gate:

 Implementation of Half Adder Using NOR Gate:

8. Draw the circuit for full subtractor using Universal gates with the help of truth
tables.
Ans:
Full Subtractor: A combinational logic circuit that performs a subtraction between the
two binary bits by considering borrow of the lower significant stage is called as the full
subtractor. It has three input terminals in which two terminals corresponds to the two bits
to be subtracted (minuend A and subtrahend B), and a borrow bit Bi corresponds to the
borrow operation. There are two outputs, one corresponds to the difference D output and
other borrow output Bo as shown in figure along with truth table.

Implementation of Full Subractor Using NAND Gate:

Implementation of Full Subractor Using NOR Gate:

9. Draw the circuit for half subtractor using Universal gates with the help of truth
tables.
Ans:
Half Subtractors: A half subtractor is a multiple output combinational logic network that
does the subtraction of two bits of binary data. It has two input variables and two output
variables. Two inputs are corresponding to two input bits and two output variables
correspond to the difference bit and borrow bit.

Implementation of Half Subractor Using NAND Gate:

Implementation of Half Subractor Using NOR Gate:

3. Prove that
If A+B=A+C and A+B= A+C then B=C
and
If A+B=A+C and AB=AC then B=C