Compal La 2351 r1b Schematics

5 4 3 2 1
COMPAL CONFIDENTIAL
MODEL NAME : EDL70/71
D D
COMPAL P/N :
PCB NO :
Revision : 1B
EDL70/71 Schematics Document

C
uFCBGA/uFCPGA Mobile Dothan C
Intel Alviso + ICH6M
2005-02-25
REV : 1B
B B
A A
Compal Electronics, Inc.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EDL71 LA2351 1B
Date: Wednesday, March 02, 2005 Sheet 1 of 59
5 4 3 2 1
5 4 3 2 1
Compal confidential
Model : EDL71
FAN Thermal(CPU) Pentium-M
Dothan
+3VS G781
+5VS page 8 page 8 uFCPGA CPU
+VCCP (1.05V)
Clock Generator
+CPU_CORE 478pin page 5,6,7 ICS954226
D D
+3VS page 17
H_A#(3..31) H_D#(0..63)
System Bus
+VCCP 400/533 MHz
TV OUT
page 25 INTEL
Memory BUS DDRI-DIMM X2
+1.5VS Alviso 2.5V 333 MHz BANK 0, 1, 2, 3
CRT CONN +1.8VS +1.5VS
(DDRI)
page 25 CRT Signal
PCI-E 16X 1257BGA
+VGA_CORE ATI M24P +2.5V +1.25VS
Internal LVDS
+3VS +VCCP +2.5V page 14,15
LVDS CONN +2.5VS +3VS
page 24 page 9,10,11,12,13
+1.2VS page 18,19,20,21 +2.5VS
Frame Buffer
64/128 Thermal(VGA)
DMI
C page 22,23 +3VS G781-1 page 26 C
+1.5VS
IDSEL:AD18
100MHz
(PIRQG#,PIRQH#,GNT#1,REQ#1)
+3VALW 33MHz
IDSEL:AD19
(PIRQH#,PIRQG#,GNT#4,REQ#4)
IDSEL:AD20
(PIRQA,B#,GNT#2,REQ#2),SIRQ PCI BUS 48MHz USB[0,2,4,6] USB Ports X4
INTEL
IDSEL:AD16 IDSEL:AD17 +3VS +5VALW page 40
(PIRQE#,GNT#0,REQ#0) (PIRQF#,GNT#3,REQ#3) +3V ICH6-M 24.576MHz AC-LINK
+1.5VS
Minipci CONN X2 609 BGA
VT6301S CardBus Controller RTL8110SBL +1.5V ATA100
WIRELESS ENE CB712
1394 Controller +S1_VCC /8100CL +2.5VS
page 27,28,29,30 MDC
+3VS page 32 +5VS
TV Turner page 34 +3VS
+3VALW page 35 +3VS
page 37,38 +3V
Port DEBUG LPC BUS page 39
+5VS +3VALW
1394 Card PCMCIA
+3VS page 43 33MHz Cable
B CONN RJ45 Parallel ATA AC97 Codec B
page 34 Reader Slot +5VS page 31 ALC250
+VCC_5IN1 +S1_VCC
+S1_VPP
page 36 KB910 +5VAMP
RJ11
page 33
page 33 +3VS page 44
X BUS IDE
page 36
+1.5VS/+VCCP +5VS CD-ROM

+3VALW page 41
page 53 RTC BATT SST39VF040 +5VCD
page 42 page 31
+1.8VS/ page 50 Int.KBD

DC IN page 43
+VGA_CORE AMP & INT. HeadPhone &
page 54 page 48
Power On/Off Speaker MIC CONN
CPU_CORE 2.5V/+1.2VS/ SW & LED +5VAMP page 45 +5VAMP page 45
page 55
+1.25VS page 52
page 43
Touch Pad &
A LID SW A
CHARGER 3V/5V/12V DC/DC Interface +5VS

page 43
page 49 page 51 page 47
Title
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
D D
AC VIN MAINPWON LM358

Adapter Thermal
VS
in Protector
P48
P50
SWITCH
ADPPWR
VL FAN5234
P49
DC/DC
RUN +3VALWP (2.5V) +2.5V 7.106A
B+ MAX1902 P53 SUSP B+ VR_ON
+5VS
DC/DC +12VALWP
(3V/5V/12V)
MB3887 VCC SHDN#
BATT+ Charger +5VALWP +1.25V 1A MAX1532
C C
SHDN# P52 DC/DC
P50 (CPU_CORE)
VS
2.5VP
2.5VREF ALP5331
Vcc DC/DC P55
MAX8743 +1.5VP 5A 3VALW (1.25V)
51_ON# TPO610T SUSP
DC/DC P53 EN
SWITCH
VMB (1.5V/VCCP)
P50 B+ CPU_CORE
(+1.308V 25A)
CHGRTC VS_ON1/VS_ON2
ON1/ON2 P54
G920 +VCCP 6.420A
RTC BATT
Charger P50
Battery A
8 Cell
B B+ B
Battery
CHG/DIS
Connector
A P48
BATT+ SWITCH
BATT
P48
LM393
VS BATT OVP
P49 BATT_OVP
A A

Title
Power Rail
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
Board ID Table for AD channel

Vcc 3.3V +/- 5%
Voltage Rails Ra
Board ID
100K +/- 5%
Rb V AD_BID min V AD_BID typ V AD_BID max
Power Plane Description S0-S1 S3 S5 0 0 0 V 0 V 0 V
VIN Adapter power supply (19V) N/A N/A N/A
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
D
B+ AC or battery power rail for power circuit. N/A N/A N/A
2 18K +/- 5% 0.436 V 0.503 V 0.538 V D
+CPU_CORE Core voltage for CPU ON OFF OFF

3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+PCIE_1.2VS +PCIE_1.2VS power rail for VGA PCIExpress ON OFF OFF
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+0.9VS 0.9VS for DDR2 Termination ON OFF OFF
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+VGA_CORE VGA Core Power ON OFF OFF
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+1.5VS MCH & ICH Core Power ON OFF OFF
7 NC 2.500 V 3.300 V 3.300 V
+1.8VS 1.8V switched power rail ON OFF OFF
+2.5VS 2.5VS switched power rail ON OFF OFF
Board ID PCB Revision
+3VALW 3.3V always on power rail ON ON ON*
0 0.1
+3V 3.3V power rail ON ON OFF
1 0.2
+3VS 3.3V switched power rail ON OFF OFF
2 0.3
+5VALW 5V always on power rail ON ON ON*
3 0.4
+5VS 5V switched power rail ON OFF OFF
4 0.5
+12VALW 12V always on power rail ON ON ON*
5 0.6
C +RTCVCC RTC power ON ON ON
6 1.0 C
* 7 1.B
SKU ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. Vcc 3.3V +/- 5%
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
0 0 0 V 0 V 0 V
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
2 18K +/- 5% 0.436 V 0.503 V 0.538 V
External PCI Devices 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
Device IDSEL# REQ#/GNT# Interrupts 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
VGA PIRQA 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
1394 AD16 0 PIRQE 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
B B
LAN AD17 3 PIRQF 7 NC 2.500 V 3.300 V 3.300 V
C ardBus AD20 2 PIRQA,B
Mini-PCI AD18 1 PIRQG/PIRQH
SKU ID EDL71 SKU
Mini-PCI II for TV Turnner AD19 4 PIRQH/PIRQG * 0 EDL71 10/100 LAN WO/TV TUNER
1 EDL71 GIGA LAN W/TV TURNER
EC SM Bus1 address EC SM Bus2 address 2 EDL71 10/100LAN W/TV TUNER
Device Address Device Address
3 EDL71 GIGA WO/TV TUNER
Smart Battery 0001 011X b G781 1001 100X b
4 EDL71 10/100 LAN WO/TV TUNER
EEPROM(24C16/02) 1010 000X b
5 EDL71 10/100LAN W/TV TUNER
G781-1 1001 101X b
6 EDL71 GIGA WO/TV TUNER
7 EDL71 GIGA LAN W/TV TURNER
ICH6 SM Bus address NOTE1:
Device Address SWDJ@ : SWDJ
TV@ : TV Tunner
Clock Generator NOSWDJ@ : W/O SWDJ
( ICS954206) 1101 001Xb
A
100@ : 10/100M LAN A
DDRII DIMM0 1010 000Xb @XX : Depop component

GIGA@ : 10/100M/1000M LAN
DDRII DIMM1 1010 001Xb
1@XX : Pop for Integrated Graphic
2@XX : Pop for External Graphic Title
Notes List
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
9 H_A#[3..31] H_D#[0..63] 9
JP1A
Dothan
H_A#3 P4 A19 H_D#0
H_A#4 A3# D0# H_D#1
U4 A4# D1# A25
H_A#5 V3 A22 H_D#2
H_A#6 A5# D2# H_D#3
R3 A6# D3# B21
H_A#7 V2 A24 H_D#4
H_A#8 A7# D4# H_D#5
W1 A8# D5# B26
H_A#9 T4 A21 H_D#6 +3V
H_A#10 A9# D6# H_D#7 R63
W2 A10# D7# B20
H_A#11 Y4 C20 H_D#8 150_0603_1%
H_A#12 A11# D8# H_D#9 ITP_DBRESET#
Y1 A12# D9# B24 1 2
D H_A#13 U1 D24 H_D#10 D
H_A#14 A13# D10# H_D#11
AA3 A14# D11# E24
H_A#15 Y3 C26 H_D#12 +VCCP
H_A#16 A15# D12# H_D#13 R64
AA2 A16# D13# B23
H_A#17 AF4 E23 H_D#14 54.9_0603_1%@
H_A#18 A17# D14# H_D#15 ITP_TDO
AC4 A18# D15# C25 1 2
H_A#19 AC7 H23 H_D#16 R65
H_A#20 A19# D16# H_D#17 @ 54.9_0603_1%
AC3 A20# D17# G25
H_A#21 AD3 L23 H_D#18 1 2 H_RESET#
H_A#22 A21# D18# H_D#19
AE4 A22# D19# M26
H_A#23 AD2 H24 H_D#20
H_A#24 A23# D20# H_D#21 +VCCP R66
AB4 A24# D21# F25
H_A#25 AC6 ADDR GROUP DATA GROUP G24 H_D#22 39.2_0603_1%
H_A#26 A25# D22# H_D#23 ITP_TMS
AD5 A26# D23# J23 1 2
H_A#27 AE2 M23 H_D#24 R68
H_A#28 A27# D24# H_D#25 150_0603_1%
AD6 A28# D25# J25
H_A#29 AF3 L26 H_D#26 1 2 ITP_TDI
H_A#30 A29# D26# H_D#27 This shall place near CPU
AE1 A30# D27# N24
H_A#31 AF1 M25 H_D#28 R70
9 H_REQ#[0..4] A31# D28#
H26 H_D#29 680_0402_5%
H_REQ#0 D29# H_D#30 ITP_TRST#
R2 REQ0# D30# N25 1 2
H_REQ#1 P3 K25 H_D#31 R71
H_REQ#2 REQ1# D31# H_D#32 27.4_0603_1%
T2 REQ2# D32# Y26
H_REQ#3 P1 AA24 H_D#33 1 2 ITP_TCK
H_REQ#4 REQ3# D33# H_D#34
T1 REQ4# D34# T25
U23 H_D#35
H_ADSTB#0 D35# H_D#36
9 H_ADSTB#0 U3 ADSTB0# D36# V23
H_ADSTB#1 AE5 R24 H_D#37
9 H_ADSTB#1 ADSTB1# D37#
R26 H_D#38
C
D38# H_D#39 C
D39# R23
@ R801 2 0_0402_5%
1 CPU_ITTP A16 AA23 H_D#40
17 CLK_CPU_ITP ITP_CLK0 D40#
2 1 CPU_ITTP# A15 U26 H_D#41
17 CLK_CPU_ITP# ITP_CLK1 D41#
@ R802 0_0402_5% V24 H_D#42
CLK_CPU_BCLK D42# H_D#43
17 CLK_CPU_BCLK B15 BCLK0 D43# U25
CLK_CPU_BCLK# B14 HOST CLK V26 H_D#44
17 CLK_CPU_BCLK# BCLK1 D44#
Y23 H_D#45
D45# H_D#46
D46# AA26
Y25 H_D#47
H_ADS# D47# H_D#48
9 H_ADS# N2 ADS# D48# AB25
H_BNR# L1 AC23 H_D#49
9 H_BNR# BNR# D49#
H_BPRI# J3 AB24 H_D#50
9 H_BPRI# BPRI# D50#
H_BR0# N4 AC20 H_D#51
9 H_BR0# BR0# D51#
H_DEFER# L4 AC22 H_D#52
9 H_DEFER# DEFER# D52#
H_DRD Y# H2 AC25 H_D#53
9 H_DRDY# DRDY# D53#
R72 H_HIT# K3 AD23 H_D#54
9 H_HIT# HIT# D54#
56_0402_5% H_HITM# K4 CONTROL GROUP AE22 H_D#55
9 H_HITM# HITM# D55#
1 2 H_IERR# A4 AF23 H_D#56
+VCCP H_LOCK# IERR# D56# H_D#57
9 H_LOCK# J2 LOCK# D57# AD24
H_RESET# B11 AF20 H_D#58
9 H_RESET# RESET# D58#
AE21 H_D#59
D59# H_D#60
9 H_RS#[0..2] D60# AD21
H_RS#0 H1 AF25 H_D#61
H_RS#1 RS0# D61# H_D#62 +3VS
K1 RS1# D62# AF22
H_RS#2 L2 AF26 H_D#63
H_TRDY# RS2# D63#
9 H_TRDY# M3 TRDY# +VCCP
1
DINV0# D25 H_DINV#0 9
J26 R731
B DINV1# H_DINV#1 9 B
C8 BPM0# DINV2# T24 H_DINV#2 9 1K_0402_5%
B8 BPM1# DINV3# AD20 H_DINV#3 9
A9
2
BPM2#
1
C9 BPM3# H_DSTBN#[0..3] 9
C23 H_DSTBN#0 R730
ITP_DBRESET# DSTBN0# H_DSTBN#1
A7 DBR# DSTBN1# K24 56_0402_5%
H_DBSY# M2 W25 H_DSTBN#2
9 H_DBSY# DBSY# DSTBN2# PROCHOT# 41
H_DPSLP# B7 AE24 H_DSTBN#3
28 H_DPSLP# H_DSTBP#[0..3] 9
2
DPSLP# DSTBN3#
1
H_DPRSLP# G1 C22 H_DSTBP#0 R147 C
28 H_DPRSLP# DPRSTP# DSTBP0#
C19 L24 H_DSTBP#1 56_0402_5% 2 Q67
9 H_DPWR# DPWR# DSTBP1# B
A10 MISC W24 H_DSTBP#2 2SC2411K_SC59
PRDY# DSTBP2# H_DSTBP#3 E
B10 AE25
3
H_PROCHOT# PREQ# DSTBP3#
B17
2
PROCHOT#
E4 H_PROCHOT#
28 H_CPUPWRGD PWRGOOD
H_CPUSLP# A6
9,28 H_CPUSLP# SLP#
ITP_TCK A13
ITP_TDI TCK H_A20M#
C12 TDI A20M# C2 H_A20M# 28
ITP_TDO A12 D3 H_FERR#
TDO FERR# H_FERR# 28
TEST1 C5 A3 H_IGNNE# R149
TEST1 IGNNE# H_IGNNE# 28
TEST2 F23 B5 H_INIT# TEST2 1 2
TEST2 INIT# H_INIT# 28
ITP_TMS C11 D1 H_INTR
TMS LINT0 H_INTR 28
ITP_TRST# B13 D4 H_NMI @ 1K_0402_5%
TRST# LINT1 H_NMI 28
LEGACY CPU R148
THERMAL TEST1 1 2
H_THERMDA B18 C6 H_STPCLK#
8 H_THERMDA
H_THERMDC A18 THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# 28
@ 1K_0402_5%
8 H_THERMDC THERMDC SMI# B4 H_SMI# 28
8,9,28 H_THERMTRIP# C17 THERMTRIP#
A A
H_THERMDA, H_THERMDC routing together. TYCO_1612365-1_Dothan

Trace width / Spacing = 10 / 10 mil
75ohm pull-up of H_THERMTRIP#
+VCCP
R88
1
75_0402_5%
2 H_THERMTRIP#
should be within 2" from the Compal Electronics, Inc.
series resistor Title
R74
Dothan Processor in mFCPGA479
200_0402_5% Add pullups for PWRGOOD and THERMTRIP per INTEL Size Document Number Rev
+VCCP 1 2 H_CPUPWRGD DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+CPU_CORE
R75 JP1B JP1C
@ 54.9_0603_1%
1 2 VCCSENSE AE7 A2 F20 T26
+VCCA_PROC VSSSENSE VCCSENSE VSS VCC VSS
1 2 AF6 VSSSENSE VSS A5 F22 VCC VSS U2
R76 A8 G5 U6
@ 54.9_0603_1% VSS VCC VSS
VSS A11 G21 VCC VSS U22
F26 VCCA0 VSS A14 H6 VCC VSS U24
B1 VCCA1 VSS A17 H22 VCC VSS V1
N1 VCCA2 VSS A20 J5 VCC VSS V4
AC26 VCCA3 VSS A23 J21 VCC VSS V5
R78 A26 K22 V21
0_0603_5% VSS VCC VSS
+VCCP P23 VCCQ0 VSS B3 U5 VCC VSS V25
D
+1.5VS 1 2 W4 VCCQ1 VSS B6 V6 VCC VSS W3 D
VSS B9 V22 VCC VSS W6
Dothan VSS B12 W5 VCC VSS W22
0.01U_0402_16V7K
10U_0805_10V4Z
D10 VCCP VSS B16 W21 VCC VSS W23
1 1 D12
D14
VCCP
VCCP
VSS
VSS
B19
B22
Y6
Y22
VCC
VCC
Dothan VSS
VSS
W26
Y2
C18
C19
D16 VCCP VSS B25 AA5 VCC VSS Y5
E11 VCCP VSS C1 AA7 VCC VSS Y21
2 2
E13 C4 AA9 Y24
POWER, GROUNG, RESERVED SIGNALS AND NC

VCCP VSS VCC VSS
E15 VCCP VSS C7 AA11 VCC VSS AA1
F10 VCCP VSS C10 AA13 VCC VSS AA4
K6 VCCP VSS C21 AA21 VCC VSS AA12
L5 VCCP VSS C24 AB6 VCC VSS AA14
L21 VCCP VSS D2 AB8 VCC VSS AA16
M6 VCCP VSS D5 AB10 VCC VSS AA18
M22 VCCP VSS D7 AB12 VCC VSS AA20
N5 VCCP VSS D9 AB14 VCC VSS AA22
N21 VCCP VSS D11 AB16 VCC POWER, GROUND VSS AA25
P6 VCCP VSS D13 AB18 VCC VSS AB3
P22 VCCP VSS D15 AB20 VCC VSS AB5
R5 VCCP VSS D17 AB22 VCC VSS AB7
R21 VCCP VSS D19 AC9 VCC VSS AB9
T6 VCCP VSS D21 AC11 VCC VSS AB11
T22 VCCP VSS D23 AC13 VCC VSS AB13
U21 VCCP VSS D26 AC15 VCC VSS AB15
VSS E3 AC17 VCC VSS AB17
C E6 AC19 AB19 C
VSS VCC VSS
+CPU_CORE D6 VCC VSS E8 AD8 VCC VSS AB21
D8 VCC VSS E10 AD10 VCC VSS AB23
D18 VCC VSS E12 AD12 VCC VSS AB26
D20 VCC VSS E14 AD14 VCC VSS AC2
D22 VCC VSS E16 AD16 VCC VSS AC5
E5 VCC VSS E18 AD18 VCC VSS AC8
E7 VCC VSS E20 AE9 VCC VSS AC10
E19 VCC VSS F1 AE15 VCC VSS AC16
E21 VCC VSS F4 AE17 VCC VSS AC18
F6 VCC VSS F5 AE19 VCC VSS AC21
F8 VCC VSS F7 AF8 VCC VSS AC24
F18 VCC VSS F9 AF10 VCC VSS AD1
VSS F11 AF12 VCC VSS AD4
H_PSI# E1 F15 AF16 AD9
55 PSI# PSI# VSS VCC VSS
VID0 E2 F19 AD13
55 CPU_VID0 VID0 VSS VSS
VID1 F2 F21 AD15
VID2 F3 F24 AD17
VID3 G3 G2 AD19
VID4 G4 G6 AD22
VID5 H4 G22 M4 AD25
55 CPU_VID5 VID5 VSS VSS VSS
VSS G23 M5 VSS VSS AE3
VSS G26 M21 VSS VSS AE6
V_CPU_GTLREF AD26 GTLREF VSS H3 M24 VSS VSS AE8
VSS H5 N3 VSS VSS AE10
B B
VSS H21 N6 VSS VSS AE12
CPU_BSEL0 C16 H25 N22 AE14
17 CPU_BSEL0 BSEL0 VSS VSS VSS
CPU_BSEL1 C14 J1 N23 AE16
17 CPU_BSEL1 BSEL1 VSS VSS VSS
VSS J4 N26 VSS VSS AE18
14.5 mil COMP0 P25 J6 P2 AE20
4 mil COMP1 COMP0 VSS VSS VSS
P26 COMP1 VSS J22 P5 VSS VSS AE23
14.5 mil COMP2 AB2 J24 P21 AE26
4 mil COMP3 COMP2 VSS VSS VSS
AB1 COMP3 VSS K2 P24 VSS VSS AF2
VSS K5 R1 VSS VSS AF5
VSS K21 R4 VSS VSS AF9
+VCCP K23 R6 AF11
VSS VSS VSS
B2 RSVD VSS K26 R22 VSS VSS AF13
R_A C3 RSVD VSS L3 R25 VSS VSS AF15
1
27.4_0603_1%
54.9_0603_1%
27.4_0603_1%
54.9_0603_1%
E26 RSVD VSS L6 T3 VSS VSS AF17

AF7 RSVD VSS L22 T5 VSS VSS AF19
R79 Resistor placed within AC1 L25 T21 AF21
RSVD VSS VSS VSS
1
V_CPU_GTLREF 1K_0603_1% M1 T23 AF24

0.5" of CPU pin.Trace VSS VSS VSS
2
R80
R81
R82
R83
should be at least 25
miles away from any TYCO_1612365-1_Dothan TYCO_1612365-1_Dothan
R_B
2
2
1
other toggling signal.

R84
2K_0603_1%
2
A A
Layout close CPU

Title
Dothan Processor in mFCPGA479
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_CORE
1 1 1 1 1 1 1 1 1 1
C20 C21 C22 C23 C24 C25 C26 C27 C28 C29
10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M
2 2 2 2 2 2 2 2 2 2
D D
+CPU_CORE +CPU_CORE
1 1 1 1 1 1 1 1 1 1
C30 C31 C32 C33 C34 C35 C36 C37 C38 C39
2 2 2 2 2 2 2 2 2 2
+CPU_CORE +CPU_CORE
1 1 1 1 1 1 1 1 1 1
C40 C41 C42 C43 C44 C45 C46 C47 C48 C49
2 2 2 2 2 2 2 2 2 2
+CPU_CORE
1 1 1 1 1
C C50 C51 C52 C53 C54
10uF 1206 X5R -> 85 degree High Frequence Decoupling C
10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M 10U_1206_6.3V6M
2 2 2 2 2
Near VCORE regulator.

+CPU_CORE
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
ESR <= 3m ohm

@
1 1 1 1
C55
C56
C57
C58
+ + + +
Capacitor > 880uF

2 2 2 2
B B
9mOhm 9mOhm 9mOhm 9mOhm

7343 7343 7343 7343
PS CAP PS CAP PS CAP PS CAP
+VCCP
1
1 1 1 1 1 1 1 1 1 1
+
C59 C60 C61 C62 C63 C64 C65 C66 C67 C68 C69
150U_C_4VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2 2
A A

Title
CPU Bypass
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EDL71 LA-2351 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Wednesday, March 02, 2005 7 59
Date: Sheet of
5 4 3 2 1
5 4 3 2 1
Fan Control circuit
+12VALW
1
+5VS
D C73 D
0.1U_0402_16V4Z +3VS
2
1
2
5
6
U3A
D Q31
1
EN_FAN1 3 G
41 EN_FAN1 +IN
1 FAN1 3 R163
OUT S SI3456DV-T1_TSOP6 10K_0402_5%
2 -IN
4
G
1
2
C140 LM358A_SO8
4
1U_0603_10V4Z
2 FANSPEED1 41
1
C143
2200P_0402_50V7K C145
1 2 0.01U_0402_16V7K
2
R162
100K_0402_5% JP2
1 2 FANVOUT1
1
2
3
1
150K_0402_5%
22U_A_4VM
ACES_85205-0300
R150
D23 + C72
RB751V_SOD323
C C
2
0.001U_0402_50V7M
2
C17
1
Thermal Sensor G781
H_THERMDA +3VS
H_THERMDA 5
R145 1 2 300_0402_5% C146 1 2 1U_0603_10V4Z
+VCCP
H_THERMDC
H_THERMDC 5
@ @ W=1 5mil
2
C147
B B
2
1 0.1U_0402_16V4Z
B
1
Q8 1 U4
E
H_THERMTRIP# 3 1 2SC2411K_SC59 C148 H_THERMDA 2 1 R146

5,9,28 H_THERMTRIP# MAINPWON 48,50,51 D+ VDD1 @ 10K_0402_5%
@ 2200P_0402_25V7K H_THERMDC 3 6
2 D- ALERT#
2
41 EC_SMC_2 8 SCLK THERM# 4
41 EC_SMD_2 7 SDATA GND 5
1
G781_SOP8
+2.5V R513 R512
8.2K_0402_5% 8.2K_0402_5%
+12VALW
2
+3VALW
1
R1018
10K_0402_1% U3B
2
5 +IN
OUT 7 +V_DDR_MCH_REF
1
6 -IN
R1019
A A
10K_0402_1% LM358A_SO8
2

Title
FAN & Thermal Sensor
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
Note :
U2A
5 H_A#[3..31] H_D#[0..63] 5 CFG3:17 has
H_A#3 G9 E4 H_D#0 internal pullup,
H_A#4 C9
HA3#
HA4#
Alviso HD0#
HD1# E1 H_D#1
CFG18:19 has
H_A#5 E9 F4 H_D#2 +VCCP
H_A#6 HA5# HD2# H_D#3
B7 HA6# HD3# H7 internal pulldown
H_A#7 A10 E2 H_D#4
HA7# HD4#
221_0603_1%
H_A#8 F9 F1 H_D#5 U2B
HA8# HD5#
1
H_A#9 D8 E3 H_D#6
HA9# HD6#
R85
H_A#10 B10 D3 H_D#7 DMI_TXN0 AA31 G16 CFG0
HA10# HD7# 29 DMI_TXN0 DMIRXN0 CFG0 CFG0 11
H_A#11 E10 K7 H_D#8 DMI_TXN1 AB35 H13 MCH_CLKSEL1
HA11# HD8# 29 DMI_TXN1 DMIRXN1 CFG1 MCH_CLKSEL1 17
H_A#12 G10 F2 H_D#9 DMI_TXN2 AC31 G14 MCH_CLKSEL0
HA12# HD9# 29 DMI_TXN2 DMIRXN2 CFG2 MCH_CLKSEL0 17
D H_A#13 D9 J7 H_D#10 DMI_TXN3 AD35 F16 D
29 DMI_TXN3 PAD T3
2
H_A#14 HA13# HD10# H_D#11 H_SWNG1 DMIRXN3 CFG3
E11 HA14# HD11# J8 CFG4 F15 PAD T4
H_A#15 F10 H6 H_D#12 DMI_TXP0 Y31 G15 CFG5
HA15# HD12# 29 DMI_TXP0 DMIRXP0 CFG5 CFG5 11
0.1U_0402_16V4Z
H_A#16 G11 F3 H_D#13 DMI_TXP1 AA35 E16 CFG6
1
100_0603_1%
H_A#17 G13 K8 H_D#14 DMI_TXP2 AB31 D17 CFG7
R86
H_A#18 C10 H5 H_D#15 1 DMI_TXP3 AC35 J16
HA18# HD15# 29 DMI_TXP3 DMIRXP3 CFG8
H_A#19 C11 H1 H_D#16 D15 CFG9
HA19# HD16# CFG9 CFG9 11
H_A#20 D11 H2 H_D#17 DMI_RXN0 AA33 E15
HA20# HD17# 29 DMI_RXN0 DMITXN0 CFG10
C70
H_A#21 C12 K5 H_D#18 DMI_RXN1 AB37 D14
29 DMI_RXN1
DMI
H_A#22 HA21# HD18# H_D#19 2 DMI_RXN2 DMITXN1 CFG11 CFG12
B13 HA22# HD19# K6 29 DMI_RXN2 AC33 DMITXN2 CFG12 E14 CFG12 11
H_A#23 A12 J4 H_D#20 DMI_RXN3 AD37 H12 CFG13
HA23# HD20# 29 DMI_RXN3 DMITXN3 CFG13 CFG13 11
H_A#24 F12 G3 H_D#21 C14
H_A#25 HA24# HD21# H_D#22 DMI_RXP0 CFG14
CFG/RSVD
G12 HA25# HD22# H3 29 DMI_RXP0 Y33 DMITXP0 CFG15 H15
H_A#26 E12 J1 H_D#23 DMI_RXP1 AA37 J15 CFG16
HA26# HD23# 29 DMI_RXP1 DMITXP1 CFG16 CFG16 11
H_A#27 C13 L5 H_D#24 DMI_RXP2 AB33 H14
HA27# HD24# 29 DMI_RXP2 DMITXP2 CFG17
H_A#28 B11 K4 H_D#25 DMI_RXP3 AC37 G22 CFG18
HA28# HD25# +VCCP 29 DMI_RXP3 DMITXP3 CFG18 CFG18 11
H_A#29 D13 J5 H_D#26 G23 CFG19
HA29# HD26# CFG19 CFG19 11
H_A#30 A13 P7 H_D#27 D23
H_A#31 HA30# HD27# H_D#28 DDR_CLK0 CFG20
F13 HA31# HD28# L7 14 DDR_CLK0 AM33 SM_CK0 RSVD21 G25
221_0603_1%
J3 H_D#29 DDR_CLK1 AL1 G24
T5 PAD HD29# 14 DDR_CLK1 SM_CK1 RSVD22
1
TP_H_PCREQ# A11 P5 H_D#30 AE11 J17
HOST
5 H_REQ#[0..4] HPCREQ# HD30# SM_CK2 RSVD23
R87
H_REQ#0 A7 L3 H_D#31 DDR_CLK3 AJ34 A31
HREQ#0 HD31# 15 DDR_CLK3 SM_CK3 RSVD24
H_REQ#1 D7 U7 H_D#32 DDR_CLK4 AF6 A30
HREQ#1 HD32# 15 DDR_CLK4 SM_CK4 RSVD25
H_REQ#2 B8 V6 H_D#33 AC10 D26
H_REQ#3 HREQ#2 HD33# H_D#34 SM_CK5 RSVD26
C7 R6 D25
2
H_REQ#4 HREQ#3 HD34# H_D#35 H_SWNG0 DDR_CLK0# RSVD27
A8 HREQ#4 HD35# R5 14 DDR_CLK0# AN33 SM_CK0#
DDR MUXING
H_ADSTB#0 B9 P3 H_D#36 DDR_CLK1# AK1
5 H_ADSTB#0 HADSTB#0 HD36# 14 DDR_CLK1# SM_CK1#
0.1U_0402_16V4Z
H_ADSTB#1 E13 T8 H_D#37 AE10
5 H_ADSTB#1 HADSTB#1 HD37# SM_CK2#
1
100_0603_1%
R7 H_D#38 1 DDR_CLK3# AJ33
HD38# 15 DDR_CLK3# SM_CK3#
R89
C AB1 R8 H_D#39 DDR_CLK4# AF5 C
17 CLK_MCH_BCLK# HCLKN HD39# 15 DDR_CLK4# SM_CK4#
AB2 U8 H_D#40 AD10
17 CLK_MCH_BCLK HCLKP HD40# SM_CK5#
C71
R4 H_D#41
5 H_DSTBN#[0..3] HD41# 2
H_DSTBN#0 G4 T4 H_D#42 DDR_CKE0 AP21
14 DDR_CKE0
2
H_DSTBN#1 HDSTBN#0 HD42# H_D#43 DDR_CKE1 SM_CKE0
K1 HDSTBN#1 HD43# T5 14 DDR_CKE1 AM21 SM_CKE1
H_DSTBN#2 R3 R1 H_D#44 DDR_CKE2 AH21
HDSTBN#2 HD44# 15 DDR_CKE2 SM_CKE2
H_DSTBN#3 V3 T3 H_D#45 DDR_CKE3 AK21
5 H_DSTBP#[0..3] HDSTBN#3 HD45# 15 DDR_CKE3 SM_CKE3
H_DSTBP#0 G5 V8 H_D#46 J23
HDSTBP#0 HD46# BM_BUSY# PM_BMBUSY# 29
H_DSTBP#1 K2 U6 H_D#47 DDR_SCS#0 AN16 J21 PM_EXTTS#0
HDSTBP#1 HD47# 14 DDR_SCS#0 SM_CS0# EXT_TS0#
H_DSTBP#2 R2 W6 H_D#48 DDR_SCS#1 AM14 H22 PM_EXTTS#1
HDSTBP#2 HD48# 14 DDR_SCS#1 SM_CS1# EXT_TS1#
H_DSTBP#3 W4 U3 H_D#49 DDR_SCS#2 AH15 F5
HDSTBP#3 HD49# 15 DDR_SCS#2 SM_CS2# THRMTRIP# H_THERMTRIP# 5,8,28
Layout Guide 5 H8 V5 H_D#50 DDR_SCS#3 AG16 AD30 VGATE
H_DINV#0 HDINV#0 HD50# 15 DDR_SCS#3 SM_CS3# PWROK VGATE 17,29,55
will show these K3 W8 H_D#51 AE29 PLTRST_R#
1 2
CLK PM
5 H_DINV#1 HDINV#1 HD51# +VCCP RSTIN# PLTRST# 27,29,35,39,41,46
signals routed T7 W7 H_D#52 M_OCDOCMP0 AF22 R90 100_0402_5%
5 H_DINV#2 HDINV#2 HD52# SM_OCDCOMP0
U5 U2 H_D#53 M_OCDOCMP1 AF16
5
differentially. H_DINV#3 HDINV#3 HD53# SM_OCDCOMP1
U1 H_D#54 AP14 A24
HD54# SM_ODT0 DREF_CLKN DREFCLK# 17
Y5 H_D#55 AL15 A23
HD55# +2.5V SM_ODT1 DREF_CLKP DREFCLK 17
H_RESET# H10 Y2 H_D#56 AM11 D37
5 H_RESET# HCPURST# HD56# SM_ODT2 DREF_SSCLKP DREF_SSCLK 17
1
+VCCP
54.9_0603_1%
54.9_0603_1%
V4 H_D#57 AN10 C37
HD57# SM_ODT3 DREF_SSCLKN DREF_SSCLK# 17
H_ADS# F8 Y7 H_D#58 R760
5 H_ADS# HADS# HD58#
R91
R92
100_0603_1%
H_TRDY# B5 W1 H_D#59 1 2 SMRCOMPN AK10 1 2 +1.5VS
5 H_TRDY# HTRDY# HD59# SMRCOMPN
1
G6 W3 H_D#60 80.6_0603_1% SMRCOMPP AK11 AP37 R1054 0_0402_5%
5 H_DPWR# HDPWR# HD60# SMRCOMPP NC1
R94
H_DRD Y# F7 Y3 H_D#61 +V_DDR_MCH_REF AF37 AN37 1 2
5 H_DRDY#
2
H_DEFER# HDRDY# HD61# H_D#62 SMVREF0 NC2 R1055 0_0402_5%
5 H_DEFER# E6 HDEFER# HD62# Y6 AD1 SMVREF1 NC3 AP36
1
2@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
TP_H_EDRDY# F6 W2 H_D#63 AE27 AP2
T6 PAD HEDRDY# HD63# SMXSLEWIN NC4
H_HITM# D6 AE28 AP1
5 H_HITM#
2
H_HIT# HHITM# H_VREF R761 SMXSLEWOUT NC5 2@
5 H_HIT# D4 HHIT# HVREF J11 1 1 AF9 SMYSLEWIN NC6 AN1
H_LOCK# B3 C1 H_XRCOMP 80.6_0603_1% AF10 B1
5 H_LOCK# HLOCK# HXRCOMP SMYSLEWOUT NC7
0.1U_0402_16V4Z
200_0603_1%
C900
C901
H_BR0# E7 C2 H_XSCOMP A2
5 H_BR0#
2
HBREQ0# HXSCOMP NC8
1
B H_BNR# H_YRCOMP B
5 H_BNR# A5 HBNR# HYRCOMP T1 1 NC9 B37
2 2
R96
H_BPRI# H_YSCOMP
NC
5 H_BPRI# D5 HBPRI# HYSCOMP L1 NC10 A36
C74
H_DBSY# C6 D1 H_SWNG0 A37
5 H_DBSY# HDBSY# HXSWING NC11
H_R_CPUSLP# G8 P1 H_SWNG1
H_RS#0 HCPUSLP# HYSWING 2
A4
2
HRS0#
24.9_0603_1%
24.9_0603_1%
H_RS#1 C5 Layout Note: ALVISO_BGA1257

HRS1#
1
H_RS#2 B4 HRS2# Route as short

5 H_RS#[0..2] as possible
R97
R98
ALVISO_BGA1257
2
M_OCDOCMP0 +2.5VS
M_OCDOCMP1
R99 Layout Note:
40.2_0402_1%
40.2_0402_1%
0_0402_5%
H_XRCOMP & H_YRCOMP trace width
1
1
H_CPUSLP# 1 2 H_R_CPUSLP# R102
5,28 H_CPUSLP#
and spacing is 10/20 10K_0402_5%
R100
R101
@ @ PM_EXTTS#0 2 1
R103
2
2
Note: 10K_0402_5%
PM_EXTTS#1 2 1
"Do not install R99 for Dothan-A,
Install R99 for Dothan-B"
A A

Title
Alviso(1 of 5)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
D U2C U2D D
DDR_A_D[0..63] 15
DDR_A_BS#0 AK15 AG35 DDR_A_D0 DDR_B_BS#0 AJ15 AE31
14 DDR_A_BS#0 SA_BS0# SADQ0 15 DDR_B_BS#0 SB_BS0# SBDQ0
DDR_A_BS#1 AK16 AH35 DDR_A_D1 DDR_B_BS#1 AG17 AE32
14 DDR_A_BS#1 SA_BS1# SADQ1 15 DDR_B_BS#1 SB_BS1# SBDQ1
T18 PAD DDR_A_BS#2 AL21 AL35 DDR_A_D2 T19 PAD DDR_B_BS#2 AG21 AG32
SA_BS2# SADQ2 DDR_A_D3 SB_BS2# SBDQ2
15 DDR_A_DM[0..7] SADQ3 AL37 SBDQ3 AG36
DDR_A_DM0 AJ37 AH36 DDR_A_D4 AF32 AE34
DDR_A_DM1 SA_DM0 SADQ4 DDR_A_D5 SB_DM0 SBDQ4
AP35 SA_DM1 SADQ5 AJ35 AK34 SB_DM1 SBDQ5 AE33
DDR_A_DM2 AL29 AK37 DDR_A_D6 AK27 AF31
AP24 SA_DM3 SADQ7 AL34 AK24 SB_DM3 SBDQ7 AF30
DDR_A_DM4 AP9 AM36 DDR_A_D8 AJ10 AH33
AP4 SA_DM5 SADQ9 AN35 AK5 SB_DM5 SBDQ9 AH32
DDR_A_DM6 AJ2 AP32 DDR_A_D10 AE7 AK31
AD3 SA_DM7 SADQ11 AM31 AB7 SB_DM7 SBDQ11 AG30
AM34 DDR_A_D12 AG34
15 DDR_A_DQS[0..7] SADQ12 SBDQ12
DDR_A_DQS0 AK36 AM35 DDR_A_D13 This Symbol as same AF34 AG33
DDR_A_DQS1 SA_DQS0 SADQ13 DDR_A_D14 SB_DQS0 SBDQ13
AP33 SA_DQS1 SADQ14 AL32 as Intel CRB AK32 SB_DQS1 SBDQ14 AH31
DDR_A_DQS2 AN29 AM32 DDR_A_D15 AJ28 AJ31
DDR_A_DQS3 AP23
SA_DQS2 SADQ15
AN31 DDR_A_D16 schematic, So Layout AK23
SB_DQS2 SBDQ15
AK30
DDR_A_DQS4 SA_DQS3 SADQ16 DDR_A_D17 Guide will show these SB_DQS3 SBDQ16
AM8 SA_DQS4 SADQ17 AP31 AM10 SB_DQS4 SBDQ17 AJ30
DDR_A_DQS5 AM4 AN28 DDR_A_D18 signals routed AH6 AH29
DDR_A_DQS6 SA_DQS5 SADQ18 DDR_A_D19 SB_DQS5 SBDQ18
AJ1 SA_DQS6 SADQ19 AP28 differentially. AF8 SB_DQS6 SBDQ19 AH28
DDR_A_DQS7 AE5 AL30 DDR_A_D20 AB4 AK29
SA_DQS7 SADQ20 DDR_A_D21 SB_DQS7 SBDQ20
SADQ21 AM30 SBDQ21 AH30
AK35 AM28 DDR_A_D22 AF35 AH27
SA_DQS0# SADQ22 DDR_A_D23 SB_DQS0# SBDQ22
AP34 AL28 AK33 AG28
DDR SYSTEM MEMORY B

AN30 AP27 AK28 AF24
DDR MEMORY SYSTEM A

AN23 SA_DQS3# SADQ25 AM27 AJ23 SB_DQS3# SBDQ25 AG23
AN8 AM23 DDR_A_D26 AL10 AJ22
AM5 SA_DQS5# SADQ27 AM22 AH7 SB_DQS5# SBDQ27 AK22
C AH1 AL23 DDR_A_D28 AF7 AH24 C
AE4 SA_DQS7# SADQ29 AM24 AB5 SB_DQS7# SBDQ29 AH23
AN22 DDR_A_D30 AG22
14 DDR_A_MA[0..13] SADQ30 15 DDR_B_MA[0..13] SBDQ30
DDR_A_MA0 AL17 AP22 DDR_A_D31 DDR_B_MA0 AH17 AJ21
DDR_A_MA1 SA_MA0 SADQ31 DDR_A_D32 DDR_B_MA1 SB_MA0 SBDQ31
AP17 SA_MA1 SADQ32 AM9 AK17 SB_MA1 SBDQ32 AG10
DDR_A_MA2 AP18 AL9 DDR_A_D33 DDR_B_MA2 AH18 AG9
AM17 SA_MA3 SADQ34 AL6 AJ18 SB_MA3 SBDQ34 AG8
DDR_A_MA4 AN18 AP7 DDR_A_D35 DDR_B_MA4 AK18 AH8
AM18 SA_MA5 SADQ36 AP11 AJ19 SB_MA5 SBDQ36 AH11
DDR_A_MA6 AL19 AP10 DDR_A_D37 DDR_B_MA6 AK19 AH10
AP20 SA_MA7 SADQ38 AL7 AH19 SB_MA7 SBDQ38 AJ9
DDR_A_MA8 AM19 AM7 DDR_A_D39 DDR_B_MA8 AJ20 AK9
AL20 SA_MA9 SADQ40 AN5 AH20 SB_MA9 SBDQ40 AJ7
DDR_A_MA10 AM16 AN6 DDR_A_D41 DDR_B_MA10 AJ16 AK6
AN20 SA_MA11 SADQ42 AN3 AG18 SB_MA11 SBDQ42 AJ4
DDR_A_MA12 AM20 AP3 DDR_A_D43 DDR_B_MA12 AG20 AH5
AM15 SA_MA13 SADQ44 AP6 AG15 SB_MA13 SBDQ44 AK8
AM6 DDR_A_D45 AJ8
DDR_A_CAS# SADQ45 DDR_A_D46 DDR_B_CAS# AH14 SBDQ45
14 DDR_A_CAS# AN15 SA_CAS# SADQ46 AL4 15 DDR_B_CAS# SB_CAS# SBDQ46 AJ5
DDR_A_RAS# AP16 AM3 DDR_A_D47 DDR_B_RAS# AK14 AK4
14 DDR_A_RAS# SA_RAS# SADQ47 15 DDR_B_RAS# SB_RAS# SBDQ47
T20 PAD TP_MA_RCVENIN# AF29 AK2 DDR_A_D48 T21 PAD TP_MB_RCVENIN# AF15 AG5
TP_MA_RCVENOUT# SA_RCVENIN# SADQ48 DDR_A_D49 TP_MB_RCVENOUT# AF14 SB_RCVENIN# SBDQ48
T22 PAD AF28 SA_RCVENOUT# SADQ49 AK3 T23 PAD SB_RCVENOUT# SBDQ49 AG4
DDR_A_WE# AP15 AG2 DDR_A_D50 DDR_B_WE# AH16 AD8
14 DDR_A_WE# SA_WE# SADQ50 15 DDR_B_WE# SB_WE# SBDQ50
AG1 DDR_A_D51 AD9
SADQ51 DDR_A_D52 SBDQ51
SADQ52 AL3 SBDQ52 AH4
AM2 DDR_A_D53 AG6
SADQ54 AH3 SBDQ54 AE8
AG3 DDR_A_D55 AD7
SADQ56 AF3 SBDQ56 AC5
B DDR_A_D57 B
SADQ57 AE3 SBDQ57 AB8
AD6 DDR_A_D58 AB6
SADQ59 AC4 SBDQ59 AA8
AF2 DDR_A_D60 AC8
SADQ61 AF1 SBDQ61 AC7
AD4 DDR_A_D62 AA4
SADQ63 AD5 SBDQ63 AA5
ALVISO_BGA1257 ALVISO_BGA1257
A A

Title
Alviso(2 of 5)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+1.5VS_PCIE
R104
U2G 24.9_0603_1%
SDVO_CTRLDATA H24 D36 PEGCOMP1 2 +VCCP
SDVO_CTRLCLK SDVOCTRL_DATA EXP_COMPI
H25 D34
AB29
SDVOCTRL_CLK EXP_ICOMPO EXP_RXN[0..15] Strap Table
MISC
17 CLK_MCH_3GPLL# GCLKN EXP_RXN[0..15] 21
AC29 E30 EXP_RXN0 R105 2 1 10K_0402_5%
17 CLK_MCH_3GPLL GCLKP EXP_RXN0/SDVO_TVCLKIN# 9 CFG0
F34 EXP_RXN1
EXP_RXN1/SDVO_INT# EXP_RXN2
EXP_RXN2/SDVO_FLDSTALL# G30 CFG5 Low = DMI x 2
A15 H34 EXP_RXN3
25 COMP/B TVDAC_A EXP_RXN3 EXP_RXN4 High = DMI x 4 R106 2 @ 2.2K_0402_5%
25 Y/G C16
A17
TVDAC_B EXP_RXN4 J30
K34 EXP_RXN5 This Symbol as same
* 9 CFG5 1
25 C/R TVDAC_C EXP_RXN5
150_0603_1%
150_0603_1%
150_0603_1%
D TVIREF J18 L30 EXP_RXN6 as Intel CRB Low = DDR-II R108 1 2 @ 2.2K_0402_5% D
TV_REFSET EXP_RXN6 9 CFG7
1
4.99K_0603_1%
B15 M34 EXP_RXN7 schematic, So Layout CFG6
TV_IRTNA EXP_RXN7 EXP_RXN8 R107
B16 N30 High = DDR-I 1 2 @ 2.2K_0402_5%
TV_IRTNB EXP_RXN8 Guide will show these * 9 CFG6
R109
R110
R111
R112
1@ 1@ 1@ 1@ B17 P34 EXP_RXN9
TV
TV_IRTNC EXP_RXN9 EXP_RXN10 signals routed R113
EXP_RXN10 R30 Low = DT/Transportable CPU 9 CFG9 1 2 @ 2.2K_0402_5%
T34 EXP_RXN11 differentially. CFG7
2
2
EXP_RXN11 EXP_RXN12 R114
EXP_RXN12 U30 High = Mobile CPU * 9 CFG12 1 2 @ 2.2K_0402_5%
V34 EXP_RXN13
EXP_RXN13 EXP_RXN14 R115 @ 2.2K_0402_5%
EXP_RXN14 W30 Low = Reverse Lane 9 CFG13 1 2
E24 Y34 EXP_RXN15 CFG9
25 INT_CLK_DDC2 DDCCLK EXP_RXN15 EXP_RXP[0..15] High = Normal Operation R116 2 @ 2.2K_0402_5%
25 INT_DAT_DDC2 E23
E21
DDCDATA
D30 EXP_RXP0
EXP_RXP[0..15] 21 * 9 CFG16 1
25 INTCRT_B BLUE EXP_RXP0/SDVO_TVCLKIN
D21 E34 EXP_RXP1 00 = Reserved
BLUE# EXP_RXP1/SDVO_INT EXP_RXP2
25 INTCRT_G C20 GREEN EXP_RXP2/SDVO_FLDSTALL F30 01 = XOR Mode Enabled
B20 G34 EXP_RXP3 CFG[13:12] 10 = All Z Mode Enabled
GREEN# EXP_RXP3 EXP_RXP4
25 INTCRT_R A19 RED EXP_RXP4 H30 11 = Normal Operation * CFG[3:17] have internal pullup
B19 J34 EXP_RXP5 (Default)
RED# EXP_RXP5 EXP_RXP6
H21 K30
VGA
25 INT_VSYNC VSYNC EXP_RXP6 +2.5VS
G21 L34 EXP_RXP7
25 INT_HSYNC HSYNC EXP_RXP7
PCI - EXPRESS GRAPHICS

2 1 J20 M30 EXP_RXP8 CFG16 Low = Disabled
REFSET EXP_RXP8 EXP_RXP9
N34
R117 EXP_RXP9 EXP_RXP10 (FSB Dynamic High = Enabled @
255_0603_1% EXP_RXP10 P30
R34 EXP_RXP11 ODT)
* R118 1 2 1K_0402_5%
EXP_RXP11 9 CFG18
T30 EXP_RXP12 1 2
EXP_RXP12 9 CFG19
U34 EXP_RXP13 R119 @ 1K_0402_5%
EXP_RXP13 EXP_RXP14
EXP_RXP14 V30
EXP_TXN[0..15]
CFG18 Low = 1.05V (Default) *
W34 EXP_RXP15
EXP_RXP15 EXP_TXN[0..15] 21 (VCC Select)
BIA_PWM E25 High = 1.5V CFG[18:19] have internal pulldown
24 BIA_PWM LBKLT_CTL
R1113
1 1@ 0_0402_5%
2 F25 E32 EXP_TXN0
18,24,41 BACKLITE_ON LBKLT_EN EXP_TXN0/SDVOB_RED#
1
C LCTLA_CLK EXP_TXN1 CFG19 Low = 1.05V (Default) C

R93 LCTLB_DATA
C23
C22
LCTLA_CLK EXP_TXN1/SDVOB_GREEN# F36
G32 EXP_TXN2
*
100K_0402_5% LDDC_CLK F23
LCTLB_DATA EXP_TXN2/SDVOB_BLUE#
H36 EXP_TXN3 (VTT Select) High = 1.2V
LDDC_DATA LDDC_CLK EXP_TXN3/SDVOB_CLKN EXP_TXN4 +2.5VS
F22 LDDC_DATA EXP_TXN4/SDVOC_RED# J32
LVDD_EN F26 K36 EXP_TXN5 Low = No SDVO Device Present
24 GM_ENVDD
2
L_IBG LVDD_EN EXP_TXN5/SDVOC_GREEN# EXP_TXN6 R1180

@ 3K_0402_5%
2 1 C33 LIBG EXP_TXN6/SDVOC_BLUE# L32 SDVO_CTRLDATA (Default) *
R120 C31 M36 EXP_TXN7 SDVO_CTRLCLK 1 2
1.5K_0603_5% LVBG EXP_TXN7/SDVOC_CLKN EXP_TXN8
F28 LVREFH EXP_TXN8 N32 High = SDVO Device Present
F27 P36 EXP_TXN9 R121 @ 3K_0402_5%
LVREFL EXP_TXN9 EXP_TXN10 SDVO_CTRLDATA 1
EXP_TXN10 R32 2
B30 T36 EXP_TXN11
24 LCD_ACLK- LACLKN EXP_TXN11
B29 U32 EXP_TXN12
24 LCD_ACLK+ LACLKP EXP_TXN12
LVDS
C25 V36 EXP_TXN13 Have internal pulldown

24 LCD_BCLK- LBCLKN EXP_TXN13
C24 W32 EXP_TXN14
24 LCD_BCLK+ LBCLKP EXP_TXN14
Y36 EXP_TXN15
EXP_TXN15 EXP_TXP[0..15]
24 LCD_A0- B34 LADATAN0 EXP_TXP[0..15] 21
24 LCD_A1- B33 LADATAN1
B32 D32 EXP_TXP0
24 LCD_A2- LADATAN2 EXP_TXP0/SDVOB_RED
E36 EXP_TXP1
EXP_TXP1/SDVOB_GREEN EXP_TXP2
EXP_TXP2/SDVOB_BLUE F32
A34 G36 EXP_TXP3
24 LCD_A0+ LADATAP0 EXP_TXP3/SDVOB_CLKP
A33 H32 EXP_TXP4
24 LCD_A1+ LADATAP1 EXP_TXP4/SDVOC_RED
B31 J36 EXP_TXP5
24 LCD_A2+ LADATAP2 EXP_TXP5/SDVOC_GREEN
K32 EXP_TXP6
EXP_TXP6/SDVOC_BLUE EXP_TXP7
EXP_TXP7/SDVOC_CLKP L36
M32 EXP_TXP8
EXP_TXP8 EXP_TXP9
24 LCD_B0- C29 LBDATAN0 EXP_TXP9 N36
D28 P32 EXP_TXP10
24 LCD_B1- LBDATAN1 EXP_TXP10
C27 R36 EXP_TXP11
B 24 LCD_B2- LBDATAN2 EXP_TXP11 B
T32 EXP_TXP12
EXP_TXP12 EXP_TXP13
EXP_TXP13 U36
V32 EXP_TXP14
EXP_TXP14 EXP_TXP15
24 LCD_B0+ C28 LBDATAP0 EXP_TXP15 W36
24 LCD_B1+ D27 LBDATAP1
24 LCD_B2+ C26 LBDATAP2
+2.5VS ALVISO_BGA1257
+2.5VS +3VS
1@
1 2 LCTLA_CLK
R127 2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
1@
1
1 2 LCTLB_DATA
1@
R129
R130
R128 2.2K_0402_5% R132 R131

1@
2.2K_0402_5% 2.2K_0402_5%
1@ 1@
2
2 1 INTCRT_R
S
150_0603_1% 1@ R122 LDDC_CLK Q4 3 1 LCD_DDCCLK

LCD_DDCCLK 24
2 1 INTCRT_G 2N7002_SOT23
150_0603_1% 1@ R123 1@
INTCRT_B
G
2 1
2
150_0603_1% 1@ R124 +2.5VS

A A
2
G
LDDC_DATA Q6 3 1 LCD_DDCDATA
LCD_DDCDATA 24
1@ 2N7002_SOT23
S
1@
1 2 BIA_PWM
R133 100K_0402_5%
Title
Alviso(3 of 5)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+3VS_TVDACA +3VS +3VS_TVDACC +3VS

W=30 mils
U2F
+1.5VS_QTVDAC +1.5VS
L3 L4
K13 AM37 V2.5_DDR_CAP1 1 2 1 2
VTT0 VCCSM0 L5
0.022U_0402_16V7K
0.022U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
J13 AH37 V2.5_DDR_CAP2 1 2 0_0603_5% 0_0603_5%
VTT1 VCCSM1
0.022U_0402_16V7K
0.022U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
K12 AP29 V2.5_DDR_CAP5 0_0603_5%
VTT2 VCCSM2 U2E
W11 VTT3 VCCSM3 AD28 1 1 1 1 1 1 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
V11 VTT4 VCCSM4 AD27 1 1 1 1
C75
C76
C77
C78
C79
C80
C81
U11 VTT5 VCCSM5 AC27 +VCCP T29 VCC0 VCCA_TVDACA0 F17 +3VS_TVDACA
C82
C83
C84
C85
T11 VTT6 VCCSM6 AP26 R29 VCC1 VCCA_TVDACA1 E17
2 2 2 2 2 2 2
R11 AN26 N29 D18
P11
N11
VTT7
VTT8
VTT9
POWER VCCSM7
VCCSM8
VCCSM9
AM26
AL26
M29
K29
VCC2
VCC3
VCC4
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
C18
F18
+3VS_TVDACB
+3VS_TVDACC
2 2 2 2
M11 VTT10 VCCSM10 AK26 J29 VCC5 VCCA_TVDACC1 E18

D L11 VTT11 VCCSM11 AJ26 V28 VCC6 +3VS_ATVBG D
K11 AH26 U28 H18
W10
V10
VTT12
VTT13
VTT14
VCCSM12
VCCSM13
VCCSM14
AG26
AF26
T28
R28
VCC7
VCC8
VCC9
POWER VCCA_TVBG
VSSA_TVBG G18 VSSA_TVBG
Route VSSA_TVBG GND +3VS_TVDACB +3VS +3VS_ATVBG +3VS
+VCCP U10 AE26 P28 D19 +1.5VS_TVDAC L6
VTT15 VCCSM15 VCC10 VCCD_TVDAC from GMCH to decoupling L7
0.022U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
T10 VTT16 VCCSM16 AP25 N28 VCC11 VCCDQ_TVDAC H17 +1.5VS_QTVDAC 1 2 1 2
0.022U_0402_16V7K
0.1U_0402_16V4Z
R10 VTT17 VCCSM17 AN25 M28 VCC12 cap ground lead and then 0_0603_5% 0_0603_5%
22U_1206_6.3V6M
P10 AM25 1 1 1 L28 B26 +1.5VS_DLVDS
VTT18 VCCSM18 VCC13 VCCD_LVDS0 connect to the GND plane.
C86
C87
C88
N10 VTT19 VCCSM19 AL25 K28 VCC14 VCCD_LVDS1 B25 1 1 1 1
C92
4.7U_0805_10V4Z
2.2U_0805_16V4Z
M10 VTT20 VCCSM20 AK25 J28 VCC15 VCCD_LVDS2 A25
C89
C90
C91
K10 VTT21 VCCSM21 AJ25 H28 VCC16
2 2 2
1 1 J10 VTT22 VCCSM22 AH25 G28 VCC17 VCCA_LVDS A35 +2.5VS_ALVDS 2 2 2 2
C93
C94
Y9 VTT23 VCCSM23 AG25 V27 VCC18

W9 VTT24 VCCSM24 AF25 U27 VCC19 VCCHV0 B22 +2.5VS
U9 VTT25 VCCSM25 AE25 T27 VCC20 VCCHV1 B21
2 2 VSSA_TVBG
R9 VTT26 VCCSM26 AE24 R27 VCC21 VCCHV2 A21
P9 VTT27 VCCSM27 AE23 P27 VCC22
N9 VTT28 VCCSM28 AE22 N27 VCC23 VCCTX_LVDS0 B28 +2.5VS_TXLVDS
M9 VTT29 VCCSM29 AE21 M27 VCC24 VCCTX_LVDS1 A28
+1.5VS_DDRDLL +1.5VS
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
L9 AE20 L27 A27 L8
VTT30 VCCSM30 VCC25 VCCTX_LVDS2 CHB1608U301_0603
J9 VTT31 VCCSM31 AE19 1 1 1 K27 VCC26
C95
C96
C97
N8 VTT32 VCCSM32 AE18 J27 VCC27 VCCA_SM0 AF20 1 2
0.1U_0402_16V4Z
M8 VTT33 VCCSM33 AE17 H27 VCC28 VCCA_SM1 AP19
+1.5VS_PCIE +1.5VS
100U_C_4VM
0.1U_0402_16V4Z
N7 AE16 K26 AF19 1 L9
VTT34 VCCSM34 2 2 2 VCC29 VCCA_SM2 CHB1608U301_0805
M7 VTT35 VCCSM35 AE15 H26 VCC30 VCCA_SM3 AF18 1 1
C99
C98
0.47U_0603_16V4Z
N6 AE14 K25 + 1 2
VTT36 VCCSM36 VCC31
0.1U_0402_16V4Z
C100
M6 VTT37 VCCSM37 AP13 J25 VCC32 VCC3G0 AE37
+1.5VS_3GPLL +1.5VS
10U_0805_10V4Z
10U_0805_10V4Z
A6 AN13 K24 W37 R135 L10
VTT38 VCCSM38 VCC33 VCC3G1 2 2 2
220U_D_4VM
N5 AM13 K23 U37 1 0.5_0805_1% CHB1608U301_0603 1
VTT39 VCCSM39 VCC34 VCC3G2
C 1 M5 VTT40 VCCSM40 AL13 K22 VCC35 VCC3G3 R37 1 1 1 23GRLL_R
1 2 C
C103
C101
C104
C105
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
C102
N4 AK13 K21 N37 +
VTT41 VCCSM41 VCC36 VCC3G4
M4 VTT42 VCCSM42 AJ13 W20 VCC37 VCC3G5 L37
+2.5V 2
N3 VTT43 VCCSM43 AH13 U20 VCC38 VCC3G6 J37 1 1 1
2 2 2 2
C108
M3 VTT44 VCCSM44 AG13 T20 VCC39
C106
C107
N2 VTT45 VCCSM45 AF13 K20 VCC40
M2 VTT46 VCCSM46 AE13 V19 VCC41 2 2 2
330U_D_4VM
B2 VTT47 VCCSM47 AP12 U19 VCC42 VCCA_3GPLL0 Y29

10U_0805_10V4Z
10U_0805_10V4Z
V1 VTT48 VCCSM48 AN12 1 K19 VCC43 VCCA_3GPLL1 Y28

N1 VTT49 VCCSM49 AM12 1 1 W18 VCC44 VCCA_3GPLL2 Y27
+2.5VS_3GBG +2.5VS
C110
C111
M1 AL12 + V18 L11

VTT50 VCCSM50 VCC45
C109
G1 AK12 T18 CHB1608U301_0603

VTT51 VCCSM51 VCC46
VCCSM52 AJ12 K18 VCC47 VCCA_3GBG F37 1 2
2 2 2
1 1 1 VCCSM53 AH12 K17 VCC48 VSSA_3GBG G37 1 1
C112
0.47U_0603_16V4Z
C113
0.22U_0402_10V4Z
C114
0.22U_0402_10V4Z
AG12 1@ 0_0603_5% R516

VCCSM54 VC C_SYNC C115 C116
VCCSM55 AF12 +1.5VS AC1 VCCD_HMPLL1 VCC_SYNC H20 1 2 +2.5VS
AE12 AC2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 VCCSM56 VCCD_HMPLL2 L12 2 2
AD11 +1.5VS_DPLLA B23 F19 +2.5VS_CRT 1@ 1 2
VCCSM57 VCCA_DPLLA VCCA_CRTDAC0
22U_1206_6.3V6M
0.022U_0402_16V7K
0.1U_0402_16V4Z
VCCSM58 AC11 +1.5VS_DPLLB C35 VCCA_DPLLB VCCA_CRTDAC1 E19
0.1U_0402_16V4Z
AB11 +1.5VS_HPLL AA1 G19 1 1 0_0603_5% 1 1
VCCSM59 VCCA_HPLL VSSA_CRTDAC
C117
C119
VCCSM60 AB10 +1.5VS_MPLL AA2 VCCA_MPLL
C118
C120
VCCSM61 AB9
VCCSM62 AP8 V2.5_DDR_CAP6
V2.5_DDR_CAP4 ALVISO_BGA1257 2 2 2 2 Route VSSA3GBG gnd from GMCH to
AM1
VCCSM63
AE1 V2.5_DDR_CAP3 +2.5V decoupling cap ground lead and
VCCSM64
1 1 1 then connect to the gnd plane.
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C121
C122
C123
ALVISO_BGA1257
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B 2 2 2 B
1 1 1 1 1 1
+2.5VS_ALVDS
C152
C141
C149
C150
C151
C153
Note : All VCCSM pin +2.5VS
shorted internally. 2 2 2 2 2 2 L13

CRTDAC: Route caps within Route VSSACRTDAC gnd from GMCH to 1 2
0_0603_5%
250mil of Alviso. Route FB decoupling cap ground lead and then
0.01U_0402_16V7K
0.1U_0402_16V4Z
+1.5VS_DPLLA
L14
CHB1608U301_0603 L16 +1.5VS_DPLLB within 3" of Alviso. connect to the gnd plane.
1 1
C124
+1.5VS 1 2 CHB1608U301_0603
+1.5VS_MPLL +2.5VS_TXLVDS
C125
+1.5VS 1 2 L15 +2.5VS
+1.5VS_HPLL
0.1U_0402_16V4Z
L17 CHB1608U301_0603 R136

2 2
470U_D_2.5VM
0.1U_0402_16V4Z
1 CHB1608U301_0603 +1.5VS 1 2 2 1
470U_D_2.5VM
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1 1 +1.5VS 1 2
C126
0.1U_0402_16V4Z
+ 0_0402_5%
1
+1.5VS_TVDAC +1.5VS
470U_D_2.5VM
C128
C129
C134
0.1U_0402_16V4Z
+
1 1 1
470U_D_2.5VM
C132
C133
1@ 1 1
2 2 L18
C127
C131
1@ + 1 2
2 2 1
+1.5VS_DLVDS +1.5VS
0.022U_0402_16V7K
C130
C135
0.1U_0402_16V4Z
+
2 2 0_0603_5%
2 2 L19
1 1 1 2
2 2
0_0603_5%
0.01U_0402_16V7K
C137
C136
10U_0805_10V4Z
Note : C126, C129 No stuff for Ext. VGA. 2 2
1 1
Stuff for Int. VGA.
C138
C139
2@ R137
0_0402_5%
+2.5VS_CRT 2 2
A 1 2 +VCCP A
+VCCP +1.5VS
+2.5VS +3VS 2@ R138
D1
D2 0_0402_5%
1 2 2 1 1 2 2 1 VC C_SYNC 1 2 +VCCP
R139 R140
1@ 10_0402_5%
LL4148_SOD80
1@ 10_0402_5%
LL4148_SOD80 Note : R137, R138 stuff for Ext. VGA. Compal Electronics, Inc.
1@ 1@
R137, R138 no stuff for Int. VGA. Title
Alviso(4 of 5)
CRT DAC Voltge Follower Circuit - 700mV TV DAC Voltge Follower Circuit - 700mV DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EDL71 LA-2351 1B
5 4 3 2 1
5 4 3 2 1
+2.5V
+VCCP
U2H
L12 VTT_NCTF17 VCCSM_NCTF31 AB12

M12 VTT_NCTF16 VCCSM_NCTF30 AC12
N12 AD12 U2I U2J
VTT_NCTF15 VCCSM_NCTF29
P12 VTT_NCTF14 VCCSM_NCTF28 AB13
R12 VTT_NCTF13 VCCSM_NCTF27 AC13 Y1 VSS271 AL24 VSS267
T12 VTT_NCTF12 VCCSM_NCTF26 AD13 D2 VSS270 VSSALVDS B36 AN24 VSS266 VSS67 AC32
U12 VTT_NCTF11 VCCSM_NCTF25 AC14 G2 VSS269 A26 VSS265 VSS66 AD32
V12 VTT_NCTF10 VCCSM_NCTF24 AD14 J2 VSS268 VSS195 AA11 E26 VSS264 VSS65 AJ32
D W12 VTT_NCTF9 VCCSM_NCTF23 AC15 L2 VSS260 VSS194 AF11 G26 VSS263 VSS64 AN32 D
L13 VTT_NCTF8 VCCSM_NCTF22 AD15 P2 VSS259 VSS193 AG11 J26 VSS262 VSS63 D33
M13 VTT_NCTF7 VCCSM_NCTF21 AC16 T2 VSS258 VSS192 AJ11 B27 VSS261 VSS62 E33
N13 VTT_NCTF6 VCCSM_NCTF20 AD16 V2 VSS257 VSS191 AL11 E27 VSS129 VSS61 F33
P13 VTT_NCTF5 VCCSM_NCTF19 AC17 AD2 VSS256 VSS190 AN11 G27 VSS128 VSS60 G33
R13 VTT_NCTF4 VCCSM_NCTF18 AD17 AE2 VSS255 VSS189 B12 W27 VSS127 VSS59 H33
T13
U13
V13
W13
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
AC18
AD18
AC19
AD19
AC20
AH2
AL2
AN2
A3
C3
VSS254
VSS253
VSS252
VSS251
VSS
VSS188
VSS187
VSS186
VSS185
D12
J12
A14
B14
F14
AA27
AB27
AF27
AG27
AJ27
VSS126
VSS125
VSS124
VSS123
VSS VSS58
VSS57
VSS56
VSS55
J33
K33
L33
M33
N33
VCCSM_NCTF13 VSS250 VSS184 VSS122 VSS54
VCCSM_NCTF12 AD20 AA3 VSS249 VSS183 J14 AL27 VSS121 VSS53 P33
Y12 VSS_NCTF68 VCCSM_NCTF11 AC21 AB3 VSS248 VSS182 K14 AN27 VSS120 VSS52 R33
AA12 VSS_NCTF67 VCCSM_NCTF10 AD21 AC3 VSS247 VSS181 AG14 E28 VSS119 VSS51 T33
Y13 VSS_NCTF66 VCCSM_NCTF9 AC22 AJ3 VSS246 VSS180 AJ14 W28 VSS118 VSS50 U33
AA13 VSS_NCTF65 VCCSM_NCTF8 AD22 C4 VSS245 VSS179 AL14 AA28 VSS117 VSS49 V33
L14 VSS_NCTF64 VCCSM_NCTF7 AC23 H4 VSS244 VSS178 AN14 AB28 VSS116 VSS48 W33
M14 VSS_NCTF63 VCCSM_NCTF6 AD23 L4 VSS243 VSS177 C15 AC28 VSS115 VSS47 AD33
N14 VSS_NCTF62 VCCSM_NCTF5 AC24 P4 VSS242 VSS176 K15 A29 VSS114 VSS46 AF33
P14 VSS_NCTF61 VCCSM_NCTF4 AD24 U4 VSS241 VSS175 A16 D29 VSS113 VSS45 AL33
R14 VSS_NCTF60 VCCSM_NCTF3 AC25 Y4 VSS240 VSS174 D16 E29 VSS112 VSS44 C34
T14 VSS_NCTF59 VCCSM_NCTF2 AD25 AF4 VSS239 VSS173 H16 F29 VSS111 VSS43 AA34
U14 AC26 +VCCP AN4 K16 G29 AB34
VSS_NCTF58 VCCSM_NCTF1 VSS238 VSS172 VSS110 VSS42
V14 VSS_NCTF57 VCCSM_NCTF0 AD26 E5 VSS237 VSS171 AL16 H29 VSS109 VSS41 AC34
W14 VSS_NCTF56 W5 VSS236 VSS170 C17 L29 VSS108 VSS40 AD34
Y14 VSS_NCTF55 VCC_NCTF78 L17 AL5 VSS235 VSS169 G17 P29 VSS107 VSS39 AH34
AA14 VSS_NCTF54 VCC_NCTF77 M17 AP5 VSS234 VSS168 AF17 U29 VSS106 VSS38 AN34
AB14 VSS_NCTF53 VCC_NCTF76 N17 B6 VSS233 VSS167 AJ17 V29 VSS105 VSS37 B35
L15 VSS_NCTF52 VCC_NCTF75 P17 J6 VSS232 VSS166 AN17 W29 VSS104 VSS36 D35
C M15 T17 L6 A18 AA29 E35 C
NCTF
VSS_NCTF51 VCC_NCTF74 VSS231 VSS165 VSS103 VSS35

N15 VSS_NCTF50 VCC_NCTF73 U17 P6 VSS230 VSS164 B18 AD29 VSS102 VSS34 F35
P15 VSS_NCTF49 VCC_NCTF72 V17 T6 VSS229 VSS163 U18 AG29 VSS101 VSS33 G35
R15 VSS_NCTF48 VCC_NCTF71 W17 AA6 VSS228 VSS162 AL18 AJ29 VSS100 VSS32 H35
T15 VSS_NCTF47 VCC_NCTF70 L18 AC6 VSS227 VSS161 C19 AM29 VSS99 VSS31 J35
U15 VSS_NCTF46 VCC_NCTF69 M18 AE6 VSS226 VSS160 H19 C30 VSS98 VSS30 K35
V15 VSS_NCTF45 VCC_NCTF68 N18 AJ6 VSS225 VSS159 J19 Y30 VSS97 VSS29 L35
W15 VSS_NCTF44 VCC_NCTF67 P18 G7 VSS224 VSS158 T19 AA30 VSS96 VSS28 M35
Y15 VSS_NCTF43 VCC_NCTF66 R18 V7 VSS223 VSS157 W19 AB30 VSS95 VSS27 N35
AA15 VSS_NCTF42 VCC_NCTF65 Y18 AA7 VSS222 VSS156 AG19 AC30 VSS94 VSS26 P35
AB15 VSS_NCTF41 VCC_NCTF64 L19 AG7 VSS221 VSS155 AN19 AE30 VSS93 VSS25 R35
L16 VSS_NCTF40 VCC_NCTF63 M19 AK7 VSS220 VSS154 A20 AP30 VSS92 VSS24 T35
M16 VSS_NCTF39 VCC_NCTF62 N19 AN7 VSS219 VSS153 D20 D31 VSS91 VSS23 U35
N16 VSS_NCTF38 VCC_NCTF61 P19 C8 VSS218 VSS152 E20 E31 VSS90 VSS22 V35
P16 VSS_NCTF37 VCC_NCTF60 R19 E8 VSS217 VSS151 F20 F31 VSS89 VSS21 W35
R16 VSS_NCTF36 VCC_NCTF59 Y19 L8 VSS216 VSS150 G20 G31 VSS88 VSS20 Y35
T16 VSS_NCTF35 VCC_NCTF58 L20 P8 VSS215 VSS149 V20 H31 VSS87 VSS19 AE35
U16 VSS_NCTF34 VCC_NCTF57 M20 Y8 VSS214 VSS148 AK20 J31 VSS86 VSS18 C36
V16 VSS_NCTF33 VCC_NCTF56 N20 AL8 VSS213 VSS147 C21 K31 VSS85 VSS17 AA36
W16 VSS_NCTF32 VCC_NCTF55 P20 A9 VSS212 VSS146 F21 L31 VSS84 VSS16 AB36
Y16 VSS_NCTF31 VCC_NCTF54 R20 H9 VSS211 VSS145 AF21 M31 VSS83 VSS15 AC36
AA16 VSS_NCTF30 VCC_NCTF53 Y20 K9 VSS210 VSS144 AN21 N31 VSS82 VSS14 AD36
AB16 VSS_NCTF29 VCC_NCTF52 L21 T9 VSS209 VSS143 A22 P31 VSS81 VSS13 AE36
R17 VSS_NCTF28 VCC_NCTF51 M21 V9 VSS208 VSS142 D22 R31 VSS80 VSS12 AF36
Y17 VSS_NCTF27 VCC_NCTF50 N21 AA9 VSS207 VSS141 E22 T31 VSS79 VSS11 AJ36
AA17 VSS_NCTF26 VCC_NCTF49 P21 AC9 VSS206 VSS140 J22 U31 VSS78 VSS10 AL36
AB17 VSS_NCTF25 VCC_NCTF48 T21 AE9 VSS205 VSS139 AH22 V31 VSS77 VSS9 AN36
AA18 VSS_NCTF24 VCC_NCTF47 U21 AH9 VSS204 VSS138 AL22 W31 VSS76 VSS8 E37
AB18 VSS_NCTF23 VCC_NCTF46 V21 AN9 VSS203 VSS137 H23 AD31 VSS75 VSS7 H37
B B
AA19 VSS_NCTF22 VCC_NCTF45 W21 D10 VSS202 VSS136 AF23 AG31 VSS74 VSS6 K37
AB19 VSS_NCTF21 VCC_NCTF44 L22 L10 VSS201 VSS135 B24 AL31 VSS73 VSS5 M37
AA20 VSS_NCTF20 VCC_NCTF43 M22 Y10 VSS200 VSS134 D24 A32 VSS72 VSS4 P37
AB20 VSS_NCTF19 VCC_NCTF42 N22 AA10 VSS199 VSS133 F24 C32 VSS71 VSS3 T37
R21 VSS_NCTF18 VCC_NCTF41 P22 F11 VSS198 VSS132 J24 Y32 VSS70 VSS2 V37
Y21 VSS_NCTF17 VCC_NCTF40 R22 H11 VSS197 VSS131 AG24 AA32 VSS69 VSS1 Y37
AA21 VSS_NCTF16 VCC_NCTF39 T22 Y11 VSS196 VSS130 AJ24 AB32 VSS68 VSS0 AG37
AB21 VSS_NCTF15 VCC_NCTF38 U22
Y22 VSS_NCTF14 VCC_NCTF37 V22
AA22 VSS_NCTF13 VCC_NCTF36 W22
AB22 L23 ALVISO_BGA1257 ALVISO_BGA1257
VSS_NCTF12 VCC_NCTF35
Y23 VSS_NCTF11 VCC_NCTF34 M23
AA23 VSS_NCTF10 VCC_NCTF33 N23
AB23 VSS_NCTF9 VCC_NCTF32 P23
Y24 VSS_NCTF8 VCC_NCTF31 R23
AA24 VSS_NCTF7 VCC_NCTF30 T23
AB24 VSS_NCTF6 VCC_NCTF29 U23
Y25 VSS_NCTF5 VCC_NCTF28 V23
AA25 VSS_NCTF4 VCC_NCTF27 W23
AB25 VSS_NCTF3 VCC_NCTF26 L24
Y26 VSS_NCTF2 VCC_NCTF25 M24
AA26 VSS_NCTF1 VCC_NCTF24 N24
AB26 VSS_NCTF0 VCC_NCTF23 P24
VCC_NCTF22 R24
V25 VCC_NCTF10 VCC_NCTF21 T24
W25 VCC_NCTF9 VCC_NCTF20 U24
L26 VCC_NCTF8 VCC_NCTF19 V24
M26 VCC_NCTF7 VCC_NCTF18 W24
A N26 VCC_NCTF6 VCC_NCTF17 L25 A
P26 VCC_NCTF5 VCC_NCTF16 M25
R26 VCC_NCTF4 VCC_NCTF15 N25
T26 VCC_NCTF3 VCC_NCTF14 P25
U26 VCC_NCTF2 VCC_NCTF13 R25
V26 VCC_NCTF1 VCC_NCTF12 T25
W26 VCC_NCTF0 VCC_NCTF11 U25
Title
ALVISO_BGA1257
Alviso(5 of 5)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+2.5V
+SDREF_DIMM DDR_D[0..63]
+2.5V 15 DDR_D[0..63]
JDIM1 R1062 DDR_DM[0..7] +1.25VS
15 DDR_DM[0..7]
1 VREF VREF 2 2 1 +V_DDR_MCH_REF
3 4 1 DDR_DQS[0..7] 56_0804_8P4R_5% RP57
VSS VSS 15 DDR_DQS[0..7]
DDR_D0 5 6 DDR_D1 0_0402_5% 8 1 DDR_CKE0
DDR_D4 DQ0 DQ4 DDR_D5 C976 DDR_A_MA[0..13] DDR_A_MA11
7 DQ1 DQ5 8 10 DDR_A_MA[0..13] 7 2
9 10 0.1U_0402_16V4Z 6 3 DDR_A_MA8
DDR_DQS0 VDD VDD DDR_DM0 2
11 DQS0 DM0 12 5 4
DDR_D6 13 14 DDR_D7
DQ2 DQ6 56_0804_8P4R_5% RP60
15 VSS VSS 16
D DDR_D2 17 18 DDR_D3 8 1 DDR_CKE1 D
DDR_D8 DQ3 DQ7 DDR_D13 DDR_A_MA12
19 DQ8 DQ12 20 7 2
21 22 6 3 DDR_A_MA13
DDR_D12 VDD VDD DDR_D9 DDR_A_MA9
23 DQ9 DQ13 24 5 4
DDR_DQS1 25 26 DDR_DM1
DQS1 DM1 +1.25VS 56_0804_8P4R_5% RP63
27 VSS VSS 28
DDR_D14 29 30 DDR_D15 8 1 DDR_A_MA7
DDR_D10 DQ10 DQ14 DDR_D11 DDR_A_MA5
31 DQ11 DQ15 32 7 2
33 34 RP58 56_0804_8P4R_5% RP59 56_0804_8P4R_5% 6 3 DDR_A_MA3
VDD VDD DDR_D5 DDR_DM5 DDR_A_MA1
9 DDR_CLK0 35 CK0 VDD 36 1 8 1 8 5 4
37 38 DDR_D1 2 7 2 7 DDR_D40
9 DDR_CLK0# CK0# VSS
39 40 DDR_D4 3 6 3 6 DDR_DQS5 56_0804_8P4R_5% RP66
VSS VSS DDR_D0 DDR_D45 DDR_A_MA10
4 5 4 5 8 1
7 2 DDR_A_BS#0
DDR_D16 41 42 DDR_D17 RP61 56_0804_8P4R_5% RP62 56_0804_8P4R_5% 6 3 DDR_A_WE#
DDR_D20 DQ16 DQ20 DDR_D21 DDR_D7 DDR_D47 DDR_SCS#0
43 DQ17 DQ21 44 1 8 1 8 5 4
45 46 DDR_DM0 2 7 2 7 DDR_D43
DDR_DQS2 VDD VDD DDR_DM2 DDR_D6 DDR_D42 56_0804_8P4R_5% RP69
47 DQS2 DM2 48 3 6 3 6
DDR_D18 49 50 DDR_D19 DDR_DQS0 4 5 4 5 DDR_D46 8 1 DDR_A_MA6
DQ18 DQ22 DDR_A_MA4
51 VSS VSS 52 7 2
DDR_D22 53 54 DDR_D23 RP64 56_0804_8P4R_5% RP65 56_0804_8P4R_5% 6 3 DDR_A_MA2
DDR_D24 DQ19 DQ23 DDR_D25 DDR_D13 DDR_D48 DDR_A_MA0
55 DQ24 DQ28 56 1 8 1 8 5 4
57 58 DDR_D3 2 7 2 7 DDR_D49
DDR_D28 VDD VDD DDR_D29 DDR_D8 DDR_D53 56_0804_8P4R_5% RP72
59 DQ25 DQ29 60 3 6 3 6
DDR_DQS3 61 62 DDR_DM3 DDR_D2 4 5 4 5 DDR_D52 8 1 DDR_A_BS#1
DQS3 DM3 DDR_A_RAS#
63 VSS VSS 64 7 2
DDR_D26 65 66 DDR_D27 RP67 56_0804_8P4R_5% 56_0804_8P4R_5% RP68 6 3 DDR_A_CAS#
DDR_D30 DQ26 DQ30 DDR_D31 DDR_DM1 DDR_D55 DDR_SCS#1
67 DQ27 DQ31 68 1 8 8 1 5 4
69 70 DDR_D9 2 7 7 2 DDR_DM6
C
VDD VDD DDR_DQS1 DDR_D54 C
71 CB0 CB4 72 3 6 6 3
73 74 DDR_D12 4 5 5 4 DDR_DQS6
CB1 CB5
75 VSS VSS 76
77 78 RP70 56_0804_8P4R_5% 56_0804_8P4R_5% RP71
DQS8 DM8 DDR_D11 DDR_D61
79 CB2 CB6 80 1 8 8 1
81 82 DDR_D15 2 7 7 2 DDR_D51
VDD VDD DDR_D10 DDR_D60
83 CB3 CB7 84 3 6 6 3
85 86 DDR_D14 4 5 5 4 DDR_D50
DU DU/RESET#
87 VSS VSS 88
89 90 RP73 56_0804_8P4R_5% 56_0804_8P4R_5% RP74
CK2 VSS DDR_D21 DDR_DM7
91 CK2# VDD 92 1 8 8 1
93 94 DDR_D17 2 7 7 2 DDR_D56
DDR_CKE1 VDD VDD DDR_CKE0 DDR_D20 DDR_DQS7
9 DDR_CKE1 95 CKE1 CKE0 96 DDR_CKE0 9 3 6 6 3
97 98 DDR_D16 4 5 5 4 DDR_D58
DDR_A_MA12 DU/A13 DU/BA2 DDR_A_MA11
99 A12 A11 100
DDR_A_MA9 101 102 DDR_A_MA8 RP75 56_0804_8P4R_5% 56_0804_8P4R_5% RP76
A9 A8 DDR_D19 DDR_D62
103 VSS VSS 104 1 8 8 1
DDR_A_MA7 105 106 DDR_A_MA6 DDR_DM2 2 7 7 2 DDR_D63
DDR_A_MA5 A7 A6 DDR_A_MA4 DDR_D18 DDR_D59
107 A5 A4 108 3 6 6 3
DDR_A_MA3 109 110 DDR_A_MA2 DDR_DQS2 4 5 5 4 DDR_D57
DDR_A_MA1 A3 A2 DDR_A_MA0
111 A1 A0 112
113 114 RP77 56_0804_8P4R_5% RP78 56_0804_8P4R_5%
DDR_A_MA10 VDD VDD DDR_A_BS#1 DDR_D25 DDR_D44
115 A10/AP BA1 116 DDR_A_BS#1 10 1 8 1 8
DDR_A_BS#0 117 118 DDR_A_RAS# DDR_D24 2 7 2 7 DDR_D34
10 DDR_A_BS#0 BA0 RAS# DDR_A_RAS# 10
DDR_A_WE# 119 120 DDR_A_CAS# DDR_D23 3 6 3 6 DDR_D41
10 DDR_A_WE# WE# CAS# DDR_A_CAS# 10
DDR_SCS#0 121 122 DDR_SCS#1 DDR_D22 4 5 4 5 DDR_D39
9 DDR_SCS#0 S0# S1# DDR_SCS#1 9
DDR_A_MA13 123 124
DU DU RP79 56_0804_8P4R_5% RP80 56_0804_8P4R_5%
125 VSS VSS 126
DDR_D36 127 128 DDR_D37 DDR_DQS3 1 8 1 8 DDR_D38
B DDR_D33 DQ32 DQ36 DDR_D32 DDR_DM3 DDR_DM4 B
129 DQ33 DQ37 130 2 7 2 7
131 132 DDR_D28 3 6 3 6 DDR_D35
DDR_DQS4 VDD VDD DDR_DM4 DDR_D29 DDR_DQS4
133 DQS4 DM4 134 4 5 4 5
DDR_D35 135 136 DDR_D38
DQ34 DQ38 RP81 56_0804_8P4R_5% RP82 56_0804_8P4R_5%
137 VSS VSS 138
DDR_D39 139 140 DDR_D34 DDR_D31 1 8 1 8 DDR_D32
DDR_D41 DQ35 DQ39 DDR_D44 DDR_D27 DDR_D37
141 DQ40 DQ44 142 2 7 2 7
143 144 DDR_D30 3 6 3 6 DDR_D33
DDR_D45 VDD VDD DDR_D40 DDR_D26 DDR_D36
145 DQ41 DQ45 146 4 5 4 5
DQS5 DM5
149 VSS VSS 150
DDR_D46 151 152 DDR_D43
DDR_D42 DQ42 DQ46 DDR_D47
153 DQ43 DQ47 154
155 VDD VDD 156
157 VDD CK1# 158 DDR_CLK1# 9
159 VSS CK1 160 DDR_CLK1 9
161 VSS VSS 162
DDR_D52 163 164 DDR_D49
165 DQ49 DQ53 166
167 VDD VDD 168
DDR_D54 DQS6 DM6 DDR_D55
171 DQ50 DQ54 172
173 VSS VSS 174
DDR_D50 175 176 DDR_D51
177 DQ56 DQ60 178
179 VDD VDD 180
DDR_D58 181 182 DDR_D56
DDR_DQS7 DQ57 DQ61 DDR_DM7
183 DQS7 DM7 184
A 185 VSS VSS 186 A
DDR_D57 187 188 DDR_D63
189 DQ59 DQ63 190
191 VDD VDD 192
CK_SDATA 193 194
15,17 CLK_SDATA SDA SA0
CK_SCLK 195 196
15,17 CLK_SCLK SCL SA1
+3VS 197
199
VDD_SPD
VDD_ID
SA2
DU
198
200 Compal Electronics, Inc.
Title
KLINK_5763-3-111
DDRI-SODIMM SLOT1
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+2.5V
+SDREF_DIMM DDR_A_D[0..63] DDR_D[0..63]
+2.5V 10 DDR_A_D[0..63] 14 DDR_D[0..63]
JDIM2 R1098 DDR_A_DM[0..7] DDR_DM[0..7]
10 DDR_A_DM[0..7] 14 DDR_DM[0..7]
1 VREF VREF 2 2 1 +V_DDR_MCH_REF
3 4 1 DDR_A_DQS[0..7] DDR_DQS[0..7]
VSS VSS 10 DDR_A_DQS[0..7] 14 DDR_DQS[0..7]
DDR_D0 5 6 DDR_D1 0_0402_5%
DDR_D4 DQ0 DQ4 DDR_D5 C1086 DDR_A_MA[0..13]
7 DQ1 DQ5 8 10 DDR_B_MA[0..13]
9 10 0.1U_0402_16V4Z
DDR_DQS0 VDD VDD DDR_DM0 2
11 DQS0 DM0 12
DDR_D6 13 14 DDR_D7
DQ2 DQ6 RP99 10_0804_8P4R_5%
15 VSS VSS 16
DDR_D2 17 18 DDR_D3 DDR_A_D0 1 8 DDR_D0 +1.25VS
DDR_D8 DQ3 DQ7 DDR_D13 DDR_A_D4 DDR_D4
D 19 DQ8 DQ12 20 2 7 D
21 22 DDR_A_D1 3 6 DDR_D1 RP83 56_0804_8P4R_5%
DDR_D12 VDD VDD DDR_D9 DDR_A_D5 DDR_D5 DDR_CKE2
23 DQ9 DQ13 24 4 5 1 8
DDR_DQS1 25 26 DDR_DM1 2 7 DDR_B_MA11
DQS1 DM1 RP100 10_0804_8P4R_5% DDR_B_MA8
27 VSS VSS 28 3 6
DDR_D14 29 30 DDR_D15 DDR_A_DM0 1 8 DDR_DM0 4 5
DDR_D10 DQ10 DQ14 DDR_D11 DDR_A_DQS0 DDR_DQS0
31 DQ11 DQ15 32 2 7
33 34 DDR_A_D6 3 6 DDR_D6 RP86 56_0804_8P4R_5%
VDD VDD DDR_A_D7 DDR_D7 DDR_CKE3
9 DDR_CLK3 35 CK0 VDD 36 4 5 1 8
37 38 2 7 DDR_B_MA13
9 DDR_CLK3# CK0# VSS
39 40 RP101 10_0804_8P4R_5% 3 6 DDR_B_MA12
VSS VSS DDR_A_D2 DDR_D2 DDR_B_MA9
1 8 4 5
DDR_A_D3 2 7 DDR_D3
DDR_D16 41 42 DDR_D17 DDR_A_D8 3 6 DDR_D8 RP89 56_0804_8P4R_5%
DDR_D20 DQ16 DQ20 DDR_D21 DDR_A_D13 DDR_D13 DDR_B_MA6
43 DQ17 DQ21 44 4 5 1 8
45 46 2 7 DDR_B_MA4
DDR_DQS2 VDD VDD DDR_DM2 RP102 10_0804_8P4R_5% DDR_B_MA2
47 DQS2 DM2 48 3 6
DDR_D18 49 50 DDR_D19 DDR_A_D14 1 8 DDR_D14 4 5 DDR_B_MA0
DQ18 DQ22 DDR_A_D15 DDR_D15
51 VSS VSS 52 2 7
DDR_D24 DQ19 DQ23 DDR_D25 DDR_A_D11 DDR_D11 DDR_B_BS#1
55 DQ24 DQ28 56 4 5 1 8
57 58 2 7 DDR_B_RAS#
DDR_D28 VDD VDD DDR_D29 RP103 10_0804_8P4R_5% DDR_B_CAS#
59 DQ25 DQ29 60 3 6
DDR_DQS3 61 62 DDR_DM3 DDR_A_D12 1 8 DDR_D12 4 5 DDR_SCS#3
DQS3 DM3 DDR_A_DM1 DDR_DM1
63 VSS VSS 64 2 7
DDR_D30 DQ26 DQ30 DDR_D31 DDR_A_DQS1 DDR_DQS1 DDR_B_MA10
67 DQ27 DQ31 68 4 5 1 8
69 70 2 7 DDR_B_BS#0
VDD VDD RP104 10_0804_8P4R_5% DDR_B_WE#
71 CB0 CB4 72 3 6
C 73 74 DDR_A_D16 1 8 DDR_D16 4 5 DDR_SCS#2 C
CB1 CB5 DDR_A_D17 DDR_D17
75 VSS VSS 76 2 7
77 78 DDR_A_D20 3 6 DDR_D20 RP98 56_0804_8P4R_5%
DQS8 DM8 DDR_A_D21 DDR_D21 DDR_B_MA7
79 CB2 CB6 80 4 5 1 8
81 82 2 7 DDR_B_MA5
VDD VDD RP105 10_0804_8P4R_5% DDR_B_MA3
83 CB3 CB7 84 3 6
85 86 DDR_A_DQS2 1 8 DDR_DQS2 4 5 DDR_B_MA1
DU DU/RESET# DDR_A_DM2 DDR_DM2
87 VSS VSS 88 2 7
89 90 DDR_A_D18 3 6 DDR_D18
CK2 VSS DDR_A_D19 DDR_D19
91 CK2# VDD 92 4 5
93 VDD VDD 94
DDR_CKE3 95 96 DDR_CKE2
9 DDR_CKE3 CKE1 CKE0 DDR_CKE2 9
97 DU/A13 DU/BA2 98
DDR_B_MA12 99 100 DDR_B_MA11
DDR_B_MA9 A12 A11 DDR_B_MA8
101 A9 A8 102
103 VSS VSS 104
DDR_B_MA7 105 106 DDR_B_MA6
DDR_B_MA5 A7 A6 DDR_B_MA4 RP108 10_0804_8P4R_5% RP107 10_0804_8P4R_5%
107 A5 A4 108
DDR_B_MA3 109 110 DDR_B_MA2 DDR_A_D22 1 8 DDR_D22 DDR_A_D46 1 8 DDR_D46
DDR_B_MA1 A3 A2 DDR_B_MA0 DDR_A_D23 DDR_D23 DDR_A_D47 DDR_D47
111 A1 A0 112 2 7 2 7
113 114 DDR_A_D24 3 6 DDR_D24 DDR_A_D43 3 6 DDR_D43
DDR_B_MA10 VDD VDD DDR_B_BS#1 DDR_A_D25 DDR_D25 DDR_A_D42 DDR_D42
115 A10/AP BA1 116 DDR_B_BS#1 10 4 5 4 5
DDR_B_BS#0 117 118 DDR_B_RAS#
10 DDR_B_BS#0 BA0 RAS# DDR_B_RAS# 10
DDR_B_WE# 119 120 DDR_B_CAS# RP110 10_0804_8P4R_5% RP109 10_0804_8P4R_5%
10 DDR_B_WE# WE# CAS# DDR_B_CAS# 10
DDR_SCS#2 121 122 DDR_SCS#3 DDR_A_D29 1 8 DDR_D29 DDR_A_D52 1 8 DDR_D52
9 DDR_SCS#2 S0# S1# DDR_SCS#3 9
DDR_B_MA13 123 124 DDR_A_D28 2 7 DDR_D28 DDR_A_D53 2 7 DDR_D53
DU DU DDR_A_DM3 DDR_DM3 DDR_A_D49 DDR_D49
125 VSS VSS 126 3 6 3 6
DDR_D36 127 128 DDR_D37 DDR_A_DQS3 4 5 DDR_DQS3 DDR_A_D48 4 5 DDR_D48
129 DQ33 DQ37 130
B RP112 10_0804_8P4R_5% RP111 10_0804_8P4R_5% B
131 VDD VDD 132
DDR_DQS4 133 134 DDR_DM4 DDR_A_D26 1 8 DDR_D26 DDR_A_DM6 1 8 DDR_DM6
DDR_D35 DQS4 DM4 DDR_D38 DDR_A_D30 DDR_D30 DDR_A_DQS6 DDR_DQS6
135 DQ34 DQ38 136 2 7 2 7
DDR_D39 VSS VSS DDR_D34 DDR_A_D27 DDR_D27 DDR_A_D55 DDR_D55
139 DQ35 DQ39 140 4 5 4 5
DDR_D41 141 142 DDR_D44
DQ40 DQ44 RP114 10_0804_8P4R_5% RP113 10_0804_8P4R_5%
143 VDD VDD 144
DDR_D45 145 146 DDR_D40 DDR_A_D36 1 8 DDR_D36 DDR_A_D50 1 8 DDR_D50
DDR_DQS5 DQ41 DQ45 DDR_DM5 DDR_A_D33 DDR_D33 DDR_A_D51 DDR_D51
147 DQS5 DM5 148 2 7 2 7
DDR_D46 VSS VSS DDR_D43 DDR_A_D37 DDR_D37 DDR_A_DM7 DDR_DM7
151 DQ42 DQ46 152 4 5 4 5
DDR_D42 153 154 DDR_D47
DQ43 DQ47 RP116 10_0804_8P4R_5% RP115 10_0804_8P4R_5%
155 VDD VDD 156
157 158 DDR_A_DM4 1 8 DDR_DM4 DDR_A_D56 1 8 DDR_D56
VDD CK1# DDR_CLK4# 9
159 160 DDR_A_DQS4 2 7 DDR_DQS4 DDR_A_D60 2 7 DDR_D60
VSS CK1 DDR_CLK4 9
DDR_D52 VSS VSS DDR_D49 DDR_A_D39 DDR_D39 DDR_A_DQS7 DDR_DQS7
163 DQ48 DQ52 164 4 5 4 5
DDR_D53 165 166 DDR_D48
DQ49 DQ53 RP118 10_0804_8P4R_5% RP117 10_0804_8P4R_5%
167 VDD VDD 168
DDR_DQS6 169 170 DDR_DM6 DDR_A_D34 1 8 DDR_D34 DDR_A_D63 1 8 DDR_D63
DDR_D54 DQS6 DM6 DDR_D55 DDR_A_D35 DDR_D35 DDR_A_D62 DDR_D62
171 DQ50 DQ54 172 2 7 2 7
DDR_D50 VSS VSS DDR_D51 DDR_A_D44 DDR_D44 DDR_A_D59 DDR_D59
175 DQ51 DQ55 176 4 5 4 5
DDR_D60 177 178 DDR_D61
DQ56 DQ60 RP119 10_0804_8P4R_5%
179 VDD VDD 180
DDR_D58 181 182 DDR_D56 DDR_A_D45 1 8 DDR_D45
DDR_DQS7 DQ57 DQ61 DDR_DM7 DDR_A_D40 DDR_D40
183 DQS7 DM7 184 2 7
185 186 DDR_A_DQS5 3 6 DDR_DQS5
DDR_D57 VSS VSS DDR_D63 DDR_A_DM5 DDR_DM5
A 187 DQ58 DQ62 188 4 5 A
DDR_D59 189 190 DDR_D62
DQ59 DQ63
191 VDD VDD 192
CK_SDATA 193 194
14,17 CLK_SDATA SDA SA0
CK_SCLK 195 196 +3VS
14,17 CLK_SCLK SCL SA1
+3VS 197 VDD_SPD SA2 198
199 VDD_ID DU 200
Title
KLINK_5763-2-111
DDRI-SODIMM SLOT2
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
Layout note :
Distribute as close as possible
to DDR-SODIMM.
+2.5V
1 1 1 1 1 1 1 1 1 1 1
C978 C979 C980 C981 C982 C983 C984 C985 C986 C987 C988
D 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z D
2 2 2 2 2 2 2 2 2 2 2
+2.5V +2.5V
1 1 1 1 1 1 1 1
C989 C990 C991 C992 C993 C994 + +
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C995 C996
2 2 2 2 2 2 150U_C_4VM 150U_C_4VM
2 @ 2
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
+1.25VS
C C
1 1 1 1 1 1 1 1 1 1
@ @
C997 C998 C999 C1000 C1001 C1002 C1003 C1004 C1005 C1006
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2
+1.25VS
1 1 1 1 1 1 1 1 1 1
@
C1007 C1008 C1009 C1010 C1011 C1012 C1013 C1014 C1015 C1016
2 2 2 2 2 2 2 2 2 2
+1.25VS
1 1 1 1 1 1 1 1 1 1
@
C1017 C1018 C1019 C1020 C1021 C1022 C1023 C1024 C1025 C1026
2 2 2 2 2 2 2 2 2 2
B B
+1.25VS
1 1 1 1 1 1 1 1 1 1
C1027 C1028 C1029 C1030 C1031 C1032 C1033 C1034 C1035 C1036
2 2 2 2 2 2 2 2 2 2
+1.25VS
1 1 1 1 1 1 1 1 1 1
@ @
C1037 C1038 C1039 C1040 C1041 C1042 C1043 C1044 C1045 C1046
2 2 2 2 2 2 2 2 2 2
+1.25VS
A 1 1 1 1 1 1 1 1 1 1 A
@ @
C1047 C1048 C1049 C1050 C1051 C1052 C1053 C1054 C1055 C1056
2 2 2 2 2 2 2 2 2 2

Title
DDR Decoupling
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+3VS +CK_VDD_MAIN
+3VS
1 2 +CK_VDD_MAIN CLK_CPU_ITP 2 1
1
2.2K_0402_5%
L1 2 1 1 1 1 R1 @ 49.9_0402_1%
R2 R3 1 CHB2012U121_0805 C1 CLK_CPU_ITP# 2 1
0_0402_5% R1166 @ 2.2K_0402_5% C6 C2 C3 C4 C5 R4 @ 49.9_0402_1%
1 2 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z CLK_MCH_BCLK 2 1
0.1U_0402_16V4Z 1 2 2 2 2 R5 49.9_0402_1%
2
2 CLK_MCH_BCLK# 2 1
ICH_SMBDATA CLK_SDATA +CK_VDD_MAIN2 R6 49.9_0402_1%
S
29,39 ICH_SMBDATA 1 3 CLK_SDATA 14,15
Q1 CLK_CPU_BCLK 2 1
2N7002_SOT23 R7 49.9_0402_1%
1 2 CLK_CPU_BCLK# 2 1
G
2
L2 2 1 1 R8 49.9_0402_1%
+3VS CHB2012U121_0805 C7 CLK_MCH_3GPLL 1 2
D C8 C9 R9 49.9_0402_1% D
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z Place near each pin CLK_MCH_3GPLL# 1 2
2
1 2 2 R10 49.9_0402_1%
G
Q2 W>40 mil CLK_PCIE_ICH 1 2
ICH_SMBCLK 1 3 2N7002_SOT23 CLK_SCLK R16 49.9_0402_1%
29,39 ICH_SMBCLK CLK_SCLK 14,15
CLK_PCIE_ICH# 1 2
S
Place near CK410
R17 49.9_0402_1%
0.047U_0402_16V4Z
1 2 R14 CLK_PCIE_VGA 1 2
CK_VDD_A CK_VDD_48 CK_VDD_REF 2.2_0603_5% R1105 2@ 49.9_0402_1%
0.047U_0402_16V4Z
@ 0_0402_5% R1167 1 1 1 1 1 1 2 CK_VDD_A CLK_PCIE_VGA# 1 2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.047U_0402_16V4Z
R1106 2@ 49.9_0402_1%
D DREF_SSCLK 1 2
C10
C11
C12
U1 R18 1@49.9_0402_1%
2 2 2 2 2
1 DREF_SSCLK# 1 2
C13
C14
21 R19 1@49.9_0402_1%
VDDPCIEX_0
G 2 3 S 28 VDDPCIEX_1 VDDA 37 DREFCLK
R20
1 2
1@ 49.9_0402_1%
34 VDDPCIEX_2
38 DREFCLK# 1 2
GNDA
2N7002 1 R21 1@ 49.9_0402_1%
VDDPCI_0 CLK_PCIE_CARD 1
7 VDDPCI_1 2
55 PM_STP_PCI# R13 @ 49.9_0402_1%
PCI/SRC_STOP# PM_STP_PCI# 29
CLK_PCIE_CARD# 1 2
Place crystal within CPU_STOP# 54 PM_STP_CPU#
PM_STP_CPU# 29,55
R15 @ 49.9_0402_1%
500 mils of CK410
C15 42 VDDCPU
1 2 CK_VDD_REF48
FSC FSB FSA CPU SRC PCI 1 2 CLK_XTAL_IN R22 VDDREF
CLKSEL0 CLKSEL1 CLKSEL2 MHz MHz MHz 1_0603_5%
CPUCLKT1 41 MCH_BCLK 1 2 CLK_MCH_BCLK
CLK_MCH_BCLK 9
33P_0402_50V8J 1 2 CK_VDD_48 11 R23 33_0402_5%
VDD48
2
R24 40 MCH_BCLK# 1 2 CLK_MCH_BCLK#
CPUCLKC1 CLK_MCH_BCLK# 9
0 0 0 266 100 33.3 X1 2.2_0603_5% R25 33_0402_5%
C16 14.31818MHZ_20P_6X1430004201 50
C 33P_0402_50V8J X1 C
1
* 0 0 1 133 100 33.3 1 2 CLK_XTAL_OUT 49 44 CPU_BCLK 1 2 CLK_CPU_BCLK
X2 CPUCLKT0 CLK_CPU_BCLK 5
R26 33_0402_5%
R1026 1 2 22_0402_5% 43 CPU_BCLK# 1 2 CLK_CPU_BCLK#
32 CLK_EXT_SD48 CPUCLKC0 CLK_CPU_BCLK# 5
0 1 0 200 100 33.3 CLK_ICH_48M R1025 1 2 22_0402_5% CLKSEL2 12 R27 33_0402_5%
29 CLK_ICH_48M FS_A/USB_48MHz
53 REF1/FSLC/TEST_SEL
CLK_Compal_14M 2 1
CLK_Compal_14M
0 1 1 166 100 33.3 CLKSEL0 22_0402_5% @R1049
CLK_SIO_14M 2 1 16 36 CPU_ITP 1 2 CLK_CPU_ITP
43 CLK_SIO_14M FSLB/TEST_MODE CPUCLKT2_ITP/PCIEXT6 CLK_CPU_ITP 5
CLKSEL1 22_0402_5% @ R60 R29 @ 33_0402_5%
1 0 0 333 100 33.3 Stuff R73 for Cypress clock gen 1 2 35 CPU_ITP# 1 2 CLK_CPU_ITP#
CPUCLKC2_ITP/PCIEXC6 CLK_CPU_ITP# 5
R73 @ 475_0603_1% R30 @ 33_0402_5%
CLK_PCI_PCM 2 1 PCI_PCM 5
32 CLK_PCI_PCM PCICLK5
1 0 1 100 100 33.3 R31 10_0402_5%
2 1 4 33 PEREQ1# R1152 1 @ 2 10K_0402_5% +3VS
38 CLK_PCI_MINI1 PCICLK4 PEREQ1#/PCIEXT5
R1065 10_0402_5%
1 1 0 400 100 33.3 CLK_PCI_1394 2 1 PCI_1394 3 32 PEREQ2# R1153 1 @ 2 0_0402_5%
34 CLK_PCI_1394 PCICLK3 PEREQ2#/PCIEXC5 PCIECARD_CLKEN 39,41
R32 33_0402_5%
CLK_PCI_MINI 2 1 PCI_MINI 56
37 CLK_PCI_MINI PCICLK2/REQ_SEL
1 1 1 RESERVED R33 33_0402_5% 31 MCH_3GPLL 1 2 CLK_MCH_3GPLL
PCIEXT4 CLK_MCH_3GPLL 11
CLK_PCI_LOM 2 1 PCI_LOM 9 R35 33_0402_5%
35 CLK_PCI_LOM SELPCIEX_LCDCLK#/PCICLK_F1
R34 33_0402_5% 30 MCH_3GPLL# 1 2 CLK_MCH_3GPLL#
PCIEXC4 CLK_MCH_3GPLL# 11
Table : CLK_PCI_ICH 2 1 PCI_ICH R37 33_0402_5%
27 CLK_PCI_ICH
R36 33_0402_5%
+3VS 1 2 PCICLKF0 8 26 PCIE_VGA 1 2@ 2 CLK_PCIE_VGA
ITP_EN/PCICLK_F0 SATACLKT CLK_PCIE_VGA 18
R38 10K_0402_5% R1107 33_0402_5%
CLK_PCI_EC 2 1 CLK_SCLK 46 27 PCIE_VGA# 1 2 CLK_PCIE_VGA#
+VCCP 41,43 CLK_PCI_EC SCLK SATACLKC CLK_PCIE_VGA# 18
R69 33_0402_5% R1108 2@ 33_0402_5%
CLK_SDATA 47 24 PCIE_ICH 1 2 CLK_PCIE_ICH

SDATA PCIEXT3 CLK_PCIE_ICH 29
R39 33_0402_5%
2
25 PCIE_ICH# 1 2 CLK_PCIE_ICH#
B PCIEXC3 CLK_PCIE_ICH# 29 B
R44 1 2 CLKIREF 39 R40 33_0402_5%
1K_0402_5% R41 475_0603_1% IREF
@ 22
R67 PCIEXT2
1
1 2 2 1 CLKSEL0 23
6 CPU_BSEL0 PCIEXC2
R48
0_0402_5% 0_0402_5% 19 PCIE_CARD 1 2 CLK_PCIE_CARD
PCIEXT1 CLK_PCIE_CARD 39
R45 @ 33_0402_5%
2
R46 20 PCIE_CARD# 1 2 CLK_PCIE_CARD#

PCIEXC1 CLK_PCIE_CARD# 39
@ R51 2 1 13 R47 @ 33_0402_5%
MCH_CLKSEL0 9 GND_0
0_0402_5%
29 17 PCIE_GM 1 1@ 2 DREF_SSCLK
1K_0402_5% GND_1 LCDCLK_SS/PCIEX0T DREF_SSCLK 9
R49 33_0402_5%
1
+3VS 2 18 PCIE_GM# 1 1@ 2 DREF_SSCLK#

GND_2 LCDCLK_SS/PCIEX0C DREF_SSCLK# 9
R50 33_0402_5%
45 GND_3
2
14 DOT96 1 2 DREFCLK
DOTT_96MHz DREFCLK 9
R53 51 15 R52 1@ 33_0402_5%
10K_0402_5% GND_4 DOTC_96MHz DOT96# DREFCLK#
1 2 DREFCLK# 9
6 R54 1@ 33_0402_5%
GND_5
1
CLKSEL2 CLK_ENABLE# 1 2 +3VS

+VCCP R1041 10K_0402_5%
2
1
D
R55 2 VGATE 9,29,55
2
10K_0402_5% 10 Q78 2N7002_SOT23

G
R56 @ VTT_PWRGD#/PD
S
3
1K_0402_5% 52
1
@ REF0
CLKREF 1 2 CLK_ICH_14M
CLK_ICH_14M 29
1
R1181 ICS954226AGT_TSSOP56 R57 22_0402_5%

A CLKSEL1 A
6 CPU_BSEL1 1 2 1 2
1 2 CLK_CODEC_14M 44
R61 0_0402_5% 0_0402_5% R58 22_0402_5%
1 2 MCH_CLKSEL1 9
2
R59
@ R62
0_0402_5%
1K_0402_5%
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
Clock Generator
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
1
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
U5A
PEG_TXN[0..15] PEG_RXP0 AH30 AJ5
21 PEG_TXN[0..15] PCIE_RX0P GPIO0 GPIO0 26
PEG_RXN0 AG30 Part 1 of 5 AH5
PEG_TXP[0..15] PCIE_RX0N GPIO1 GPIO1 26
PEG_RXP1
21 PEG_TXP[0..15]
PEG_RXN1
AG29
AF29
PCIE_RX1P GPIO2 AJ4
AK4
GPIO2 26 MEM Type Selection
PEG_RXN[0..15] PCIE_RX1N GPIO3 GPIO3 26
PEG_RXP2 AE29 AH4
21 PEG_RXN[0..15] PCIE_RX2P GPIO4 GPIO4 26
PEG_RXN2
PEG_RXP[0..15] PEG_RXP3
AE30
AD30
PCIE_RX2N GPIO5 AF4
AJ3
GPIO5 26 MEMSEL0 MEMSEL1
21 PEG_RXP[0..15] PCIE_RX3P GPIO6 GPIO6 26
PEG_RXN3 AD29 AK3 R151 1 20_0402_5%
PCIE_RX3N GPIO7 ROM_ID4 26
PEG_RXP4 2@ SOUT
PEG_RXN4
AC29
AB29
PCIE_RX4P GPIO8 AH3
AJ2 S IN
64M Samsung LOW LOW
PEG_RXP5 PCIE_RX4N GPIO9 SCLK
AB30 PCIE_RX5P GPIO10 AH2
PEG_RXN5 AA30 AH1
PEG_RXP6
D
PEG_RXN6
AA29
Y29
PCIE_RX6P GPIO12 AG3
AG1
ROM_ID2 26 64M Hynix LOW HI D
FLASH ROM PEG_RXP7
PEG_RXN7
W29 PCIE_RX7P GPIO14 AG2
W30 AF3
(if no problem can be remove) PEG_RXP8 V30
PCIE_RX7N GPIO_PWRCNTL
AF2
POWER_SEL 54
OSC_SPREAD 26 128M Samsung HI LOW
PEG_RXN8 PCIE_RX8P GPIO_MEMSSIN
V29 PCIE_RX8N 2 1
PEG_RXP9 U29 AE10 R152 2@ 10K_0402_5%
DVO / EXT TMDS / GPIO

PEG_RXN9 PCIE_RX9P DVOMODE
T29 PCIE_RX9N
PEG_RXP10 MEMSEL0 R154 1 @ 0_0402_5%
PEG_RXN10
T30
R30
PCIE_RX10P DVPDATA_0 AH6
AJ6 MEMSEL1 R155 1 @
2
2 0_0402_5%
128M Hynix HI HI
PEG_RXP11 PCIE_RX10N DVPDATA_1
R29 PCIE_RX11P DVPDATA_2 AK6 1 2 ROM_ID4 26
PEG_RXN11 P29 AH7 R156 @ 0_0402_5%
PCIE_RX11N DVPDATA_3
1
+3VS
0_0402_5%
S IN PEG_RXP12 N29 AK7
T25 PAD PCIE_RX12P DVPDATA_4
0_0402_5%
PEG_RXN12 N30 AJ7
2 R157
PEG_RXP13 M30 AH8
T26 PAD SCS# 19 PCIE_RX13P DVPDATA_6
R158
PEG_RXN13 M29 AJ8
SCLK PEG_RXP14 PCIE_RX13N DVPDATA_7
T27 PAD L29 PCIE_RX14P DVPDATA_8 AH9
PEG_RXN14 K29 AJ9 2@
2
1
SOUT PEG_RXP15 K30 AK9 2@ +3VS
T28 PAD PCIE_RX15P DVPDATA_10
PEG_RXN15 J30 AH10 R1020 R1021
PCIE_RX15N DVPDATA_11 2.2K_0402_5% 2.2K_0402_5%
DVPDATA_12 AE6
PEG_TXP0 AF26 AG6 2@ 2@
PEG_TXN0 PCIE_TX0P DVPDATA_13
AE26 AF6
2
PEG_TXP1 PCIE_TX0N DVPDATA_14
AC25 PCIE_TX1P DPVDATA_15 AE7
PEG_TXN1 AB25 AF7
PCI EXPRESS
AC27 PCIE_TX2P DVPDATA_17 AE8
PEG_TXN2 AB27 AG8
PCIE_TX2N DVPDATA_18 EDID_DAT 24
PEG_TXP3 AC26 AF8
PCIE_TX3P DVPDATA_19 EDID_CLK 24
PEG_TXN3 AB26 AE9 R164 1 2@ 2 10K_0402_5% +3VS
C PEG_TXP4 PCIE_TX3N DVPDATA_20 C
Y25 PCIE_TX4P DVPDATA_21 AF9
PEG_TXN4 W25 AG10
Y27 PCIE_TX5P DVPDATA_23 AF10
U60 UNMOUNT : VBIOS MUST COMBINE WITH SYSTEM BIOS PEG_TXN5 W27 10K_1206_8P4R_5%
PEG_TXP6 PCIE_TX5N
Y26 PCIE_TX6P DVPCNTL_0 AJ10 4 5
PEG_TXN6 W26 AK10 3 6
PEG_TXP7 PCIE_TX6N DVPCNTL_1
U25 PCIE_TX7P DVPCNTL_2 AJ11 2 7
PEG_TXN7 T25 AH11 1 8
PEG_TXP8 PCIE_TX7N DVPCNTL_3
U27 PCIE_TX8P
PEG_TXN8 T27 AG4 RP28 1 2@ 2
PEG_TXP9 PCIE_TX8N VREFG 2@ R166 1K_0402_5%
U26 PCIE_TX9P
PEG_TXN9 T26 AH15
PCIE_TX9N TXOUT_L0N LVDSA0- 24
1
PEG_TXP10 P25 AH16 R167
PCIE_TX10P TXOUT_L0P LVDSA0+ 24
PEG_TXN10 N25 AJ16
PEG_TXP11 P27 AJ17 2@
PCIE_TX11P TXOUT_L1P LVDSA1+ 24
PEG_TXN11 N27 AJ18
PEG_TXP12 P26 AK18 LVDSA2+ 24
2
PEG_TXN12 PCIE_TX12P TXOUT_L2P 1K_0402_5%
N26 PCIE_TX12N TXOUT_L3N AJ20
PEG_TXP13 L25 AJ21
PEG_TXN13 PCIE_TX13P TXOUT_L3P
K25 PCIE_TX13N TXCLK_LN AK19 LVDSAC- 24
PEG_TXP14 L27 AJ19
PCIE_TX14P TXCLK_LP LVDSAC+ 24
PEG_TXN14 K27 AG16
PCIE_TX14N TXOUT_U0N LVDSB0- 24
PEG_TXP15 L26 AG17
LVDS
PCIE_TX15P TXOUT_U0P LVDSB0+ 24
PEG_TXN15 K26 AF16
PCIE_TX15N TXOUT_U1N LVDSB1- 24
TXOUT_U1P AF17 LVDSB1+ 24
CLK_PCIE_VGA AF27 AE18
17 CLK_PCIE_VGA PCIE_REFCLKP TXOUT_U2N LVDSB2- 24
CLK_PCIE_VGA# AE27 AE19
17 CLK_PCIE_VGA# PCIE_REFCLKN TXOUT_U2P LVDSB2+ 24
TXOUT_U3N AF19
R168 1 2@ 2 150_0402_1% AC23 AF20
B +3VS R169 1 2@ PCIE_CALRP TXOUT_U3P B
+1.2VS 2 100_0402_1% AB24 PCIE_CALRN TXCLK_UN AG19 LVDSBC- 24
R170 1 2@ 2 10K_0402_1% AB23 AG20
PCIE_CALI TXCLK_UP LVDSBC+ 24
R171
1 @ 2 10K_0402_5% AE25 AE12 ENVDD
PCIE_TESTIN DIGON ENVDD 24
R172 10K_0402_5% R1115 0_0402_5% AG12 1 2 BACKLITE_ON
BLON BACKLITE_ON 11,24,41
1 2 29 PLTRST_VGA# 1 2@ 2 AD25 PWRGD
R11142@ 0_0402_5%
2@ 1 2@ 2 AD24 AK13
@ R173 1K_0402_5% PWRGD_MASK TX0M
27 PLTRST_ICH# 1 2 TX0P AJ13
R1116 0_0402_5% 2 2@
R174
1
715_0402_1%
AH21 R2SET TX1M AJ14
AJ15
Note:
TX1P
25 TV_Y
TV_Y AK21 Y_G TX2M AK15 Keep toggling signals always from
TV_C AJ22 AK16
25 TV_C C_R_PR TX2P RSET/RSET2 resistor and trace.
TV_CVBS AK22 AJ12
25 TV_CVBS COMP_B_PB TXCM
TMDS
AK12 Layout wider in resistor to GND.

DAC2
TXCP
AJ24 H2SYNC
+3VS 1 2@ 2 AK24 V2SYNC DDC2CLK AE13
R392 4.7K_0402_5% AE14
R7621 @ 0_0402_5% DDC2DATA
26 SMBCLK 2 AG22 DDC3CLK HPD1 AF12 1 2
26 SMBDATA 1 @ 2 AG23 DDC3DATA
R177 2@ 100K_0402_5%
R391 0_0402_5% AK27
R VGA_RED 25
1 2@ 2 AJ23 AJ27
CLK SS
+3VS SSIN G VGA_GRN 25

R393 4.7K_0402_5% AH24 AJ26 VGA_BLU 25
THERM DAC1
R178 0_0402_5% SSOUT B

HSYNC AJ25 HSYNC 25
+3VS OSC_OUT 2 @ 1 XTALIN AH28 AK25 CRT I/F
26 OSC_OUT XTALIN VSYNC VSYNC 25
2 2@ 1 XTALOUT AJ29 XTALOUT
1 2 R179 0_0402_5% AH26 1 2@ 2
C202 0.1U_0402_16V4Z 2@ 2 RSET R180 499_0402_1%
1 AH27 TESTEN DDC1DATA AG25 DAT_DDC2 25
1
2@ R181 1K_0402_5% E8 AF24

TEST_YCLK DDC1CLK CLK_DDC2 25
R182 B6 AG24 1 @ 2
A TEST_MCLK GPIO_AUXWIN AUXWIN 26 A
1K_0402_5% 2@ X2 AF25 R763 0_0402_5%
PLLTEST
2
4 3 1 2@ 2 AF11 D+
VDD OUT DPLUS D+ 26
R184 2 2@ 1 AH25 AE11 D- R183
D- 26
2
121_0603_1% R185 10K_0402_5% STEREOSYNC DMINUS

1 OE GND 2 10K_0402_5%
1
M24P_BGA708
27MHZ_15P 2@
1
2@ R186
75_0603_1% Title
2@
ATI M24-P
2
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
MDA[63:0] 22 MDB[63:0] 23
NOTE :Elpida Memory Data Groups

MAA[13:0] 22 MAB[13:0] 23
Swapping Possibilities--
DQSA[7:0] 22 DQSB[7:0] 23 Shaded group belonging to QS1 and QS5
can't be swapped with other groups
DQMA#[7:0] 22 DQMB#[7:0] 23 (MD15:8) & (MD47:40)
D D
U5C
U5B MDB0 D7 N5 MAB0
MDA0 MAA0 MDB1 DQB0 Part 3 of 5 MAB0 MAB1
H28 DQA0 MAA0 E22 F7 DQB1 MAB1 M1
MDA1 H29 Part 2 of 5 B22 MAA1 MDB2 E7 M3 MAB2
MDA2 DQA1 MAA1 MAA2 MDB3 DQB2 MAB2 MAB3
J28 DQA2 MAA2 B23 G6 DQB3 MAB3 L3
MDA3 J29 B24 MAA3 MDB4 G5 L2 MAB4
J26 DQA4 MAA4 C23 F5 DQB5 MAB5 M2
MDA5 H25 C22 MAA5 MDB6 E5 M5 MAB6
H26 DQA6 MAA6 F22 C4 DQB7 MAB7 P6
MDA7 G26 F21 MAA7 MDB8 B5 N3 MAB8
G30 DQA8 MAA8 C21 C5 DQB9 MAB9 K2
MDA9 D29 A24 MAA9 MDB10 A4 K3 MAB10
D28 DQA10 MAA10 C24 B4 DQB11 MAB11 J2
MDA11 E28 A25 MAA11 MDB12 C2 P5 MAB12
E29 DQA12 MAA12 E21 D3 DQB13 MAB13 P3
MDA13 G29 B20 MAA13 MDB14 D1 P2
MDA14 DQA13 MAA13 MDB15 DQB14 MAB14
G28 DQA14 MAA14 C19 D2 DQB15
MDA15 F28 MDB16 G4 E6 DQMB#0
MDA16 DQA15 DQMA#0 MDB17 DQB16 DQMB#0 DQMB#1
G25 DQA16 DQMA#0 J25 H6 DQB17 DQMB#1 B2
MDA17 F26 F29 DQMA#1 MDB18 H5 J5 DQMB#2
MDA18 DQA17 DQMA#1 DQMA#2 MDB19 DQB18 DQMB#2 DQMB#3
E26 DQA18 DQMA#2 E25 J6 DQB19 DQMB#3 G3
MDA19 F25 A27 DQMA#3 MDB20 K5 W6 DQMB#4
E24 DQA20 DQMA#4 F15 K4 DQB21 DQMB#5 W2
MDA21 F23 C15 DQMA#5 MDB22 L6 AC6 DQMB#6
E23 DQA22 DQMA#6 C11 L5 DQB23 DQMB#7 AD2
MDA23 D22 E11 DQMA#7 MDB24 G2
MDA24 DQA23 DQMA#7 MDB25 DQB24 DQSB0
B29 DQA24 F3 DQB25 QSB0 F6
MDA25 C29 J27 DQSA0 MDB26 H2 B3 DQSB1
C MDA26 DQA25 QSA0 DQSA1 MDB27 DQB26 QSB1 DQSB2 C
C25 DQA26 QSA1 F30 E2 DQB27 QSB2 K6
MEMORY INTERFACE B
MDA27 C27 F24 DQSA2 MDB28 F2 G1 DQSB3
DQA27 QSA2 DQB28 QSB3
MEMORY INTERFACE A
MDA28 B28 B27 DQSA3 MDB29 J3 V5 DQSB4

MDA29 DQA28 QSA3 DQSA4 MDB30 DQB29 QSB4 DQSB5
B25 DQA29 QSA4 E16 F1 DQB30 QSB5 W1
MDA30 C26 B16 DQSA5 MDB31 H3 AC5 DQSB6
MDA31 DQA30 QSA5 DQSA6 MDB32 DQB31 QSB6 DQSB7
B26 DQA31 QSA6 B11 U6 DQB32 QSB7 AD1
MDA32 F17 F10 DQSA7 MDB33 U5
MDA33 DQA32 QSA7 MDB34 DQB33 RASB#
E17 DQA33 U3 DQB34 RASB# R2 RASB# 23
MDA34 D16 A19 RASA# MDB35 V6
DQA34 RASA# RASA# 22 DQB35
MDA35 F16 MDB36 W5 T5 CASB#
DQA35 DQB36 CASB# CASB# 23
MDA36 E15 E18 CASA# MDB37 W4
DQA36 CASA# CASA# 22 DQB37
MDA37 F14 MDB38 Y6 T6 WEB#
DQA37 DQB38 WEB# WEB# 23
MDA38 E14 E19 WEA# MDB39 Y5
DQA38 WEA# WEA# 22 DQB39
MDA39 F13 MDB40 U2 R5 CSB0#
DQA39 DQB40 CSB0# CSB0# 23
MDA40 C17 E20 CSA0# MDB41 V2
DQA40 CSA0# CSA0# 22 DQB41
MDA41 B18 MDB42 V1 R6 M_CSB1#
MDA42 DQA41 M_CSA1# MDB43 DQB42 CSB1#
B17 DQA42 CSA1# F20 V3 DQB43
MDA43 B15 MDB44 W3 R3 CKEB
DQA43 DQB44 CKEB CKEB 23
MDA44 C13 B19 CKEA MDB45 Y2
DQA44 CKEA CKEA 22 DQB45
1
MDA45 B14 MDB46 Y3 N1 CLKB0
DQA45 DQB46 CLKB0 CLKB0 23
MDA46 C14 MDB47 AA2 N2 CLKB0#
DQA46 DQB47 CLKB0# CLKB0# 23
1
MDA47 C16 B21 CLKA0 +VDD_MEM_IO MDB48 AA6 2@

DQA47 CLKA0 CLKA0 22 DQB48
MDA48 A13 C20 CLKA0# 2@ MDB49 AA5 T2 CLKB1 R187
DQA48 CLKA0# CLKA0# 22 DQB49 CLKB1 CLKB1 23
MDA49 A12 R188 MDB50 AB6 T3 CLKB1# 10K_0402_5%
CLKB1# 23
2
DQA49 DQB50 CLKB1#
1
MDA50 C12 C18 CLKA1 10K_0402_5% MDB51 AB5 +VDD_CORE1.8

DQA50 CLKA1 CLKA1 22 DQB51
MDA51 B12 A18 CLKA1# 2@ MDB52 AD6
CLKA1# 22
2
MDA52 DQA51 CLKA1# R189 MDB53 DQB52

C10 DQA52 AD5 DQB53 DIMB_0 E3
MDA53 C9 100_0402_1% MDB54 AE5 AA3
MDA54 DQA53 MDB55 DQB54 DIMB_1
B9 AE4
2
B MDA55 DQA54 10mil MDB56 DQB55 B

B10 DQA55 MVREFD B7 AB2 DQB56
MDA56 E13 MDB57 AB3 AF5
DQA56 DQB57 ROMCS# SCS# 18
MDA57 E12 B8 0.1U_0402_16V4Z 1 MDB58 AC2
DQA57 MVREFS DQB58
1
MDA58 E10 2@ MDB59 AC3 C6 R190 1 2@ 2 4.7K_0402_5%

MDA59 DQA58 R191 MDB60 DQB59 MEMVMODE_0 R192 1 @ 4.7K_0402_5%
F12 DQA59 AD3 DQB60 MEMVMODE_1 C7 2
MDA60 F11 D30 C203 100_0402_1% MDB61 AE1
MDA61 DQA60 DIMA_0 2@ 2 MDB62 DQB61
E9 DQA61 DIMA_1 B13 AE2 DQB62 MEMTEST C8
MDA62 F9 MDB63 AE3
2
DQA62 DQB63
1
MDA63 F8 DQA63 R193 2@ @
M24P_BGA708
M24P_BGA708 47_0402_5% R194 R195
2@ 2@ 4.7K_0402_5% 4.7K_0402_5%
2@
2
+VDD_MEM_IO
MEM IO Voltage Selection

1
M_CSA1# 1 2@ 2 2@ 2.5V * 1.8V

CSA1# 22
R197 0_0402_5% R196 M_CSB1# 1 2@ 2
CSB1# 23 VDDR1 VDDR1
100_0402_1% R198 0_0402_5%
2
10mil
Pop for 128MB Pop for 128MB
MEMVMODE0 HI LOW
1
0.1U_0402_16V4Z
1 MEMVMODE1 LOW HI
2@
C204 R199
A 2 A
2@ 100_0402_1%
2

Title
ATI M24P MEM_Interface
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
U5D
T7 VDDR1_0 VDDC_0 AC13
+VDD_MEM_IO R4 Part 4 of 5 AD13 +3VS
VDDR1_1 VDDC_1 DIODE SUPPLIES POWER
R1 VDDR1_2 VDDC_2 AD15
N8 AC15 TO VDDC RAIL
VDDR1_3 VDDC_3 WHILE VDDC REGULATOR
N7 VDDR1_4 VDDC_4 AC17
1
M4 P17 D5 2@ STABALIZES DURING POWER ON +VGA_CORE
VDDR1_5 VDDC_5
1 1 L8 VDDR1_6 VDDC_6 P18
22U_A_4VM
K23 VDDR1_7 VDDC_7 P19
C205
D
+ + C206 K24 U12 MMSZ4678T1_SOD123 D
22U_A_4VM VDDR1_8 VDDC_8
N4 U13
2
VDDR1_9 VDDC_9
2@ 2@ J8 U14
2 2 VDDR1_10 VDDC_10
J7 VDDR1_11 VDDC_11 U17 1
J4 VDDR1_12 VDDC_12 U18 1 1 1 1 1
J1 U19 2@ C207 2@ C208 2@ C209 2@ C210 2@ C211 + C212
VDDR1_13 VDDC_13 470U_D4_2.5VM_R10
H10 VDDR1_14 VDDC_14 V19
H13 V18 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2@
VDDR1_15 VDDC_15 2 2 2 2 2 2
H15 VDDR1_16 VDDC_16 V17
1 1 H17 VDDR1_17 VDDC_17 V14
1 2@ 1 2@ T8 V13
2@ 2@ VDDR1_18 VDDC_18
V4 VDDR1_19 VDDC_19 V12 1 1 1 1
C214 C216 V7 N18 2@ 2@ 2@ 2@
C213 2 C215 2 VDDR1_20 VDDC_20 C217 C218 C219 C220
V8 VDDR1_21 VDDC_21 N17
2 1000P_0402_50V7K 2 1000P_0402_50V7K AA1 VDDR1_22 VDDC_22 N14
0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z
AA4 VDDR1_23 VDDC_23 W17
A3 W13 L20
VDDR1_26 VDDC_26 VDDL_CORE
A9 VDDR1_27 VDDC_27 W14 1 2
A15 N13 2@
VDDR1_28 VDDC_28 CHB1608U301_0603
1 1 1 A21 VDDR1_29 VDDC_29 N19 1 1
2@ 2@ 2@ A28 M19 C224 C225
VDDR1_30 VDDC_30 2@ 2@
B1 VDDR1_31 VDDC_31 M18
C221 C222 C223 B30 M12 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 VDDR1_32 VDDC_32 2 2
D26 VDDR1_33 VDDC_33 N12
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K D23 M13
VDDR1_34 VDDC_34
D20 VDDR1_35 VDDC_35 M14
D17 VDDR1_36 VDDC_36 P12
C D14 P13 1 1 C
VDDR1_37 VDDC_37 C226 C227
D11 VDDR1_38 VDDC_38 P14
D8 M17 2@ 2@
VDDR1_39 VDDC_39 0.1U_0402_16V4Z 0.1U_0402_16V4Z
D5 VDDR1_40 VDDC_40 W19
2 2 +3VS
1 1 1 E27 VDDR1_41
2@ 2@ 2@ F4 VDDR1_42
G7 VDDR1_43 VDDC1_0 W16
1
C228 C229 C230 G10 M15 D6 2@
2 2 2 VDDR1_44 VDDC1_1
G13 VDDR1_45 VDDC1_2 R19
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K G15 T12
VDDR1_46 VDDC1_3 MMSZ4678T1_SOD123
G19 VDDR1_47
G22 20 mil L21
2
VDDR1_48 L_+1.5V
G27 VDDR1_49 VDD15_0 P8 1 2@ 2 +1.5VS
0.1U_0402_16V4Z
H22 VDDR1_50 VDD15_1 Y8 1
22U_A_4VM
H19 AC11 2@ 2@ 1 1 2@ 0_0805_5%
VDDR1_51 VDD15_2
C231
AD4 AC20 + C233
VDDR1_52 VDD15_3
C232
L23 H20 0.1U_0402_16V4Z
VDDR1_53 VDD15_4
VDD15_5 H11
2 2 2
VDD15_6 M23
VDD15_7 Y23
POWER
AD7 +3VS
VDDR3_0
+VDD_PNLIO_2.5 AE16 LVDDR_25_0 VDDR3_1 AD19 30 mil
AE17 AD21 2.2U_0603_6.3V6K 0.1U_0402_16V4Z
LVDDR_25_1 VDDR3_2
AF15 LVDDR_18_0 VDDR3_3 AC22 1 1 1 1
+VDD_PNL_IO1.8 AE15 AC8 C234 C235 C236
LVDDR_18_1 VDDR3_4 2@ 2@ 2@ + C237
VDDR3_5 AC21
AC19 1000P_0402_50V7K 22U_A_4VM
VDDR3_6
1
B 2 2 2 2@ B
AH19 LPVDD R204 2
+VDD_PNL_PLL AH13 TPVDD
AG7 0_0603_5%
VDDR4_0 +1.2VS
AF13 TXVDDR_0 VDDR4_1 AD9 2@
AF14 AC9 L25 40 mil
2
TXVDDR_1 VDDR4_2 0.1U_0402_16V4Z
VDDR4_3 AC10 1 2
AD10 1 2@
VDDR4_4 2@ FBM-L11-321611-260-LMT_1206
+VDD_MEM_CLK F18 VDDRH0 1 1 1
N6 C238 + C239 C240 2@
VDDRH1 C241
PCIE_VDDR_12_0 AG26
AK29 22U_A_4VM 2@ 2@ 0.1U_0402_16V4Z
PCIE_VDDR_12_1 2 2 2 2
+VDD_DAC2.5 AF21 A2VDD_0 PCIE_VDDR_12_2 AJ30
AE20 AG28 1000P_0402_50V7K
A2VDD_1 PCIE_VDDR_12_3
PCIE_VDDR_12_4 AG27
+A2VDDQ_1.8 AF23 L23
A2VDDQ 0.1U_0402_16V4Z PCIEL_1.2V 1 2
+AVDD_1.8 AH23 N24 2@
AVDD PCIE_PVDD_12_0 CHB1608U301_0603
PCIE_PVDD_12_1 N23 1 1 1
P23 C243 C244
PCIE_PVDD_12_2 + C242
AE23 VDD1DI
+VDDDI_1.8 AE22 2@ 2@ 1000P_0402_50V7K
VDD2DI 22U_A_4VM 2 2
U23 2@
+3VS PCIE_PVDD_18_0 2
PCIE_PVDD_18_1 T23
+VDD_PLL AK28 PVDD PCIE_PVDD_18_2 V23
+1.8VS to +1.8V_REGD28 PCIE_PVDD_18_3 W23
1
+VDD_MEM_PLL A7 MPVDD
+PCIE_PVDD1.8
2@ M24P_BGA708
+1.8VS MMSZ4678T1_SOD123
A A
2@
2
+1.8VS
80 mil 80 mil

Title
ATI M24P I/O PWR(1/2)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
L24 2@
11 EXP_TXN[0..15]
EXP_TXN[0..15] Close ALVISO PEG_RXN[0..15]
PEG_RXN[0..15] 18 1 2 0.1U_0402_16V4Z
+PCIE_PVDD1.8
2@ 1 1 1
EXP_TXN0 C245 1 2 0.1U_0402_16V4Z PEG_RXN0 0_0805_5% 2@ 2@ 2@ (500 MA 1.8V PCIE PVDD)
EXP_TXN1 C246 1 20.1U_0402_16V4Z PEG_RXN1 C247+ C248 C249
2@ 2@ 1000P_0402_50V7K
EXP_TXN2 C250 1 2 2
2 0.1U_0402_16V4Z PEG_RXN2 R1132
2@ 22U_A_4VM
U5E EXP_TXN3 C251 1 2
2 0.1U_0402_16V4Z PEG_RXN3 1 2 0.1U_0402_16V4Z
+VDD_CORE1.8
A2 K28 2@ 2@ 0_0603_5% 1 1 1
VSS_0 Part 5 of 5 PCIE_VSS_0 EXP_TXN4 C252 1 (150 MA 1.8V VDDC1.8)
A10 VSS_1 PCIE_VSS_1 L28 2 0.1U_0402_16V4Z PEG_RXN4 2@ 2@
A16 M27 EXP_TXN5 C253 1 2 0.1U_0402_16V4Z PEG_RXN5 2@ + C255 C256
VSS_2 PCIE_VSS_2 2@ 2@ C254 1000P_0402_50V7K
A22 VSS_3 PCIE_VSS_3 M26
EXP_TXN6 C257 1 2 2
D A29 VSS_4 PCIE_VSS_4 M24 2 0.1U_0402_16V4Z PEG_RXN6 L61 2@ 22U_A_4VM D
EXP_TXN7 C258 1 2
C1 VSS_5 PCIE_VSS_5 M25 2 0.1U_0402_16V4Z PEG_RXN7 1 2 0.1U_0402_16V4Z
+VDD_PLL
C3 M28 2@ 2@ CHB1608U301_0603 1 1 1
VSS_6 PCIE_VSS_6 EXP_TXN8 C259 1 (30MA 1.8V PVDD)
C28 VSS_7 PCIE_VSS_7 P28 2 0.1U_0402_16V4Z PEG_RXN8 2@ 2@ 2@
C30 N28 EXP_TXN9 C260 1 2 0.1U_0402_16V4Z PEG_RXN9 C261 C262 C263
VSS_8 PCIE_VSS_8 2@ 2@ 22U_1206_10V4Z 1000P_0402_50V7K
D27 VSS_9 PCIE_VSS_9 R25
EXP_TXN10 C264 1 2 2 2
D24 VSS_10 PCIE_VSS_10 R23 2 0.1U_0402_16V4Z PEG_RXN10 R1133
2@
D21 R24 EXP_TXN11 C265 1 2 0.1U_0402_16V4Z PEG_RXN11 1 2 0.1U_0402_16V4Z
D18
VSS_11 PCIE_VSS_11
R26 2@ 2@ 0_0603_5% 1 1 1 (35 MA 1.8V +VDD_PNL_IO1.8
VSS_12 PCIE_VSS_12 EXP_TXN12 C266 1 LVDDR18,LVDDR18_25,TXVDDR)
D15 VSS_13 PCIE_VSS_13 R27 2 0.1U_0402_16V4Z PEG_RXN12 2@ 2@ 2@
D12 R28 EXP_TXN13 C267 1 2 0.1U_0402_16V4Z PEG_RXN13 C268 C269 C270
VSS_14 PCIE_VSS_14 2@ 2@ 22U_1206_10V4Z 1000P_0402_50V7K
D10 VSS_15 PCIE_VSS_15 T28
EXP_TXN14 C271 1 2 2 2
D6 VSS_16 PCIE_VSS_16 T24 2 0.1U_0402_16V4Z PEG_RXN14 L63 2@
D4 U28 EXP_TXN15 C272 1 2 0.1U_0402_16V4Z PEG_RXN15 1 2 0.1U_0402_16V4Z
VSS_17 PCIE_VSS_17 EXP_TXP[0..15] 2@ PEG_RXP[0..15] CHB1608U301_0603 +VDD_PNL_PLL
F27 VSS_18 PCIE_VSS_18 V24 11 EXP_TXP[0..15] PEG_RXP[0..15] 18 1 1 1
G9 V26 2@ 2@ 2@ 2@ (10MA 1.8V LPVDD,TPVDD)
VSS_19 PCIE_VSS_19 EXP_TXP0 C273 1
G12 VSS_20 PCIE_VSS_20 V27 2 0.1U_0402_16V4Z PEG_RXP0 C274 C275 C276
G16 V25 EXP_TXP1 C277 1 20.1U_0402_16V4Z PEG_RXP1 22U_1206_10V4Z 1000P_0402_50V7K
VSS_21 PCIE_VSS_21 2@ 2@ R1134
2@ 2 2 2
G18 VSS_22 PCIE_VSS_22 V28
G21 Y28 EXP_TXP2 C278 1 2 0.1U_0402_16V4Z PEG_RXP2 1 2 0.1U_0402_16V4Z
VSS_23 PCIE_VSS_23 EXP_TXP3 C279 1 +A2VDDQ_1.8
G24 VSS_24 PCIE_VSS_24 W24 2 0.1U_0402_16V4Z PEG_RXP3 0_0603_5% 1 1 1
H27 W28 2@ 2@ 2@ 2@ 2@ (35 MA 1.8V A2VDDQ)
H23 VSS_26 PCIE_VSS_26 AA26 2 0.1U_0402_16V4Z PEG_RXP4 C281 C282 C283
H21 AA27 EXP_TXP5 C284 1 2 0.1U_0402_16V4Z PEG_RXP5 22U_1206_10V4Z 1000P_0402_50V7K
VSS_27 PCIE_VSS_27 2@ 2@ L70 2@ 2 2 2
H18 VSS_28 PCIE_VSS_28 AA23
H16 AA24 EXP_TXP6 C285 1 2 0.1U_0402_16V4Z PEG_RXP6 +1.8VS 1 2 0.1U_0402_16V4Z
VSS_29 PCIE_VSS_29 +VDD_MEM_PLL
GND
H14 AA25 EXP_TXP7 C286 1 2 0.1U_0402_16V4Z PEG_RXP7 +1.8VS CHB1608U301_0603 1 1 1

VSS_30 PCIE_VSS_30 2@ 2@ 2@ 2@ (5 MA 1.8V MPVDD)
H12 VSS_31 PCIE_VSS_31 AA28
H9 AB28 EXP_TXP8 C287 1 2 0.1U_0402_16V4Z PEG_RXP8 + C288 C289 C290
VSS_32 PCIE_VSS_32 EXP_TXP9 C291 1 22U_A_4VM
C H8 VSS_33 PCIE_VSS_33 AC28 2 0.1U_0402_16V4Z PEG_RXP9 1000P_0402_50V7K C
2@ 2@ R11352@ 2@ 2 2
H4 VSS_34 PCIE_VSS_34 AD28
EXP_TXP10 C292 1 2
J23 VSS_35 PCIE_VSS_35 AD26 2 0.1U_0402_16V4Z PEG_RXP10 1 2 0.1U_0402_16V4Z
+AVDD_1.8
J24 AD27 EXP_TXP11 C293 1 2 0.1U_0402_16V4Z PEG_RXP11 0_0603_5% 1 1 1
VSS_36 PCIE_VSS_36 2@ 2@ 2@ 2@ 2@ (35 MA 1.8V AVDD)
AD12 VSS_37 PCIE_VSS_37 AE28
AG5 AF28 EXP_TXP12 C294 1 2 0.1U_0402_16V4Z PEG_RXP12 C295 C296 C297
AG9 VSS_39 PCIE_VSS_39 AH29 2 0.1U_0402_16V4Z PEG_RXP13 22U_1206_10V4Z 1000P_0402_50V7K
2@ 2@ R1136
2@ 2 2 2
AG11 VSS_40
R7 EXP_TXP14 C299 1 2 0.1U_0402_16V4Z PEG_RXP14 1 2 0.1U_0402_16V4Z
VSS_41 EXP_TXP15 C300 1 +VDDDI_1.8
P4 VSS_42 NC_0 D9 2 0.1U_0402_16V4Z PEG_RXP15 0_0603_5% 1 1 1
M7 D13 2@ 2@ 2@ 2@ (10 MA 1.8V VDDDI)
VSS_43 NC_1 C301 C302 C303
M8 VSS_44 NC_2 D19
L4 D25 22U_1206_10V4Z 1000P_0402_50V7K
VSS_45 NC_3 2 2 2
K1
K7
VSS_46
VSS_47
NC_4
NC_5
E4
T4 11 EXP_RXN[0..15]
EXP_RXN[0..15] Close M24P PEG_TXN[0..15]
PEG_TXN[0..15] 18
L33 FBa @ FBM-L11-201209-121LMT_0805
K8 AB4 2@ 1 2
VSS_48 NC_6 EXP_RXN0 C304 1
R8 VSS_49 2 0.1U_0402_16V4Z PEG_TXN0 L34 1 2 +VDD_MEM_IO
T1 VSS_50
EXP_RXN1 C305 1 20.1U_0402_16V4Z PEG_TXN1 FBb 2@ 0_0805_5%
U4 2@ 2@ (1000 MA 1.8V/2.5V EXT MEM VDDQ,VDDR1)
VSS_51 EXP_RXN2 C306 1
U8 VSS_52 AVSSQ AD22 2 0.1U_0402_16V4Z PEG_TXN2
W7 VSS_53
EXP_RXN3 C307 1 2 0.1U_0402_16V4Z PEG_TXN3 FBc
W8 2@ 2@ L37 1 2@ 2 0_0603_5%
Y4 VSS_55 LVSSR_0 AF18 2 0.1U_0402_16V4Z PEG_TXN4
+VDD_MEM_CLK
AB8 AH17 EXP_RXN5 C309 1 2 0.1U_0402_16V4Z PEG_TXN5 L38 1 @ 2CHB1608U301_0603
1
VSS_56 LVSSR_1
AB7 VSS_57 LVSSR_2 AG15 2@ 2@ FBd 1 (INCLUDED IN VDD_MEM_IO)
AB1 AG18 EXP_RXN6 C310 1 2 0.1U_0402_16V4Z PEG_TXN6 C312+
VSS_58 LVSSR_3 EXP_RXN7 C311 1
AC4 VSS_59 2 0.1U_0402_16V4Z PEG_TXN7 2@ 2@
AC12 2@ 2@ 22U_A_4VM C313
VSS_60 EXP_RXN8 C314 1 2 2 0.1U_0402_16V4Z
AC14 VSS_61 LPVSS AH18 2 0.1U_0402_16V4Z PEG_TXN8
B EXP_RXN9 C315 1 B
AD16 VSS_62 TPVSS AH12 2 0.1U_0402_16V4Z PEG_TXN9
AC16 2@ 2@
AC18 VSS_64 TXVSSR_0 AH14 2 0.1U_0402_16V4Z PEG_TXN10
AD18 AG13 EXP_RXN11 C317 1 2 0.1U_0402_16V4Z PEG_TXN11 +2.5VS 0.1U_0402_16V4Z
VSS_65 TXVSSR_1 2@ 2@ +VDD_DAC2.5
AK2 VSS_66 TXVSSR_2 AG14
AJ1 EXP_RXN12 C318 1 2 0.1U_0402_16V4Z PEG_TXN12 1 1 1 (80MA 2.5V A2VDD)
M16 VSS_68 VSSRH0 F19 2 0.1U_0402_16V4Z PEG_TXN13 2@ 2@ 2@
N16 M6 2@ 2@ C328 C329 C330
VSS_69 VSSRH1 EXP_RXN14 C323 1
N15 VSS_70 2 0.1U_0402_16V4Z PEG_TXN14 22U_1206_10V4Z 0.1U_0402_16V4Z
EXP_RXN15 C324 1 2 2 2
P15 VSS_71 2 0.1U_0402_16V4Z PEG_TXN15
P16 VSS_72 A2VSSN_0 AH20 11 EXP_RXP[0..15]
EXP_RXP[0..15] 2@ PEG_TXP[0..15]
PEG_TXP[0..15] 18 VDDR1
R18 VSS_73 A2VSSN_1 AG21 2@ VDDRH FBa FBb FBc FBd 0.1U_0402_16V4Z
+VDD_PNLIO_2.5
R17 EXP_RXP0 C325 1 2 0.1U_0402_16V4Z PEG_TXP0
VSS_74 EXP_RXP1 C326 1 (200MA 2.5V LVDDR_25)
R16 VSS_75 A2VSSQ AF22 20.1U_0402_16V4Z PEG_TXP1 1 1
R15 VSS_76 EXP_RXP2 C327 1
2@ 2@ 1.8V IN OUT OUT IN 2@ 2@
R14 VSS_77 AVSSN AH22 2 0.1U_0402_16V4Z PEG_TXP2 C336 C337
R13 VSS_78
EXP_RXP3
2@
C331 1
2@
2 0.1U_0402_16V4Z PEG_TXP3
* 2.5V OUT IN IN OUT 22U_1206_10V4Z
2 2
R12 VSS_79
T13 AE24 EXP_RXP4 C332 1 2 0.1U_0402_16V4Z PEG_TXP4
VSS_80 VSS1DI EXP_RXP5 C333 1
T14 VSS_81 VSS2DI AE21 2 0.1U_0402_16V4Z PEG_TXP5
T15 2@ 2@
VSS_82 EXP_RXP6 C334 1
W15 VSS_83 2 0.1U_0402_16V4Z PEG_TXP6
V16 EXP_RXP7 C335 1 2 0.1U_0402_16V4Z PEG_TXP7 J6
VSS_84 2@ 2@ 0.1U_0402_16V4Z
V15 VSS_85 PVSS AJ28 +2.5VS 2 1 +MEM_VDD
U15 EXP_RXP8 C338 1 2 0.1U_0402_16V4Z PEG_TXP8
VSS_86 EXP_RXP9 C339 1 (1000MA 2.5V EXT MEM VDD)
U16 VSS_87 2 0.1U_0402_16V4Z PEG_TXP9 JUMP_43X79 1 1 1
T19 A6 2@ 2@ 2@ 2@ 2@
VSS_88 MPVSS EXP_RXP10 C340 1
T18 VSS_89 2 0.1U_0402_16V4Z PEG_TXP10 C320 C321 C322
T17 EXP_RXP11 C341 1 2 0.1U_0402_16V4Z PEG_TXP11 22U_1206_10V4Z 0.1U_0402_16V4Z
A VSS_90 2 2 2 A
T16 2@ 2@
VSS_91 EXP_RXP12 C342 1 2 0.1U_0402_16V4Z PEG_TXP12
M24P_BGA708 EXP_RXP13 C343 1 2 0.1U_0402_16V4Z PEG_TXP13
2@ 2@
2@ EXP_RXP14 C344 1 2 0.1U_0402_16V4Z PEG_TXP14
EXP_RXP15 C345 1
2@
2 0.1U_0402_16V4Z PEG_TXP15
Title
Note: C261,C336, C268 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI M24P I/O PWR(2/2)
C281, C320, C274, C295 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C328, C301 need to replace by Oxi Cap in B test. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
DQMA#[7..0]
19 DQMA#[7:0]
G10
G10
D10
D11
H10
D10
D11
H10
B11
K10
B11
K10
F10
F10
J10
J10
MAA[13..0]
G5
G5
D4
D5
D6
D9
H5
D4
D5
D6
D9
H5
B4
E6
E9
K5
B4
E6
E9
K5
F5
F5
J5
J5
19 MAA[13:0]
U6 U7
2@ 2@ DQSA[7..0]
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
19 DQSA[7:0]
MDA[63..0]
19 MDA[63:0]
MAA0 N5 B7 MDA29 MAA0 N5 B7 MDA35
MAA1 A0 DQ0 MDA31 MAA1 A0 DQ0 MDA39
N6 A1 DQ1 C6 N6 A1 DQ1 C6
MAA2 M6 B6 MDA26 MAA2 M6 B6 MDA37
D N7 A3 DQ3 B5 N7 A3 DQ3 B5 D
MAA4 N8 C2 MDA27 MAA4 N8 C2 MDA36
M9 A5 DQ5 D3 M9 A5 DQ5 D3
MAA6 N9 D2 MDA24 MAA6 N9 D2 MDA34
N10 A7 DQ7 E2 N10 A7 DQ7 E2
MAA8 N11 K13 MDA3 MAA8 N11 K13 MDA52
+VDD_MEM_IO MAA9 A8/AP DQ8 MDA4 +VDD_MEM_IO MAA9 A8/AP DQ8 MDA53
M8 A9 DQ9 K12 M8 A9 DQ9 K12
MAA10 L6 J13 MDA5 MAA10 L6 J13 MDA55
M7 A11 DQ11 J12 M7 A11 DQ11 J12
1
1
MAA12 N4 G13 MDA7 MAA12 N4 G13 MDA51
MAA13 BA0 DQ12 MDA0 2@ MAA13 BA0 DQ12 MDA50
M5 BA1 DQ13 G12 M5 BA1 DQ13 G12
2@ R205 F13 MDA2 R206 F13 MDA48
1K_0402_5% DQMA#3 DQ14 MDA1 1K_0402_5% DQMA#4 B3 DQ14 MDA49
B3 DM0 DQ15 F12 DM0 DQ15 F12
DQMA#0 H12 F3 MDA10 DQMA#6 H12 F3 MDA44
2
2
DQMA#1 DM1 DQ16 MDA9 DQMA#5 H3 DM1 DQ16 MDA45
H3 DM2 DQ17 F2 DM2 DQ17 F2
10mil DQMA#2 B12 G3 MDA11 10mil DQMA#7 B12 G3 MDA46
DM3 DQ18 MDA12 DM3 DQ18 MDA43
DQ19 G2 DQ19 G2
1
1
DQSA3 B2 J3 MDA15 DQSA4 B2 J3 MDA47
DQS0 DQ20 DQS0 DQ20
1 C346 DQSA0 H13 DQS1 DQ21 J2 MDA14 2@ 1 DQSA6 H13 DQS1 DQ21 J2 MDA40
R207 2@ 2@ DQSA1 H2 K2 MDA13 R208 C347 DQSA5 H2 K2 MDA42
1K_0402_5% DQSA2 DQS2 DQ22 MDA8 1K_0402_5% 2@ DQSA7 DQS2 DQ22 MDA41
B13 DQS3 DQ23 K3 B13 DQS3 DQ23 K3
0.1U_0402_16V4Z E13 MDA16 E13 MDA62
2
2
2 DQ24 MDA23 2 0.1U_0402_16V4Z DQ24 MDA61
N13 VREF DQ25 D13 N13 VREF DQ25 D13
M13 D12 MDA21 M13 D12 MDA63
MCL DQ26 MDA22 MCL DQ26 MDA58
L9 RFU1 DQ27 C13 L9 RFU1 DQ27 C13
M10 B10 MDA20 M10 B10 MDA60
RFU2 DQ28 MDA19 RFU2 DQ28 MDA59
DQ29 B9 DQ29 B9
RASA# M2 C9 MDA18 RASA# M2 C9 MDA57
19 RASA# RAS# DQ30 19 RASA# RAS# DQ30
CASA# L2 B8 MDA17 CASA# L2 B8 MDA56
19 CASA# CAS# DQ31 19 CASA# CAS# DQ31
C WEA# L3 WEA# L3 C
19 WEA# WE# 19 WEA# WE#
CSA0# N2 CSA0# N2
19 CSA0# CS# 19 CSA0# CS#
VDDQ C3 VDDQ C3
CKEA N12 C5 CKEA N12 C5
19 CKEA CKE VDDQ 19 CKEA CKE VDDQ
VDDQ C7 VDDQ C7
CLKA0 M11 C8 CLKA1 M11 C8
19 CLKA0 CK VDDQ 19 CLKA1 CK VDDQ
CLKA0# M12 C10 CLKA1# M12 C10
19 CLKA0# CK# VDDQ 19 CLKA1# CK# VDDQ
VDDQ C12 VDDQ C12
C4 E3 C4 E3 CLKA0
NC VDDQ NC VDDQ
C11 NC VDDQ E12 C11 NC VDDQ E12
H4 F4 H4 F4 CLKA0#
NC VDDQ NC VDDQ
H11 NC VDDQ F11 +VDD_MEM_IO H11 NC VDDQ F11
L12 NC VDDQ G4 L12 NC VDDQ G4
1
L13 NC VDDQ G11 L13 NC VDDQ G11 +VDD_MEM_IO
M3 J4 M3 J4 2@ 2@
CSA1# NC VDDQ CSA1# NC VDDQ R209 R210
19 CSA1# M4 NC VDDQ J11 19 CSA1# M4 NC VDDQ J11
N3 K4 N3 K4 56_0402_5% 56_0402_5%
NC VDDQ NC VDDQ
K11 K11
2
VDDQ VDDQ
E7 VSS E7 VSS
E8 VSS VDD D7 E8 VSS VDD D7 1
E10 D8 E10 D8 2@
VSS VDD VSS VDD C348
K6 VSS VDD E4 K6 VSS VDD E4
K7 E11 K7 E11 +MEM_VDD 470P_0402_50V7K
VSS VDD VSS VDD 2
K8 VSS VDD L4 +MEM_VDD K8 VSS VDD L4
K9 VSS VDD L7 K9 VSS VDD L7
L5 VSS VDD L8 L5 VSS VDD L8
E5 VSS E5 VSS Place as close to U6, U7 as possible
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
B B
CLKA1
K4D553238E-JC33_FBGA144 K4D553238E-JC33_FBGA144 CLKA1#

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
1
+VDD_MEM_IO
2@ 2@
1U_0603_10V4Z 0.01U_0402_16V7K R211 R212
56_0402_5% 56_0402_5%
1 1 1 1 1
2
Samsung 8M32-33/600 FBGA 2.5V C349 2@ C351 C352
2@ C350 2@ + C353
+VDD_MEM_IO
2@
22U_A_4VM
Samsung 8M32-33/600 FBGA 2.5V
2 2 2 2 1
2@ C354
1U_0603_10V4Z 0.01U_0402_16V7K 2 2@
0.1U_0402_16V4Z 1000P_0402_50V7K 470P_0402_50V7K
2
1 1 1 1 1
C355 2@ C357 C358 +MEM_VDD
2@ C356 2@ + C359
2 2
2@
2 2
22U_A_4VM 1U_0603_10V4Z 0.01U_0402_16V7K Place as close to U6, U7 as possible
2@
2
1 1 1 1 1
0.1U_0402_16V4Z 1000P_0402_50V7K C360 C361 C362 C363
2@ 2@ 2@ 2@ + C364
+MEM_VDD 22U_A_4VM
2 2 2 2 2@
1U_0603_10V4Z 0.1U_0402_16V4Z 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
A A
1 1 1 1 1
C365 2@ 2@ 2@
2@ C366 C367 C368 + C369
2 2 2 2
22U_A_4VM Place close to U7
2@
2
0.1U_0402_16V4Z 1000P_0402_50V7K Compal Electronics, Inc.
Title
Channel A External 128/64M DDR
Place close to U6 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
G10
G10
D10
D11
H10
D10
D11
H10
B11
K10
B11
K10
F10
F10
J10
J10
G5
G5
D4
D5
D6
D9
H5
D4
D5
D6
D9
H5
B4
E6
E9
K5
B4
E6
E9
K5
F5
F5
J5
J5
U8 U9
2@ 2@ DQMB#[7:0]
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
19 DQMB#[7:0]
MAB[13:0]
19 MAB[13:0]
MAB0 N5 B7 MDB3 MAB0 N5 B7 MDB38 DQSB[7:0]
A0 DQ0 A0 DQ0 19 DQSB[7:0]
MAB1 N6 C6 MDB5 MAB1 N6 C6 MDB39
MAB2 A1 DQ1 MDB4 MAB2 A1 DQ1 MDB35 MDB[63:0]
M6 A2 DQ2 B6 M6 A2 DQ2 B6 19 MDB[63:0]
D MAB3 N7 B5 MDB6 MAB3 N7 B5 MDB37 D
MAB4 A3 DQ3 MDB7 MAB4 A3 DQ3 MDB36
N8 A4 DQ4 C2 N8 A4 DQ4 C2
MAB5 M9 D3 MDB2 MAB5 M9 D3 MDB33
N9 A6 DQ6 D2 N9 A6 DQ6 D2
MAB7 N10 E2 MDB0 MAB7 N10 E2 MDB32
N11 A8/AP DQ8 K13 N11 A8/AP DQ8 K13
MAB9 M8 K12 MDB19 +VDD_MEM_IO MAB9 M8 K12 MDB48
+VDD_MEM_IO MAB10 A9 DQ9 MDB22 MAB10 A9 DQ9 MDB54
L6 A10 DQ10 J13 L6 A10 DQ10 J13
MAB11 M7 J12 MDB23 MAB11 M7 J12 MDB52
A11 DQ11 A11 DQ11
1
MAB12 N4 G13 MDB21 2@ MAB12 N4 G13 MDB55
BA0 DQ12 BA0 DQ12
1
2@ MAB13 M5 G12 MDB20 R213 MAB13 M5 G12 MDB53

1K_0402_5% BA1 DQ13 MDB18 1K_0402_5% BA1 DQ13 MDB49
DQ14 F13 DQ14 F13
R214 DQMB#0 B3 F12 MDB16 DQMB#4 B3 F12 MDB51
DQMB#2 DM0 DQ15 MDB14 DQMB#6 DM0 DQ15 MDB46
H12 F3 H12 F3
2
10mil DQMB#1 DM1 DQ16 MDB15 DQMB#5 DM1 DQ16 MDB47
H3 F2 H3 F2
2
DQMB#3 DM2 DQ17 MDB13 10mil DQMB#7 DM2 DQ17 MDB44

B12 DM3 DQ18 G3 B12 DM3 DQ18 G3
G2 MDB12 G2 MDB45
DQ19 DQ19
1
1
1 C370 DQSB0 B2 DQS0 DQ20 J3 MDB11 1 DQSB4 B2 DQS0 DQ20 J3 MDB41
0.1U_0402_16V4Z DQSB2 H13 J2 MDB9 2@ DQSB6 H13 J2 MDB42
2@ 2@ DQSB1 DQS1 DQ21 MDB10 2@ C371 0.1U_0402_16V4Z DQSB5 DQS1 DQ21 MDB43
H2 DQS2 DQ22 K2 H2 DQS2 DQ22 K2
R215 DQSB3 B13 K3 MDB8 R216 DQSB7 B13 K3 MDB40
1K_0402_5% 2 DQS3 DQ23 MDB29 2 DQS3 DQ23 MDB63
E13 E13
2
2
DQ24 MDB31 DQ24 MDB61
N13 VREF DQ25 D13 N13 VREF DQ25 D13
M13 D12 MDB24 1K_0402_5% M13 D12 MDB62
MCL DQ26 MDB26 MCL DQ26 MDB60
L9 RFU1 DQ27 C13 L9 RFU1 DQ27 C13
M10 B10 MDB25 M10 B10 MDB59
RFU2 DQ28 MDB30 RFU2 DQ28 MDB57
DQ29 B9 DQ29 B9
RASB# M2 C9 MDB28 RASB# M2 C9 MDB58
19 RASB# RAS# DQ30 19 RASB# RAS# DQ30
CASB# L2 B8 MDB27 CASB# L2 B8 MDB56
19 CASB# CAS# DQ31 19 CASB# CAS# DQ31
C WEB# L3 WEB# L3 C
19 WEB# WE# 19 WEB# WE#
CSB0# N2 CSB0# N2
19 CSB0# CS# 19 CSB0# CS#
VDDQ C3 VDDQ C3
CKEB N12 C5 CKEB N12 C5
19 CKEB CKE VDDQ 19 CKEB CKE VDDQ
VDDQ C7 VDDQ C7
CLKB0 M11 C8 CLKB1 M11 C8
19 CLKB0 CK VDDQ 19 CLKB1 CK VDDQ
CLKB0# M12 C10 CLKB1# M12 C10
19 CLKB0# CK# VDDQ 19 CLKB1# CK# VDDQ
C12 C12 CLKB0
VDDQ VDDQ
C4 NC VDDQ E3 C4 NC VDDQ E3
C11 E12 C11 E12 CLKB0#
NC VDDQ NC VDDQ
H4 NC VDDQ F4 H4 NC VDDQ F4
H11 NC VDDQ F11 +VDD_MEM_IO H11 NC VDDQ F11
1
L12 NC VDDQ G4 L12 NC VDDQ G4
L13 G11 L13 G11 +VDD_MEM_IO 2@ 2@
NC VDDQ NC VDDQ R217 R218
M3 NC VDDQ J4 M3 NC VDDQ J4
CSB1# M4 J11 CSB1# M4 J11 56_0402_5% 56_0402_5%
19 CSB1# NC VDDQ 19 CSB1# NC VDDQ
N3 K4 N3 K4
2
NC VDDQ NC VDDQ
VDDQ K11 VDDQ K11
E7 VSS E7 VSS 1
E8 D7 E8 D7 2@
VSS VDD VSS VDD C372
E10 VSS VDD D8 E10 VSS VDD D8
K6 E4 K6 E4 470P_0402_50V7K
VSS VDD VSS VDD 2
K7 VSS VDD E11 +MEM_VDD K7 VSS VDD E11
K8 VSS VDD L4 K8 VSS VDD L4 +MEM_VDD
K9 VSS VDD L7 K9 VSS VDD L7
E5 VSS E5 VSS Place as close to U8, U9 as possible
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
B CLKB1 B
CLKB1#
K4D553238E-JC33_FBGA144 K4D553238E-JC33_FBGA144
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
1
+VDD_MEM_IO 2@ 2@
R219 R220
1U_0603_10V4Z 0.1U_0402_16V4Z 56_0402_5% 56_0402_5%
2
Samsung 8M32-33/600 FBGA 2.5V 1 1 1 1 1
C373 C374 C375 C376 Samsung 8M32-33/600 FBGA 2.5V
2@ 2@ 2@ 2@ + C377 1
+VDD_MEM_IO 0.1U_0402_16V4Z 22U_A_4VM 2@
2 2 2 2 2@ C378
1U_0603_10V4Z 2 470P_0402_50V7K
0.1U_0402_16V4Z 0.1U_0402_16V4Z 2
1 1 1 1 1
C379 C381 C382 +MEM_VDD
2@ C380 2@ 2@ + C383
2 2
2@
2 2
22U_A_4VM 1U_0603_10V4Z 0.01U_0402_16V7K Place as close to U8, U9 as possible
2@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
1 1 1 1 1
0.1U_0402_16V4Z 1000P_0402_50V7K C384 C386 C387
2@ C385 2@ 2@ + C388
+MEM_VDD 2@ 22U_A_4VM
2 2 2 2 2@
1U_0603_10V4Z 0.01U_0402_16V7K 2
A A
1 1 1 1 1
C389 C391 C392
2@ C390 2@ 2@ + C393 Place close to U9
2@ 22U_A_4VM
2 2 2 2 2@
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z Compal Electronics, Inc.
Title
Channel B External 128/64M DDR
Place close to U8 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
LCD CONN NOTE : place need to ASIC

C940 2@ 4.7U_0805_10V4Z
1 2
C395 2@ 0.1U_0402_16V4Z
ACES_87212-2200
Width: 60mils 2@
1 2
22 LCDVCC L71 10_0603_5%2 +LCDVDD

22 L72 10_0603_5%2
21 21 +3VS
D 20 EDID_CLK 2@ (DDC Power) +12VALW +3VS D
20 EDID_CLK 18
19 EDID_DAT
19 EDID_DAT 18
18 18
1
17 17 LVDSBC- 18 1
16 R794 C916
16 LVDSBC+ 18
15 15 LVDSB2- 18
14 C9412@ 47P_0402_50V8J +LCDVDD +5VALW 100K_0402_5% 4.7U_0805_10V4Z
14 LVDSB2+ 18 2
13 EDID_CLK 1 2
LVDSB1- 18
2
13
1
D
12 12 LVDSB1+ 18
11 C9422@ 47P_0402_50V8J 2 Q73
11 LVDSB0- 18
1
10 EDID_DAT 1 2 G AO3400_SOT23
10 LVDSB0+ 18
2
9 LCDVCC Q76 S +LCDVDD
3
9 R795 R796 DTC124EK_SC59
8 8 LVDSAC- 18
7 10K_0402_5%
7 LVDSAC+ 18
1
6 220_0402_5% 2 1 1 1
6 LVDSA2- 18
5 C918 C919
LVDSA2+ 18
1 2
1
5 R797 C917
4 4 LVDSA1- 18 D
3 200K_0402_5% 1000P_0402_50V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z
3 LVDSA1+ 18 2 2 2
2 Q75
2 1 2
LVDSA0- 18
2
2 2N7002_SOT23
G R798
1 1 LVDSA0+ 18
S 47K_0402_5%
3
2@ JP3
1
Pop when with EXTERNAL graphics
Q77
DTC124EK_SC59
C9431@ 4.7U_0805_10V4Z 2
1 2
C9441@ 0.1U_0402_16V4Z
C C
ACES_87212-2200
Width: 60mils 1@
1 2
3
22 LCDVCC L73 10_0603_5%2 +LCDVDD 2 1
22 18 ENVDD
21 L74 10_0603_5%2 +3VS R249 2@ 0_0402_5%
21 1@
20 20 LCD_DDCCLK 11 (DDC Power)
19 19 LCD_DDCDATA 11
18 18 11 GM_ENVDD 2 1
17 R252 1@ 0_0402_5%
17 LCD_BCLK- 11
16 16 LCD_BCLK+ 11
15 15 LCD_B2- 11
14 14 LCD_B2+ 11
13 13 LCD_B1- 11
12 12 LCD_B1+ 11
11 11 LCD_B0- 11
10 10 LCD_B0+ 11
9 LCDVCC
9
8 8 LCD_ACLK- 11
7 7 LCD_ACLK+ 11
6 6 LCD_A2- 11
5 5 LCD_A2+ 11
4 4 LCD_A1- 11
3 3 LCD_A1+ 11
2 2 LCD_A0- 11
1 1 LCD_A0+ 11
1@ JP35
Pop when with INTERNAL graphics
B B
+3VS
1
JP4 R263
INV_PWR_SRC 2 1
1 BIA_PWM 11
R390 @ 0_0402_5% 4.7K_0402_5%
2
2 1 INVT_PWM 41
2
3 R264 0_0402_5% DISPOFF#

4 2 1 2 1 BKOFF# 41
D7 R1117 0_0402_5%
5 DAC_BRIG 41
1000P_0402_50V7K
1 CH751H-40_SC76
6 C1132
7
1000P_0402_50V7K
1000P_0402_50V7K
1 1 L41 C398 2 1 2 1 BACKLITE_ON 11,18,41

ACES_85205-0700 1 2 B+ D34 R1118 0_0402_5%
2
C1131
CH751H-40_SC76 1@
1 1 0_0805_5% 1@
2 2 C400
C399
0.1U_0603_50V4Z 10U_1210_35V4Z
2 2
A A
INVERTER CONN
Title
LVDS Connector
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
L42
FLM1608081R8K_0603
18 TV_Y 2 1 1 2
82P_0402_50V8J
82P_0402_50V8J
R267 2@ 0_0402_5% +3VS
CLOSE TO JTVOUT1 1
TV-OUT Conn.
1
2 1 1 D8 D9 D10
18 TV_C
C401
R268 2@ 0_0402_5%
C402
2
18 TV_CVBS 2 1
1
2
75_0402_1%
75_0402_1%
75_0402_1%
R270 2@ 0_0402_5% JP5
1
DA204U_SC70 DA204U_SC70 DA204U_SC70
3
1
R275
R272
@ @ @ 2
R269
L43 SVIDEO_Y 3
D D
2
2@ 2@ 2@ FLM1608081R8K_0603 4
2
SVIDEO_C 5
1 2 6
82P_0402_50V8J
82P_0402_50V8J
SVIDEO_CVBS
7
11 Y/G 2 1 1 1
R274 1@ 0_0402_5% SUYIN_33007SR-07T1-C
C403
C404
11 C/R 2 1
R273 1@ 0_0402_5%
2 2
11 COMP/B 2 1
R271 1@ 0_0402_5%
1
Pop when with internal graphics R95 R141 R142
L44
150_0402_1% 150_0402_1% 150_0402_1% FLM1608081R8K_0603
1@ 1@ 1@ 1 2
82P_0402_50V8J
82P_0402_50V8J
1 1 +3VS
1
C405
C406
D11 D12 D13
2 2
R279 75_0402_1% 2@ DA204U_SC70 DA204U_SC70 DA204U_SC70
3
1 2 @ @ @ +5VS
2@ R280 75_0402_1%
1 2 +CRT_VCC
R281 75_0402_1% L45
2@ 1 2@ 2 CHB1608B121_0603 D14
2
C 2 1 INTCRT_R_F 1 2 C
18 VGA_RED
R276 0_0402_5% L46
2@ CHB1608B121_0603
2 1 INTCRT_G_F 1 2
18 VGA_GRN RB751V_SOD323
R277 0_0402_5% L47
1
2@ CHB1608B121_0603
2 1 INTCRT_B_F 1 2
18 VGA_BLU
0.01U_0402_16V7K
R278 0_0402_5%
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
1 1 1 1 1 1
1
CRT Conn.
C407
C408
C409
C410 C411 C412
C413
1@ 10P_0402_50V8J10P_0402_50V8J 10P_0402_50V8J
+3VS +2.5VS +3VS 2 2 2 2 @ 2 @ 2 @
11 INTCRT_R 2 1
R282 0_0402_5% 2
1@ JP6
1
2 1 +CRT_VCC 6
11 INTCRT_G
R283 0_0402_5% R1128 R1123 R1124 R1129 11
41 MSEN#
1@ 0_0402_5% 0_0402_5% 0_0402_5%0_0402_5% RED 1
2 1 2@ 1@ 1@ 2@ 7
11 INTCRT_B
R284 0_0402_5% VGA_DDC_DAT 12
2
+3VS GREEN 2
2
+3VS
2.2K_0402_5%
2.2K_0402_5%
Pop when with internal graphics 8
1
1K_0402_5%
1K_0402_5%
JVGA_HS 13
R285
R1028 R1029 BLUE 3
R286
R287
R288
2.2K_0402_5% 2.2K_0402_5% CRT_VCC 9
2
G
JVGA_VS 14 16
1
Q10 4 17
2
2 2@ 1 3 1 2N7002_SOT23 L48 10
18 DAT_DDC2
R289 10_0402_5% CHB1608B121_0603 VGA_DDC_CLK
S
18 CLK_DDC2 2 15
2
B
G
R290 2@ 0_0402_5% B
1 2 5
Q9 1 2
3 1 2N7002_SOT23 L49 FOX_DZ11A91-L7
33P_0402_50V8J
33P_0402_50V8J
2@ CHB1608B121_0603
S
1 1 1
18 HSYNC 2 1
C415
C416
R291 0_0402_5% C414
2@ +5VS @ @ 0.1U_0402_16V4Z
2 2 2
18 VSYNC 2 1
R292 0_0402_5%
1
1
0.1U_0402_16V4Z R293
1K_0402_5%
C417
2
2
5
U10
1@
P
OE#
11 INT_DAT_DDC2 1 2 2 A Y 4
R294 0_0402_5%
DA204U
G
1@ 2 1@ 1 INTCRT_R_F
1 2 +5VS 74AHCT1G125GW_SOT353-5 150_0603_1% R1190
11 INT_CLK_DDC2
3
R295 0_0402_5% 2 1@ 1 INTCRT_G_F

K1 A2
0.1U_0402_16V4Z
150_0603_1% R1191
11 INT_HSYNC 1 1@ 2 1 2 1@ 1 INTCRT_B_F
R296 39_0402_5% 150_0603_1% R1192
11 INT_VSYNC 1 1@ 2 C420
5
R298 39_0402_5% 2 U11

A1 K2
P
OE#
A A
2 A Y 4
Pop when with internal graphics
G
74AHCT1G125GW_SOT353-5
3

Title
TV_OUT and CRT
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+3VS
R301 1 2@ 2 10K_0402_5%
18 GPIO0
R302 1 2 @ 10K_0402_5%
18 GPIO1
STRAPS PIN DESCRIPTION DEFAULT
D D
R303 1 2 @ 10K_0402_5% PCI-EXPRESS CURRENT CALIBRATION BANDCAP BACKUP
18 GPIO2
CAL_BG_BACKUP GPIO0 USING REFERENCE VOLTAGE FROM BANDGAP 0
R304 1 2 @ 10K_0402_5%
18 GPIO3
PLL_CAL_FORCE_EN GPIO1 PCI-EXPRESS FORCE PLL CALIBRATION DISABLED 0
R305 1 2 @ 10K_0402_5%
18 GPIO4
PCIE_MODE(1:0) GPIO(3:2) PCI-EXPRESS 1:0A MODE 00
R306 1 2 @ 10K_0402_5% ENABLE TURN OFFPCI-EXPRESS IMPEDENCE/STRRENGTH
18 GPIO5
CAL_OFF GPIO4 CALIBRATION 0
R307 1 2 @ 10K_0402_5%
18 GPIO6
BYPASS_PLL GPIO5 BYPASS PCI-EXPRESS PLL 0
R308 1 2 @ 10K_0402_5% NORMAL PCI-EXPRESS TRANSMITTER CURRENT
18 ROM_ID1
ICOMP GPIO6 COMPENSATION 0
R309 1 2 @10K_0402_5%
18 ROM_ID2
DEBUG_ACCESS GPIO8 DEBUG SIGNALS NOT BROUGHT OUT 0
ROMID
R310 1 2 @ 10K_0402_5% ROMIDCFG(3:0) (4:1) SERIAL M25P10 ROM 1011
18 ROM_ID3
R311 1 2 @10K_0402_5%
18 ROM_ID4
C C
THERMAL SENSOR DDR SPREAD SPECTRUM

Theraml Chip for M24P only
+3VS +3VS
+3VS
1
1
+3VS R764 R765
2@ 10K_0402_5% 10K_0402_5%
1 2 @ @
C418 0.1U_0402_16V4Z
2
U13 2@
1 VCC SMBCLK C422 1 2 0.1U_0402_16V4Z
18 D+ SMBCLK 8 SMBCLK 18
AUXWIN 18
2@ 1 2 7 SMBDATA U14
DXP SMBDATA SMBDATA 18
1
C419 7 5
2200P_0402_50V7K ALERT# Q68 VDD REF
3 DXN ALERT 6 2
B MMBT3904_SOT23 2@ 2 B
18 OSC_OUT 1 XIN MODOUT 4 1 OSC_SPREAD 18
2 R312 22_0402_5%
18 D- 4 5 @
3
THERM GND
8 XOUT NC 3 1 2
R313 @ 10K_0402_5%
G781-1_SOP8 2 6 1 2
VSS PD# R314 @ 10K_0402_5%
2@
ASM3P1819N-SR_SO8
2@
Reserve for EC to monitor VGA temperature
Note: Pin3 Reserved for P1819 Spread Rate selection.
SMBCLK R394 1 2 0_0402_5% EC_SMC_1 41,42,48
SMBDATA 1 2 EC_SMD_1 41,42,48
R395 0_0402_5%
A A

Title
SS & Thermal Sensor
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
U16B +3V
32,34,35,37,38 PCI_AD[0..31]
PCI_AD0 E2 L5 PCI_REQ0# PCI_REQ0# 34
PCI_AD1 AD[0] REQ[0]# PCI_GNT0#
PCI_AD2
E5
C2
AD[1] PCI GNT[0]# C1
B5 PCI_REQ1#
PCI_GNT0# 34
C945
AD[2] REQ[1]# PCI_REQ1# 37
PCI_AD3 F5 B6 PCI_GNT1# PCI_GNT1# 37 2 1
+3VS PCI_AD4 AD[3] GNT[1]# PCI_REQ2#
F3 AD[4] REQ[2]# M5 PCI_REQ2# 32
PCI_AD5 E9 F1 PCI_GNT2# 32
RP49 PCI_AD6 AD[5] GNT[2]# PCI_REQ3# 0.1U_0402_16V4Z
F2 B8
14
AD[6] REQ[3]# PCI_REQ3# 35
PCI_AD7 D6 C8 PCI_GNT3# PCI_GNT3# 35 U17A
PCI_STOP# PCI_AD8 AD[7] GNT[3]# PCI_REQ4#
D 1 8 E6 F7 PCI_REQ4# 38 PCI_PCIRST# 1 D
P
PCI_SERR# PCI_AD9 AD[8] REQ[4]#/GPI[40] PCI_GNT4# A
2 7 D3 E7 PCI_GNT4# 38 3 PCI_RST#
PCI_PERR# PCI_AD10 AD[9] GNT[4]#/GPO[48] PCI_REQ5# O PCI_RST# 32,34,37,38,43
3 6 A2 AD[10] REQ[5]#/GPI[1] E8 2 B
G
4 5 PCI_REQ3# PCI_AD11 D2 F6 PCI_GNT5#
PCI_AD12 AD[11] GNT[5]#/GPO[17] PCI_REQ6#
D5 B7 74VHC08MTC_TSSOP14
AD[12] REQ[6]#/GPI[0]
7
8.2K_0804_8P4R_5% PCI_AD13 H3 D8
PCI_AD14 AD[13] GNT[6]#/GPO[16]
B4 AD[14]
RP50 PCI_AD15 J5 J6 PCI_C_BE0#
AD[15] C/BE[0]# PCI_C_BE0# 32,34,35,37,38
PCI_AD16 K2 H6 PCI_C_BE1#
AD[16] C/BE[1]# PCI_C_BE1# 32,34,35,37,38
1 8 PCI_PLOCK# PCI_AD17 K5 G4 PCI_C_BE2#
AD[17] C/BE[2]# PCI_C_BE2# 32,34,35,37,38
2 7 PCI_DEVSEL# PCI_AD18 D4 G2 PCI_C_BE3# +3V
AD[18] C/BE[3]# PCI_C_BE3# 32,34,35,37,38
3 6 PCI_REQ1# PCI_AD19 L6
P CI_IRDY# PCI_AD20 AD[19] P CI_IRDY#
4 5 G3 A3
14
AD[20] IRDY# PCI_IRDY# 32,34,35,37,38
PCI_AD21 H4 E1 PCI_PAR U17B
AD[21] PAR PCI_PAR 32,34,35,37,38
8.2K_0804_8P4R_5% PCI_AD22 H2 R2 PCI_PCIRST# PCI_PLTRST# 4
P
PCI_AD23 AD[22] PCIRST# PCI_DEVSEL# A
H5 C3 PCI_DEVSEL# 32,34,35,37,38 6 PLTRST#
PCI_AD24 AD[23] DEVSEL# PCI_PERR# O PLTRST# 9,29,35,39,41,46
B3 AD[24] PERR# E3 PCI_PERR# 32,34,35,37,38 5 B
G
PCI_AD25 M6 C5 PCI_PLOCK#
PCI_AD26 AD[25] PLOCK# PCI_SERR#
B2 G5 74VHC08MTC_TSSOP14
AD[26] SERR# PCI_SERR# 32,35,37,38
7
PCI_AD27 K6 J1 PCI_STOP#
AD[27] STOP# PCI_STOP# 32,34,35,37,38
PCI_AD28 K3 J2 PCI_TRDY#
AD[28] TRDY# PCI_TRDY# 32,34,35,37,38
PCI_AD29 A5
PCI_AD30 AD[29] +3V
L1 AD[30]
PCI_AD31
14
K4 AD[31]
R5 PCI_PLTRST# U17C
+3VS PLTRST# CLK_PCI_ICH PCI_PLTRST#
G6 10
P
PCICLK CLK_PCI_ICH 17 A
RP51 PCI_FRAME# J3 P6 8 PLTRST_ICH#
32,34,35,37,38 PCI_FRAME# FRAME# PME# ICH_PME# 32,34,35,37,38,41,42 O PLTRST_ICH# 18
9 B
G
1 8 PCI_PIRQD# Interrupt I/F
C 2 7 PCI_PIRQB# 32 PCI_PIRQA# PCI_PIRQA# N2 D9 ICH_GPIO2_PIRQE# ICH_GPIO2_PIRQE# 34 74VHC08MTC_TSSOP14 C
7
PCI_FRAME# PCI_PIRQB# PIRQ[A]# PIRQ[E]#/GPI[2] ICH_GPIO2_PIRQF#
3 6 32 PCI_PIRQB# L2 PIRQ[B]# PIRQ[F]#/GPI[3] C7 ICH_GPIO2_PIRQF# 35
4 5 PCI_TRDY# PCI_PIRQC# M1 C6 ICH_GPIO2_PIRQG# ICH_GPIO2_PIRQG# 37,38
PCI_PIRQD# PIRQ[C]# PIRQ[G]#GPI[4] ICH_GPIO2_PIRQH#
L3 PIRQ[D]# PIRQ[H]#/GPI[5] M3 ICH_GPIO2_PIRQH# 37,38
8.2K_0804_8P4R_5% +3V
14
AC5
RESERVED U17D
RP54 SATA[1]RXN/RSVD[1]
AD5 13
P
SATA[1]RXP/RSVD[2] A
AF4 SATA[1]TXN/RSVD[3] O 11
1 8 ICH_GPIO2_PIRQE# AG4 12
SATA[1]TXP/RSVD[4] B
G
2 7 PCI_REQ5# AC9
PCI_REQ6# SATA[3]RXN/RSVD[5] 74VHC08MTC_TSSOP14
3 6 AD9
7
ICH_GPIO2_PIRQF# SATA[3]RXP/RSVD[6]
4 5 AF8 SATA[3]TXN/RSVD[7]
AG8 SATA[3]TXP/RSVD[8]
8.2K_0804_8P4R_5% U3 TP[3]/RSVD[9]
ICH6_BGA609
RP53
1 8 PCI_PIRQA#
2 7 PCI_REQ2#
3 6 PCI_REQ0#
4 5 PCI_PIRQC# Internal Pull-up. Place closely pin G6
8.2K_0804_8P4R_5% Sample high destination is LPC.
RP52 CLK_PCI_ICH
PCI_GNT5#
2
1 8 PCI_REQ4#
2 7 ICH_GPIO2_PIRQG# R339
1
B ICH_GPIO2_PIRQH# @ 10_0402_5% B
3 6
4 5 R341
@ 0_0402_5%
1
8.2K_0804_8P4R_5%
1
2
C423
@8.2P_0402_50V
2
A A

Title
ICH6(1/4)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
C424
12P_0402_50V8J
2 1 ICH_RTCX1
10M_0402_5%
Y1
1
R343
Package 4 OUT NC 3
9.6X4.06 mm 1 2
IN NC U16A Note :
2
C425 LPC_LAD[0..3] 41,43
12P_0402_50V8J 32.768KHZ_12.5PF_6H03200468
Y1 P2 LPC_LAD0 R345 Populte zero ohm for Dothan-A,
RTCX1 LAD[0]/FWH[0]
RTC
2 1 ICH_RTCX2 Y2 RTCX2 LAD[1]/FWH[1] N3 LPC_LAD1
LPC_LAD2
no stuff for Dothan-B.
D N5 D
1 2 ICH_RTCRST# AA2
LAD[2]/FWH[2]
N4 LPC_LAD3 R346 no stuff for Dothan-A, Populte zero ohm for
LPC
+RTCVCC +RTCVCC RTCRST# LAD[3]/FWH[3]
R344
180K_0402_5% SM_INTRUDER# AA3 N6
Dothan-B.
J7 +RTCVCC 1 2 AA5
INTRUDER#
INTVRMEN
LDRQ[0]#
LDRQ[1]#/GPI[41] P4 LPC_LDRQ1#
LPC_LDRQ1# 43 Stuff R352 for Dothan B, no stuff R352 for Dothan A
1 2 R1178
1
2
3MM 330K_0402_5% P3 LPC_LFRAME#
R354 R1179 LFRAME#/FWH[4] LPC_LFRAME# 41,43
@ D12 EE_CS
1M_0402_5% 0_0402_5% B12
C426 EE_SHCLK EC_A20GATE
D11 EE_DOUT A20GATE AF22 EC_A20GATE 41
0.1U_0402_16V4Z F13 AF23 H_A20M#
H_A20M# 5
2
1
SM_INTRUDER# EE_DIN A20M#
1 2
LAN
H_CPUSLP_R# R345 1 @ 0_0402_5% H_CPUSLP#
CPU
F12 LAN_CLK CPUSLP# AE27 2 H_CPUSLP# 5,9
INTVRMEN B11 LAN_RSTSYNC DPRSLP#/TP[4] AE24 DPRSLP# R346 2 1 0_0402_5% H_DPRSLP#
H_DPRSLP# 5
AD27 H_DPSLP#
DPSLP#/TP[2] H_DPSLP# 5
HIGH ENABLE INTEGRATED VCCSUS1.5 VRM E12 LANRXD[0]
E11 AF24 FERR# R1059 1 2 56_0402_5%
LANRXD[1] FERR# H_FERR# 5
LOW DISABLE INTEGRATED VCCSUS1.5 VRM C13 LANRXD[2]
AG25 H_CPUPWRGD
CPUPWRGD/GPO[49] H_CPUPWRGD 5
C12 LANTXD[0]
C11 AG26 H_IGNNE#
LANTXD[1] IGNNE# H_IGNNE# 5
E13 LANTXD[2] INIT3_3V# AE22
AF27 H_INIT#
INIT# H_INIT# 5
AG24 H_INTR
INTR H_INTR 5
R1182
ICH_AC_BITCLK 2 1 0_0402_5% C10
39,44 ICH_AC_BITCLK ACZ_BIT_CLK
AC-97/AZALIA
39 ICH_SYNC_MDC 1 2 ICH_AC_SYNC_R B9 AD23 EC_RCIN#
33_0402_5% R348 ACZ_SYNC RCIN# EC_RCIN# 41 R350 +VCCP
C
39 ICH_RST_MDC# 1 2 ICH_AC_RST_R# A10 AF25 H_NMI 56_0402_5% C
ACZ_RST# NMI H_NMI 5
33_0402_5% R349 AG27 H_SMI# H_FERR# 2 1
SMI# H_SMI# 5
ICH_AC_SDIN0 F11
44 ICH_AC_SDIN0 ICH_AC_SDIN1 ACZ_SDIN[0] H_STPCLK# R352
39 ICH_AC_SDIN1 F10 ACZ_SDIN[1] STPCLK# AE26 H_STPCLK# 5
+3VS B10 56_0402_5%
R353 ACZ_SDIN[2] THRMTRIP_ICH# R351
THRMTRIP# AE23 1 2 56_0402_5% H_THERMTRIP# 5,8,9
H_DPRSLP# 2 1
39 ICH_SDOUT_MDC 1 2 ICH_AC_SDOUT_R C9 ACZ_SDO
IDE_DA[0..2] 31
2
33_0402_5% AC16 IDE_DA0

R1060 DA[0] IDE_DA1
AC19 SATALED# DA[1] AB17
4.7K_0402_5% AC17 IDE_DA2
DA[2]
AE3 AD16 IDE_DCS1#
IDE_DCS1# 31,46
1
SATA[0]RXN DCS1# IDE_DCS3#

AD3 SATA[0]RXP DCS3# AE17 IDE_DCS3# 31,46
IDE _DIORDY AG2 SATA[0]TXN
AF2 SATA[0]TXP IDE_DD[0..15] 31
AD14 IDE_DD0
DD[0]
SATA
AD7 AF15 IDE_DD1
SATA[2]RXN DD[1]
PIDE
AC7 AF14 IDE_DD2
SATA[2]RXP DD[2] IDE_DD3
AF6 SATA[2]TXN DD[3] AD12
AG6 AE14 IDE_DD4
SATA[2]TXP DD[4]
Place closely pin C10 DD[5] AC11 IDE_DD5
AC2 AD11 IDE_DD6
ICH_AC_BITCLK SATA_CLKN DD[6] IDE_DD7
AC1 SATA_CLKP DD[7] AB11
AE13 IDE_DD8
DD[8]
1
AG11 AF13 IDE_DD9

R355 SATARBIAS# DD[9] IDE_DD10
1 2 AF11 SATARBIAS DD[10] AB12
10_0402_5% R356 AB13 IDE_DD11
24.9_0603_1% DD[11] IDE_DD12
@ DD[12] AC13
B IDE_DD13 B
AE15
2
DD[13] IDE_DD14
2 DD[14] AG15
IDE _DIORDY AF16 AD13 IDE_DD15
31 IDE_DIORDY IORDY DD[15]
C427 IDE_IRQ AB16
10P_0402_50V8J 31,46 IDE_IRQ IDEIRQ
IDE_DDACK# AB15
1 31 IDE_DDACK# DDACK#
@ IDE_DIOW# AC14 AB14 IDE_DDREQ
31 IDE_DIOW# DIOW# DDREQ IDE_DDREQ 31
IDE_DIOR# AE16
31,46 IDE_DIOR# DIOR#
ICH6_BGA609
+3VS BATT1
R357 2 1 RTCPWR
2 1 IDE_IRQ 20mil
8.2K_0402_5%
ML1220T13RE
1
R358
33_0402_5%
44 ICH_SDOUT_AUDIO 1 2 ICH_AC_SDOUT_R
R359 +RTCVCC
33_0402_5%
3
A A
44 ICH_SYNC_AUDIO 1 2 ICH_AC_SYNC_R CHGRTC
R360 D25
20mil
33_0402_5% BAS40-04_SOT23
44 ICH_RST_AUDIO# 1 2 ICH_AC_RST_R#
Title
ICH6(2/4)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+3VALW
+3VALW +3VALW
10K_0402_5%
1
2.2K_0402_5%
2.2K_0402_5%
10K_0402_5%
10K_0402_5%
1
R1061
1
1
R361
R362
R363
R364
U16C
2
R365 ICH_RI# T2 H25 PCIE_RXN0
RI# PERn[1] PCIE_RXN0 39
D 33_0402_5% H24 PCIE_RXP0 D
PCIE_RXP0 39
2
PERp[1] PCIE_C_TXN0 C1087
2 1 AF17 G27 1 2 0.1U_0402_16V4Z PCIE_TXN0 PCIE_TXN0 39
2
ICH_SMLINK0 SATA[0]GP/GPI[26] PETn[1] PCIE_C_TXP0
AE18 SATA[1]GP/GPI[29] PETp[1] G26 1 2C1088 PCIE_TXP0
PCIE_TXP0 39
ICH_SMLINK1 AF18 @ 0.1U_0402_16V4Z
ICH_SMBDATA SATA[2]GP/GPI[30]
17,39 ICH_SMBDATA AG18 SATA[3]GP/GPI[31] PERn[2] K25 @
17,39 ICH_SMBCLK ICH_SMBCLK K24
ICH_SMBCLK PERp[2]
Y4 SMBCLK PETn[2] J27
PCI-EXPRESS
ICH_SMBDATA W5 J26
LINKALERT# SMBDATA PETp[2]
Y5 LINKALERT#
ICH_SMLINK0 W4 M25
+3VALW SMLINK[0] PERn[3]
GPIO
ICH_SMLINK1 U6 M24
MCH_SYNC# SMLINK[1] PERp[3]
RP55 AG21 MCH_SYNC# PETn[3] L27
45 SPKR SPKR F8 L26
LINKALERT# SPKR PETp[3]
5 4
6 3 EC_SMI# ICH_SUS_RESET W3 P24
T24 PAD SUS_STAT#/LPCPD# PERn[4]
7 2 GPI11 P23
SIRQ SYS_RESET# PERp[4]
+3VS 8 1 U2 SYS_RESET# PETn[4] N27
PETp[4] N26
9 PM_BMBUSY# PM_BMBUSY# AD19
10K_0804_8P4R_5% BM_BUSY#/GPI[6] DMI_RXN0
DMI[0]RXN T25 DMI_RXN0 9
+3VS
GPI7
EC_SMI#
AE19 GPI[7] DMI[0]RXP T24 DMI_RXP0
DMI_TXN0
DMI_RXP0 9 Place closely pin E10 Place closely pin A27
41 EC_SMI# R1 GPI[8] DMI[0]TXN R27 DMI_TXN0 9
R1183 0_0402_5% R26 DMI_TXP0 DMI_TXP0 9 CLK_ICH_14M CLK_ICH_48M
RP56 DMI[0]TXP
DIRECT MEDIA INTERFACE

41,48,51 ACIN AC IN 2 1GPI11 W6
GPI7 @ SMBALERT#/GPI[11] DMI_RXN1
5 4 DMI[1]RXN V25 DMI_RXN1 9
1
6 3 PM_CLKRUN# 41 EC_LID_OUT# EC_LID_OUT# M2 V24 DMI_RXP1 DMI_RXP1 9
ICH_THRM# EC_SCI# GPI[12] DMI[1]RXP DMI_TXN1 R366 R367
7 2 41 EC_SCI# R6 GPI[13] DMI[1]TXN U27 DMI_TXN1 9
8 1 MCH_SYNC# U26 DMI_TXP1 DMI_TXP1 9 10_0402_5% 10_0402_5%
PM_STP_PCI# DMI[1]TXP
17 PM_STP_PCI# AC21 STP_PCI#/GPO[18] @ @
C Y25 DMI_RXN2 DMI_RXN2 9 C
2
+3VALW 10K_0804_8P4R_5% DMI[2]RXN DMI_RXP2
AB21 GPO[19] DMI[2]RXP Y24 DMI_RXP2 9
W27 DMI_TXN2 DMI_TXN2 9 1 1
R376 PM_STP_CPU# DMI[2]TXN DMI_TXP2
17,55 PM_STP_CPU# AD22 STP_CPU#/GPO[20] DMI[2]TXP W26 DMI_TXP2 9
10K_0402_5% C430 C431
1 2 SYS_RESET# AB24 DMI_RXN3 DMI_RXN3 9 @ 4.7P_0402_50V8C
R379 DMI[3]RXN DMI_RXP3 2 4.7P_0402_50V8C 2
AD20 GPO[21] DMI[3]RXP AB23 DMI_RXP3 9 @
8.2K_0402_5% PLTRST_VGA# AD21 AA27 DMI_TXN3 DMI_TXN3 9
18 PLTRST_VGA# GPO[23] DMI[3]TXN
1 2 PM_BATLOW# AA26 DMI_TXP3 DMI_TXP3 9
IDERST_HD# DMI[3]TXP
46 IDERST_HD# V3 GPIO[24]
R380 AD25 CLK_PCIE_ICH# CLK_PCIE_ICH# 17
680_0402_5% IDERST_CD# DMI_CLKN CLK_PCIE_ICH
46 IDERST_CD# P5 GPIO[25] DMI_CLKP AC25 CLK_PCIE_ICH 17
1 2 ICH_PCIE_WAKE# R3
EC_FLASH# GPIO[27]
42 EC_FLASH# T3 GPIO[28]
35,37,38,41 PM_CLKRUN# PM_CLKRUN# AF19 F24
EXPRESSCARD_RST# CLKRUN#/GPIO[32] DMI_ZCOMP R377 24.9_0603_1%
39 EXPRESSCARD_RST# AF20 GPIO[33]
AC18 F23 DMI_IRCOMP 1 2 +1.5VS
R1188 0_0402_5% GPIO[34] DMI_IRCOMP
(PCI Express Wake Event)
ICH_PCIE_WAKE# 2 1 U5 C23 USB_OC4# USB_OC4# 40
39,41 ICH_PCIE_WAKE# WAKE# OC[4]#/GPI[9]
D23 USB_OC5#
SIRQ OC[5]#/GPI[10] USB_OC6# RP29
32,41,43 SIRQ AB20 SERIRQ OC[6]#/GPI[14] C25 USB_OC6# 40
D29 C24 USB_OC7#
OC[7]#/GPI[15]
41 EC_THRM# 1 2 ICH_THRM# AC20 THRM#
USB_OC2# 4 5 +3VALW
RB751V_SOD323 C27 USB_OC0# USB_OC0# 40 USB_OC1# 3 6
VGATE OC[0]# USB_OC1# USB_OC5#
9,17,55 VGATE AF21 VRMPWRGD OC[1]# B27 USB_OC1# 39 2 7
B26 USB_OC2# USB_OC7# 1 8
CLK_ICH_14M OC[2]# USB_OC3#
17 CLK_ICH_14M E10 CLK14 OC[3]# C26 USB_OC3# 40
10K_1206_8P4R_5%
CLK_ICH_48M USBP0-
CLOCK
17 CLK_ICH_48M A27 CLK48 USBP[0]N C21 USBP0- 40
B USBP0+ B
USBP[0]P D21 USBP0+ 40 R1207
ICH_SUSCLK V6 A20 USBP1- USBP1- 39
T12 PAD SUSCLK USBP[1]N
B20 USBP1+ USBP1+ 39 USB_OC3# 2 1
EC_SLP_S3# USBP[1]P +3VALW
41 EC_SLP_S3# T4 SLP_S3# USBP[2]N D19
41 EC_SLP_S4# EC_SLP_S4#2 R11941 0_0402_5% T5 C19
SLP_S4# USBP[2]P 10K_0402_5%
USB
41 EC_SLP_S5# EC_SLP_S5# T6 A18 USBP3- USBP3- 40
SLP_S5# USBP[3]N USBP3+
USBP[3]P B18 USBP3+ 40
39,41 ICH_PWRGD ICH_PWRGD AA1 E17 USBP4- USBP4- 40
PWROK USBP[4]N
POWER MGT
+3VS D17 USBP4+ USBP4+ 40
PM_DPRSLPVR USBP[4]P
AE20 DPRSLPVR/TP[1] USBP[5]N B16
USBP[5]P A16
2
1K_0402_5%
41 PM_BATLOW# PM_BATLOW# V2 C15 USBP6- USBP6- 40

BATLOW#/TP[0] USBP[6]N
R382
D15 USBP6+ USBP6+ 40

EC_PWRBTN# USBP[6]P
41 EC_PWRBTN# U1 PWRBTN# USBP[7]N A14
USBP[7]P B14
9,27,35,39,41,46 PLTRST# PLTRST# V5
1
@ LAN_RST# USBRBIAS
USBRBIAS# A22 1 2
41 EC_RSMRST# EC_RSMRST# Y3 B22
RSMRST# USBRBIAS R383
55 PM_DPRSLPVR
10K_0402_5%
10K_0402_5%
ICH6_BGA609 22.6_0603_1%
1
1
100K_0402_5%
1
R386
R384
R385
2
2
2
A A
System can't boot issue
May need pulldown for DPRSLPVR in case
the ICH6m does not set this value in time
for boot. Compal Electronics, Inc.
Title
ICH6(3/4)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
Near PIN F27(C968), U16D

+1.5VS +1.5VS E27 F4
P27(C949), AB27(C950) U16E Y6
VSS[172] VSS[86]
F22
C432 VSS[171] VSS[85]
Y27 VSS[170] VSS[84] F19
1 2 +1.5VS_L AA22 F9 0.1U_0402_16V4Z Y26 F17
+1.5VS VCC1_5[1] VCC1_5[98] VSS[169] VSS[83]
220U_D_4VM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L51 1 AA23 U17 1 2 Y23 E25
0_0805_5% VCC1_5[2] VCC1_5[97] VSS[168] VSS[82]
2 2 2 AA24 VCC1_5[3] VCC1_5[96] U16 W7 VSS[167] VSS[81] E19
C433
+ AA25 U14 C437 W25 E18
VCC1_5[4] VCC1_5[95] VSS[166] VSS[80]
C434
C435
C436
AB25 U12 0.1U_0402_16V4Z W24 E15
VCC1_5[5] VCC1_5[94] VSS[165] VSS[79]
AB26 VCC1_5[6] VCC1_5[93] U11 1 2 W23 VSS[164] VSS[78] E14
ICH_V5REF_RUN 2 1 1 1
AB27 VCC1_5[7] VCC1_5[92] T17 W1 VSS[163] VSS[77] D7
2 2 2 F25 T11 C441 V4 D22
C438 C439 VCC1_5[8] VCC1_5[91] 0.1U_0402_16V4Z VSS[162] VSS[76]
F26 VCC1_5[9] VCC1_5[90] P17 V27 VSS[161] VSS[75] D20
D 1U_0603_10V4Z 0.1U_0402_16V4Z C440 F27 P11 1 2 V26 D18 D
@ 0.1U_0402_16V4Z VCC1_5[10] VCC1_5[89] VSS[160] VSS[74]
G22 M17 V23 D14
CORE
1 1 1 VCC1_5[11] VCC1_5[88] C442 VSS[159] VSS[73]
G23 VCC1_5[12] VCC1_5[87] M11 U25 VSS[158] VSS[72] D13
G24 L17 0.1U_0402_16V4Z U24 D10
VCC1_5[13] VCC1_5[86] VSS[157] VSS[71]
G25 VCC1_5[14] VCC1_5[85] L16 1 2 U23 VSS[156] VSS[70] D1
H21 VCC1_5[15] VCC1_5[84] L14 U15 VSS[155] VSS[69] C4
H22 L12 C443 U13 C22
ICH_V5REF_SUS VCC1_5[16] VCC1_5[83] 0.1U_0402_16V4Z VSS[154] VSS[68]
J21 VCC1_5[17] VCC1_5[82] L11 T7 VSS[153] VSS[67] C20
2 2 J22 VCC1_5[18] VCC1_5[81] AA21 1 2 T27 VSS[152] VSS[66] C18
C448 C449 K21 AA20 T26 C14
1U_0603_10V4Z 0.1U_0402_16V4Z VCC1_5[19] VCC1_5[80] C444 VSS[151] VSS[65]
K22 VCC1_5[20] VCC1_5[79] AA19 T23 VSS[150] VSS[64] B25
PCIE
@ L21 0.1U_0402_16V4Z T16 B24
1 1 VCC1_5[21] VSS[149] VSS[63]
L22 VCC1_5[22] 1 2 T15 VSS[148] VSS[62] B23
M21 VCC1_5[23] VCC3_3[21] AA10 +3VS T14 VSS[147] VSS[61] B21
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M22 AG19 C445 T13 B19
+5VCD +3VS VCC1_5[24] VCC3_3[20] 0.1U_0402_16V4Z VSS[146] VSS[60]
N21 VCC1_5[25] VCC3_3[19] AG16 2 2 T12 VSS[145] VSS[59] B15
C446
C447
+5VALW +3VALW N22 AG13 1 2 T1 B13
VCC1_5[26] VCC3_3[18] VSS[144] VSS[58]
N23 VCC1_5[27] VCC3_3[17] AD17 R4 VSS[143] VSS[57] AG7
2
N24 AC15 Near PIN C450 R25 AG3
VCC1_5[28] VCC3_3[16] VSS[142] VSS[56]
2
R1024 1 1 0.1U_0402_16V4Z
N25 AA17 R24 AG22
IDE
R1023 10_0402_5% D27 P21
VCC1_5[29] VCC3_3[15]
AA15 AG13, AG16 1 2 R23
VSS[141] VSS[55]
AG20
10_0402_5% D26 @ 1SS355_SOD323 VCC1_5[30] VCC3_3[14] VSS[140] VSS[54]
P25 VCC1_5[31] VCC3_3[13] AA14 R17 VSS[139] VSS[53] AG17
1SS355_SOD323 @ P26 AA12 C451 R16 AG14
1
ICH_V5REF_RUN VCC1_5[32] VCC3_3[12] 0.1U_0402_16V4Z VSS[138] VSS[52]
P27 R15 AG12
1
ICH_V5REF_SUS VCC1_5[33] VSS[137] VSS[51]

R21 VCC1_5[34] 1 2 R14 VSS[136] VSS[50] AG1
1 R22 VCC1_5[35] VCC3_3[11] P1 +3VS R13 VSS[135] VSS[49] AF7
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 T21 M7 2 2 2 C455 R12 AF3
VCC1_5[36] VCC3_3[10] VSS[134] VSS[48]
C452
C948 T22 L7 0.1U_0402_16V4Z R11 AF26
VCC1_5[37] VCC3_3[9] VSS[133] VSS[47]
C453
C454
C946 0.1U_0402_16V4Z U21 L4 1 2 P22 AF12
2 VCC1_5[38] VCC3_3[8] VSS[132] VSS[46]
GROUND
C
2
0.1U_0402_16V4Z Near PIN A8 U22 VCC1_5[39] VCC3_3[7] J7
1 1 1
P16 VSS[131] VSS[45] AF10 C
Near PIN F21 V21 VCC1_5[40] VCC3_3[6] H7 C947 P15 VSS[130] VSS[44] AF1
@ 0.1U_0402_16V4Z
PCI
V22 VCC1_5[41] VCC3_3[5] H1 P14 VSS[129] VSS[43] AE7
W21 VCC1_5[42] VCC3_3[4] E4 1 2 P13 VSS[128] VSS[42] AE6
W22 VCC1_5[43] VCC3_3[3] B1 Near PIN C456
P12 VSS[127] VSS[41] AE25
Y21 A6 N7 AE21
Y22
VCC1_5[44] VCC3_3[2] A2-A6, D1-H1 0.01U_0402_16V7K N17
VSS[126] VSS[40]
AE2
VCC1_5[45] VSS[125] VSS[39]
VCCSUS1_5[3] U7 1 2 N16 VSS[124] VSS[38] AE12
AA6 R7 +1.5VALW N15 AE11
+1.5VS VCC1_5[46] VCCSUS1_5[2] VSS[123] VSS[37]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AB4 VCC1_5[47] Near PIN A25 N14 VSS[122] VSS[36] AE10
0.1U_0402_16V4Z
AB5 VCC1_5[48] 2 1 N13 VSS[121] VSS[35] AD6
USB
2 AB6 G19 +1.5VALW C457 N12 AD24
+3VALW VCC1_5[49] VCCSUS1_5[1] VSS[120] VSS[34]
0.1U_0402_16V4Z
AC4 0.01U_0402_16V7K N11 AD2
VCC1_5[50] VSS[119] VSS[33]
C460
C458
C459
AD4 VCC1_5[51] VCC1_5[78] G20 1 1 2 N1 VSS[118] VSS[32] AD18
U69 APL5301-15DC_3P 1 2
AE4 VCC1_5[52] VCC1_5[77] F20 M4 VSS[117] VSS[31] AD15
R12 0_0402_5% 1
Near PIN AG5 AE5 VCC1_5[53] VCC1_5[76] E24 Near PIN AA19 M27 VSS[116] VSS[30] AD10
SATA
2 3 1 2 +1.5VALW AF5 E23 M26 AD1
GND
Vin Vout VCC1_5[54] VCC1_5[75] 2 VSS[115] VSS[29]
C461
USB CORE
1 1 AG5 VCC1_5[55] VCC1_5[74] E22 M23 VSS[114] VSS[28] AC6
VCC1_5[73] E21 M16 VSS[113] VSS[27] AC3
C1126 C1127 AA7 E20 Near PIN U7 M15 AC26
1
+1.5VS VCC1_5[56] VCC1_5[72] VSS[112] VSS[26]

0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z AA8 D27 M14 AC24

2 2 VCC1_5[57] VCC1_5[71] VSS[111] VSS[25]
AA9 VCC1_5[58] VCC1_5[70] D26 M13 VSS[110] VSS[24] AC23
2 AB8 VCC1_5[59] VCC1_5[69] D25 M12 VSS[109] VSS[23] AC22
C462
AC8 VCC1_5[60] VCC1_5[68] D24 +1.5VS L25 VSS[108] VSS[22] AC12

Near PIN AG9 AD8 VCC1_5[61] +2.5VS
L24 VSS[107] VSS[21] AC10
AE8 VCC1_5[62] VCC1_5[67] G8 L23 VSS[106] VSS[20] AB9
1
AE9 VCC1_5[63] L15 VSS[105] VSS[19] AB7
AF9 VCC1_5[64] VCC2_5[4] AB18 L13 VSS[104] VSS[18] AB2
AG9 PCI/IDE RBP P7 K7 AB19
B VCC1_5[65] VCC2_5[2] VSS[103] VSS[17]
0.01U_0402_16V7K
B
K27 VSS[102] VSS[16] AB10
ICH6_VCCPLL AC27 AA18 ICH_V5REF_RUN 1 K26 AB1
VCCDMIPLL V5REF[2] VSS[101] VSS[15]
+3VS E26 VCC3_3[1] V5REF[1] A8 K23 VSS[100] VSS[14] AA4
K1 VSS[99] VSS[13] AA16
0.1U_0402_16V4Z
AE1 F21 ICH_V5REF_SUS J4 AA13

+1.5VS VCCSATAPLL V5REF_SUS 2 VSS[98] VSS[12]
C463
2 +3VS AG10 VCC3_3[22] J25 VSS[97] VSS[11] AA11
C464
0.1U_0402_16V4Z
2 VCCUSBPLL A25 +1.5VS J24 VSS[96] VSS[10] A9

A13 VCCLAN3_3/VCCSUS3_3[1] VCCSUS3_3[20] A24 +3VALW J23 VSS[95] VSS[9] A7
C465
+3VS F14 VCCLAN3_3/VCCSUS3_3[2] H27 VSS[94] VSS[8] A4

1
G13 VCCLAN3_3/VCCSUS3_3[3] VCCRTC AB3 +RTCVCC H26 VSS[93] VSS[7] A26
1 +3VALW
G14 VCCLAN3_3/VCCSUS3_3[4] Near PIN AB18 C466
H23 VSS[92] VSS[6] A23
VCCLAN1_5/VCCSUS1_5[2] G11 G9 VSS[91] VSS[5] A21
A11 G10 +1.5VS 0.1U_0402_16V4Z G7 A19
+3VALW VCCSUS3_3[1] VCCLAN1_5/VCCSUS1_5[1] VSS[90] VSS[4]
Near PIN U4 VCCSUS3_3[2] 1 2 G21 VSS[89] VSS[3] A15
V1 AG23 G12 A12
E26, E27 V7
VCCSUS3_3[3] V_CPU_IO[3]
AD26 +VCCP Near PIN AG23 C467 G1
VSS[88] VSS[2]
A1
VCCSUS3_3[4] V_CPU_IO[2] 0.1U_0402_16V4Z VSS[87] VSS[1]
Near PIN AE1 W2 VCCSUS3_3[5] V_CPU_IO[1] AB22
0.1U_0402_16V4Z
Y7 1 2 ICH6_BGA609
VCCSUS3_3[6] +3VS +RTCVCC
VCCSUS3_3[19] G16 1
A17 G15 C469 C470
+3VALW VCCSUS3_3[7] VCCSUS3_3[18]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L52 B17 F16 0.1U_0402_16V4Z 0.1U_0402_16V4Z

VCCSUS3_3[8] VCCSUS3_3[17]
C468
R389 CHB1608U301_0603 2 2 C17 F15 1 2 1 2
VCCSUS3_3[9] VCCSUS3_3[16] 2
0.1U_0402_16V4Z
1 2 1 2 ICH6_VCCPLL F18 E16
+1.5VS VCCSUS3_3[10] VCCSUS3_3[15]
0.01U_0402_16V7K
C471
C472
G17 D16 C474 1

VCCSUS3_3[11] VCCSUS3_3[14]
0.1U_0402_16V4Z
1_0603_1% G18 C16 C473 0.1U_0402_16V4Z

1 1 VCCSUS3_3[12] VCCSUS3_3[13]
2 1 1 2 1 2
2
C477
C478
C475
ICH6_BGA609 0.1U_0402_16V4Z Near PIN A24
A 1 2 A
Near PIN A17
Near PIN AG10
Near PIN Compal Electronics, Inc.

AB27 Title
ICH6(4/4)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
HDD Connector
HDD FOOTPRINT ERROR
IDE_DD[0..15]
28 IDE_DD[0..15]
IDE_DA[0..2]
28 IDE_DA[0..2]
SUYIN_200138FR044G242ZL
D HD_IDERST# D
43,46 HD_IDERST# 44 43
IDE_DD7 IDE_DD8
IDE_DD6 42 41 IDE_DD9
28 27
IDE_DDREQ 26 25
28 IDE_DDREQ 24 23
IDE_DIOW# R727
28 IDE_DIOW# 22 21
HDD_IOR# 470_0402_5%
46 HDD_IOR# 20 19
IDE _DIORDY PCSEL 1 2
28 IDE_DIORDY
IDE_DDACK# 18 17 Pull Down set Primary
28 IDE_DDACK# 16 15
HDD_IRQ
46 HDD_IRQ 14 13
IDE_DA1 PDIAG#
IDE_DA0 12 11 IDE_DA2
IDE_DCS1# 10 9 IDE_DCS3#
28,46 IDE_DCS1# 8 7 IDE_DCS3# 28,46
IDE_LED#
43 IDE_LED# 6 5
+5VS 4 3 +5VS
+5VS 1 2 2 1
R728
100K_0402_5% JP7
Placea caps. near HDD

CONN.
C NEED TO CHECK C
+5VS
0.1U_0402_16V4Z 10U_0805_10V4Z
1 1 1 1 1
C834 C835 C836 C837 C838
10U_0805_10V4Z
2 2 2 2 2
1000P_0402_50V7K 1U_0603_10V4Z
CD-ROM Connector
JP8
44 INT_CD_L 1 2 INT_CD_R 44
44 CD_AGND SIDE_RST# 3 4 IDE_DD8
46 SIDE_RST# IDE_DD7 5 6 IDE_DD9
B IDE_DD5 9 10 IDE_DD11 B
IDE_DD0 19 20 IDE_DDREQ
21 22 IDE_DIOR#
23 24 IDE_DIOR# 28,46
IDE_DIOW#
IDE _DIORDY 25 26 IDE_DDACK#
IDE_IRQ 27 28 R1197 10K_0402_5%
28,46 IDE_IRQ 29 30
IDE_DA1 PDIAG# 2 1 +5VCD
56_0402_5% IDE_DA0 31 32 IDE_DA2
SW_IDE_SDCS1# 1 33 34 SW_IDE_SDCS3#
46 SW_IDE_SDCS1# 2 35 36 SW_IDE_SDCS3# 46
R1199 IDE_LED# W=80mils
37 38
+5VCD 39 40 +5VCD
Pull hign set Slave 41 42
43 44
45 46
+5VS 2 1 SEC_CSEL 47 48
R729 4.7K_0402_5% 1
C1133 49 50
@
OCTEK_CDR-50JE2
@ 22P_0402_50V8J
2
Place caps. near CDROM
CONN.
Change PCB
Footprint.
+5VCD
A A
0.1U_0402_16V4Z 10U_0805_10V4Z NEED TO CHECK
1 1 1 1 1
C839 C840 C841 C842 C843
10U_0805_10V4Z
2 2 2 2 2
Title
1000P_0402_50V7K 1U_0603_10V4Z
IDE CONNECTOR
EDL71 LA-2351 1B

5 4 3 2 1
A B C D E
+S1_VCC +3VS
33 VPPD0
33 VPPD1 +3VS
33 VCCD0#
33 VCCD1# 1 1 1
M13
M12
G13
N13
N12
D12
H11
G1
C8
N4
C645 C646 C647
A7
B4
K2
F3
L9
L6
U33 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
S1_A[0..25] 2 2 2
VCCD1#
VCCD0#
VPPD1
VPPD0
VCCA2
VCCA1
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
S1_A[0..25] 33
S1_D[0..15]
PCI_AD[0..31] S1_D[0..15] 33
27,34,35,37,38 PCI_AD[0..31] +3VS
4 PCI_AD31 S1_D10 4
C2 AD31 CAD31/D10 B2
PCI_AD30 C1 C3 S1_D9
PCI_AD29 AD30 CAD30/D9 S1_D1
D4 AD29 CAD29/D1 B3 1 1 1
PCI_AD28 D2 A3 S1_D8
PCI_AD27 AD28 CAD28/D8 S1_D0 C649 C650 C652
D1 AD27 CAD27/D0 C4
PCI_AD26 E4 A6 S1_A0 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD25 AD26 CAD26/A0 S1_A1 2 2 2
E3 AD25 CAD25/A1 D7
PCI_AD24 E2 C7 S1_A2
PCI_AD23 AD24 CAD24/A2 S1_A3
F2 AD23 CAD23/A3 A8
PCI_AD22 F1 D8 S1_A4
G2 AD21 CAD21/A5 A9
PCI_AD20 G3 C9 S1_A6
PCI_AD19 AD20 CAD20/A6 S1_A25 +S1_VCC
H3 AD19 CAD19/A25 A10
PCI_AD18 H4 B10 S1_A7
J1 AD17 CAD17/A24 D10
PCI_AD16 J2 E12 S1_A17 1 1 1 1
PCI_AD15 AD16 CAD16/A17 S1_IOWR#
N2 AD15 CAD15/IOWR# F10 S1_IOWR# 33
PCI_AD14 M3 E13 S1_A9 C653 C654 C655 C656
PCI_AD13 AD14 CAD14/A9 S1_IORD# 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
N3 AD13 CAD13/IORD# F13 S1_IORD# 33 0.1U_0402_16V4Z
PCI_AD12 S1_A11 2 2 2 2
K4 AD12 CAD12/A11 F11
PCI_AD11 M4 G10 S1_OE#
AD11 CAD11/OE# S1_OE# 33
PCI_AD10 K5 G11 S1_CE2#
AD10 CAD10/CE2# S1_CE2# 33
PCI_AD9 L5 G12 S1_A10
PCI_AD8 AD9 CAD9/A10 S1_D15
M5 AD8 CAD8/D15 H12
PCI_AD7 K6 H10 S1_D7
M6 AD6 CAD6/D13 J11
PCI_AD5 N6 J12 S1_D6
M7 AD4 CAD4/D12 K13
PCI_AD3 N7 J10 S1_D5
PCI Interface
L7 AD2 CAD2/D11 K10
CARDBUS
PCI_AD1 K7 K12 S1_D4
N8 AD0 CAD0/D3 L13
3 3
CLK_PCI_PCM E1 B7 S1_REG#
27,34,35,37,38 PCI_C_BE3# CBE3# CCBE3#/REG# S1_REG# 33
J3 A11 S1_A12
27,34,35,37,38 PCI_C_BE2# CBE2# CCBE2#/A12
1
N1 E11 S1_A8
27,34,35,37,38 PCI_C_BE1# CBE1# CCBE1#/A8
R570 N5 H13 S1_CE1#
27,34,35,37,38 PCI_C_BE0# CBE0# CCBE0#/CE1# S1_CE1# 33
@ 10_0402_5%
27,34,37,38,43 PCI_RST# G4 B9 S1_RST
PCIRST# CRST#/RESET S1_RST 33
J4 B11 S1_A23
27,34,35,37,38 PCI_FRAME#
2
FRAME# CFRAME#/A23 S1_A15

1 27,34,35,37,38 PCI_IRDY# K1 IRDY# CIRDY#/A15 A12
K3 A13 S1_A22
27,34,35,37,38 PCI_TRDY# TRDY# CTRDY#/A22
C657 L1 B13 S1_A21
27,34,35,37,38 PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
@18P_0402_50V8K L2 C12 S1_A20
2 27,34,35,37,38 PCI_STOP# STOP# CSTOP#/A20
L3 C13 S1_A14
27,34,35,37,38 PCI_PERR# PERR# CPERR#/A14
M1 A5 S1_WAIT#
27,35,37,38 PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# 33
M2 D13 S1_A13
27,34,35,37,38 PCI_PAR PAR CPAR/A13
A1 B8 S1_INPACK#
27 PCI_REQ2# PCIREQ# CREQ#/INPACK# S1_INPACK# 33
B1 C11 S1_WE#
27 PCI_GNT2# PCIGNT# CGNT#/WE# S1_WE# 33
H1 B12 A16_CLK 1 2 S1_A16
17 CLK_PCI_PCM PCICLK CCLK/A16
CLK_PCI_PCM R571 33_0402_5%
+3VS
IDSEL: 27,34,35,37,38,41,42 PCM_PME# L8 RIOUT#_PME# CSTSCHG/BVD1_STSCHG# C5 S1_BVD1
S1_BVD1 33
1 2+3V_PCM_SUSP L11 D5 S1_WP
PCI_AD20 +3VS
R573 10K_0402_5% SUSPEND# CCLKRUN#/WP_IOIS16# S1_WP 33
2
PCI_AD20 1 2 PCM_ID F4 D11 S1_A19

R1169 R575 100_0402_1% IDSEL CBLOCK#/A19
PCI_PIRQA# K8 D6 S1_RDY# S1_CD1# S1_CD2#
27 PCI_PIRQA# MFUNC0 CINT#/READY_IREQ# S1_RDY# 33
43K_0402_5% SD_PULLHIGH N9
PCI_PIRQB# MFUNC1 PCM_SPK#
27 PCI_PIRQB# K9 M9 PCM_SPK# 45 1 1
1
MFUNC2 SPKROUT S1_BVD2 C658 C659

29,41,43 SIRQ N10 MFUNC3 CAUDIO/BVD2_SPKR# B5 S1_BVD2 33
33 SM_CD# L10 MFUNC4
N11 A4 S1_CD2# 10P_0402_25V8K 10P_0402_25V8K
MFUNC5 CCD2#/CD2# S1_CD2# 33 2 2
M11 L12 S1_CD1#
MFUNC6 CCD1#/CD1# S1_CD1# 33
SDOC# J9 D9 S1_VS2
2 33 SDOC# MFUNC7 CVS2/VS2# S1_VS2 33 2
C6 S1_VS1
CVS1/VS1 S1_VS1 33
SD Pullhigh for BIOS default CRSV3/D2 A2 S1_D2 Closed to Pin L12 Closed to Pin A4
PCI_RST# M10 E10 S1_A18
GRST# CRSV2/A18 S1_D14
CRSV1/D14 J13
+VCC_5IN1
+VCC_5IN1 E7
SD/MMC/MS/SM H7
VCC_SD MSINS# MSINS# 33
J8 XD_MS_PWREN#
MSPWREN#/SMPWREN# XD_MS_PWREN# 33
SDCD# E8 H8 MSBS_XDD1
33 SDCD# SDCD# MSBS/SMDATA1 MSBS_XDD1 33
POP FOR 712 33 SDWP#
SDWP# F8 SDWP/SMWPD# MSCLK/SMRE# E9 1 2 MSCLK_XDRE# 33 Close chip termenal
2
SDPWREN# G7 G9 MSD0_XDD2 R572 33_0402_5%

33 SDPWREN# SDPWREN33# MSDATA0/SMDATA2 MSD0_XDD2 33
R1170 H9 MSD1_XDD6
MSDATA1/SMDATA6 MSD1_XDD6 33
R1185
2 1 0_0402_5% H5 G8 MSD2_XDD5 MSD0_XDD2 1 2
17 CLK_EXT_SD48 SDCLKI MSDATA2/SMDATA5 MSD2_XDD5 33
0_0402_5% F9 MSD3_XDD3 R584 @ 43K_0402_5%
MSDATA3/SMDATA3 MSD3_XDD3 33
33 SDCK_XDWE# 1 R574 2 0_0402_5% F6 MSD1_XDD6 1 2
1
SDCM_XDALE SDCLK/SMWE# R586 @ 43K_0402_5%

33 SDCM_XDALE E5 SDCMD/SMALE
SDDA0_XDD7 E6 H6 MSD2_XDD5 1 2
33 SDDA0_XDD7 SDDAT0/SMDATA7 SMBSY# XDBSY# 33
SDDA1_XDD0 F7 J7 R587 43K_0402_5%
33 SDDA1_XDD0 SDDAT1/SMDATA0 SMCD# XDCD# 33
SDDA2_XDCL F5 J6 MSD3_XDD3 1 @ 2
33 SDDA2_XDCL SDDAT2/SMCLE SMWP# XDWP# 33
2 1 SD_PULLHIGH SDDA3_XDD4 G6 J5 R588 43K_0402_5%
33 SDDA3_XDD4 SDDAT3/SMDATA4 SMCE# XDCE# 33
@ R833 0_0805_5% MSBS_XDD1 1 @ 2
2
43K_0402_5%
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
G5 R589 43K_0402_5%
GND_SD @
R1186
1 2 SDCM_XDALE CB712_LFBGA169
D3
H2
L4
M8
K11
F12
C10
B6
R791 43K_0402_5%
1
1 2 SDDA0_XDD7
R788 43K_0402_5% @
1 2 SDDA1_XDD0
R576 43K_0402_5%
1 2 SDDA2_XDCL
1 R577 43K_0402_5% 1
1 2 SDDA3_XDD4
R578 43K_0402_5%
+3VS
1
R580 @
2
43K_0402_5%
SDCD#
1 2 SDWP# Title
R581 @
1
43K_0402_5%
2 MSINS# PCMCIA Controller ENE CB714
R1171 @ 43K_0402_5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
Close chip termenal AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EDL71 LA-2351 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, March 02, 2005 Sheet 32 of 59
A B C D E
5 4 3 2 1
JP24
CardBus Socket 1 35
1 35
PCMCIA Power Controller S1_D3
S1_D4
2
3
2 36 36
37
S1_CD1#
S1_D11 S1_CD1# 32
S1_A[0..25] S1_D5 3 37 S1_D12
32 S1_A[0..25] 4 4 38 38
S1_D6 5 39 S1_D13
S1_D[0..15] S1_D7 5 39 S1_D14
32 S1_D[0..15] 6 6 40 40
S1_CE1# 7 41 S1_D15
32 S1_CE1# S1_A10 7 41 S1_CE2#
8 8 42 42 S1_CE2# 32
U34 +S1_VCC 1 2 S1_OE# 9 43 S1_VS1
32 S1_OE# 9 43 S1_VS1 32
VCC 13 40mil C660 0.1U_0402_16V4Z S1_A11 10 10 44 44 S1_IORD#
S1_IORD# 32
12 1 2 Close to S1_A9 11 45 S1_IOWR#
VCC C661 0.1U_0402_16V4Z +S1_VCC S1_A8 11 45 S1_A17 S1_IOWR# 32
9 11 12 46
12V VCC
1 2 CardBus Conn. S1_A13 13
12 46
47 S1_A18
D C663 10U_0805_10V4Z S1_A14 13 47 S1_A19 D
14 14 48 48
+S1_VPP 1 2 S1_WE# 15 49 S1_A20
1 1 32 S1_WE# 15 49
+5VS
20mil C664 0.01U_0402_16V7K
32 S1_RDY#
S1_RDY# 16 16 50 50 S1_A21
10 1 2 C668 C669 +S1_VCC 17 51
VPP 0.1U_0402_16V4Z 17 51 +S1_VCC
1 2 C665 1U_0603_10V4Z 10U_0805_10V4Z +S1_VPP 18 52
2 2 18 52 +S1_VPP
0.1U_0402_16V4Z C666 5 S1_A16 19 53 S1_A22
5V S1_A15 19 53 S1_A23
1 2 6 5V 20 20 54 54
4.7U_0805_10V4Z C667 S1_A12 21 55 S1_A24
S1_A7 21 55 S1_A25
VCCD0 1 VCCD0# 32 22 22 56 56
2 S1_A6 23 57 S1_VS2
VCCD1 VCCD1# 32 23 57 S1_VS2 32
15 S1_A5 24 58 S1_RST
+3VS VPPD0 VPPD0 32 +S1_VPP 24 58 S1_RST 32
14 S1_A4 25 59 S1_WAIT#
VPPD1 VPPD1 32 25 59 S1_WAIT# 32
1 2 S1_A3 26 60 S1_INPACK#
0.1U_0402_16V4Z C670 S1_A2 26 60 S1_REG# S1_INPACK# 32
3 3.3V 27 27 61 61 S1_REG# 32
1 2 4 8 1 1 S1_A1 28 62 S1_BVD2
4.7U_0805_10V4Z C671 3.3V SHDN OC S1_A0 28 62 S1_BVD1 S1_BVD2 32
29 63
GND
C672 C673 S1_D0 29 63 S1_D8 S1_BVD1 32

30 30 64 64
2
4.7U_0805_10V4Z 0.01U_0402_16V7Z S1_D1 31 65 S1_D9

R590 CP-2211_SSOP16 2 2 S1_D2 31 65 S1_D10
32 66
7
16
10K_0402_5% S1_WP 32 66 S1_CD2#

32 S1_WP 33 33 67 67 S1_CD2# 32
34 34 68 68
1
SANTA_130602-2
J23
SDCD# 1
3 IN 1 MS/SD/MMC
SDWP# CD_SD
2 WP_SD Connector
SDDA1_XDD0 3 DAT1_SD
MS INTERFACE
SDDA0_XDD7 4 21
DAT0_SD Vss_MS
SD INTERFACE
C C
5 WP GND_SD VCC_MS 19 +VCC_5IN1
6 18 MSCLK_XDRE#
SDCK_XDWE# VSS_SD SCLK_MS MSD3_XDD3
9 CLK_SD Reverved_MS 16
+VCC_5IN1 12 15 MSINS#
VDD_SD INS_MS MSD2_XDD5
14 VSS_SD Reverved_MS 13
SDCM_XDALE 17 11 MSD0_XDD2
SDDA3_XDD4 CMD_SD SDIO_MS MSD1_XDD6
20 CD/DAT3_SD Vcc_MS 10
SDDA2_XDCL 22 8 MSBS_XDD1
DAT2_SD BS_MS
23 CD GND_SD Vss_MS 7
24 CD GND_SD
25 CD GND_SD
26 CD GND_SD
PROCO_MSD019-C0-1690
1
C949
0.1U_0402_16V4Z JP18
2
5 IN 1 SDDA1_XDD0
20 MS_1P(GND) SM_6P(D0) 18 SD CLK
37 Connector 16 MSBS_XDD1 MS CLK SDCK_XDWE#
MS_10P(GND) SM_7P(D1) 32 SDCK_XDWE#
MSD1_XDD6 24 14 MSD0_XDD2 MSCLK_XDRE#
32 MSD1_XDD6 MS_3P(VCC) SM_8P(D2) 32 MSCLK_XDRE#
1
+VCC_5IN1 35 12 MSD3_XDD3
MS_9P(VCC) SM_9P(D3)
1
MS INTERFACE
9 SDDA3_XDD4 R585
SM_13P(D4) MSD2_XDD5 R787 0_0402_5%
SM_14P(D5) 11
13 MSD1_XDD6 0_0402_5%
MSD2_XDD5 SM_15P(D6) SDDA0_XDD7
32 MSD2_XDD5 28 15 @
2
MSD3_XDD3 MS_5P(RSVD1) SM_16P(D7) SDDA0_XDD7 32
32 MSD3_XDD3 32 1
2
MS_7P(RSVD2) SDDA2_XDCL
45 1
SM INTERFACE
SM_2P(CLE) SDCM_XDALE C914

SM_3P(ALE) 43
44 XDCE# C915 10P_0402_50V8K
B MSD0_XDD2 SM_21P(CE#) MSCLK_XDRE# 10P_0402_50V8K 2 B
32 MSD0_XDD2 26 MS_4P(SDIO) SM_20P(RE#) 42
MSCLK_XDRE# SDCK_XDWE# 2 @
33 MS_8P(SCLK) SM_4P(WE#) 41
MSINS# 30 39 XDWP#
32 MSINS# MS_6P(INS) SM_5P(WP-IN#)
MSBS_XDD1 22 40 XDBSY#
32 MSBS_XDD1 MS_2P(BS) SM_19P(BSY#) +3VS +3VS
8 XDCD#
SM_11P(CD#) XDCD#
SM_17P(LVD) 17 2 1 XDCD# 32 712@
R603 @ 8.2K_0402_5%
2
7 R767 +VCC_5IN1
SM_12P(VCC) +VCC_5IN1 +3VS
SM_22P(VCC) 46 1
+VCC_5IN1
xD PU and PD. Close to Socket
SM_1P(GND) 47
SDDA1_XDD0 60 10 C950 10K_0402_5% 1 2 MSCLK_XDRE#
MSBS_XDD1 XD_10P(D0) SM_10P(GND) R598 10K_0402_5%
61 38 0.1U_0402_16V4Z
1
MSD0_XDD2 XD_11P(D1) SM_18P(GND) 2 U52
62 XD_12P(D2) 1 2 SDCK_XDWE#
MSD3_XDD3 63 49 4 3 R599 10K_0402_5%
XD_13P(D3) SM_WP1(GND) VIN FLG SDOC# 32
SDDA3_XDD4 64 48 SDWP# 1 2
XD_14P(D4) SM_WP2(SW-WP2) XDCE# 32 712@
MSD2_XDD5
MSD1_XDD6
65 XD_15P(D5) SM_CD1(GND) 6
SM_CD# VOUT 5 40mil R600 @ 2.2K_0402_5%
XDBSY#
66 XD_16P(D6) SM_CD2(SW-CD2) 5 SM_CD# 32 2 1 XDBSY# 32 712@
XD INTERFACE
SDDA0_XDD7 67 SDPWREN 1 2 R604 @ 10K_0402_5%

XD_17P(D7) CE GND
69 RT9702ACB_SOT23-5
SD_IO(GND) +3VS +S1_VCC
SD_7P(D0) 21 SDDA0_XDD7
SDDA0_XDD7 32 Reserve for Debug.
XDBSY# 52 19 SDDA1_XDD0
XD_2P(R/B#) SD_8P(D1) SDDA1_XDD0 32
MSCLK_XDRE# 53 36 SDDA2_XDCL S1_WP 2 1
SD INTERFACE
XD_3P(RE#) SD_9P(D2) SDDA2_XDCL 32
1
XDCE# 54 34 SDDA3_XDD4 +3VS 43K_0402_5% R591
XD_4P(CE#) SD_1P(D3) SDDA3_XDD4 32
SDCK_XDWE# 57 R515 S1_OE# 2 1
XDWP# XD_7P(WE#) SDCK_XDWE# 10K_0402_5% 47K_0402_5% R592
32 XDWP# 58 XD_8P(WP#) SD_5P(CLK) 25
2
SDDA2_XDCL 55 31 SDCM_XDALE S1_RST 2 1
XD_5P(CLE) SD_2P(CMD) SDCM_XDALE 32
SDCM_XDALE 56 R766 47K_0402_5% R593
2
XDCD# XD_6P(ALE) 43K_0402_5% SDPWREN S1_CE1#
51 XD_1P(CD) SD_4P(VCC) 27 +VCC_5IN1 2 1
23 47K_0402_5% R594
SD_6P(GND)
1
D S1_CE2#
29 2 1
1
SD_3P(GND) Q94 47K_0402_5% R595
32 SDPWREN# 2
A SDWP# G 2N7002_SOT23 A
+VCC_5IN1 1 68 XD_18P(VCC) SD_SW_WP1(SW-WP1) 1 SDWP# 32
50 2 32 XD_MS_PWREN# S
3
C951 XD_1P(GND) SD_SW_WP2(SW-GND) SDCD#
59 XD_9P(GND) SD_SW_CD1(SW-CD1) 3 SDCD# 32
0.1U_0402_16V4Z SD_SW_CD2(SW-GND) 4
2
1
@ TAISOL_152-1001001-00
C952
2
0.1U_0402_16V4Z
Title
PCMCIA Socket
EDL71 LA-2351 1B

5 4 3 2 1
A B C D E
+3VS
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VS @ 0.1U_0402_16V4Z

C958
1 1 1 1 1 1 1 1 1
1 2
C920 C921 C922 C923 C924 C925 C926 C927 C928
0.1U_0402_16V4Z U59
4 2 2 2 2 2 2 2 2 2 510_0402_5% 4
1 A0 VCC 8
2 A1 WP 7 2 R1007 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 3 A2 SCL 61394SCL @
4 GND SDA 51394SDA
@ AT24C02N-10SI-2.7_SO8
+3VS
CLK_PCI_1394 +3VS
1
2
110
122
111
100
108
118
126
112
R1008
46
36
99
17
32
21
30
31
47
91
13
23
33
22
38
5
6
22_0402_5% U37 L39
@ PCI_AD[0..31]
PVD
PVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
27,32,35,37,38 PCI_AD[0..31] PCI_AD0 25
2
PCI_AD1 AD0
1 24 AD1 KC FBM-L11-201209-221LMAT_0805
PCI_AD2 20 XCPS
1
C929 PCI_AD3 AD2
19 AD3
15P_0402_50V8D PCI_AD4 18 59 +3VS_1394 0.1U_0402_16V4Z
AD4 PVA
1
2 @ PCI_AD5 16 62 1 1 1 1
3
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
15
14
11
AD5
AD6
AD7
AD8
Power PVA
PVA
PVA
PVA
72
73
86
C930
0.1U_0402_16V4Z
2 2
C931
2
C932
2
C933
0.1U_0402_16V4Z
R1010
1K_0402_5% 3
10 87
2
PCI_AD10 AD9 PVA
9 AD10
PCI_AD11 8
PCI_AD12 AD11 0.1U_0402_16V4Z
7 AD12
PCI_AD13 4 61
PCI_AD14 AD13 GND
3 AD14 GND 65
PCI_AD15 2 66
PCI_AD16 AD15 GND
117 AD16 GND 79
PCI_AD17 116 80
PCI_AD18 AD17 GND
115 AD18 GND 56
PCI_AD19 114
PCI_AD20 AD19 4.7K_0402_5%
113 AD20
PCI_AD21 109 R1022
AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
107
106
103
102
101
AD22
AD23
AD24
AD25
IEEE 1394 EEPROM
I/F
EECS
EEDO
EEDI/SDA
EECK/SCL
26
27
28
29
1394SDA
1394SCL
1 2
reserve 4.7K for None EEprom

+3VS
PCI Bus
AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
98
97
96
95
94
AD27
AD28
AD29
AD30
VT6301S PM & Test
PME# 34
60 XCPS
1394_PME# 27,32,35,37,38,41,42
54.9_0402_1%
R1011
1
54.9_0402_1%
2
270P_0402_50V7K
1 2
C934
4.99K_0402_1%
AD31 XCPS R1006
1 2 C935 R1012
1 2 1 2
PCI_C_BE0# 12 63 1 2 47P_0402_25V8K
27,32,35,37,38 PCI_C_BE0# CBE0# XREXT
Differential Pairs
PCI_C_BE1# 1 R1013 JP26
27,32,35,37,38 PCI_C_BE1# CBE1#
PCI_C_BE2# 119 67 6.34K_0603_1% TPB0-
27,32,35,37,38 PCI_C_BE2# CBE2# TPB0M 1
PCI_C_BE3# 104 68 TPB0+
27,32,35,37,38 PCI_C_BE3# CBE3# TPB0P 2
69 TPA0-
PCI_AD16 R991 1 100_0402_5% 1394_IDSEL TPA0M TPA0+ 3
2 105 IDSEL TPA0P 70 4
2 PCI_FRAME# 54.9_0402_1% 2
27,32,35,37,38 PCI_FRAME# 120 FRAME# TPBIAS0 71
PCI _IRDY# 121 1 2 R1014
27,32,35,37,38 PCI_IRDY# IRDY# AMP_440168-2
PCI_TRDY# 123
27,32,35,37,38 PCI_TRDY# TRDY# 54.9_0402_1%
PCI_DEVSEL# 124 1 2 0.33U_0603_16V4Z
27,32,35,37,38 PCI_DEVSEL# DEVSEL#
PCI_STOP# 125
27,32,35,37,38 PCI_STOP# STOP# R1015
PCI_PERR# 127 1 2
27,32,35,37,38 PCI_PERR# PERR#
PCI_PAR 128
27,32,35,37,38 PCI_PAR PAR
PCI_REQ0# 93 C936
27 PCI_REQ0# REQ#
PCI_GNT0# 92 Note:
27 PCI_GNT0#
27 ICH_GPIO2_PIRQE# 88
89
GNT#
INTA# NC 55 2 1 These Components need to Close to chip pins.
27,32,37,38,43 PCI_RST#
17 CLK_PCI_1394 90
PCIRST#
OSC PHYRESET#
CARDEN
PCICLK
C937
0.1U_0402_16V4Z
I2CEN
1394
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
XO
XI
VT6301S-CD_LQFP128
41
42
45
48
49
50
37
51
52
53
54
40
39
35
74
75
76
77
78
64
81
82
83
84
85
43
44
57
58
24.576MHz_16P_3XG-24576-43E11 2 C938
1
Y4 10P_0402_50V8J
2
R1016
+3VS 1M_0402_5%
2
R1017 1 C939
2
4.7K_0402_5% 1 2 10P_0402_50V8J
1
1 1

Title
VIA1394A VT6301S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
EDL71 LA-2351
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 1B
A B C D E
5 4 3 2 1
LAN RTL8110SB(L)
PCI_AD[0..31]
27,32,34,37,38 PCI_AD[0..31]
U31 R527
PCI_AD0 104 108 LAN_EEDO 3.6K_0402_5%
PCI_AD1 AD0 EEDO LAN_EEDI
103 AD1 AUX/EEDI 109 1 2 +3VALW
PCI_AD2 102 111 LAN_EECLK
PCI_AD3 AD2 EESK LAN_EECS +3VALW
D 98 AD3 EECS 106 EN_WOL# = Low, D
PCI_AD4 97
PCI_AD5 96
AD4
117 ACTIVITY# System can wake on LAN
AD5 LED0 ACTIVITY#
PCI_AD6 95 AD6 LED1 115 LAN_LINK100# LAN_LINK100# ( keep Low when Power On)
1
PCI_AD7 93 114 LAN_LINK10# LAN_LINK10#
PCI_AD8 AD7 LED2 R528
90 AD8 NC/LED3 113
PCI_AD9 89 0_1206_5%
PCI_AD10 AD9 LAN_MDI0+
87 AD10 TXD+/MDI0+ 1 LAN_MIDI0+ 36
CLK_PCI_LOM PCI_AD11 86 2 LAN_MDI0-
LAN_MIDI0- 36 VGS(th) = -0.45V
2
PCI_AD12 AD11 TXD-/MDI0- LAN_MDI1+
85 5
AD12 RXIN+/MDI1+ LAN_MIDI1+ 36 IDmax = 2.3A
1
PCI_AD13 83 6 LAN_MDI1-
AD13 RXIN-/MDI1- LAN_MIDI1- 36
PCI_AD14 82
R529 PCI_AD15 AD14 LAN_MDI2+ +3V_LAN
79 AD15 NC/MDI2+ 14 LAN_MIDI2+ 36
@ 10_0402_5% PCI_AD16 59 15 LAN_MDI2-
AD16 NC/MDI2- LAN_MIDI2- 36
PCI_AD17 58 18 LAN_MDI3+
LAN_MIDI3+ 36
2
PCI_AD18 AD17 NC/MDI3+ LAN_MDI3- +3V_LAN

1 57 AD18 NC/MDI3- 19 LAN_MIDI3- 36
PCI_AD19 55 AD19 40mil
C606 PCI_AD20 53 121 LAN_X1
@ 18P_0402_50V8K PCI_AD21 AD20 X1 LAN_X2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
50 AD21 X2 122
2 PCI_AD22 SUSP#
49 AD22 SUSP# 39,41,44,46,47 1 1 1 1 1 1
PCI I/F
PCI_AD23 47 105 R530 1 @ 2 1K_0402_5%
PCI_AD24 43
AD23 LWAKE
23
10mil R531 1 @ 2 15K_0402_5%
+3VS
C607 C608 C609 C610 C611 C612
AD24 ISOLATE#
PCI_AD25 42 AD25 RTSET 127 GIGA@ 5.6K for 8100CL, 2 2 2 2 2 2
0.1U_0402_16V4Z
PCI_AD26 40 72 10mil R532 1 2 2.49K_0603_1%
PCI_AD27 39
AD26 NC/SMBCLK
74 R1063 1 2 5.6K_0603_1% 2.49K for 8110SBL 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD28 AD27 NC/SMBDATA
37 AD28 100@
PCI_AD29 36 88
PCI_AD30 AD29 NC/M66EN
34 AD30
PCI_AD31 33 10 R533 1 2 0_0402_5% +3V_LAN
AD31 NC/AVDDH
C
AVDDH 120 R534 1 2 0_0402_5% C
PCI_C_BE0# 92
27,32,34,37,38 PCI_C_BE0# C/BE#0
PCI_C_BE1# 77 11 1 2 GIGA@
27,32,34,37,38 PCI_C_BE1# C/BE#1 NC/HSDAC+
27,32,34,37,38 PCI_C_BE2#
PCI_C_BE2# 60 C/BE#2 NC/HG 123 R535 0_0402_5%
GIGA@ reserved for RTL8110S
PCI_C_BE3# 44 124
27,32,34,37,38 PCI_C_BE3# C/BE#3 NC/LG2 +3V_LAN
IDSEL: AD17 +3V_LAN 1 2
PCI_AD17 1 2 LAN_IDSEL 46 R536 0_0805_5%
IDSEL
R538 unpop when use 8100C(L) 60mil 40mil
LAN I/F
100_0402_1% 76
27,32,34,37,38 PCI_PAR PAR
3
61 9 2SB1188_SC62
27,32,34,37,38 PCI_FRAME# FRAME# NC/VSS
63 13 GIGA@
27,32,34,37,38 PCI_IRDY# IRDY# NC/VSS
67 CTRL25 1 CTRL18 1
27,32,34,37,38 PCI_TRDY# TRDY# 2SB1188_SC62
27,32,34,37,38 PCI_DEVSEL# 68 DEVSEL# Q27
27,32,34,37,38 PCI_STOP# 69 STOP# NC/GND 22 Icmax = 2A Icmax = 2A Q28
48 60mil 40mil
2
NC/GND
27,32,34,37,38 PCI_PERR# 70 PERR# NC/GND 62 +2.5V_LAN +1.2V_LAN
27,32,37,38 PCI_SERR# 75 SERR# NC/GND 73
NC/GND 112 1 1 1 1
30 118 C614
27 PCI_REQ3# REQ# NC/GND
29 C613+ GIGA@ C615+ C616
27 PCI_GNT3# GNT# 0.1U_0402_16V4Z 0.1U_0402_16V4Z
22U_A_4VM 2 22U_A_4VM 2
25 INTA#
27 ICH_GPIO2_PIRQF# CTRL25 2 2 GIGA@
CTRL25 8
27,32,34,37,38,41,42 LAN_PME# 31 PME#
CTRL12 125 CTRL18 unpop when use 8100C(L)
9,27,29,39,41,46 PLTRST# 27 RST#
VDD33 26 +3V_LAN
CLK_PCI_LOM 28 41
17 CLK_PCI_LOM CLK VDD33
PM_CLKRUN# 65 56
B 29,37,38,41 PM_CLKRUN# CLKRUN# VDD33 B
VDD33 71
VDD33 84
VDD33 94
VDD33 107
4 GND/VSS pop when use 8110SB(L)
LAN_X1 1 2 LAN_X2 17 GND/VSS
R1172 1M_0402_5% 128 GND/VSS 40mil GIGA@
@ 3 +LAN_AVDDL 1 2 +2.5V_LAN
AVDDL
1
7 R540 0_0805_5%
R1173 AVDDL R542 0_0402_5%
21 GND/VSSPST AVDDL 20 1 1 1 1 2 +3V_LAN
0_0402_5% 38 16 1 2 C617 C618 C619 R541 0_0805_5%
GND/VSSPST AVDDL R557 100@
51 GND/VSSPST
66 126 1 2 0_0805_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z reserved for 8100C(L)
2
Y2 GND/VSSPST VDD12 GIGA@ 2 0.1U_0402_16V4Z

2 2
81 GND/VSSPST VDD12 32
2 1 91 GND/VSSPST VDD12 54 unpop when use 8100C(L) 2.5V for RTL8100C(L)
101 78
GND/VSSPST VDD12 1.8V for RTL8110S
1 25MHZ_20P 1 119 GND/VSSPST VDD12 99 +LAN_DVDD +LAN_DVDD pop when use 8110SB(L)
+LAN_DVDD 1.2V for RTL8110SB(L)
C620 C621 40mil GIGA@
Power
27P_0402_50V8J 27P_0402_50V8J 35 24 R543 1 2 0_0402_5% 1 2

2 2 GND NC/VDD12 +LAN_DVDD +1.2V_LAN
52 GND NC/VDD12 45 R545 1 2 0_0402_5% R544 0_0805_5%
80 GND NC/VDD12 64 R546 1 2 0_0402_5% 1 1 1 1 1 1 1 1 2 +2.5V_LAN
100 GND NC/VDD12 110 R548 1 2 0_0402_5% C622 C623 C624 C625 C626 C627 C628 R547 0_0805_5%
NC/VDD12 116 R549 1 2 0_0402_5% reserved for 8100C(L) 100@
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z 2 2 2 2
0.1U_0402_16V4Z
2 reserved for 8100C(L)
R550 0_0805_5% 100@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z
NC 12 20mil 1 2 +LAN_DVDD
RTL8110SBL_LQFP128 1 2 +3V_LAN
A A
R556 0_0805_5% when use 8110SB(L)
+3V_LAN 1 1
U32 C629 GIGA@
LAN_EECS 1 8 C630
LAN_EECLK CS VCC 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 SK NC 7 1 2 2
LAN_EEDI
LAN_EEDO
3
4
DI
DO
NC
GND
6
5 C631 Compal Electronics, Inc.
0.1U_0402_16V4Z Title
2
AT93C46-10SI-2.7_SO8
LAN RTL8110SB(L)
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
Close to Chip side

D D
1 1
C632 C633 +2.5V_LAN
0.01U_0402_16V7K 0.01U_0402_16V7K
2 2
1
R551 24ST8515A-2 for RTL8100C(10/100)
0_0805_5%
24HST1041A-2 for RTL8110SB(GbE)
1
1
R553
49.9_0402_1%
2
R552 R554 R555
49.9_0402_1% 49.9_0402_1% 49.9_0402_1% GIGA@ T16
R597 0_0402_5%
2
1 2 1 TCT1 MCT1 24
35 LAN_MIDI0+ LAN_MDI0+ 2 23 RJ45_MDI0+
LAN_MDI0- TD1+ MX1+ RJ45_MDI0-
35 LAN_MIDI0- 3 TD1- MX1- 22
4 TCT2 MCT2 21
35 LAN_MIDI1+ LAN_MDI1+ 5 20 RJ45_MDI1+ J21
LAN_MDI1- TD2+ MX2+ RJ45_MDI1-
35 LAN_MIDI1- 6 TD2- MX2- 19
RJ45_MDI0+ 1
RJ45_MDI0- P1_1
7 TCT3 MCT3 18 2 P1_2
C
35 LAN_MIDI2+ LAN_MDI2+ 8 17 RJ45_MDI2+ RJ45_MDI1+ 3 C
LAN_MDI2- TD3+ MX3+ RJ45_MDI2- RJ45_MDI2+ P1_3
35 LAN_MIDI2- 9 TD3- MX3- 16 4 P1_4
RJ45_MDI2- 5
RJ45_MDI1- P1_5
10 TCT4 MCT4 15 6 P1_6
35 LAN_MIDI3+ LAN_MDI3+ 11 14 RJ45_MDI3+ RJ45_MDI3+ 7 12
LAN_MDI3- TD4+ MX4+ RJ45_MDI3- RJ45_MDI3- P1_7 SHLD_2
35 LAN_MIDI3- 12 TD4- MX4- 13 8 P1_8 SHLD_1 11
1
RJ45
R558 R559 R560 R561 MOD_RING 9
49.9_0402_1% 49.9_0402_1% 0.5u_24HST1041A-2 MOD_TIP P2_1
10 P2_2
49.9_0402_1% 49.9_0402_1% 0.01U_0402_16V7K GIGA@
1
1
GIGA@ 0.01U_0402_16V7K RJ11
2
GIGA@ GIGA@ GIGA@ GIGA@ TYCO_4-1470619-1

R568 R569
1 1 1 1 1 1 1 75_0402_1% 75_0402_1%
C636 C637 C638 C639 C977
2
2
C640 C641
0.01U_0402_16V7K 0.01U_0402_16V7K
2 2 2 2 2 2 2
RJ45_GND 1 2 LANGND
0.01U_0402_16V7K 0.01U_0402_16V7K 0.1U_0402_16V7K 1 1
GIGA@ GIGA@ 100@ C642
unpop MIDI2+- MIDI3+- termination 1000P_1206_2KV7K C643 C644
4.7U_0805_10V4Z
2 2
resistor when use RTL8100C When 8110SBL C636-639 pop 0.01u,
When use RTL8100C C977 pop 0.1U
Close to Chip side 0.1U_0402_16V4Z
B B
This area do not connect to power plan

L22 CHB1608U301_0603 JP23
include Vcc and GND in any layer MOD_RING 1 2 1
MOD_TIP 1 2 2
1
1
L26 CHB1608U301_0603 EDL71_MDC

R562 R563
75_0402_1% 75_0402_1%
2
2
RJ45_GND
A A

Title
LAN Magnetic & RJ45/RJ11
EDL71 LA-2351
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 1B
5 4 3 2 1
5 4 3 2 1
D19
+3VS
41 WL_ON 1 2
JP27 +3VS
CH751H-40_SC76
1 1 2 2
W=40mils
3
mPCI 4
W=40mils 3 4
5 5 6 6
7 7 8 8
D 9 9 10 10 D
11 12 LED_WLAN24 1 2
11 12 LED_WLAN5 R623
13 13 14 14 1 2 100K_0402_5%
15 16 R624 100K_0402_5%
ICH_GPIO2_PIRQH# 15 16 W=30mils
27,38 ICH_GPIO2_PIRQH# 17 17 18 18 +5VS
19 20 ICH_GPIO2_PIRQG# ICH_GPIO2_PIRQG# 27,38
19 20
21 21 22 22
23 24 W=40mils
23 24 +3V
CLK_PCI_MINI 25 26 PCI_RST# PCI_RST# 27,32,34,38,43
17 CLK_PCI_MINI 25 26
27 27 28 28 2 2
PCI_REQ1# 29 30 PCI_GNT1# PCI_GNT1# 27 C700 C701
27 PCI_REQ1# 29 30
31 32 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD31 31 32 MINI_PME#
33 33 34 34 MINI_PME# 27,32,34,35,38,41,42
PCI_AD29 1 1
35 35 36 36
37 38 PCI_AD30
PCI_AD27 37 38
39 39 40 40
PCI_AD25 41 42 PCI_AD28
41 42 PCI_AD26
43 43 44 44
27,32,34,35,38 PCI_C_BE3# PCI_C_BE3# 45 46 PCI_AD24
PCI_AD23 45 46 MINIDSEL_1 PCI_AD18
47 47 48 48 1 2
49 49 50 50
PCI_AD21 51 52 PCI_AD22 R628
PCI_AD19 51 52 PCI_AD20 100_0402_5%
53 53 54 54
55 56 PCI_PAR PCI_PAR 27,32,34,35,38
57 57 58 58
P CI_IRDY# 59 60
27,32,34,35,38 PCI_IRDY# 61 61 62 62
63 64 PCI_FRAME# PCI_FRAME# 27,32,34,35,38
PM_CLKRUN# 63 64 PCI_TRDY#
29,35,38,41 PM_CLKRUN# 65 65 66 66 PCI_TRDY# 27,32,34,35,38
C
27,32,35,38 PCI_SERR# PCI_SERR# 67 68 PCI_STOP# PCI_STOP# 27,32,34,35,38 C
67 68
69 69 70 70
27,32,34,35,38 PCI_PERR# PCI_PERR# 71 72 PCI_DEVSEL# PCI_DEVSEL# 27,32,34,35,38
71 72
Place closely pin 25 27,32,34,35,38 PCI_C_BE1# PCI_C_BE1# 73 73 74 74
75 76 PCI_AD13
77 77 78 78
CLK_PCI_MINI PCI_AD12 79 80 PCI_AD11
PCI_AD10 79 80
81 81 82 82
2
83 84 PCI_AD9
PCI_AD8 83 84 PCI_C_BE0#
R629 85 86 PCI_C_BE0# 27,32,34,35,38
PCI_AD7 85 86
10_0402_5% 87 88
87 88 PCI_AD6
@ 89 89 90 90
91 92
1
2 93 94 PCI_AD2
95 95 96 96
C702 +5VS 97 98
4.7P_0402_50V8C PCI_AD1 97 98
W=30mils 99 99 100 100
1 @ 101 102
101 102
103 103 104 104
105 105 106 106
107 107 108 108
109 109 110 110
111 111 112 112
113 113 114 114
115 115 116 116
117 118 R630
117 118 10K_0402_5%
119 119 120 120
121 121 122 122 1 2 +3V
123 123 124 124 +3V
B B
W=40mils
125 GND GND 126
2
SUPER_AKE-1201-060
27,32,34,35,38 PCI_AD[0..31]
C703 Power source
PCI_AD0 0.1U_0402_16V4Z
PCI_AD1 1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10 +3VS
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14 2 2 2 2 2 2 2 2 2
PCI_AD15 C704 C705 C706 C707 C708 C709 C710 C711 C712
PCI_AD16
PCI_AD17 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z
PCI_AD18 1 1 1 1 1 1 1 1 1
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
A A
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30 Compal Electronics, Inc.
PCI_AD31 Title
MINIPCI
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
+3VS
LAN RESERVED LAN RESERVED
W=40mils JP37 +3VS
1 1 2 2
W=40mils
KEY KEY
3 3 4 4
5 5 6 6
7 7 8 8
9 9 10 10
D 11 11 12 12 D
13 13 14 14
15 15 16 16 W=30mils
ICH_GPIO2_PIRQG# 17 18
27,37 ICH_GPIO2_PIRQG# 17 18 +5VS
19 20 ICH_GPIO2_PIRQH# ICH_GPIO2_PIRQH# 27,37
S_Y IN 19 20 S_CIN
21 21 22 22
23 24 W=40mils
23 24 +3V
CLK_PCI_MINI1 25 26 PCI_RST# PCI_RST# 27,32,34,37,43
17 CLK_PCI_MINI1 25 26
27 27 28 28 2 2
PCI_REQ4# 29 30 PCI_GNT4# PCI_GNT4# 27 C959 C960
27 PCI_REQ4# 29 30
31 32 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD31 31 32 MINI_PME# TV@ TV@
33 33 34 34 MINI_PME# 27,32,34,35,37,41,42
PCI_AD29 1 1
35 35 36 36
37 38 PCI_AD30
PCI_AD27 37 38
39 39 40 40
41 42 PCI_AD26
43 43 44 44
PCI_AD23 45 46 MINIDSEL PCI_AD19
47 47 48 48 1 2
49 49 50 50
PCI_AD21 51 52 PCI_AD22 R1042 TV@
PCI_AD19 51 52 PCI_AD20 100_0402_5%
53 53 54 54
55 56 PCI_PAR PCI_PAR 27,32,34,35,37
57 57 58 58
P CI_IRDY# 59 60
27,32,34,35,37 PCI_IRDY# 61 61 62 62
63 64 PCI_FRAME# PCI_FRAME# 27,32,34,35,37
PM_CLKRUN# 63 64 PCI_TRDY#
29,35,37,41 PM_CLKRUN# 65 65 66 66 PCI_TRDY# 27,32,34,35,37
27,32,35,37 PCI_SERR# PCI_SERR# 67 68 PCI_STOP# PCI_STOP# 27,32,34,35,37
C
67 68 C
69 69 70 70
27,32,34,35,37 PCI_PERR# PCI_PERR# 71 72 PCI_DEVSEL# PCI_DEVSEL# 27,32,34,35,37
PCI_C_BE1# 71 72
27,32,34,35,37 PCI_C_BE1# 73 73 74 74
75 76 PCI_AD13
77 77 78 78
PCI_AD12 79 80 PCI_AD11 RF
PCI_AD10 79 80
81 81 82 82
83 84 PCI_AD9
PCI_AD8 83 84 PCI_C_BE0#
85 85 86 86 PCI_C_BE0# 27,32,34,35,37
PCI_AD7 87 88 JP38
87 88 PCI_AD6
89 89 90 90 1
CVBS_IN 91 92 PCI_AD2 2
93 93 94 94 3
95 96 TV_AUDIO_R ANIMA_FR-003-000-A
+5VS 97 97 98 98 TV_AUDIO_R 44
W=30mils PCI_AD1 99 100 TV_AUDIO_L TV_AUDIO_L 44 TV@
99 100
101 101 102 102
103 103 104 104 TO Codec
105 105 106 106
107 107 108 108
109 109 110 110 AV IN
111 112 AUDIO_INR
111 112
113 113 114 114
115 116 JP39
115 116 R1044
117 117 118 118 1
119 120 10K_0402_5% AUDIO_INR TV@ L87 0_0402_5% 1 2
AUDIO_INL 119 120 TV@ 2 2
121 121 122 122 1 +3V 3
123 124 S_Y IN TV@ L88 0_0402_5% 1 2
123 124 +3V 4
AUDIO_INL TV@ L89 0_0402_5% 1 2
B W=40mils 5 B
AMP_1318644-1 S_CIN TV@ L90 0_0402_5% 1 2
CVBS_IN TV@ L91 0_0402_5% 1 6
TV@ 2 2 7
27,32,34,35,37 PCI_AD[0..31] W=12mils space 12mil
C962 SUYIN_33007SR-07T1-C
PCI_AD0 0.1U_0402_16V4Z TV@
PCI_AD1 1 TV@
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7 Power source
PCI_AD8
PCI_AD9
PCI_AD10 +3VS
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14 2 2 2 2 2 2 2 2 2
PCI_AD15 C963 C964 C965 C966 C967 C968 C969 C970 C971
PCI_AD16 TV@ TV@ TV@ TV@ TV@ TV@ TV@ TV@ TV@
PCI_AD17 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z 0.047U_0402_16V4Z
PCI_AD18 1 1 1 1 1 1 1 1 1
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
A A
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30 Compal Electronics, Inc.
PCI_AD31 Title
MINIPCI
EDL71 LA-2351 1B
5 4 3 2 1
5 4 3 2 1
MDC Conn. Express Card Conn.

JP17
1 2 @ JP40
MONO_OUT/PC_BEEP AUDIO_PWDN
3 GND MONO_PHONE 4 MD_SPK 44
5 6 @ 1
AUXA_RIGHT Bluetooth Enable USBP1- R1099 GND
D 7 AUXA_LEFT GND 8 29 USBP1- 1 2 0_0402_5%
USBP1-_EXP 2 USB_D- D
9 10 +5VS_MDC 1 2 R518 29 USBP1+ USBP1+ R1100 1 2 0_0402_5%
USBP1+_EXP 3
CD_GND +5V @ CHB1608B121_0603 +5VS CP_USB# USB_D+
11 CD_RIGHT USB Data+ 12 4 CPUSB#
13 14 @ 5
R520 CD_LEFT USB Data- R519 RSV
15 GND PRIMARY DN 16 1 2 +3VS 6 RSV
0_0603_5% 1 2 17 18 10K_0402_5% 7
+3V 3.3Vaux 5Vd RSV
19 GND GND 20 17,29 ICH_SMBCLK 8 SMB_CLK
R521 1 @ 2 +3VS_MDC 21 22 9
+3VS 3.3Vmain AC97_SYNC ICH_SYNC_MDC 28 17,29 ICH_SMBDATA SMB_DATA
CHB1608B121_0603 23 24 R522 2 1 22_0402_5% ICH_AC_SDIN1 28 +1.5VS_CARD 10
28 ICH_SDOUT_MDC AC97_SDATA_OUT AC97_SDATA_IN1 +1.5V
25 26 R523 2 1 22_0402_5% 29,41 ICH_PCIE_WAKE# ICH_PCIE_WAKE# 11
28 ICH_RST_MDC# AC97_RESET# AC97_SDATA_IN0 WAKE#
27 GND GND 28 +3VALW_CARD 12 +3.3VAUX
29 30 R524 1 2 22_0402_5% PERST# 13
AC97_MSTRCLK AC97_BITCLK ICH_AC_BITCLK 28,44 PERST#
+3VS_CARD 14 +3.3V
2
15 +3.3V
1
ACES_88021-3000 R525 16
@ 10_0402_5% R526 CP_PE# CLKREQ#
17 CPPE#
@ 18
17 CLK_PCIE_CARD# REFCLK-
10K_0402_5% 19
17 CLK_PCIE_CARD
1
REFCLK+
1 20
2
+3VS_MDC +5VS_MDC +3V PCIE_TXN0 GND
29 PCIE_TXN0 21 PERn0
C602 PCIE_TXP0 22
29 PCIE_TXP0 PERp0
@ 22P_0402_25V8K 23
2 PCIE_RXN0 GND
1 1 1 29 PCIE_RXN0 24 PETn0
C603 C604 C605 PCIE_RXP0 25
29 PCIE_RXP0 PETp0
@ @ 26
1U_0603_10V4Z 1U_0603_10V4Z 1U_0603_10V4Z GND
2 2 2
FOX_331-1CX41201-X1_1
C C
@ U68
+3VS 5 3.3Vin1 3.3Vout1 7 +3VS_CARD 40mil

6 3.3Vin2 3.3Vout2 8
+3VALW
Near to Express Card slot. +3VALW 21 3.3Vaux_in Aux_out 20 +3VALW_CARD 40mil
+1.5VS +3VS +3VALW

+1.5VS 18 1.5Vin1 1.5Vout1 16 +1.5VS_CARD 40mil
19 1.5Vin2 1.5Vout2 17
1
R1103 R1104 1 1 1 @
100K_0402_5% 100K_0402_5% C1069 @ C1065 @ @ +3VALW R1137 2 1 100K_0402_5% CP_USB# 14
C1064 R1138 1 @ CPUSB#
2 100K_0402_5% CP_PE# 15 CPPE# OC# 23 USB_OC1# 29
@ @ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4
2 2 2 35,41,44,46,47 SUSP# STBY#
41,47,52 SYSON 3 22 PCIECARD_CLKEN 17,41
2
PLTRST# SHDN RCLKEN PERST#

2 SYSRST# PERST# 9
CP_PE#
GND
NC1
NC2
NC3
NC4
NC5
CP_USB#
B +3VALW TPS2231PWPR_PWP24 B
11
1
10
12
13
24
14
U65D
12
P
A
O 11
13 B
G
SN74LVC08APW_TSSOP14 C1091 +3VALW

7
@ 0.1U_0402_16V4Z @
1 2
+3VALW
J25
14
U65A
14
1 PLTRST# U65B
1
P
+5VALW 2 9,27,29,35,41,46 PLTRST# A
RCIRRX 3 NC_PERST# 4
P
41 RCIRRX 3 O A
29 EXPRESSCARD_RST# EXPRESSCARD_RST# 2 6 1 2 PERST#
B O
G
ACES_85205-0300 5 R1109 @ 0_0402_5%
B
G
TV@ SN74LVC08APW_TSSOP14
7
@ SN74LVC08APW_TSSOP14
7
+3VALW @
14
U65C 29,41 ICH_PWRGD

9
P
A
O 8
10 B
G
SN74LVC08APW_TSSOP14
7
A A
@

Title
MDC Express Card Conn.
EDL71 LA-2351 1B

5 4 3 2 1
5 4 3 2 1
USB PORT# DESTINATION

+USBP3_PWR USBP3_VCC JP12
+USBP0_PWR USBP0_VCC
1
150U_4A_10VM
USBP0-
29 USBP0- 2
0 JUSB1(JP12)
470P_0402_50V7K
150U_4A_10VM
1 JP11 @ 29 USBP0+ USBP0+
3
470P_0402_50V7K
1 1 VBUS S_GND 5 1 4
C903 + C589 USBP3- 2 1
29 USBP3- D- +
1 Express Card
C904
29 USBP3+ USBP3+ 3 C591 SUYIN_020167MR004S511ZU
@ D+
@ 4 6
2 2 GND S_GND
D
USBP3_GND
TYCO_3-1470859-1 2 2
2 JUSB2(JP11) D
USBP0_GND 3 Reserve
4 JUSB3(JP13UP)
+USBP46_PWR USBP4_VCC
5 Reserve
150U_4A_10VM
D38
470P_0402_50V7K
1 1 3 USBP0+
GND IO2
1
+ +5VALW
6 JUSB3(JP13LOW)
C593
C594 JP13
1 USBP0- 2 4
USBP4- A_VCC IO1 VIN
2
2 2
USBP4_GND
29
29
USBP4-
USBP4+ USBP4+ 3
4
A_D-
A_D+
SR05_SOT143
@
7 Reserve
A_GND
5 B_VCC
29 USBP6- USBP6- 6
USBP6_VCC USBP6+ B_D- D39
+USBP46_PWR 29 USBP6+ 7 B_D+
8 1 3 USBP3-
B_GND GND IO2 +5VALW
9 G1
10 USBP3+ 2 4
G2 IO1 VIN
11 G3 SR05_SOT143 +USBP3_PWR +3VALW
12 G4
@
SUYIN_020122MR008S548ZL
C USBP6_GND C
2
+5VALW
R1204
U70 U30 10K_0402_5%
USBP4+ 1 6 USBP4- 1 8 @
AS SDA GND OUT
2 7
1
IN OUT @
2 GND ALERT 5 +5VALW 3 IN OUT 6
1 4 EN# FLG 5 1 2 1 2 USB_OC3# 29
USBP6- 3 4 USBP6+ R1201 1 R1162 0_0402_5%
VDD SCL @ C495 @ G528_SO8 @ 10K_0402_5%
0.1U_0402_16V4Z C1134 @
AD7414ART-0_SOT23-6~D 2
0.1U_0402_16V4Z
SYSON# 2
@
+5VALW
USB Over Current
+USBP46_PWR +3VALW
2
R1205
U66 10K_0402_5%
1 GND OUT 8 1 2 USB_OC4# 29
2 7 R1111 0_0402_5%
1
IN OUT +3VALW
1 3 IN OUT 6
B +USBP0_PWR B
4 EN# FLG 5 1 2 1 2 USB_OC6# 29
C954 R1202 R1163 0_0402_5%
0.1U_0402_16V4Z G528_SO8 10K_0402_5% 1
2
2 +5VALW
C1135 R1206
SYSON# 0.1U_0402_16V4Z U61 10K_0402_5%
SYSON# 47 2
1 GND OUT 8
2 7
1
IN OUT
3 IN OUT 6
1 4 EN# FLG 5 1 2 1 2 USB_OC0# 29
R1203 1 R1164 0_0402_5%
C957 G528_SO8 10K_0402_5%
Note: 0.1U_0402_16V4Z C1136
2
0.1U_0402_16V4Z
SYSON# 2
USB_AS=USB_BS=Trace width=40mils
A A

Title
USB 2.0 Port
EDL71 LA-2351 1B

5 4 3 2 1
A B C D E
L66 +3VALW
1 2 +EC_AVCC
+3VALW +EC_AVCC
CHB1608U800_0603 2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K 0_0402_5%1 2 R792 +RTCVCC
C714 1 1 1 1 1 @
C713
0.1U_0402_16V4Z ECAGND For KB910 Rev:B4
1000P_0402_50V7K C715 C716 C717 C718 C719 0_0402_5%1 2 R793
1 ECAGND 2 +3VALW
1 2 ECAGND 2 1
L67 CHB1608U800_0603 2 2 2 2 2 C720
0.1U_0402_16V4Z 1000P_0402_50V7K 1U_0603_10V4Z
123
136
157
166
122
167
137
161
159
C721
16
34
45
17
35
46
95
96
28,43 LPC_LAD[0..3]
U39 1 2 ECAGND
0.01U_0402_16V7K
VCCA
AGND
BATGND
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
GND1
GND2
GND3
GND4
GND6
GND7
VCCBAT
29,32,43 SIRQ 7 SERIRQ AD0/GPIAD0 81 BATT_TEMP 48
1 AD_BID0 D40 1
28,43 LPC_LFRAME# 9 LFRAME# AD1/GPIAD1 82
LPC_LAD0 15 83 BATT_OVP 49 1 3 INVT_PWM
LPC_LAD1 LAD0/FWH0 PWR/GND AD2/GPIAD2 GND IO2
14 LAD1/FWH1 AD3/GPIAD3 84
LPC_LAD2 13 87 +5VALW
LPC_LAD3 LAD2/FWH2 AD4/GPIAD4
AD Input or GPI AD_SKU_ID
10 LAD3/FWH3 AD5/GPIAD5 88 2 IO1 VIN 4
R633 18 89 EMAIL# EMAIL# 43
17,43 CLK_PCI_EC LCLK Host interface AD6/GPIAD6
1 2 EC_RST# 19 90 INTERNET# INTERNET# 43 SR05_SOT143
+3VALW ECRST# AD7/GPIAD7
EC_SCI# 1 R634 2 31
29 EC_SCI# ECSCI#
47K_0402_5% @ 0_0402_5% 99
DA0/GPODA0 DAC_BRIG 24
2 EC_A20GATE 5 100
28 EC_A20GATE GPIO02/GA20 DA1/GPODA1
C723 EC_RCIN# 6 101
28 EC_RCIN# KSI[0..7] GPIO03/KBRST# DA2/GPODA2 IREF 49
0.1U_0402_16V4Z 43 KSI[0..7] 102 EN_FAN1 8
KSI0 71 DA output or GPO DA3/GPODA3 1
1 KSI0/GPIK0 DA4/GPODA4 ICH_PWRGD 29,39
KSI1 72 42
KSO[0..15] KSI2 KSI1/GPIK1 DA5/GPODA5 VOL_AMP
43 KSO[0..15] 73 KSI2/GPIK2 DA6/GPODA6 47 VOL_AMP 45
KSI3 74 174
KSI4 KSI3/GPIK3 DA7/GPODA7 +3VALW
77 KSI4/GPIK4
CLK_PCI_EC KSI5 78 32 INVT_PWM
KSI5/GPIK5 PWM0/GPOW0 INVT_PWM 24
KSI6 79 33
KSI6/GPIK6 PWM1/GPOW1 BEEP# 45
1
KSI7 80 37 KBA0 R635 1 2 10K_0402_5%

KSI7/GPIK7 PWM PWM3/GPOW3 ACOFF 49
R636 38 @
or GPOW PWM4/GPOW4 PM_BATLOW# 29
KSO0 49 39 KBA1 R637 1 2 10K_0402_5%
KSO0/GPOK0 PWM5/GPOW5 EC_ON 43
10_0402_5% KSO1 50 40 @
KSO1/GPOK1 PWM6/GPOW6 EC_LID_OUT# 29
@ KSO2 51 KBA2 R638 1 2 10K_0402_5%
2
KSO3 KSO2/GPOK2 Key matrix scan

1 52 KSO3/GPOK3 PWM2/GPOW2/FAN1PWM 36 @
C725 KSO4 53 43 KBA3 R639 1 2 10K_0402_5%
KSO5 KSO4/GPOK4 PWM7/GPOW7/FAN2PWM TEST_TP
56 KSO5/GPOK5 11 @
15P_0402_50V8D KSO6 57 FAN/PWM GPIO05/FAN3PWM/TEST_TP 171 KBA4 R640 1 2 10K_0402_5%
2 KSO6/GPOK6 FANFB1/TOUT1/GPIO2E FANSPEED1 8
@ KSO7 58 176 @
KSO8 KSO7/GPOK7 GPWU7/TIN2/FANFB2 DPLL_TP KBA5 R641 1
59 KSO8/GPOK8 GPIO06/FANFB3/DPLL_TP 12 2 10K_0402_5%
KSO9 60
KSO10 61 KSO9/GPOK9 EC_SMC_1
KSO10/GPOK10 SCL1 163 EC_SMC_1 26,42,48
2 KSO11 64 EC_SMD_1 2
KSO11/GPOK11 SDA1 164 EC_SMD_1 26,42,48
KSO12 65 SM BUS 169 EC_SMC_2
+5VS KSO12/GPOK12 SCL2 EC_SMC_2 8
KSO13 66 170 EC_SMD_2 EC_SMD_2 8
RP31 KSO14 67 KSO13/GPOK13 SDA2
KBD_DATA KSO15 68 KSO14/GPOK14 EC_TINIT#
1 8 KSO15/GPOK15 GPIO20/E51CS#/ISPEN_TP 105
KBD_CLK 2 7 KSO16 153 106 EC_TCK
PS2_DATA KSO17 KSO16/GPOK16 GPIO21/E51RXD/ISPCLK EC_TDO
3 6 43 KSO17 154 KSO17/GPOK17 GPIO22/E51TXD/ISPDAT 107
PS2_CLK 4 5 108 EC_TDI TEST_TP 1 2
KBD_CLK A20/GPIO23 EC_TMS R517 10K_0402_5%
KBD_CLK 110 PSCLK1 GPIO24 109
10K_0804_8P4R_5% KBD_DATA 111 118 LID_SW# DPLL_TP 1 2
KBD_DATA PSDAT1 GPIO25 LID_SW# 43
PS2_CLK 114 119 R583 10K_0402_5%
PS2_CLK PSCLK2 PS2 interface GPIO2 GPIO26 PCMRST# 46
TP_DATA 1 2 R1150 PS2_DATA 115 148
PS2_DATA PSDAT2 GPIO27 SYSON 39,47,52
10K_0402_5% TP_CLK 116 149
43 TP_CLK PSCLK3 GPIO28 SUSP# 35,39,44,46,47
TP_DATA 117 155
43 TP_DATA PSDAT3 GPIO29 VR_ON 55
TP_CLK 1 2 R1151 156
GPIO2A MODE# 43
10K_0402_5% CRY1 C RY1 158 162 EC_USCLK
C RY2 XCLKI GPIO2B PLTRST#
CRY2 160 XCLKO LRST#/GPIO2C 165 PLTRST# 9,27,29,35,39,46
GPIO2D 168 EC_PWRBTN# 29
+3VALW 3 175 EC_THERM# PLTRST# 1 2 R596
29 EC_RSMRST# GPIO00/E51IT0 TOUT2/GPIO2F EC_THRM# 29
RP33 4 100K_0402_5%
44,46 CD_PLAY GPIO01/E51IT1
FSEL# 1 8 8 2
GPIO04 GPWU or GPI GPWU0 ON/OFF# 43
SELIO# 2 7 EC_SCI# 20 26
GPIO07 GPWU1 ACIN 29,48,51
FR D# 3 6 21 29 RCIRRX RCIRRX 39
44,46 EC_IDERST GPIO08 GPWU2
EC_TINIT# 4 5 22 30 EC_SLP_S3#
45 EC_MUTEO GPIO09 GPWU3 EC_SLP_S3# 29
EC_SLP_S4# 23 44 EC_SLP_S5#
29 EC_SLP_S4# NUMLOCK#/GPIO0A GPIO0 GPWU4 EC_SLP_S5# 29 +5VALW
10K_0804_8P4R_5% 24 76 KILL_SW# 43
43 IOMP_LED# GPIO0B GPWU5
25 172 PME_EC#
29,35,37,38 PM_CLKRUN# CLKRUN#/GPIO0C GPWU6/TIN1 PME_EC# 27,32,34,35,37,38,42
+3VALW 11,18,24 BACKLITE_ON BACKLITE_ON 27 JP28
RP34 GPIO0D PWR_LED#
24 BKOFF# 28 GPIO0E GPIO18/XIO8CS# 85 PWR_LED# 43 1
EC_SMD_1 1 8 41 86 BATT_LOW_LED# EC_TINIT#
43 SCROLLED# SCROLLLOCK#/GPIO0F GPIO19/XIO9CS# BATT_LOW_LED# 43 2
EC_SMC_1 2 7 91 MP3_LED# EC_TCK
GPIO1A/XIOACS# MP3_LED# 43 3
LID_SW# 3 6 48 92 CDON_LED# EC_TDO
3 49 FSTCHG GPIO10 GPIO1B/XIOBCS# CDON_LED# 43 4 3
KILL_SW# 4 5 54 93 BATT_FULL_LED# EC_TDI
43 CAPSLED# CAPLOCK#/GPIO11 GPIO1C/XIOCCS# BATT_FULL_LED# 43 5
55 94 EC_TMS
43 NUMLED# FNLOCK#/GPIO12 GPIO1D/XIODCS# EAPD 44,45 6
10K_0804_8P4R_5% EC_SMI# 62 97
29 EC_SMI# GPIO13 GPIO1 GPIO1E/XIOECS# WL_LED# 43 7
63 98 1 2 KSO16
25 MSEN# PCIECARD_CLKEN 17,39
A5/EMWB_TP
GPIO14 GPIO1F/XIOFCS# 8
A4/DMRP_TP
69 BIOS I/F 0_0402_5% @ R1174 KSO17

A1/XIOP_TP
37 WL_ON GPIO15 9
ICH_PCIE_WAKE#2 @ 1 70 EC_USCLK
MEMCS#
29,39 ICH_PCIE_WAKE# GPIO16 10
5 PROCHOT# R1193 0_0402_5% 75 GPIO17
IOCS#
+3VALW @ ACES_85201-1005
WR#
RD#
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
D0
D1
D2
D3
D4
D5
D6
D7
A0
A2
A3
A6
A7
A8
A9
EMAIL# 1 2 R297
100K_0402_5% KB910_LQFP176
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
138
139
140
141
144
145
146
147
150
151
152
173
INTERNET# 1 2 R299
100K_0402_5%
MODE# 1 2 R11
10K_0402_5%
+3VALW +3VALW
1
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
C RY1 R646 R1052

FSEL# 42
SELIO#
SELIO# Ra 100K_0402_5%
Ra 100K_0402_5%
FWR# 42
1 2 C RY2
FRD# 42
2
R650 @ 20M_0603_5% AD_BID0 AD_SKU_ID
ADB[0..7] 1 1
ADB[0..7] 42
1
2 1
1 R651 0_0603_5% KBA[0..19] R647 C726 R1053 C972
KBA[0..19] 42 0.1U_0402_16V4Z 0.1U_0402_16V4Z
C727
1 Rb 200K_0402_5%2
Rb 8.2K_0402_5%2
10P_0402_50V8J C728 @
2
1
4 2 10P_0402_50V8J 4
Y3 2
IN
OUT
32.768KHZ_12.5PF_6H03200468
NC
NC

2
Title
KBD EC CTRL-ENE KB910
EDL71 LA-2351 1B
A B C D E
ADB[0..7]
41 ADB[0..7]
KBA[0..19]
41 KBA[0..19]
+3VALW
U40
KBA18 1 32 2
KBA16 A18 VDD FWE# C730
2 A16 WE# 31
KBA15 3 30 KBA17
KBA12 A15 A17 KBA14 0.1U_0402_16V4Z
4 A12 A14 29
KBA7 KBA13 1
5 A7 A13 28
KBA6 6 27 KBA8
KBA5 A6 A8 KBA9
7 A5 A9 26
KBA4 8 25 KBA11 +3VALW
KBA3 A4 A11 FR D#
9 A3 OE# 24 FRD# 41
KBA2 10 23 KBA10
A2 A10
1
KBA1 11 22 FSEL# FSEL# 41
KBA0 A1 CE# ADB7 R652
12 A0 DQ7 21
ADB0 13 20 ADB6 10K_0402_5%
ADB1 DQ0 DQ6 ADB5
14 DQ1 DQ5 19
ADB2 15 18 ADB4 27,32,34,35,37,38,41 1394_PME#
2
DQ2 DQ4 ADB3 +3VALW +5VS
16 VSS DQ3 17
27,32,34,35,37,38,41 PCM_PME# PME_EC# 27,32,34,35,37,38,41
SST39VF040-70-4C-NH_PLCC32 +3VALW
27,32,34,35,37,38,41 MINI_PME#
1
R653 R654
27,32,34,35,37,38,41 LAN_PME#
100K_0402_5% 100K_0402_5%
27,32,34,35,37,38,41 ICH_PME#
2
2
C733
0.1U_0402_16V4Z
U41
2
1
G
5
TC7SH32FU_SSOP5
2 1 3
P
I0 EC_FLASH# 29
FWE# 4
S
O Q29 2N7002_SOT23
1
1MB Flash ROM I1
3G
FWR# 41
+3VALW
U67
KBA0 21 31
KBA1 A0 VCC0
20 A1 VCC1 30 1
KBA2 19 C1098
KBA3 A2 @
18 A3
KBA4 17 25 ADB0 0.1U_0402_16V4Z
KBA5 A4 D0 ADB1 2
16 A5 D1 26
KBA6 15 27 ADB2
KBA7 A6 D2 ADB3
14 A7 D3 28
KBA8 8 32 ADB4
KBA9 A8 D4 ADB5
7 A9 D5 33
KBA10 36 34 ADB6
KBA11 A10 D6 ADB7
6 A11 D7 35
KBA12 5
KBA13 A12 +3VALW +3VALW
4 A13
KBA14 3 10 1 2 +3VALW
KBA15 A14 RP# R1130
2 A15 NC 11
1
KBA16 1 12 100K_0402_5% 1
KBA17 A16 READY/BUSY# @ R657
40 A17 NC0 29
KBA18 13 38 C731 100K_0402_5%
KBA19 A18 NC1 0.1U_0402_16V4Z
37 A19 2 U43
2
FSEL# 22 8 1
FR D# CE# VCC A0
24 OE# GND0 23 7 WP A1 2
FWE# 9 39 26,41,48 EC_SMC_1 6 3
WE# GND1 SCL A2
26,41,48 EC_SMD_1 5 SDA GND 4
1
1
@ SST39VF080-70_TSOP40 AT24C16AN-10SI-2.7_SO8 R659
R660 100K_0402_5%
100K_0402_5%
2
2
Title
BIOS & EC I/O Port
EDL71 LA-2351 1B
5 4 3 2 1
INT_KBD CONN.
KSI[0..7]
KSI[0..7] 41
LID Switch
KSO[0..15]
KSO[0..15] 41
KSI0 C1102 100P_0402_50V8K
KSO1 C1103 100P_0402_50V8K
JP29 KSO5 C1104 100P_0402_50V8K Power BTN

KSI1 1 25 KSI1 ESE11MV9_4P R661 1 2 100K_0402_5% +3VALW
KSI7 25 KSI7 KSI3 C1105 100P_0402_50V8K LID_SW# D21
2 26 26 41 LID_SW# 2 1
D KSI6 KSI6 ON/OFF# ON/OFF# 41 D
3 27 27 3
KSO9 4 28 KSO9 KSO8 C1106 100P_0402_50V8K ON/OFFBTN# 1
KSI4 28 KSI4 51ON#
5 29 29 2 51ON# 50
KSI5 6 30 KSI5 KSO7 C1107 100P_0402_50V8K
KSO0 30 KSO0 DAN202U_SC70
7 31 31 4 3 (51ON#)
1
KSI2 8 32 KSI2 KSO4 C1108 100P_0402_50V8K SW1
KSI3 32 KSI3 Q30
9 33 33
KSO5 10 34 KSO5 KSO2 C1109 100P_0402_50V8K +3VALW DTC124EK_SC59
34
1
KSO1 KSO1 D30
11 35 35 1
KSI0 12 36 KSI0 KSO9 C1110 100P_0402_50V8K 3 INTERNET# 2 C732 D22
36 INTERNET# 41
1
KSO2 13 37 KSO2 INTERNET_BTN# 1
KSO4 37 KSO4 KSI6 C1111 100P_0402_50V8K 51ON# R662 RLZ20A_LL34
14 38 38 2
KSO7 KSO7 2
15 39
2
KSO8 39 KSO8 KSI7 C1112 100P_0402_50V8K DAN202U_SC70 100K_0402_5%
16 40
3
KSO6 40 KSO6
17 41
2
KSO3 41 KSO3 KSI1 C1113 100P_0402_50V8K D31 EC_ON
18 42 42 41 EC_ON 1 2
KSO12 19 43 KSO12 3 EMAIL# R663 0_0402_5% 1000P_0402_50V7K
43 EMAIL# 41
KSO13 20 44 KSO13 KSI2 C1114 100P_0402_50V8K EMAIL_BTN# 1
KSO14 44 KSO14 51ON#
21 45 45 2
KSO11 22 46 KSO11 KSO0 C1115 100P_0402_50V8K WHEN R=0,Vbe=1.35V
KSO10 46 KSO10 DAN202U_SC70 WHEN R=33K,Vbe=0.8V
23 47 47
KSO15 24 48 KSO15 KSI5 C1116 100P_0402_50V8K
48
ACES_85203-2402 KSI4 C1117 100P_0402_50V8K
KSO15 C1118 100P_0402_50V8K
KSO10 C1119 100P_0402_50V8K
KSO11 C1120 100P_0402_50V8K

HD_IDERST# 31,46
KSO14 C1121 100P_0402_50V8K
C C
2
KSO13 C1122 100P_0402_50V8K
R1189 SW DJ
KSO12 C1123 100P_0402_50V8K 10K_0402_5%
KSO3 C1124 100P_0402_50V8K
2 1
KSO6 C1125 100P_0402_50V8K
31 IDE_LED# IDE_LED# 3 1
Q96
MMBT3904_SOT23
JP30
41 PWR_LED# PWR_LED# 1 21 PWR_LED#
BATT_LOW_LED# 1 21 BATT_LOW_LED#
41 BATT_LOW_LED# 2 2 22 22
41 BATT_FULL_LED# BATT_FULL_LED# 3 23 BATT_FULL_LED#
SWDJ_IDE_LED# 3 23 SWDJ_IDE_LED#
4 4 24 24
41 CDON_LED# CDON_LED# 5 25 CDON_LED#
MP3_LED# 5 25 MP3_LED#
TO PWR /LED BOARD 41
41
MP3_LED#
WL_LED# WL_LED#
6
7
6 26 26
27 WL_LED#
7 27
+5VALW 8 8 28 28 +5VALW
JP31 9 29
KILL_SW# 9 29 KILL_SW#
1 2 +5VALW 41 KILL_SW# 10 10 30 30
SCROLLED# PWR_LED# 51ON# 11 31 51ON#
41 SCROLLED# 3 4 PWR_LED# 41 11 31
CAPSLED# ON/OFFBTN# 41 MODE# MODE# 12 32 MODE#
41 CAPSLED# 5 6 12 32
NUMLED# INTERNET_BTN# INTERNET_BTN# 41 KSO17 KSO17 13 33 KSO17
41 NUMLED# 7 8 13 33
+5VS EMAIL_BTN# EMAIL_BTN# FRDBTN# KSI0 14 34 KSI0
9 10 41 KSI0 14 34
STOPBTN# KSI1 15 35 KSI1
B 41 KSI1 15 35 B
ACES_85203-1002 REVBTN# KSI2 16 36 KSI2
41 KSI2 16 36
PLAYBTN# KSI3 17 37 KSI3
41 KSI3 17 37
VOL_UP KSI4 18 38 KSI4
41 KSI4 18 38
VOLDN KSI5 19 39 KSI5
41 KSI5 19 39
20 40 IOMP_LED#
41 IOMP_LED# 20 40
ACES_85203-2002
FOR LPC SIO DEBUG PORT

+5VS LPC_LAD[0..3] 28,41
JP32 +3VS
1 1
2 2
3 3
4 4
5 5
6 CLK_SIO_14M 0.1U_0402_16V4Z C973
6 CLK_SIO_14M 17
7 LPC_LAD0 2 1
7 LPC_LAD1
8 8
9 LPC_LAD2 +5VS
9 LPC_LAD3 ACES_87153-0801-01
10 10
11 LPC_FRAME#
11 LPC_LFRAME# 28,41 7 8
12 LPC_DRQ1# LPC_LDRQ1# 28 41 TP_CLK TP_CLK TP_DATA TP_DATA 41
A 12 PCIRST# 5 6 A
13 13 PCI_RST# 27,32,34,37,38 3 4
14 PM_CLKRUN#
14 PCI_CLKRUN# 1 2
15 15 CLK_PCI_EC 17,41
16 JP34
16 SIRQ 29,32,41
17 17
18 18
19 19
20
20
T/P Compal Electronics, Inc.
ACES_85201-2005 Title
@ KBD,ON/OFF,T/P,LED & FIR
EDL71 LA-2351 1B
5 4 3 2 1
5 4 3 2 1
DIRECT PLAY PATH

+5VALWP TO +5VLDO
+5VALW POWER ON PATH +5VALW +5VALW
C974
0.1U_0402_16V4Z C509
2 1 1U_0603_10V4Z
14
14
U19A INT_CD_L1 2 U19B
R421
3
S
+5VAMP 2 1 AC97_L 1 2 AMP_LEFT +5VAMP 2 1 11 10 AMP_LEFT R423 10K_0402_5% Q15
A B A B AMP_LEFT 45 G
R422 1 2 2
G
C
C
1M_0402_5% 1M_0402_5%
R424 SN74HCT4066PW_TSSOP14 R425 SN74HCT4066PW_TSSOP14
13
12
1M_0402_5% 1M_0402_5% 1 SI2301BDS_SOT23
2 @ 0_0402_5%
D
1 R1175 C510
1
+5VALW +12VALW
2
1U_0603_10V4Z
D 2 D
5
6
7
8
1
D
D
D
D
+5VALW C511 +5VALW R426 R427
1U_0603_10V4Z
INT_CD_R1 10K_0402_5% 1K_0402_5% SI4800BDY_SO8
14
14
2
G
S
S
S
U19C U19D U20
R428
2
P
4
3
2
1
+5VAMP 2 1 AC97_R 4 3 AMP_RIGHT +5VAMP 2 1 8 9 AMP_RIGHT
A B A B AMP_RIGHT 45
1
G
C
C
R429 +5VLDO
1M_0402_5% R430 SN74HCT4066PW_TSSOP14 1M_0402_5% R431 SN74HCT4066PW_TSSOP14
7
1
1M_0402_5% 1M_0402_5% D Q16
(4.5V)
1 R1176 2 @ 0_0402_5% 2
G
2
1
S
3
1
D Q17 R432
CD_PLAY 2 LM431SC_SOT23
41,46 CD_PLAY
EC_IDERST EC_IDERST_1 G 2N7002_SOT23 3.9K_0603_1%
41,46 EC_IDERST
S 2
2
L54 K
Place very close to U44.2
AC97 Codec +5VAMP 1
0_0603_5%
2
+AVDD_AC97 2N7002_SOT23
1 A
3
R
1
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D15 R433
1 1 1
C513 C551
C514 4.99K_0603_1%
10U_0805_10V4Z
2
0.1U_0402_16V4Z
1 1 2 2 2
C515 1
C516 C552
C C
0.1U_0402_16V4Z 10U_0805_10V4Z
25
38
9
2 2 U21
2 C517 @11000P_0402_50V7K
2
AVDD1
AVDD2
DVDD1
DVDD2 C518
2 @11000P_0402_50V7K +5VLDO DECOUPLING +5VALW DECOUPLING
TV_AUDIO_L 14 35 LINEL 1 2 AC97_L
38 TV_AUDIO_L AUX_L LINE_OUT_L +5VALW
C519 1U_0603_10V4Z
+5VLDO (4.5V)
TV_AUDIO_R 15 36 LINER 1 2 AC97_R
38 TV_AUDIO_R AUX_R LINE_OUT_R C521 1U_0603_10V4Z
@ 1U_0603_10V4Z 16 37
1 2 JD2 MONO_OUT/VREFOUT3
C520
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1U_0603_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
17 39
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
D16 RB751V_SOD323 JD1 HP_OUT_L
1 2
22U_A_4VM
22U_A_4VM
45 NBA_PLUG 23 41 1 2 1 1 1
22U_A_4VM
LINE_IN_L HP_OUT_R C522 47P_0402_50V8J 1 1 1 1 1 1 1 1
C523
+ C524 C525 C526 C527 C528 C529 + + C532 C533
C530
C531
24 LINE_IN_R
6 1 2 ICH_AC_BITCLK ICH_AC_BITCLK 28,39
CD_L BIT_CLK R434 22_0402_5%
45 MIC 18 CD_L 1 2 2 2 2 2 2 2 2 2 2 2 2
8 1 2 R435 ICH_AC_SDIN0 ICH_AC_SDIN0 28
CD_R SDATA_IN R436 22_0402_5% @ 10K_0402_5%
20 CD_R
2 AC97_XTLIN
XTL_IN
2
@ 0.01U_0402_16V7K CD_GNA1 2 19
C534 1U_0603_10V4Z CD_GND R438 1 2 CLK_CODEC_14M 17
C5351 2 R437 0_0402_5%
1 2 C_MIC 21 X4
C536 1U_0603_10V4Z MIC1 @1M_0402_5% @ 24.576MHz_16P_3XG-24576-43E1
2 1 +AVDD_AC97
@ 10K_0402_5% 22 3 1 2 1
1
R439 R440 MIC2 XTL_OUT

1
1 2 1 2 C_MD_SPK 13 29 C538
2 1000P_0402_50V7K
1 C540 C539 DGND To AGND Bypass
39 MD_SPK
0_0402_5% C537 1U_0603_10V4Z PHONE AFILT1 Audio Signal Bias Circuit R441 0_0603_5%
2
C541 1000P_0402_50V7K @ 22P_0402_50V8J 2
45 MONO_IN 12 PC_BEEP AFILT2 30 2 1 @ 22P_0402_50V8J 1 2
2 R1165
B R442 0_0603_5% B
VREFOUT 28 +AUD_VREF 1M_0402_5% 1 2
28 ICH_RST_AUDIO# ICH_RST_AUDIO# 2 1 R443 11 @ R444
22_0402_5% RESET# 0_0603_5%
27 1 2
1
ICH_SYNC_AUDIO VREF
28 ICH_SYNC_AUDIO 2 1 R445 10 SYNC
22_0402_5% 32
ICH_SDOUT_AUDIO DCVOL
28 ICH_SDOUT_AUDIO 2 1 R446 5 SDATA_OUT
22_0402_5%
45 31 CD_L
DGND AGND
SDA NC 2 1 1 2
46 33 1 R448 2 @ 0_0402_5% 1 1 1 1 1 31 INT_CD_L
R447 20K_0402_1% C542 1U_0603_10V4Z
XTLSEL VREFOUT2
VAUX 34 C544 C545 C546 C547 C548
2 1 1 2 CD_R
Analog Reference V
47 43 R451 31 INT_CD_R
+AVDD_AC97
41,45 EAPD SPDIFI/EAPD DISABLE# R449 20K_0402_1% C543 1U_0603_10V4Z +AUD_VREF
1U_0603_10V4Z
0.01U_0402_16V7K
1U_0603_10V4Z
1U_0603_10V4Z
0.1U_0402_16V4Z
SCK 44 1 2 @ 2 @ 2 @ 2 2 2 1
2
48 SPDIFO R450 6.8K_0402_5%
40 0_0603_5%
NC 2 1
2
AGND
0.1U_0402_16V4Z
4 DVSS1 AVSS1 26 R452 6.8K_0402_5%
R453
1U_0603_10V4Z
7 DVSS2 AVSS2 42 1 1
0_0402_5% C549 C550
ALC250-VD_LQFP48
1
2 2
DGND AGND CD_AGND To CD_GNA Bypass
20K_0402_1%
Adjustable Output 2 1 CD_GNA
+5VLDO TO +5VAMP
2
+5VALW 31 CD_AGND
R454
L56
1
R799 0_0805_5%
R455
2
0_0603_5% +5VLDO 1 2 +5VAMP

R456 6.8K_0402_5%
1
10K_0402_5% L57
A 0_0805_5% A
2
1 2
1
EC_IDERST_1
Q18
1
D 2N7002_SOT23R1050
2 1 2 EC_IDERST
G @ 0_0603_5%
S
3
1 2 SUSP#
SUSP# 35,39,41,46,47
R1051 0_0603_5% Title
AC_Link-Codec
EDL71 LA-2351 1B

5 4 3 2 1
A B C D E
+5VAMP Left Speaker Connector

Audio Amplifier Right Speaker Connector
1
R459
100K_0402_5%
CH751H-40_SC76
+5VAMP 1 2
2
SHUTDOWN# D35 EC_MUTEO 41
W=40Mil
1
D Q19 CH751H-40_SC76
2 1 2
0.1U_0402_16V4Z
1 1 1 EAPD 41,44
C555 G D36
+5VAMP
0.1U_0402_16V4Z
C975 C556 S 2N7002_SOT23
3
4 4
4.7U_0805_10V4Z
2 2 2
1
R462
100K_0402_5% @ R463 ACES_85203-1202
U23 10K_0402_5% INTSPK_L1+ L75 10_0603_5%2 INTSPK_L1+_C 1 13 INTSPK_L1+_C
INTSPK_L2- L77 INTSPK_L2-_C 1 13 INTSPK_L2-_C
7 22 10_0603_5%2 2 14
2
PVDD SHUTDOWN# NBA_PLUG INTSPK_R1+ L76 INTSPK_R1+_C 2 14 INTSPK_R1+_C
18 PVDD SE/BTL# 15 10_0603_5%2 3 3 15 15
19 14 C5571 20.1U_0402_16V4Z INTSPK_R2- L78 10_0603_5%2 INTSPK_R2-_C 4 16 INTSPK_R2-_C
VDD PC-BEEP 4 16
BYPASS 11 5 5 17 17
R464 0_0402_5% NBA_PLUG 2 9 INTSPK_L2- INTSPK_R1-3 L79 10_0603_5%2 INTSPK_R1-3_C 6 18 INTSPK_R1-3_C
VOLAMP HP/LINE# LOUT- INTSPK_R2- INTSPK_L1-3 L80 10_0603_5%2 INTSPK_L1-3_C 6 18 INTSPK_L1-3_C
41 VOL_AMP 1 2 3 VOLUME ROUT- 16 7 7 19 19
INTSPK_L1+ 4 10 8 20
INTSPK_R1+ LOUT+ LIN MIC-1 L81 10_0603_5%2 MIC-1_C 8 20 MIC-1_C
21 ROUT+ RIN 8 9 9 21 21
AMP_LEFT C558 1 2 1 2 C559 5 MIC-2 L82 10_0603_5%2 MIC-2_C 10 22 MIC-2_C
44 AMP_LEFT 0.47U_0603_16V4Z 1U_0603_10V4Z LLINEIN 10 22
23 RLINEIN GND 1 11 11 23 23
AMP_RIGHT C560 1 2 1 2 C561 6 12 NBA_PLUG L83 10_0603_5%2 NBA_PLUG_C 12 24 NBA_PLUG_C
44 AMP_RIGHT LHPIN GND 44 NBA_PLUG 12 24
0.47U_0603_16V4Z 1U_0603_10V4Z 20 13
RHPIN GND JP36
GND 24 2 2 2
17 C563 C564 C565
CLK
2
AMP_LEFT C562 1 2 HP_L
0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.47U_0603_16V4Z TPA0232PWP_TSSOP24 L92
AMP_RIGHT C566 1 HP_R 1 1 1
2 0_0603_5%
0.47U_0603_16V4Z 1 1
C567 C568
1
1
@
@ R465 0.1U_0402_16V4Z 2 2 0.047U_0402_16V4Z
1.5K_0603_5% R466
1.5K_0603_5%
2
3 CHANGE CONN 3
fo=1/(2*3.14*R*C)=225Hz
R=1.5K / C=0.47U
HEADPHONE OUT JACK

EC Beep System Beep To AC97' Codec
41 BEEP#
+3VALW +3VALW R467
C569 47_0402_5%
INTSPK_R1+ 1 2INTSPK_R1-2 1 2 INTSPK_R1-3
+
1
+5VS 150U_4A_6.3VM
R468 INTSPK_L1+ 1 INTSPK_L1-2 2 INTSPK_L1-3
+
1 2 2 1
100K_0402_5% C570 0.1U_0402_16V4Z C571 150U_4A_6.3VM R469
47_0402_5%
0.1U_0402_16V4Z
14
2
5
2 U24 R470 U25A

8.2K_0402_5% SN74LVC14APWLE_TSSOP14 +AVDD_AC97
OE#
P
P
C572
2 A Y 4 1 2 1 I O 2 1 2 1 2
R471
1
G
1 C574 560_0402_5%
1
74AHCT1G125GW_SOT353-5 +3V POWER 1U_0603_10V4Z
3
C575 R472
+3V POWER 0.22U_0603_16V4Z 10K_0402_5%
2 MICROPHONE IN JACK
2
2 1 2
1
C576
R473 10U_0805_10V4Z
10K_0402_5% 2
2
1 2 MONO_IN
CardBus Beep C577 1U_0603_10V4Z
MONO_IN 44
1
C578
2
1 2 1 2 2 Q21
32 PCM_SPK# R475 560_0402_5% R476
MMBT3904_SOT23
1U_0603_10V4Z 2.4K_0402_5%
3
PCI Beep +3VALW

14
U25B +AUD_VREF MIC-2

C580
P
3 MIC-1
29 SPKR I O 4 1 2 1
R482
2 44 MIC
G
+3V POWER 1U_0603_10V4Z 560_0402_5%

SN74LVC14APWLE_TSSOP14
7
D17
R483
1 10K_0402_5% CH751H-40_SC76 1
2

Title
Audio_AMP&JACKs
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EDL71 LA-2351 1B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Wednesday, March 02, 2005 45 59
Date: Sheet of
A B C D E
A B C D E
+5VS
+3VS
1
C905
1
+5VS
R769 0.1U_0402_16V4Z
2
14
10K_0402_5% U54B
14
U54A EC_IDERST 4
P
41,44 EC_IDERST
2
CF1 CF2 CF3 CF4 CF5 CF6 CF7 CF8 CF9 CF11 CF12 A HD_IDERST#
1 6
P
29 IDERST_HD# A O HD_IDERST# 31,43
1 1 1 1 1 1 1 1 1 1 1 O 3 5 B
G
PLTRST# 2
9,27,29,35,39,41 PLTRST# B
G
CF13 CF14 CF15 CF16 CF17 CF18 CF19 CF20 CF21 CF22 CF23 CF24 74VHC08MTC_TSSOP14
7
1 1 1 1 1 1 1 1 1 1 1 1 74VHC08MTC_TSSOP14
7
4 4
CF25
1
FD1 FD3 FD2 FD4 FD5 FD6 +3VS +3VALW +5VCD

1 1 1 1 1 1 C906 0.1U_0402_16V4Z
1 2
1
R771 +5VS PCMRST# SWDJ@ R772
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 41 PCMRST# SWDJ@ 10K_0402_5%
HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE 10K_0402_5%
14
14
1
U54C U55ASWDJ@
2
+5VS 10
OE#
P
P
29 IDERST_CD# A
8 SD_IDERST# 2 3 SIDE_RST# SIDE_RST# 31
1
1
PLTRST# O I O
14
9 B
G
U54D
2
13 74VHC08MTC_TSSOP14 74VHC08MTC_TSSOP14
7
A SWDJ@ SN74LVC125APWLE_TSSOP14
O 11
H12 H13 H11 H16 H17 H18 H19 H20 12 B
G
HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE R773
10K_0402_5%
1
NOSWDJ@
1 2 NOSWDJ@
1
1
R1208 0_0402_5% 1 2
R1158 0_0402_5%
Q98 80 mil 80 mil
+5VS 1 2
H21 H22 H23 H24 H25 H26 H27 H28 H29 H30 SWDJ@ 2N7002_SOT23 R1159 0_0805_5%
HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE HOLEE NOSWDJ@ +5VCD
3 IDE_IRQ 3
3 H DD_IRQ Q69
S
28,31 IDE_IRQ 1
HDD_IRQ 31 SWDJ@
+3VALW
D
+5VALW 3 1
1
G
2
HD_IDERST# SI2301BDS_SOT23
G
1
2
R1198 1 1
SWDJ@ SWDJ@ C907 SWDJ@ SWDJ@
10K_0402_5% +3VS 10U_0805_10V4Z C908 C909
2 10U_0805_10V4Z 0.1U_0402_16V4Z
2
2 2
1
1
D R1200 SWDJ@
HD_IDERST# 2 Q97 SWDJ@ 1 2
G 2N7002_SOT23 10K_0402_5% +5VALW R774 240K_0402_5%
S SWDJ@
2
4
U55B C910 R775 10K_0402_5%
1 2 2 1
OE#
5 6 SWDJ@
28,31 IDE_DIOR# I O HDD_IOR# 31
1U_0603_10V4Z
1
SWDJ@
+3VALW +3VALW SWDJ@ Q70 Q71
SN74LVC125APWLE_TSSOP14 DTC124EK_SC59 DTC124EK_SC59
SWDJ@ SWDJ@
NOSWDJ@ 2 2
14
14
1 2
R1140 U25C U25D R1209 0_0402_5%
20K_0402_5%
P
SUSP# 1 2 5 6 9 8 1 2 SUSP#
35,39,41,44,47 SUSP# VS_ON1 53
3
I O I O R1141 0_0402_5% 35,39,41,44,47 SUSP#
G
G
0.1U_0402_16V7K
2 1 2
1
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
7
R1142 CD_PLAY
41,44 CD_PLAY
C1100
100K_0402_5%
2
1 2
2
R1160 0_0402_5%
NOSWDJ@
+5VCD
1
+3VALW
+3VALW +3VALW R782
VCC= +3VALW SWDJ@ 10K_0402_5%
10
1
U55C SWDJ@
R783
OE#
2
SW_IDE_SDCS1#
14
14
28,31 IDE_DCS1# 9 I O 8 SW_IDE_SDCS1# 31

R1195 U25E U25F 10K_0402_5%
100K_0402_5% R1139 0_0402_5% SWDJ@
P
2
VS_ON11 2 11 10 13 12 1 2 SN74LVC125APWLE_TSSOP14
53 VS_ON1 I O I O VS_ON2 53
G_PCI_RST#
G
+5VCD
0.022U_0402_16V7K
1
1
1
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 D
7
R1196 PLTRST# 2 Q72
1
C1129
100K_0402_5% G 2N7002_SOT23
2 S R785
SWDJ@
3 VCC= +3VALW 10K_0402_5%
2
SWDJ@
13
U55D SWDJ@
2
OE#
12 11 SW_IDE_SDCS3# SW_IDE_SDCS3# 31
28,31 IDE_DCS3# I O
1 1
SN74LVC125APWLE_TSSOP14
NOSWDJ@
1 2
R1161 0_0402_5%

Title
SW DJ,RESET CKT,SW,LED BOAR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
EDL71 LA-2351 1B

A B C D E
5 4 3 2 1
+5VALW to +5VS Transfer

+12VALW
+5VALW Q79 +5V
2N7002_SOT23 +5VALW to +5V Transfer
2
+5VALW +5VS
0.1U_0402_16V4Z R678 Q45
S
1 3
1 10K_0402_5%
C1057 8 1
C142 D S
7 2
G
2
1
D S
1
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1M_0402_5% 0.47U_0603_16V4Z 6 3
2 D S
0.01U_0402_16V7Z
1 5 4 1 1 R679
D G
1
D C1058 2N7002_SOT23 C738 D
1 1 1
1
D Q33
R680
C740
C741
R1177 10K_0402_5% SI4800BDY_SO8 + C739 470_0402_5%
10U_0805_10V4Z 1 2 SUSP 2 22U_A_4VM
+12VALW
2
2 G 2
1
1
D 2 2@ 2 2 2
1@
C1059 Q95 S
2
2 SYSON#
0.1U_0402_16V4Z G
1
2 2N7002_SOT23 D Q34
S
3
2 SUSP
G +5VALW
S 2N7002_SOT23
3
RUNON
1
R681
10K_0402_5%
+3VALW +3V
+3VALW to +3V Transfer
2
Q46
8 1 0.1U_0402_16V4Z SYSON#
D S 40 SYSON#
7 D S 2 1 1
6 3 C742 C743
D S
1
D
5 D G 4
4.7U_0805_10V4Z SYSON 2 Q35
2 2 +3VALW +3VS 39,41,52 SYSON
SI4800BDY_SO8 G 2N7002_SOT23
C744
1
10K_0402_5% Q47 +3VALW to +3VS Transfer S
R682
3
4.7U_0805_10V4Z 1 2 +12VALW 8 1 0.1U_0402_16V4Z
2 D S
1 7 D S 2 1 1
1
1
C745 D Q36 C747
6 D S 3
2 SYSON# 5 4 + C746 R684
D G
100U_C_4VM
0.1U_0402_16V4Z G 1 22U_A_4VM
C 2 S 2N7002_SOT23 SI4800BDY_SO8 2 470_0402_5% C
1
3
2 +5VALW
CE2
+ C748
2
10U_0805_10V4Z
1
2 2 D Q37
1
RUNON 2 SUSP
G R683
S 2N7002_SOT23
3
10K_0402_5%
2
52,54 SUSP SUSP
1
D Q38
35,39,41,44,46 SUSP# 2
G
S 2N7002_SOT23
+2.5V to +2.5VS Transfer
3
+2.5V +2.5VS
Q82
8 D S 1
7 D S 2
0.1U_0402_16V4Z
6 D S 3
5 D G 4 1 1
10U_0805_10V4Z
1 1 C1072
SI4800BDY_SO8 + C1073
C1075
C1128 + 22U_A_4VM
B 22U_A_4VM 2 B
2 2
2
Discharge circuit RUNON
+1.25VS +2.5VS +1.5VS

1
R745 R741 R738

470_0402_5% 470_0402_5% 470_0402_5%
1 2
1 2
1 2
D Q40 D Q41 D Q39

SUSP 2 SUSP 2 SUSP 2
G G G
S 2N7002_SOT23 S 2N7002_SOT23 S 2N7002_SOT23
3
+3V +5V
1
A A
R602 R1064
470_0402_5% 470_0402_5%
2
2
1
D Q43 D Q80
2 SYSON# 2 SYSON#
G G Title
S 2N7002_SOT23 S 2N7002_SOT23 DC/DC Circuits
3
EDL71 LA2351 1B
5 4 3 2 1
A B C D
Vin Detector
Min. typ. Max.
H-->L 16.976V 17.257V 17.728V
L-->H 17.430V 17.901V 18.384V
1 PR1 1
1 2
VIN VIN
FBM-L18-453215-900LMA90T_1812 1M_0402_1% VIN
PJPD1 P1 PL1
10K_0402_5%
1
1
1 1 P1 1 2 PR4
VS
PR3
PR2 10K_0402_5%
1
84.5K_0402_1% 1 2 AC IN
3 G 2 PR5 ACIN 29,41,51
2
12P_0402_50V8J
12P_0402_50V8J
560P_0402_50V7K
560P_0402_50V7K
4 4 1 10_1206_5% PR6
G
2
8
22K_0402_5%
1
3 2 1 2 5
P
1 2
+
PC1
PC2
PC3
PC4
SINGA_2DC-G213-B04 7 PACIN
2 6
O PACIN 49
2
-
RLZ4.3B_LL34
20K_0402_1%
@ OC8070-A301~D PZD1 PU4B
1
PR7
0.1U_0603_25V7K
PL20 LM393M_SO8
4
PC6
PZD2
RLZ24B_LL34 PC5 PR8
PJP12 3MM 1000P_0402_50V7K 10K_0402_5%
2
DCI N- 1 2
2
PR10
PR9 1.5K_1206_5%
2 1 1 2
RTCVREF
10K_0402_5%
PD1 PR11
2
VIN 1N4148_SOD80 1.5K_1206_5%
B+ 2
2 1 VIN+ 1 2
@ PR174
100K_0402_5% VS PR12
1.5K_1206_5%
1 2 +3VALWP 1 2
BATT+ BATT++
PU1A
@ PR176 LM393M_SO8 PR13
8
PL2 1K_0402_5% 1.5K_1206_5%
BATT+
HCB4532K-800T90_1812 2 1 3 PR14 1 2
P
6C/8C# 49 1 O
+ VL 2.2M_0402_5%
1 2 BATT++ 2 2 1
-
G
2
4
1
PR175 VS
PC8
1000P_0402_50V7K
@1K_0402_5%
B+
2
0.01U_0402_25V7Z
PC7
1
0.01U_0402_25V7Z
1
1 2 BATT_TEMP
BATT_TEMP 41
1
PR16
PJP1 100K_0402_1% PR17
PC9
SUYIN_200275MR007G161ZL PR15 PU1B 499K_0402_1%
2
1K_0402_5% LM393M_SO8
8
PR18 8,50,51 MAINPWON PD2
2
1 1K_0402_5%
PJPB1 battery connector 2 5
P
2 +
3
3 2 1 1 7 O
3
SM ART 4 49 ACON 3 - 6
1
Batter y: 5
1
1000P_0402_50V7K
RB715F_SOT323 PR19 PR20
4
6
1
1.BAT+ 7 1 2 +3VALWP 191K_0402_1% 499K_0402_1% PC10
PC12
PC11 1000P_0402_50V7K
2. ID
2
PR21 0.1U_0603_25V7K
PRG++ 2
2
25.5K_0402_1%
3 . B/I
4.TS
1 2 EC_SMD_1 26,41,42
5.SMD RHU002N06_SOT323
6. SMC PR22
ACIN PR23 PQ1 PR24
1
100_0402_5% 34K_0402_1% D 47K_0402_5%
7 .GND Precharge detector VL 2 1 2 2 1
PACIN 49
G
1
Min. typ. Max. S
3
1 2 EC_SMC_1 26,41,42
1
PR25 H-->L 14.589V 14.84V 15.243V PR26
PQ2
DTC115EUA_SC70
100_0402_5%
L-->H 15.562V 15.97V 16.388V 66.5K_0402_1% 2 +5VALWP
2
BATT ONLY
3
Precharge detector
Min. typ. Max.
4
H-->L 6.138V 6.214V 6.359V 4
L-->H 7.196V 7.349V 7.505V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY Compal Electronics, Inc.
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
DCIN & DETECTOR & Precharge
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size Document Number Rev
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY B EDL71 LA-2351 1B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC. Date: Wednesday, March 02, 2005 Sheet 48 of 59
A B C D
A B C D E
Charger
Iadp=0~2.9A(65W)
CHG_B+
P2 P3 B+
PQ3 PQ4 PR27 AO4407_SO8
AO4407_SO8 AO4407_SO8 0.02_2512_1% PC14 PC16 PQ5
10U_1206_25V6K 0.1U_0603_25V7K
8 1 1 8 1 2 1 2 1 8
VIN 7 2 2 7 2 7
1
10U_1206_25V6K
6 3 3 6 PL3 3 6
1
5 5 HCB4532K-800T90_1812 5
PC13
1 PC17 1
2
2200P_0402_50V7K
4
47K_0402_5%
PR29
1
200K_0402_1%
PQ6 47K 47K_0402_5%
VIN
3
1
PR28
DTA144EUA_SC70 1 2
3
2
1
0.1U_0603_25V7K
PR30
1
47K PQ7
2
2 AO4407_SO8 PR31
2
PC18
4 10K_0402_5% PZD3
2
1
RLZ22B_LL34
2
PU2
2
1 24 41 ACOFF
1
-INC2 +INC2 ACOFF#
1
2
2 PD3
1
1 2 2 23 1SS355_SOD323
5
6
7
8
PC21 OUTC2 GND PC19
1
D PQ8 0.01U_0402_25V7Z PR32 2200P_0402_50V7K

2 DTC115EUA_SC70 100K_0402_1% 3 22 1 2 10K
3
1
+INE2 CS
1
G PR33 2 1 2
S 150K_0402_5%
3
1
PR34 4 21 1 2
-INE2 VCC(o)
2
75K_0402_1% PR36 10K PD4
PR35 10K_0402_5% PC20 1SS355_SOD323
2
3
24.9K_0402_1% 1 2 1 2 5 20 0.1U_0603_25V7K
PQ10 FB2 OUT PQ9
2
RHU002N06_SOT323 PC22 DTC114EKA_SC59
1
4700P_0402_50V7K 6 19 1 2 LXCHRG
VREF VH
0.1U_0603_25V7K
PR37 PC23 PC25
1K_0402_5% 0.1U_0603_25V7K 0.1U_0603_25V7K
1
1 2 1 2 7 18 1 2 PL4
FB1 VCC
PC26
16UH_D104C-919AS-160M_3.7A_20% PR39
PC24 0.02_2512_1% BATT+
2
2 RHU002N06_SOT323 2200P_0402_50V7K FSTCHG 41 BATT+ 2
8 -INE1 RT 17 1 2 1 2 1 2
PQ11 PR38
1
D 66.5K_0402_1%
4.7U_1206_25V6K
4.7U_1206_25V6K
2 1 2 9 +INE1 -INE3 16
1
G 41 IREF PR42
1
120K_0402_1%
0.01U_0402_25V7Z
PD6 S PR40 47K_0402_5%
3
1SS355_SOD323 180K_0402_1% 1 2 10 15 1 2 1 2 PD5

OUTC1 FB3
1
PC28
PC29
PR43
PC27 EC31QS04
2
PC31
ACOFF# 1 2 PR41 1500P_0402_50V7K
2
10K_0402_5% 11 14
2
OUTD CTL
2
PR45 12 13 PR44
22K_0402_5% -INC1 +INC1 10K_0402_5%
1 2
48 PACIN MB3887_SSOP24
1
ACON
48 ACON
2 1 2 1
PR46 PR47
49.9K_0603_0.1% 150K_0603_0.1%
S
3 3
3 1 1 2
BATT+
PQ36 PR177
@RHU002N06_SOT323 @ 150K_0603_0.1%
G
IREF=1*Icharge
2
1
VS
PR48
IREF=0~3.3V 845K_0603_1%
0.01U_0402_25V7Z
2
PR178
PC32
@ 100K_0402_5%
2P4S:4300mAH/cell
1
1 2 VS
PR49
0.7C=3.0A
2
300K_0603_0.1%
1
PU3A
PR179 LM358A_SO8
2
8
@ 100K_0402_5%
2
PC152 3
P
+
2 6C/8C# 48 1
1
0
@ 0.1U_0402_16V8K 41 BATT_OVP 2
1
1
PQ37
1
@ DTC115EKA_SC59
Charge voltage
3
PC33
0.01U_0402_25V7Z
For 4S battery only.PR46=49.9K
2
PR50
2
143K_0402_1%
4S CC-CV MODE : 16.83V OVP voltage :
For 3S/4S battery.PR46=75K, LI-3S :17.8V----BATT-OVP=1.9758V
PR177=150K,PQ36=2N7002,PR178=100K BATT-OVP=0.111*BATT+
4 4
PC152=0.1U,PQ37=DTC115EKA
PR174=100,PR176=1K.
4S CC-CV MODE : 16.8V
4S CC-CV MODE : 12.6V
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Charger
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B EDL71 LA-2351 1B

A B C D E
A B C D
1 1
VIN
2
PD9
1N4148_SOD80
PH2 under CPU botten side :
CPU thermal protection at 80 degree C
1
Recovery at 44(45) degree C
1
PD10 PR63
2 1 33_1206_5%
BATT+
RB751V_SOD323 PQ13 PR54
2
47K_0402_1%
TP0610K_SOT23 1 2
VL VS VL
VS
0.1U_0603_25V7K
2 2 1 3 1 2
2
PR64
PC34
200_0805_5% PR52
1
150K_0402_1%
2
PR57
1
1.82K_0603_1%
1
1
PR65 PC39
2
2
100K_0402_5% 0.1U_0603_25V7K PR55
PC40 2
1
8
0.22U_1206_25V7K 20.5K_0402_1% PU4A
1 2 3
P
+
1 MAINPWON 8,48,51
TM_REF1 O
2 -
G
10KB_0603_1%_TH11-3H103FT
1 2 LM393M_SO8
43 51ON#
4
PR66
1U_0805_16V7K
1000P_0402_50V7K
22K_0402_5%
1
1
1
PH2
PR59
PC36
PC35
150K_0402_1%
2 1
VL
2
2
1
RTCVREF
PU5 PR62
3 G920AT24U_SOT89 150K_0402_1% 3
CHGRTCP 2 3 1 2 1 2
CHGRTC
2
IN OUT
PR67 PR68
GND 300_0402_5% 300_0402_5%
1
PC41 1
1U_0805_25V4Z PC42
2
4.7U_0805_6.3V6K
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY Compal Electronics, Inc.
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
RTC Battery & OTP
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size Document Number Rev
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY B EDL71 LA-2351 1B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC. Date: Wednesday, March 02, 2005 Sheet 50 of 59
A B C D
A B C D E
+3.3V/+5V/+12V
+3VALWP Choke DCR = 26.5m [. PC43
B+
Current limit Threshold Min.=80 mV Mx.=120mV. 1
10U_1210_25V6K
2
OCP Min.= 80mV/1.27K*(1.27K+1.27K)/26.6=6.038A
1
OCP Max.=120mV/1.27K*(1.27K+1.27K)/26.5=9.056A PD12
EC11FS2_SOD106
2
1 PC44 1
2
@470P_0805_100V7K
1
PL5
PC45
FBM-L18-453215-900LMA90T_1812 0.1U_0603_25V7K
1 2 BST31 BST51 SNB 2 1 FLYBACK
1
2
PR70
@ 22_1206_5% PL6
9U_SDT-1204P-9R0-120_4.5A_20%
PC46
VS 0.1U_0603_25V7K
3
1 2
B++
3
PD13
PQ14 DAP202U_SOT323
1 D2 G2 8
2
2 D2 D1/S2/K 7 B++
3 6 PD14
G1 D1/S2/K
2200P_0402_50V7K
4 5 1SS355_SOD323 +12VALWP
1
S1/A D1/S2/K
4.7U_1206_25V6K
VL PQ15
AO4912_SO8 8 1
1
G2 D2
7 D1/S2/K D2 2
1
6 D1/S2/K G1 3
1
10_1206_5%
PC47
PC48
4.7U_0805_10V4Z
PR71 5 4
D1/S2/K S1/A
@2200P_0402_50V7K
PR190
0_0402_5%
2
4.7U_1206_25V6K
1
@ 2.7K_1206_5%
AO4912_SO8
1
PC49
@
PR72
PC50
PC51
2
2
2
0.1U_0603_25V7K
2 LX3 2
DH3
1
4.7U_1206_25V6K
2
1
PC52
DL3 PR73 PC53
1
PC54
0_0402_5% 47P_0402_50V8J
2
1
PC55 D
1
47P_0402_50V8J ACIN 2
2
1 2 G
S
3
PR74 PQ16
1
1
1M_0402_1%
1.27K_0402_1% @ RHU002N06_SOT323
2
PL7
22
21
10UH_D104C-919AS-100M_4.5A_20% PR75 PU6
PR76
1.27K_0402_1% 25 4
V+
VL
BST3 12OUT
1
PC56 5
2
0.47U_0603_16V7K VDD BST5 PR77

27 18
2
DH3 BST5 DH5 2M_0402_1%

DH5 16
2 1 26 17 LX5
LX3 LX5 DL5
24 19
2
DL3 DL5
PGND 20
PR79 14 2 1
619_0402_1% CSH5
1 CSH3 CSL5 13
1 2 2 12 PR78
CSL3 FB5 1.54K_0402_1%
3 15
+3VALWP FB3 SEQ
1
29,41,48 ACIN 1 2 10 SKIP# REF 9 2.5VREF
1
23 SHDN# SYNC 6 PR81
1
PR80 PC57
RST# 11
698_0402_1%
100P_0402_50V8J
10K_0402_5% 7 0.47U_0603_16V7K
2
TIME/ON5
3.57K_0402_1%
2
2
1
SKS10-04AT_TSMA
@ PR82 28
GND
RUN/ON3
2
PR83
PC58
PC59 1 300K_0402_5% PR84

2
1
1
0_0402_5%
2
SKUL30-02AT_SMA
150U_D2_6.3VM
+ PC61
+5VALWP
8
3 MAX1902EAI_SSOP28 4.7U_0805_10V4Z 3
1
2
PD15
1
2
2
2
PD16
PC60
@ 1000P_0402_50V7K
1
1
10.2K_0402_1%
1
1
+
PC63
PR85
100P_0402_50V8J PD17 PC62
2
2
VS SKS10-04AT_TSMA 2 150U_D2_6.3VM
2
10K_0402_1%
2
PR86
PR87
1
0_0402_5%
MAINPWON 8,48,50
2
1
PR88
1
10K_0402_1%
PC64
1
0.47U_0603_16V7K
2
2
PC65
@ 1U_0805_25V4Z
+5VALWP Choke DCR = 40mΩ.
2
Current limit Threshold Min.=80 mV Mx.=120mV.

OCP Min.= 80mV/0.698K*(1.54K+0.698K)/40=6.412A
4 OCP Max.=120mV/0.698K*(0.698K+1.54K)/40=9.593A 4
RS2(PR64)=RS1(PR58)*RS3(PR61)/(RS1+RS3)
L/RL(DCR)=RS1*RS3(PR61)/(RS1+RS3)*Cs(PC56)

Title
3.3V / 5V / 12V
B EDL71 LA-2351 1B
A B C D E
5 4 3 2 1
+1.2VSP
+2.5VP
PQ17
D
PU7 6 2@ SI3456DV-T1_TSOP6
S
1 6 5 4
D VIN VCNTL +3VALW +1.5VSP 2 +1.2VSP D
1
2 GND NC 5 1 1
1
PC66
G
1
PC67 PR89 3 7 1U_0603_16V6K PR92 + PC69 PC70
3
10U_1206_6.3V7K 1K_0402_1% VREF NC PR91 2@ 0_0402_5% @ 150U_D2_6.3VM 2@ 22U_1206_10V6M
2
4 8 PC71 2@ 5.1K_0402_5%
2
VOUT NC 2@ 4.7U_1206_25V6K 2
1 1
TP 9 VS
APL5331KAC-TR_SO8 PC72
0.1U_0603_25V7K
2@ 220P_0603_50V8J
2
1
1
PC68
PR94
PU3B 2@ 200K_0402_1%
2
5 1 2
+ 2.5VREF
4700P_0402_25V7K
2@ 187K_0402_1%
PR90 7
2
1K_0402_1% 0
- 6
2
PR95
LM358A_SO8
2@ PC75
1
2
47,54 SUSP 1 2 2 PQ18
G RHU002N06_SOT323
1
S 1 2 1 2
3
PR93
0_0402_5% PC76 PR96
2@ 68P_0402_50V8K 2@ 5.1K_0402_5% PR191
1
+1.25VSP 2@ 0_0402_5%
1
D
1
+ 2@ PQ19 2 1 2
PC73 PC74 RHU002N06_SOT323 G SUSP 47,54
@
150U_D2_6.3VM 4.7U_0805_6.3V6K S
3
C 2 C
1
@ PC195
0.1U_0402_16V7K
2
PL8
FBM-L11-322513-151LMAT_1210
B+ 1 2
+5VALW
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
PR98 PR99
1
1
PC77
PC78
PC79
PC80
10_1206_5% 10_0603_5%
1U_0805_25V4Z
2
2
0.1U_0603_25V7K
PC81
2
PQ21
1
1U_0805_25V4Z
@ @ 1 8
D2 G2
1
2
PC83
B B
2 D2 D1/S2/K 7
PC84
3 G1 D1/S2/K 6
@ 4 5
2
S1/A D1/S2/K
1
PU8 PD18 AO4912_SO8

RB751V_SOD323
VIN
PR101 11 2 1
VCC
2 1 4 ILIM PR102 1.8UH_D104C-919AS-1R8N_9.5A_20%
93.1K_0603_1% 0_0402_5% PL11 +2.5VP
BOOT 15 2 1 1 2 1 2
4.7U_0805_6.3V6K
PC85
PR103
0.1U_0603_25V7K
1.8K_0603_1%
330U_V_2.5VM
220U_D2_4VM
14 0.1U_0603_25V7K 1 1
HDRV
1
PC88
PC89
1 2 16 FPWM
1
2
PR104
PC86
PC87
+ +
0_0402_5% @
10
2
1
LDRV 2
2 2
@
SW 13
1 2 3 EN
39,41,47 SYSON PR106
ISNS 12 2 1
PR105 2 1 7 SS
1
1K_0402_1%
0_0402_5% 2.74K_0603_1%
PR108
PC90
0.01U_0402_16V7K 9
A PGND A
2
2 PGOOD
VSEN 6
AGND
5
VOUT Compal Electronics, Inc.
FAN5234QSCX_QSOP16 Title
8
1.25VSP/2.5VP/1.2VSP
B EDL71 LA-2351 1B
5 4 3 2 1
A B C D
1 1
B++++ FBM-L18-453215-900LMA90T_1812
PL10
1 2 B+
2200P_0402_50V7K
4.7U_1206_25V6K
1
PC93
+5VALW
PC92
1
@ PC94
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_0805_6.3V6K
4.7U_1206_25V6K
PD19
2
DAP202U_SOT323
PC98
PC96
PC97
PQ23
2
8 1
2
G2 D2 BST2.5B PQ24
7 D1/S2/K D2 2
6 D1/S2/K G1 3 8 G2 D2 1
5 4 1U_0805_50V4Z 7 2 @
D1/S2/K S1/A 0.1U_0603_25V7K PC100 D1/S2/K D2
6 D1/S2/K G1 3
1 2 PC99 MAX1845_VCC 5 D1/S2/K S1/A 4
AO4912_SO8 0.1U_0603_25V7K
PR111 1 2
+1.5VSP PC101 0_0402_5% PR112 AO4912_SO8
1
2 4.7UH_D104C-919AS-4R7N_5.2A_20% 20_0603_5% PR113 PC102 PL12 2
PL9 0_0402_5% 0.1U_0603_25V7K 1.8UH_D104C-919AS-1R8N_9.5A_20%

LX2.5
1 2 2 1 1 2 2 1 1 2 +VCCPP
2
150U_D2_6.3VMV
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
SKUL30-02AT_SMA
22
1
1
1
150U_D2_6.3VMV
150U_D2_6.3VMV
EP10QY03
BST2.5A 1 1
1
PD20
PC103
+ 25 21
UVP
VCC
V+
BST1 VDD
1
PC105
PC108
PC106
PC107
+ +
PD21
26 19
2
DH1 BST2
2
2
@ 2 DH2.5
18
2
2
@ PR168 DH2 PR114 @ 2 2
27 LX1 LX2 17
5.1K_0402_1% 24 20 DL2.5 @
DL1 DL2 499_0402_1% @
CS2 16
28
1
1
CS1
1 OUT1 OUT2 15
FB2 14
2 PU9 12 2 1
FB1 ON2
VS_ON2 46
PR116 MAX8743EEI_QSOP28 7 PR115
PGOOD
2
0_0402_5% 5 0_0402_5%
TON PR117
1 2 11
46 VS_ON1 ON1
1
13 10K_0402_1%
PR107 ILIM2
3
SKIP
GND
OVP
REF
ILIM1
10K_0402_1%
1
PR118
2
23
10
49.9K_0402_1%
2 1
2 1
100K_0402_1%
1
100K_0402_1%
@ PR198 PR119
PR120
PR121
3 0_0402_5% 62K_0603_1% 3
PC109
0.22U_0603_16V7K
1
2
Assume that PR107=10K ohm, then 1.5V=1*(1+PR168/PR107), so PR168=5K ohm.
MAX1845_VCC
2
PR196
33K_0402_1%
1
2
PR197
11K_0402_1%
1
1
4
D 4
PQ41 2
2N7002_SOT23 G VS_ON2 46
S
3

Title
+VCCPP & +VGA_CORE
B EDL71 LA-2351 1B
A B C D
A B C D
+3VALW +3VALW
PU13 2@ 5U_TPRH6D38-5R0M-N_2.9A_20%
1 8 PL18 +1.8VSP
VIN PVIN
2
2@ PC146 2 7 2 1
GND LX
220P_0603_50V8J 1K_0402_5%
0.1U_0603_25V7K 3 6
SD PGND
2
2@ PR169
4 5
1
VREF VFB
1
2
2@ 100K_0402_5%
1
2@ CM3718_PSOP8 + PC147 1
2@ PC148 220U_D2_4VM
1
PR170
PR171 4.7U_0805_6.3V6K
2
2@ 0_0402_5% 2
47,52 SUSP
2
1
PC149
2 1
1
+5VALW
2
@ PC150
1
2@
560P_0603_50V7K
2
PR172
2@ 100K_0402_5%
1
1
1
D PC153
2 2@ 4.7U_0805_6.3V6K
SUSP 47,52
2
G
S PQ35 2 1
3
2@ RHU002N06_SOT323
1
PR173 PC155 PR180
2@ 100K_0402_1% PC154 2@ 2.2_0402_5%
1
2@ 470P_0402_50V7K 2@ 0.1U_0402_16V7K
PQ38
2
1
PR181
2.5VREF 2 1
2
8 1
2
G2 D2
1
PC151 2@ 12.7K_0402_1% PD26 7 2

D1/S2/K D2
1
2@ 0.01U_0603_16V7K 6 3
PR182 2@ 1SS355_SOD323 D1/S2/K G1
2
5 4 2
2
2
2@ 255K_0402_1% D1/S2/K S1/A
1
5
0.1U_0402_16V7K
PU14
2@ AO4912_SO8
VCC
2
BOOT 1
1
7 OCSET
PC156
2
PQ39 2
PR183 UGATE
1
47,52 SUSP D
2@
2@RHU002N06_SOT323
2@ 0_0402_5% 6 PL19
2 1 2
FB 2@ 1.8UH_D104C-919AS-1R8N_9.5A_20% +VGA_CORE_P
G 8 1 2
PHASE
0.1U_0402_16V7K
S
3
+VGA_CORE
4.7U_0805_6.3V6K
1
2@ 0.1U_0402_16V7K
PC157
2@ 220U_D2_4VM_R15
10K_0402_1%
3 GND LGATE 4 1
PC158
@ +
1
PC160
PC159
2@ APW7057KC-TR_SOP8
PR184
2
2
2
PJP11 PJP2
2@
2@
3MM 2MM
+5VALWP 1 2 +5VALW 1 2 +12VALW

+12VALWP
1
PR185
2@ 34K_0402_1% PR186
2@ 43.2K_0402_1%
PJP3 PJP4
3 3
1 2
3MM 3MM
D PR187
+3VALWP 1 2 +3VALW 1 2 +1.5VS
+1.5VSP 2 1 2
PQ40 G POWER_SEL#
S 2@ 0_0402_5%
1
2@ RHU002N06_SOT323
@PC161
PJP5 PJP6
0.01U_0402_25V7Z
2
3MM 3MM
+2.5VP 1 2 +2.5V +1.8VSP 1 2 +1.8VS

POWER_SEL VGA_CORE
H 1.0V
PJP7 PJP8 +3VS
3MM 3MM VGA_CORE for ATI-M24
1
1 2 1 2 +1.25VS
+VCCPP +VCCP +1.25VSP
L 1.2V PR200
2@ 100K_0402_5%
PJP10
PJP9
2
3MM
3MM
+VGA_CORE_P 1 2 +VGA_CORE
1 2
+1.2VSP +1.2VS POWER_SEL#
PR199 PQ45
1
2@ 0_0402_5% D
1 2 2 2@ 2N7002_SOT23
G
S
18 POWER_SEL
3
1
4 4
PC165
2@ 0.1U_0402_16V4Z
2
Title
1.8VSP/VGA_CORE_P
B EDL71 LA-2351 1B
A B C D
5 4 3 2 1
CPU_B+ B+
+5VS FBM-L18-453215-900LMA90T_1812
PR132 10_0402_5%
PL15
+3VS 1 2
0.01U_0402_25V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
2200P_0402_50V7K
PD22
100U_25V_M
100U_25V_M
EP10QY03 1 1
1
PC124
PC125
PC126
PC127
+ +
PC122
PC123
2 1
2
D D
2
2
2 2
PR133
10K_0402_1% 2
1U_0603_16V6K
PC128
0.01U_0402_25V7Z
1
PC129
2.2U_0603_6.3V6K
5
6
7
8
1
PC130
PU12
0.22U_0603_16V7K
D
D
D
D
1
1
2
PC131
VCC 10 30 PQ27
PR134 0_0402_5% VCC VDD AO4408_SO8
G
S
S
S
6 CPU_VID0 2 1 24 D0 V+ 36
PR135 0_0402_5% PR136 2.2_0402_5%
4
3
2
1
6 CPU_VID1 2 1 23 D1 BSTM 26 1 2 +CPU_CORE
PR137 0_0402_5% PR203 2.2_0603_5% PL16
2 1 22 28 1 2 0.56UH_MPC1040LR56 23_21A_20%
6 CPU_VID2 PR139 0_0402_5% D2 DHM PR140
6 CPU_VID3 2 1 21 D3 LXM 27 1 2 1 2
4.7_1206_5%
PR141 0_0402_5%
2
2 1 20 29 0.001_2512_5%
6 CPU_VID4 D4 DLM
5
6
7
8
@ PR201
PR142 0_0402_5%
100K_0402_1%
AO4410_SO8
2 1 19 31 CPU VCC SENSE
D
D
D
D
6 CPU_VID5 D5 PGND
EC31QS04
PR143
909_0402_1%
PR144 0_0402_5%
1
PD23
PQ28
1 2 25 37
2 1
9,17,29 VGATE VROK CMP
680P_0603_50V8J
499_0402_1%
499_0402_1%
G
1
S
S
S
@ PC200
4 38 @
1
PR149 S0 CMN
4
3
2
1
1000P_0402_50V7K
0_0402_5% PR150 VCC 5 17 @ PC132
2
S1 OAIN+
2
C @100K_0402_5% C
PR145
3K_0603_1%
1 2 6 16 1 2
1 VR_ON
2
SHDN# OAIN-
PR148
PR151 30.1K_0402_1%
1
PR146
PR147
PC133
1 2 2 1 1 15 FB
1
TIME FB 0.47U_0603_16V7K
PC1341 2 12 14 1 2 PR152 909_0402_1%
CCV CCI PC135 470P_0402_50V8J 1 2
1 2 270P_0402_50V7K 2 35 @
TON BSTS PR204 2.2_0603_5%
PR155 PR153 1 2 8 33 1 2
78.7K_0603_1% 200K_0402_1% REF DHS
1 2
1 2 PC136 0.22U_0603_16V7K 9 34 PR154
ILIM LXS 3K_0603_1%
FB 1 2 7 32
+5VS 1 2 1 2
OFS DLS
100P_0402_50V8J
10.7K_0402_1%
PR156 100K_0402_1% 3 40 PC137 PR157

SUS CSP
2
1 2 0.022U_0402_16V7K 0_0402_5%
PR158
PC138
18 SKIP CSN 39
CPU_B+
2
1
2
D
27P_0402_50V8J
2.2_0402_5%
11 13 PD24
GND GNDS
1
D
RHU002N06_SOT323
PR159
2 EP10QY03
29 PM_STP_CPU#
1
PC139
G 2
S G
3
4.7U_1206_25V6K
4.7U_1206_25V6K
0.01U_0402_25V7K
2200P_0402_50V7K
PQ29 S MAX1532AETL_TQFN40
3
1
PQ30
RHU002N06_SOT323
5
6
7
8
PC143
PC140
PR160
D
D
D
D
0.22U_0603_16V7K
PC141
PC142
0_0402_5% PQ31
2
1 2 AO4408_SO8
29 PM_DPRSLPVR
1
B PR161 B
G
S
S
S
PC144
2 1
+5VS 1 2
4
3
2
1
@ 100K_0402_1%
PR162 PL17
2
20K_0402_1% 0.56UH_MPC1040LR56 23_21A_20%

2
PR164
PR165 10K_0402_1% 1 2
4.7_1206_5%
100K_0402_1%
909_0402_1%
1 1
5
6
7
8
1
@ PR202
1
1
PQ33 D
D
D
D
D
EC31QS04
2 AO4410_SO8
PD25
G RHU002N06_SOT323 PQ32
680P_0603_50V8J
S
3
2
1
G
S
S
S
C
@ PC201
2
6 PSI#
4
3
2
1
PR166
B @ 1 2
E PQ34
3
1
HMBT2222A_SOT23 PC145
0.47U_0603_16V7K
PR167 909_0402_1%
1 2
A A

Title
+CPU_CORE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B EDL71 LA-2351 1B
5 4 3 2 1
A B C D E
Version change list (P.I.R. List) Page 3 of 1
Item Fixed Issue Reason for change Rev. PG# Modify List B.Ver# Phase
1 1.Change PR104 from 1K_0603_1% to 1.8K_0603_1% 1
1 Change DDRII to DDRI. Change DDRII to DDRI. 0.2 54 2.Change PR106 from 2K_0402_5% to 2.74K_0603_1% 0.2 DVT
3.Change PR101 from 107K_0402_1% to 93.1K_0603_1%.
2 Ripple voltage of +1.2VSP is large The output voltage is unstable, so increase capacitance 1.Change PC70 from 4.7U_1206_25V6K to 22U_1206_10V6M
to improve it.
0.2 54 0.2 DVT
3 Ripple voltage of +VCCPP is large Ripple voltage is over spec. 0.2 55 Change PC106 from 150U_D2_6.3VM(45m) to 150U_D2_6.3VMV(15m)
1.Delete PU11 CM3718. 0.2 DVT

4 +1.5VP is poor supply by using CM3718. Use MAX1845 to convert +1.5VP 0.2 56
2.Delete PQ26 RHU002N06.
3.Delete PL14 5U_TPRH6D38-5R0M
4.Delete PC113 150U_D_6.3V
5.Delete PC115 4.7U_1206_25V6K.
6.Delete PC111,PC117PC121,PR123,PR125,PR127,
2
PR129,PR130,PR131. 2
1.Delete the PQ22 RHU002N06.

2.Delete PR109 100K_0402_1%
3.Delete the PC91 0.01U_0402_25V7Z
0.2 55 0.2
5 +1.5VP is poor supply by using CM3718. Use MAX1845 to convert +1.5VP 4.Change PR168 from 2K_0402_1% to 5.1K_0402_1%. DVT
5.Change PC103 from 150U_D2_6.3VM(45m) to 150U_D2_6.3VMV(15m)
6.Change PL9 from 1.8UH_D104C-919AS-1R8N to
4.7UH_D104C-919AS-4R7N
1.Change PR173 from 10K_0402_1% to 100K_0402_1%.

6 Change +2.5VSP to +1.8VP Change +2.5VSP to +1.8VP 0.2 56 0.2 DVT
2..Add PR182 255K_0402_1%.
No populate PC71,PQ17,PR91,PR92,PC72,PR96,PC76,PC70,PR94, 0.2

7 For UMA platform can no populate +1.2VSP. For UMA platform can no populate +1.2VSP. 0.2 54 PR95,PC75,PQ19,PR97,PQ20,PR100 and PC82. DVT
8 For UMA platform can no populate +1.8VSP. For UMA platform can no populate +1.8VSP. 0.2 55 No populate PU13,PC146,PR171,PR172,PR173,PR182,PC151,PQ35,
3 PL18,PC148,PR170,PR169,PC149 and PC147. 0.2 DVT 3
9 For charge current accuracy requirement For charge current accuracy requirement 0.2 50 Change PR43 from 120K_0402_5% to 120K_0402_1%. 0.2 DVT
10 For charge voltage accuracy requirement For charge voltage accuracy requirement 0.2 50 Change PR46 from 49.9K_0402_1% to 49.9K_0603_0.1% 0.2 DVT
11 Use lower rating capacitors to improve Use lower rating capacitors to improve 0.2 50 1.Change PC42 from 4.7U_1206_25V6K to 4.7U_0805_6.3V6K. 0.2 DVT
cost down. cost down.
2.Change PC74 from 4.7U_1206_25V6K to 4.7U_0805_6.3V6K.
3.Change PC94 from 4.7U_1206_25V6K to 4.7U_0805_6.3V6K.
4.Change PC148 from 4.7U_1206_25V6K to 4.7U_1206_6.3V6K
without populate.
12 For pull high to VGATE. For pull high to VGATE. 0.2 50 Populate PR133 with 10K_0402_1%. 0.2 DVT
13 To avoid inrush current. To avoid inrush current. 0.2 50 Add PR190 between PD14 pin2 and VS with 10_1206_5%. 0.2 DVT
14 To solve the no load PWM waveform issue. To solve the no load PWM waveform issue. 0.2 53 Change PC86 from 220U_D2_4VM to 220U_D2_4V_15m. 0.2 DVT
4 4
15 To solve the shutdown negtive voltage To solve the shutdown negtive voltage issue. 0.2 54 Add PQ41(2N7002_SOT23) and PR196(33K_0402_1%) and 0.2 DVT
issue. PR197(11K_0402_1%)

Title
PIR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EDL71 LA-2351 0.0
A B C D E
A B C D E

1 1
16 To cost down. To cost down. 0.2 54 Change Max1845 to Max8743 and remove PD20 and PD21 0.2 DVT
17 To solve Max1902 can locked To solve Max1902 can locked as adapter plug in and uproot out the 0.2 52 Add Precharge circuit. 0.2 DVT
as adapter plug in and electric socket continuous.
uproot out the electric
socket continuous.
18 Power select action correct Power select action correct 0.2 55 Add PQ45 and PR199 and PR200 and PC165. 0.2 DVT
Increase choke rating of Increase choke rating of 5VALWP.

19 0.3 52 Change PL6 from SH136100020 to SH13690AM00. 0.3 PVT
5VALWP.
20 BOM Error of PD2 PD2 shows wrong location PD5 on SAP system, I update it. 0.3 49 Change its location from PD5 to PD2. 0.3 PVT
21 BOM Error of PQ41 and PQ45. SAP system has quantity but shows no location of PQ41 and PQ45. 0.3 52,55 Update the location of PQ41 and delete PQ45. 0.3 PVT
2 2
22 EMI issue. EMI's request. 0.3 56 Change PR136 and PR159 from SD028000000 to SB028220B00. 0.3 PVT
23 Production EOL. SB906100109(TP0610T) will go EOL. 0.3 50 Change SB906100109 to SB906100200. 0.3 PVT
24 Time sequence error. Time sequence is error such that B+ can't biuld. 0.3 51,52 Change PR52 from SD034470200 to SD028150300.
0.3 PVT
Un-populate PC65.
Change PR87 from SD028470200 to SD028000000.
25 OTP setting adjust. 1 Change PR55 from SD034169200 to SD034205200. 0.3

Because we change PR52 such that OTP needs to reset. PVT
0.3 50 2 Change PR57 from SD014215108 to SD014182102.
26 Add other circuit of Because we need to populate this circuit such that precharge can 1 Add PD1 SC11N4148T8(S DIO 1N4148(SM)). 0.3 PVT
0.3 48
precharge. enable. 2 Add PR10 SD0111501T6(S RES 1/4W 1.5K +-5% 1206).
3
3 Add PR11 SD0111501T6(S RES 1/4W 1.5K +-5% 1206). 3
4 Add PR12 SD0111501T6(S RES 1/4W 1.5K +-5% 1206).

5 Add PR13 SD0111501T6(S RES 1/4W 1.5K +-5% 1206).
27 Un-populate VGA_CORE_P. Because EDL71 is Aviso GM plate form, we don't populate PQ45, PR199, 0.3 54 Delete PQ45, PR199, PR200, PC165. 0.3 PVT
PR200, PC165.
28 Adjust CP point. Because we need to change CP point to improve CP mode. 0.4 49 Change PR35 from SD034226200 to SD034249200. 0.3 EVT
29 Add PC146 for EDL70. We need to add PC146 such that Vin can more clear and stable. 0.4 54 Add PC146 for1.8VSP of EDL70. 0.3 EVT
30 To cost down. To cost down. 0.4 54 Change PC147 from SG020151300 to SGA20221120. 0.3 EVT
31 Precharge circuit tolerance Because the tolerance shuld be 1% but the metirial on BOM is 5% 0.4 54 Change PR52 from SD028150300 to SD034150300. 0.4 EVT
adjust. so we update it.
UUT has Zi Zi noice issue. Because we have UUT zi zi noice issue, we add two capacitor to solve it. 0.4 54 Add PC126 and PC127 with SF10004M008. 54 EVT
32
4 4
33 Noise on S3 mode. Because we found noise on ceramic capacitor, we increase capacitance to 0.4 54 Change PC43 from SE142475K00 to SE142106M00. 54 EVT
decrease this noise.

Title
PIR
A B C D E
A B C D E
Because the power consumption is too high as S3 mode, we found PU8
1 Make PU8 can into skip mode as S3 mode. 0.4 52 change PU8 from SGA20221150 to SGA20331D20. 0.4 EVT 1
doesn't into skip mode, we now improve it.
Because we found the start up waveform which has some delay such that
Make 1.2VSP start up waveform more smooth. 0.5 52 Change PC75 from SE074222K00 to SE075472K00. 0.4 PVT
the waveform does'nt smooth. We improve it.
Because we found the start up waveform which has some delay such that
Make 1.8VSP start up waveform more smooth. 0.5 54 Change PC151 from SE026223K00 to SE026103K00. 0.4 PVT
the waveform does'nt smooth. We improve it.
To improve noise issue when system Because we found that noise occurs when system into S3 mode,
Change PC43 from SE142106M00 to SE065106K00.
into S3 mode. so we need to improve and derease it. 0.5 51 0.4 PVT
To meet EMI request. To meet EMI request. 0.5 55 Add PR203 and PR204 with SD0130000T4. 0.4 PVT
Change PR115 from SD028200000(S RES 1/16W 200 +-5% 0402) to

For EDL72, Transfer ISPD BOM Error. BOM error, update to correct value. 0.6 53 0.5 Pre-MP
SD028000000(S RES 1/16W 0 +- 5% 0402).
Change PR115 from SD028200000(S RES 1/16W 200 +-5% 0402) to
SD028000000(S RES 1/16W 0 +- 5% 0402).
Change PC126 from SF06804M000(S ELE CAP 68U 25V M B(6.3*6.0)
2 CV-GX) to SE10004M008(S ELE CAP 100U 25V M B(6.3*7.7) CV-GX). 2
Change PC127 from SF06804M000(S ELE CAP 68U 25V M B(6.3*6.0)

CV-GX) to SE10004M008(S ELE CAP 100U 25V M B(6.3*7.7) CV-GX).
Change PC124 from SE075103K00(S CER CAP 0.01U 25V K X7R) to
For EDL70_72, change AL to AP material. Change AL material to AP material. 0.6 55 0.5 Pre-MP
SE075103Z00(S CER CAP 0.01U 25V K X7R 0402).
Change PC143 from SE075103K00(S CER CAP 0.01U 25V K X7R) to
For EDL70_72, change AL to AP material. Change AL material to AP material. 0.6 55 0.5 Pre-MP
SE075103Z00(S CER CAP 0.01U 25V K X7R 0402).
Change PC66 from SE135105K00(S CER CAP 1U 16V +-10% X5R 0603)
For EDL72, change AL to AP material. Change AL material to AP material. 0.6 52 0.5 Pre-MP
to SE135105KT0(S CER CAP 1U 16V K X5R 0603 TAIYO)
0.5 Pre-MP
3 3
4 4

Title
PIR
A B C D E
A B C D E
1 1 S4 auto resume Can't auto resume from S4 0.4 30 Change VCCSUS3_3 from +3V to +3VALW 0.5 PVT 1
2 C615 short C615 short to logic low cause can't boot 0.4 35 Change C613 and C615 to SGN01220100 0.5 PVT
3 bo niose when speaker generate "bo" niose when system 0.4 45 Change R460 to R461 0.5 PVT
shut down shut down
C904 too close
4 to JP12 C904 too close to JP12 if C904 fail can't repair 0.4 40 JP12 change to DC233104020 0.5 PVT
5 +1.5V rising edge +1.5V ‘s rising edge is not smooth 0.4 30 Add R12 0.5 PVT
SW DJ can't play Hitachi HDD send IDE_DIOR# in SW DJ S0 mode 0.4 31,46 Add Q97, R1197, R1198
6 with Hitach HDD 0.5 PVT
7 Modem noise Modem dial tone have noise 0.4 39 Change R518, R521 from SD0130000T4 to 0.5 PVT
2 SM010012000 2
8 KB910 damage issue KB910 INVT_PWM pin damage issue 0.5 41 Add D32,D33 0.6 PVT
Change +3V to +3VALW for SMBUS and

9 S4 auto resume Can't auto resume from S4 0.5 29,30 LINKALERT#, EC_SMI#, SYS_RESET# 0.6 PVT
PM_BATLOW#, GPI11, ICH_PCIE_WAKE#
1.5V LDO
10 Bo noise Bo noise gernerate in SWDJ mode and power up 0.5 45 Del R460 and R461, add D35 and D36 0.6 PVT
11 Backlight issue backlight timing error 0.5 24 Add D34 and R1118 0.6 PVT
12 Sighting Alert Alviso SMVREF Sighting Alert (# 68363) 0.5 9 No stuff R100 and R101 0.6 PVT
3 13 CRT ISSUE CRT NOISE issue 12 Change C119 from SE053106Z00 to 0.6 PVT 3
0.5 SE077226M10
14 SWDJ issue SWDJ can't play 0.5 46 Add Q98 0.6 PVT
15 USB OC Add USB OC delay circuit 0.5 40 Add R1201,R1202,R1203,R1204,R1205,

R1206,C1134,C1135,C1136 0.6 PVT
16 SVIDEO ISSUE SVIDEO out noise issue 0.5 12 Change C92 from SE107475M00 to SE077226M10 0.6 PVT
17 TV TUNNER No sound in IOMP mode 0.5 38 ADD TV_AUDIO_R and TV_AUDIO_L 0.6 PVT
18 Power sequence Power sequence 0.5 47 Add C172 for EDL70 power sequence 0.6 PVT
19 LCD Power sequence

for EDL70/72 Power off white screen issue 1.0 24 Add 1@ on R1118 and D34 1.1 PVT
4 4
20 ESD Add ESD diode for USB data and EC INVT_PWM pin Add U70, D38, D39 and D40 1.1 PVT
1.0 40, 41

Title
PIR
A B C D E

Compal La 2351 r1b Schematics

Uploaded by

Copyright:

Available Formats

You might also like

Compal La 2351 r1b Schematics

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Compal La 2351 r1b Schematics

Uploaded by

Copyright:

Available Formats

5 4 3 2 1

EDL70/71 Schematics Document

Intel Alviso + ICH6M

Compal Electronics, Inc.

+1.5VS/+VCCP +5VS CD-ROM

+1.8VS/ page 50 Int.KBD

CHARGER 3V/5V/12V DC/DC Interface +5VS

Date: Wednesday, March 02, 2005 Sheet 2 of 59

AC VIN MAINPWON LM358

Compal Electronics, Inc.

Date: Wednesday, March 02, 2005 Sheet 3 of 59

Board ID Table for AD channel

+CPU_CORE Core voltage for CPU ON OFF OFF

DDRII DIMM0 1010 000Xb @XX : Depop component

Date: Wednesday, March 02, 2005 Sheet 4 of 59

H_THERMDA, H_THERMDC routing together. TYCO_1612365-1_Dothan

Date: Wednesday, March 02, 2005 Sheet 5 of 59

Dothan VSS B12 W5 VCC VSS W22

POWER, GROUNG, RESERVED SIGNALS AND NC

E26 RSVD VSS L6 T3 VSS VSS AF17

V_CPU_GTLREF 1K_0603_1% M1 T23 AF24

other toggling signal.

Compal Electronics, Inc.

Date: Wednesday, March 02, 2005 Sheet 6 of 59

Near VCORE regulator.

ESR <= 3m ohm

Capacitor > 880uF

9mOhm 9mOhm 9mOhm 9mOhm

Compal Electronics, Inc.

Fan Control circuit

Thermal Sensor G781

H_THERMTRIP# 3 1 2SC2411K_SC59 C148 H_THERMDA 2 1 R146

41 EC_SMD_2 7 SDATA GND 5

Compal Electronics, Inc.

Date: Wednesday, March 02, 2005 Sheet 8 of 59

H_RS#1 C5 Layout Note: ALVISO_BGA1257

H_RS#2 B4 HRS2# Route as short

R99 Layout Note:

Compal Electronics, Inc.

Date: Wednesday, March 02, 2005 Sheet 9 of 59

DDR SYSTEM MEMORY B

DDR MEMORY SYSTEM A

Compal Electronics, Inc.

Date: Wednesday, March 02, 2005 Sheet 10 of 59

PCI - EXPRESS GRAPHICS

C LCTLA_CLK EXP_TXN1 CFG19 Low = 1.05V (Default) C

L_IBG LVDD_EN EXP_TXN5/SDVOC_GREEN# EXP_TXN6 R1180

C25 V36 EXP_TXN13 Have internal pulldown

R128 2.2K_0402_5% R132 R131

150_0603_1% 1@ R122 LDDC_CLK Q4 3 1 LCD_DDCCLK

150_0603_1% 1@ R124 +2.5VS

Date: Wednesday, March 02, 2005 Sheet 11 of 59

+3VS_TVDACA +3VS +3VS_TVDACC +3VS

M11 VTT10 VCCSM10 AK26 J29 VCC5 VCCA_TVDACC1 E18

M10 VTT20 VCCSM20 AK25 J28 VCC15 VCCD_LVDS2 A25

Y9 VTT23 VCCSM23 AG25 V27 VCC18

B2 VTT47 VCCSM47 AP12 U19 VCC42 VCCA_3GPLL0 Y29