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Cross Connected Source based Reduced Switch Count Multilevel Inverter

Topology with Fault Tolerance

Conference Paper · October 2019

DOI: 10.1109/GCAT47503.2019.8978379

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2019 Global Conference for Advancement in Technology (GCAT)
Bangalore, India. Oct 18-20, 2019
Cross Connected Source based Reduced Switch
Count Multilevel Inverter Topology with Fault
Tolerance
Nagaraja Rao Sulake Pranupa S.
Assistant Professor Assistant Professor
Department of Electrical Engineering, Department of Electrical Engineering,
Ramaiah University of Applied Sciences, Ramaiah University of Applied Sciences,
Bangalore, India Bangalore, India
nagarajarao.ee.et@msruas.ac.in pranupa.ee.et@msruas.ac.in
Abstract— Abstract—In this paper, topology of a Cross
Connected Source based Reduced Switch Count (CCS-RSC)
Multilevel Inverter (MLI) has been analyzed with fault
tolerance for a 7-level fed ‘R’ load. The proposed CCS-RSC
MLI generates higher voltage levels with optimum number of
power switches. The configuration results in an improved
power quality by due to reduction in the harmonic content,
compared to traditional Multilevel Inverters (MLIs). The CCS-
RSC MLI requires only ‘m+1’ power switches for ‘m’ levels,
whereas the traditional MLIs require ‘(2m-1)’ switches.
Therefore, CCS-RSC inverter requires only eight power
switches and three DC sources to generate 7-levels in the
output voltage. The redundant switch combinations get limited
due to the decrease in power switches. Consequently, the
possibility of fault tolerant capability gets effected for a few
particular faulty switches. The proposed inverter is analyzed
by reconfiguring the switching tables for fault tolerant
procedure for an open circuited single switch. Also, the
proposed inverter with sine wave reference and inverted sine
carrier modulation strategy has a lower %Voltage THD
compared to traditional MLI. The effective performance of the
suggested topology for a 7-level single-phase CCS-RSC
inverter with fault tolerance is validated with
MATLAB/SIMULINK for open circuit fault on each of the
power switches.
Keywords— CCS-RSC MLI, PWM, Fault tolerant, THD
I. INTRODUCTION
Multilevel Inverters (MLIs) use controlled power
switches along with several DC voltage levels by
synthesizing a stepped voltage waveform to maintain good
power quality in conversion from DC to AC [1]. In addition,
MLIs are techno-economically viable for both high and
medium power applications. Circuit setup for a given MLI
[2] that characterizes the mode of interconnection between
single/multiple sources, active/passive components and the
load is defines the “topology.” Over the years both industry
and academia have evinced interest in“traditional topologies”
(i.e., diode clamped, capacitor clamped and cascaded H-
bridge MLI topologies. The increased number of power
switches has been referred as one of the most significant
limitations of traditional MLIs. Off late this limitation has
been overcome, in various Reduced Switch Count (RSC)
MLI topologies [3, 4]. These RSC MLI topologies have
reduced gate driver circuits, heat sinks, protection circuits,
control complexity, cost and area.
MLIs offer significant improvement in Fault Tolerant
(FT) procedure due to accessibility of several states of
978-1-7281-3694-3/19/$31.00 ©2019 IEEE
Indira M.S.
Professor
Department of Electrical Engineering,
Ramaiah University of Applied Sciences,
Bangalore, India
indira.ee.et@msruas.ac.in
switching for identical voltage levels [5, 6]. These states are
termed as ‘redundant states’. The availability of redundant
states is apparently due to large number of power switches.
There is a decrease in the redundant states as the number of
power switches are reduced in RSC MLIs. Hence, RSC
MLIs are restricted with respect to FT operation. This paper
presents an approach to deal with FT capability of RSC-
MLIs by reconfiguring the switching tables for a single
power switch under open circuit [7, 8].
Off late, multilevel DC link inverter topologies are
proposed to decrease the number of power switches in
comparison to traditional MLIs. However these topologies
require more power switches to increase the levels in the
output voltage. In the present work CCS-RSC MLI topology
is suggested with reduced number of power switches. Also,
FT analysis has been done by reconfiguring the switching
combinations with faulty power switches. The proposed
CCS-RSC MLI topology can be effectively adopted with a
sine wave reference and inverted sine carrier modulation
strategy [9, 10]. This control scheme results in higher output
voltage with less THD. In addition, the modulation index for
the proposed topology can be modified to maintain good
power quality when fault occurs on power switches [11, 12].
The principle of CCS-RSC MLI is characterized in
Section II. Section III deals with the reconfiguration of
switching tables under fault conditions. Pulse generation
methodology for the proposed 7-level CCS-RSC MLI is
discussed in Section IV. Section V deals with the simulation
results for CCS-RSC MLI topology with ‘R’ load. The CCS-
RSC MLI topology is compared with traditional MLI in
Section VI.
II. CROSS CONNECTED SOURCE BASED REDUCED SWITCH
COUNT MULTILEVEL INVERTER
The circuit configuration of a 7-level single phase, CCS-
RSC MLI topology for single-phase is shown in Fig.1. The
topology consists of ‘8’ IGBT power switches and ‘3’
symmetrical DC sources/batteries with a resistive load. The
circuit produces ‘7’ voltage levels (i.e., -3Vdc, -2Vdc, -Vdc, 0,
+Vdc, +2Vdc, and +3Vdc,) across the load. The ‘8’ IGBTs are
grouped in two legs, with ‘4’ IGBTs in each leg. The
possible switching states/combinations is given by (1).
Ns = 2N (1)
Where, Ns is the number of possible switching states,
N is the number of IGBTs in each leg.
1
 9 S11, S2, S3, S4
10 S1, S2, S31, S41 - Vdc
11 S11, S21, S31, S4
12 S11, S2, S31, S41
- 2Vdc
13 S1, S2, S31, S4
14 S11, S2, S31, S4 - 3Vdc
15 S1, S21, S31, S4
0
16 S11, S2, S3, S41

TABLE II. SWITCHING COMBINATIONS FOR CCS-RSC MLI BY

EXCLUDING REDUNDANT STATES UNDER NORMAL/HEALTHY
CONDITION

Switching Output
S. No. Combinations/ Voltage (Vo)
Functions
1 S1, S21, S3, S41 +3Vdc
2 S1, S21, S3, S4 +2Vdc

3 S1, S21, S31, S41 +Vdc

Fig. 1. Single-phase 7-level CCS-RSC MLI topology

4 S11, S21, S31, S41 0

The 16 possible switching states/combinations in a 5 S11, S2, S3, S4 - Vdc

single-phase 7-level CCS-RSC MLI with redundant states
are given in Table I. It can be observed that there are both 6 6 S11, S2, S31, S41 - 2Vdc
positive, and negative with 4 zero output voltage levels,
7 S11, S2, S31, S4 - 3Vdc
indicated by the states 1, 2, 15 and 16. Zero voltage can be
achieved by short circuiting the main switches or
complementary switches or in combination through DC
sources. The total output voltage ‘Vo’ of CCS-RSC MLI in III. RECONFIGURATION OF SWITCHING TABLES FOR CCS-
terms of DC sources/batteries and power switches under RSC MLI UNDER FAULTY CONDITIONS
normal/healthy condition is given by (2). The switching
The proposed CCS-RSC MLI topology is analyzed under
states excluding redundant states are given in Table II.
open circuit, as these are most predominant faults in
semiconductor based power switches. During a fault on any
Vo = (S1 – S2) Vdc1 + (S3 – S2) Vdc2 + (S3 – S4) Vdc3 (2)
power switch, it is bypassed to obtain a symmetrical output
TABLE I. VALID SWITCHING STATES FOR CCS-RSC MLI voltage wave to maintain good power quality [6, 7].

Switching
State
Combinations/
Number
Functions
1 S1, S2, S3, S4
2 S11, S21, S31, S41
3 S1, S21, S31, S41
4 S11, S21, S3, S4
5 S1, S2, S3, S41
6 S1, S21, S3, S4
7 S11, S21, S3, S41
8 S1, S21, S3, S41
Output Fault on power switch S1: The switching states of the CCS-
Voltage
RSC MLI under normal or healthy mode of operation are
(Vo)
shown in Table II. If fault occurs on the power switch S1, the
switching combinations given in Table II cannot be used as
0 voltage levels +3Vdc, +2Vdc and +Vdc cannot be generated.
Alternate redundant paths from Table I can be selected to
generate the required voltage levels. However, +3Vdc voltage
level cannot be generated since there is no redundant path for
+3Vdc. Thus, the proposed CCS-RSC MLI generates an
+Vdc asymmetrical output waveform across the load due to
difference in the number of levels in the positive (two) and
negative half cycles (three) along with a zero level. A
symmetrical waveform can be obtained by modifying
Modulation Index (MI) to a value between >0.33 and ≤0.633
+2Vdc
for the power switch S1 under fault. Therefore, switching
combinations given in Table III can be followed for power
+3Vdc switch S1 under fault.

2
TABLE III. SWITCHING STATES FOR CCS-RSC MLI BY SELECTING compared with the sine wave reference (i.e., Vref) at a
REDUNDANT STATES WITH POWER SWITCH S1 UNDER FAULT
CONDITION fundamental frequency of 50Hz. The proposed control
scheme is divided into three phases to generate switching
Switching Output pulses [13, 14].
State Voltage
Combinations/
Number (Vo) Phase 1: Appropriate selection of reference and carrier
Functions
signals allows the control scheme proposed to adopt any
1 S11, S21, S3, S41 +2Vdc
modulation strategy. The carrier arrangement with reference
2 S11, S21, S3, S4 +Vdc signal is shown in Fig. 3. In this phase, at every instant, a
comparison is made between all the inverted carriers and the
3 S11, S21, S31, S41 0 sine wave reference. Resultant signals based on (3) and (4)
4 S11, S2, S3, S4 - Vdc are generated. (3) and (4).

5 S11, S2, S31, S41 - 2Vdc (3)

Fault on power switch S2: Similarly, when the fault occurs
on switch S2, the levels -3Vdc, -2Vdc and -Vdc cannot be
generated. Therefore alternate redundant paths from Table I
can be selected to generate required voltage levels. However,
-3Vdc and -2Vdc voltage levels cannot be generated as there
are no redundant paths available. Thus the proposed MLI
generates an asymmetrical output waveform across the load
due to difference in the number of levels in the positive
(three) and negative half cycles (one) along with a zero level.
A symmetrical waveform can be obtained by modifying MI
to a value between >0 and ≤0.333 for power switch S2 under
fault. Therefore, switching combinations given in Table IV
can be followed with power switch S2 under fault.
Furthermore, reconfigured switching states are listed in
Table IV with power switches S3, S4, S11, S21, S31 and S41
under fault conditions to generate required output voltage
levels using redundant paths.
TABLE IV. SWITCHING STATES FOR CCS-RSC MLI BY SELECTING
REDUNDANT STATES WITH DIFFERENT FAULTY POWER
SWITCHES
= 0, otherwise
(4)
= -1, otherwise
Phase 2: In the second phase, the waveform obtained using
(3) and (4) are added to synthesize a signal known Vexp (t)
given by (5). The output Vexp (t) is shown in Fig.3.
(5)
It is observed that Vexp (t) has the wave shape as expected
across the load.
Phase 3: Switching table can be formed based on the MLI
topology. The proposed control method is valid to for all
topologies of MLI. Furthermore, based on Vexp (t) and the
switching table, the MLI can be operated under normal and
open circuit FT conditions using any of the redundant
combination. Therefore, in Phase 3, switching pulses to be
used in CCS-RSC MLI can be derived.

Faulty Reconfigured Output

power state numbers voltage
switches from Table1 levels
S1 1,4,7,9,12 5
S2 1,3,10 3
S3 2,3,10 3
S4 2,4,7,10,13 5
S 11 1,3,6,10,13 5
S 21 1,5,9 3
S 31 1,4,9 3
Fig. 2. Signal generation using sine wave reference with inverted sine
S 41 1,4,6,9,13 5 carriers

IV. PULSE GENERATION CONTROL SCHEME FOR

CCS-RSC MLI
The proposed CCS-RSC MLI topology using sine wave
reference with inverted sine carrier modulation control
scheme is analyzed for 7-level under normal and FT
operating conditions. The schematic diagram of inverted sine
carrier modulation control is shown in Figure 4 [11].
Inverted sine carriers are incorporated into sine wave
reference to generate switching pulses. For a m-level CCS-
RSC MLI (m-1/2) carriers are required to generate
switching pulses in a 7-level CCS-RSC inverter. Six
inverted sine carrier signals (V+inv1, V+inv2, V+inv3, V-inv1, V- Fig. 3. Resultant output voltage Vexp (t)
-
inv2 and V inv3) with a 5 kHz switching frequency are

3
 Fig. 4. Schematic diagram of proposed control scheme for CCS-RSC MLI topology

V. SIMULATION RESULTS
CCS-RSC MLI topology for a single-phase 7-level fed
resistive load under normal operation and open circuit FT
conditions is simulated using MATLAB for the parameters
chosen listed in Table V.
Simulation results are presented for CCS-RSC MLI
topology with sine wave reference and inverted sine carrier
modulation control.

TABLE V. SIMULATION PARAMETERS OF CCS-RSC MLI

Parameter Value
Fig. 6. %Voltage THD of CCS-RSC MLI topology under normal operation
Voltage (Vdc1= Vdc2 = Vdc3) 76.66V
The output voltage and the corresponding %Voltage THD
Switching frequency 5kHz during normal operation using switching combinations
listed in Table II are shown Fig.5 and Fig.6 respectively.
Resistive load 10 Ω
From Fig. 5, it can be seen that the voltage levels obtained
Modulation index 0 to 1 during normal operation and %Voltage THD found to be
21.02% for the fundamental value of 226.8V.
A. Under normal operating conditions

Fig. 7. Output current of CCS-RSC MLI topology under normal mode

Fig. 5. Output voltage of CCS-RSC MLI topology under normal operation

4
 Fig. 11. Output voltage of CCS-RSC MLI topology under fault on power
switch S1 using redundant paths

Fig. 8. %Current THD of CCS-RSC MLI topology under normal mode

Furthermore, the output current and its %THD of CCS-

RSC MLI are shown in Fig. 7 and Fig. 8 respectively. It can
be observed that, the fundamental current value is 22.68A
and %Current THD is 21.02%. It can be noticed that %THD
of current and voltage remains the same for a resistive load.
B. Fault on power switch S1
The simulation results of CCS-RSC MLI with power
switch S1 under fault has been analyzed by reconfiguring
switching combinations.
Fig. 9. Output voltage of CCS-RSC MLI topology with fault on switch S1
Fig. 12. %Voltage THD of CCS-RSC MLI topology under fault on power
switch S1 using redundant paths
Fig. 11 and Fig. 12 shows the output voltage and %THD
with fault on power switch S1. As discussed in Section 3, it
can be observed that the +3Vdc voltage level is not generated
since there is no redundant path and the output voltage
waveform is asymmetrical. Therefore, the %Voltage THD
of 60.19% with redundant paths, is very high when
compared to normal mode or during fault on power switch
S1. Hence, symmetrical voltage waveform can be obtained
appropriately by defining the range of MI as shown in Fig.
13.

Fig. 13. Output voltage of CCS-RSC MLI topology under fault on power
switch S1 with modified MI

Fig. 10. %Voltage THD of CCS-RSC MLI topology with fault on power
switch S1

Fig. 9 and Fig. 10 shows the output voltage and %THD

with fault on power switch S1. As discussed in Section III it
can be observed that the three positive voltage levels are not
generated. Also, the %Voltage THD is 51.77% that is very
high when compared to normal mode of operation.
Therefore, it is necessary to reconfigure the switching
combinations using redundant paths listed in Table I. Fig. 14. %Voltage THD of CCS-RSC MLI topology under fault on power
switch S1 with modified MI

5
 Fig. 13 and Fig. 14 shows the output voltage and %THD
with fault on power switch S1 after updating MI. The
voltage waveform is symmetrical with %Voltage THD of
34.62%. Hence %Voltage THD value can be reduced
drastically by maintaining symmetrical voltage with
modified MI.
C. Fault on power switch S2
The simulation results of CCS-RSC MLI with fault on
power switch S2 has been analyzed by reconfiguring
switching combinations.
Fig. 18. %Voltage THD of CCS-RSC MLI topology with fault on power
switch S2 using redundant paths

The resultant asymmetrical waveform and %THD is

shown in Fig. 17 and Fig. 18 respectively. Symmetrical
voltage waveform can be obtained by modifying the range
of MI as shown in Fig. 19.

Fig. 15. Output voltage of CCS-RSC MLI topology under fault on power
switch S2

Fig. 19. Output voltage of CCS-RSC MLI topology under fault on power
switch S2 with modified MI

Fig.16. %Voltage THD of CCS-RSC MLI topology under fault on power

switch S2

Fig. 15 and Fig. 16 shows the output voltage and %THD

with fault on power switch S2. As discussed in Section III, it
can be observed that the three negative voltage levels are not
generated. Also, the %Voltage THD of 51.63% is very high
when compared to normal mode of operation. Therefore, it
is necessary to reconfigure the switching combinations
using redundant paths listed in Table I. However, the Fig. 20. %Voltage THD of CCS-RSC MLI topology under fault on power
voltage levels -2Vdc and -3Vdc cannot be generated, since switch S1 with modified MI
there are no redundant paths available. Hence, asymmetrical
voltage waveform can be generated by reconfiguring the Fig. 19 and Fig. 20 shows the output voltage and %THD
switching combinations. for fault on power switch S2 with modified MI. It can be
observed that the voltage waveform is symmetrical and
%Voltage THD is 63.39%. Also, form Fig. 19 it can be
observed that voltage levels have reduced from 7 to 3 with
increase in %Voltage THD.

D. Fault on any single power switch ( S3/ S4/S11/S21/S31/S41)

Fig. 17. Output voltage of CCS-RSC MLI topology under fault on power
switch S2 using redundant paths
Further, FT analysis has been carried out for open circuit
fault on single power switch and results are listed in Table
VI. It can be observed that %THD during fault on any
power switch is higher than that of healthy condition.
Therefore, it can be improved by reconfiguring switch
combinations using Table I and modifying MI to maintain

6
a symmetrical waveform. Also, it can be noticed that the by reconfiguring switch combinations and modified
%THD decreases with increase in number of levels. modulation index.

TABLE VI. FT ANALYSIS ON A SINGLE FAULTY POWER SWITCH

ACKNOWLEDGMENT
Analysis of output voltage
Authors would like to sincerely thank the Honorable
Faulty After reconfiguring Vice Chancellor and Management of RUAS for providing
power During fault switching table and all facilities required to carry out this research work.
switches updating MI
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reconfiguration of switching combinations and modifying
the range of MI. Also, sine wave reference with inverted
sine carrier pulse generation methodology has been
discussed. The case of open circuit fault for a single power
switch has been considered. Due to reduced number of
power switches the proposed CCS-RSC MLI topology has
less number of redundant switch combinations to achieve
required number of levels. The simulation results for the
proposed CCS-RSC MLI topology, are presented and is
seen that they work reasonably well under fault conditions

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